blob: a02a8df7372778bc41735c93240702daec8d21cc [file] [log] [blame]
Jesse Barnes79e53942008-11-07 14:24:08 -08001/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090028#include <linux/slab.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080029#include "drmP.h"
30#include "drm.h"
31#include "drm_crtc.h"
32#include "drm_crtc_helper.h"
33#include "intel_drv.h"
34#include "i915_drm.h"
35#include "i915_drv.h"
36
37static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
38{
39 struct drm_device *dev = encoder->dev;
40 struct drm_i915_private *dev_priv = dev->dev_private;
Zhenyu Wang2c072452009-06-05 15:38:42 +080041 u32 temp, reg;
Jesse Barnes79e53942008-11-07 14:24:08 -080042
Eric Anholtbad720f2009-10-22 16:11:14 -070043 if (HAS_PCH_SPLIT(dev))
Zhenyu Wang2c072452009-06-05 15:38:42 +080044 reg = PCH_ADPA;
45 else
46 reg = ADPA;
47
48 temp = I915_READ(reg);
Jesse Barnes79e53942008-11-07 14:24:08 -080049 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
ling.ma@intel.comfebc7692009-06-25 11:55:57 +080050 temp &= ~ADPA_DAC_ENABLE;
Jesse Barnes79e53942008-11-07 14:24:08 -080051
52 switch(mode) {
53 case DRM_MODE_DPMS_ON:
54 temp |= ADPA_DAC_ENABLE;
55 break;
56 case DRM_MODE_DPMS_STANDBY:
57 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
58 break;
59 case DRM_MODE_DPMS_SUSPEND:
60 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
61 break;
62 case DRM_MODE_DPMS_OFF:
63 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
64 break;
65 }
66
Zhenyu Wang2c072452009-06-05 15:38:42 +080067 I915_WRITE(reg, temp);
Jesse Barnes79e53942008-11-07 14:24:08 -080068}
69
70static int intel_crt_mode_valid(struct drm_connector *connector,
71 struct drm_display_mode *mode)
72{
Zhao Yakui6bcdcd92009-03-03 18:06:42 +080073 struct drm_device *dev = connector->dev;
74
75 int max_clock = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -080076 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
77 return MODE_NO_DBLESCAN;
78
Zhao Yakui6bcdcd92009-03-03 18:06:42 +080079 if (mode->clock < 25000)
80 return MODE_CLOCK_LOW;
81
82 if (!IS_I9XX(dev))
83 max_clock = 350000;
84 else
85 max_clock = 400000;
86 if (mode->clock > max_clock)
87 return MODE_CLOCK_HIGH;
Jesse Barnes79e53942008-11-07 14:24:08 -080088
89 return MODE_OK;
90}
91
92static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
93 struct drm_display_mode *mode,
94 struct drm_display_mode *adjusted_mode)
95{
96 return true;
97}
98
99static void intel_crt_mode_set(struct drm_encoder *encoder,
100 struct drm_display_mode *mode,
101 struct drm_display_mode *adjusted_mode)
102{
103
104 struct drm_device *dev = encoder->dev;
105 struct drm_crtc *crtc = encoder->crtc;
106 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
107 struct drm_i915_private *dev_priv = dev->dev_private;
108 int dpll_md_reg;
109 u32 adpa, dpll_md;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800110 u32 adpa_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800111
112 if (intel_crtc->pipe == 0)
113 dpll_md_reg = DPLL_A_MD;
114 else
115 dpll_md_reg = DPLL_B_MD;
116
Eric Anholtbad720f2009-10-22 16:11:14 -0700117 if (HAS_PCH_SPLIT(dev))
Zhenyu Wang2c072452009-06-05 15:38:42 +0800118 adpa_reg = PCH_ADPA;
119 else
120 adpa_reg = ADPA;
121
Jesse Barnes79e53942008-11-07 14:24:08 -0800122 /*
123 * Disable separate mode multiplier used when cloning SDVO to CRT
124 * XXX this needs to be adjusted when we really are cloning
125 */
Eric Anholtbad720f2009-10-22 16:11:14 -0700126 if (IS_I965G(dev) && !HAS_PCH_SPLIT(dev)) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800127 dpll_md = I915_READ(dpll_md_reg);
128 I915_WRITE(dpll_md_reg,
129 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
130 }
131
132 adpa = 0;
133 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
134 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
135 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
136 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
137
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800138 if (intel_crtc->pipe == 0) {
Zhenyu Wang8db9d772010-04-07 16:15:54 +0800139 if (HAS_PCH_CPT(dev))
140 adpa |= PORT_TRANS_A_SEL_CPT;
141 else
142 adpa |= ADPA_PIPE_A_SELECT;
Eric Anholtbad720f2009-10-22 16:11:14 -0700143 if (!HAS_PCH_SPLIT(dev))
Zhenyu Wang2c072452009-06-05 15:38:42 +0800144 I915_WRITE(BCLRPAT_A, 0);
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800145 } else {
Zhenyu Wang8db9d772010-04-07 16:15:54 +0800146 if (HAS_PCH_CPT(dev))
147 adpa |= PORT_TRANS_B_SEL_CPT;
148 else
149 adpa |= ADPA_PIPE_B_SELECT;
Eric Anholtbad720f2009-10-22 16:11:14 -0700150 if (!HAS_PCH_SPLIT(dev))
Zhenyu Wang2c072452009-06-05 15:38:42 +0800151 I915_WRITE(BCLRPAT_B, 0);
Zhao Yakui6bcdcd92009-03-03 18:06:42 +0800152 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800153
Zhenyu Wang2c072452009-06-05 15:38:42 +0800154 I915_WRITE(adpa_reg, adpa);
155}
156
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500157static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
Zhenyu Wang2c072452009-06-05 15:38:42 +0800158{
159 struct drm_device *dev = connector->dev;
160 struct drm_i915_private *dev_priv = dev->dev_private;
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800161 u32 adpa, temp;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800162 bool ret;
Dave Airlied5dd96c2010-08-04 15:52:19 +1000163 bool turn_off_dac = false;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800164
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800165 temp = adpa = I915_READ(PCH_ADPA);
Zhenyu Wang67941da2009-07-24 01:00:33 +0800166
Dave Airlied5dd96c2010-08-04 15:52:19 +1000167 if (HAS_PCH_SPLIT(dev))
168 turn_off_dac = true;
169
170 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
171 if (turn_off_dac)
172 adpa &= ~ADPA_DAC_ENABLE;
173
174 /* disable HPD first */
175 I915_WRITE(PCH_ADPA, adpa);
176 (void)I915_READ(PCH_ADPA);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800177
178 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
179 ADPA_CRT_HOTPLUG_WARMUP_10MS |
180 ADPA_CRT_HOTPLUG_SAMPLE_4S |
181 ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
182 ADPA_CRT_HOTPLUG_VOLREF_325MV |
183 ADPA_CRT_HOTPLUG_ENABLE |
184 ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
185
Zhao Yakui28c97732009-10-09 11:39:41 +0800186 DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800187 I915_WRITE(PCH_ADPA, adpa);
188
Chris Wilson913d8d12010-08-07 11:01:35 +0100189 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
190 1000, 1))
191 DRM_ERROR("timed out waiting for FORCE_TRIGGER");
Zhenyu Wang2c072452009-06-05 15:38:42 +0800192
Dave Airlied5dd96c2010-08-04 15:52:19 +1000193 if (turn_off_dac) {
Zhenyu Wanga4a6b902010-04-07 16:15:55 +0800194 I915_WRITE(PCH_ADPA, temp);
195 (void)I915_READ(PCH_ADPA);
196 }
197
Zhenyu Wang2c072452009-06-05 15:38:42 +0800198 /* Check the status to see if both blue and green are on now */
199 adpa = I915_READ(PCH_ADPA);
Zhenyu Wang67941da2009-07-24 01:00:33 +0800200 adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
201 if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
202 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
Zhenyu Wang2c072452009-06-05 15:38:42 +0800203 ret = true;
204 else
205 ret = false;
206
Zhenyu Wang2c072452009-06-05 15:38:42 +0800207 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800208}
209
210/**
211 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
212 *
213 * Not for i915G/i915GM
214 *
215 * \return true if CRT is connected.
216 * \return false if CRT is disconnected.
217 */
218static bool intel_crt_detect_hotplug(struct drm_connector *connector)
219{
220 struct drm_device *dev = connector->dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
Adam Jackson7a772c42010-05-24 16:46:29 -0400222 u32 hotplug_en, orig, stat;
223 bool ret = false;
Zhao Yakui771cb082009-03-03 18:07:52 +0800224 int i, tries = 0;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800225
Eric Anholtbad720f2009-10-22 16:11:14 -0700226 if (HAS_PCH_SPLIT(dev))
Adam Jacksonf2b115e2009-12-03 17:14:42 -0500227 return intel_ironlake_crt_detect_hotplug(connector);
Zhenyu Wang2c072452009-06-05 15:38:42 +0800228
Zhao Yakui771cb082009-03-03 18:07:52 +0800229 /*
230 * On 4 series desktop, CRT detect sequence need to be done twice
231 * to get a reliable result.
232 */
Jesse Barnes79e53942008-11-07 14:24:08 -0800233
Zhao Yakui771cb082009-03-03 18:07:52 +0800234 if (IS_G4X(dev) && !IS_GM45(dev))
235 tries = 2;
236 else
237 tries = 1;
Adam Jackson7a772c42010-05-24 16:46:29 -0400238 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
Zhao Yakui771cb082009-03-03 18:07:52 +0800239 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
Jesse Barnes79e53942008-11-07 14:24:08 -0800240
Zhao Yakui771cb082009-03-03 18:07:52 +0800241 for (i = 0; i < tries ; i++) {
Zhao Yakui771cb082009-03-03 18:07:52 +0800242 /* turn on the FORCE_DETECT */
243 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
Zhao Yakui771cb082009-03-03 18:07:52 +0800244 /* wait for FORCE_DETECT to go off */
Chris Wilson913d8d12010-08-07 11:01:35 +0100245 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
246 CRT_HOTPLUG_FORCE_DETECT) == 0,
247 1000, 1))
248 DRM_ERROR("timed out waiting for FORCE_DETECT to go off");
Zhao Yakui771cb082009-03-03 18:07:52 +0800249 }
Jesse Barnes79e53942008-11-07 14:24:08 -0800250
Adam Jackson7a772c42010-05-24 16:46:29 -0400251 stat = I915_READ(PORT_HOTPLUG_STAT);
252 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
253 ret = true;
Jesse Barnes79e53942008-11-07 14:24:08 -0800254
Adam Jackson7a772c42010-05-24 16:46:29 -0400255 /* clear the interrupt we just generated, if any */
256 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
257
258 /* and put the bits back */
259 I915_WRITE(PORT_HOTPLUG_EN, orig);
260
261 return ret;
Jesse Barnes79e53942008-11-07 14:24:08 -0800262}
263
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800264static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800265{
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800266 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800267
268 /* CRT should always be at 0, but check anyway */
Eric Anholt21d40d32010-03-25 11:11:14 -0700269 if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
Jesse Barnes79e53942008-11-07 14:24:08 -0800270 return false;
271
Eric Anholt21d40d32010-03-25 11:11:14 -0700272 return intel_ddc_probe(intel_encoder);
Jesse Barnes79e53942008-11-07 14:24:08 -0800273}
274
Ma Linge4a5d542009-05-26 11:31:00 +0800275static enum drm_connector_status
Eric Anholt21d40d32010-03-25 11:11:14 -0700276intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
Ma Linge4a5d542009-05-26 11:31:00 +0800277{
Eric Anholt21d40d32010-03-25 11:11:14 -0700278 struct drm_encoder *encoder = &intel_encoder->enc;
Ma Linge4a5d542009-05-26 11:31:00 +0800279 struct drm_device *dev = encoder->dev;
280 struct drm_i915_private *dev_priv = dev->dev_private;
281 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
282 uint32_t pipe = intel_crtc->pipe;
283 uint32_t save_bclrpat;
284 uint32_t save_vtotal;
285 uint32_t vtotal, vactive;
286 uint32_t vsample;
287 uint32_t vblank, vblank_start, vblank_end;
288 uint32_t dsl;
289 uint32_t bclrpat_reg;
290 uint32_t vtotal_reg;
291 uint32_t vblank_reg;
292 uint32_t vsync_reg;
293 uint32_t pipeconf_reg;
294 uint32_t pipe_dsl_reg;
295 uint8_t st00;
296 enum drm_connector_status status;
297
298 if (pipe == 0) {
299 bclrpat_reg = BCLRPAT_A;
300 vtotal_reg = VTOTAL_A;
301 vblank_reg = VBLANK_A;
302 vsync_reg = VSYNC_A;
303 pipeconf_reg = PIPEACONF;
304 pipe_dsl_reg = PIPEADSL;
305 } else {
306 bclrpat_reg = BCLRPAT_B;
307 vtotal_reg = VTOTAL_B;
308 vblank_reg = VBLANK_B;
309 vsync_reg = VSYNC_B;
310 pipeconf_reg = PIPEBCONF;
311 pipe_dsl_reg = PIPEBDSL;
312 }
313
314 save_bclrpat = I915_READ(bclrpat_reg);
315 save_vtotal = I915_READ(vtotal_reg);
316 vblank = I915_READ(vblank_reg);
317
318 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
319 vactive = (save_vtotal & 0x7ff) + 1;
320
321 vblank_start = (vblank & 0xfff) + 1;
322 vblank_end = ((vblank >> 16) & 0xfff) + 1;
323
324 /* Set the border color to purple. */
325 I915_WRITE(bclrpat_reg, 0x500050);
326
327 if (IS_I9XX(dev)) {
328 uint32_t pipeconf = I915_READ(pipeconf_reg);
329 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
330 /* Wait for next Vblank to substitue
331 * border color for Color info */
Jesse Barnes9d0498a2010-08-18 13:20:54 -0700332 intel_wait_for_vblank(dev, pipe);
Ma Linge4a5d542009-05-26 11:31:00 +0800333 st00 = I915_READ8(VGA_MSR_WRITE);
334 status = ((st00 & (1 << 4)) != 0) ?
335 connector_status_connected :
336 connector_status_disconnected;
337
338 I915_WRITE(pipeconf_reg, pipeconf);
339 } else {
340 bool restore_vblank = false;
341 int count, detect;
342
343 /*
344 * If there isn't any border, add some.
345 * Yes, this will flicker
346 */
347 if (vblank_start <= vactive && vblank_end >= vtotal) {
348 uint32_t vsync = I915_READ(vsync_reg);
349 uint32_t vsync_start = (vsync & 0xffff) + 1;
350
351 vblank_start = vsync_start;
352 I915_WRITE(vblank_reg,
353 (vblank_start - 1) |
354 ((vblank_end - 1) << 16));
355 restore_vblank = true;
356 }
357 /* sample in the vertical border, selecting the larger one */
358 if (vblank_start - vactive >= vtotal - vblank_end)
359 vsample = (vblank_start + vactive) >> 1;
360 else
361 vsample = (vtotal + vblank_end) >> 1;
362
363 /*
364 * Wait for the border to be displayed
365 */
366 while (I915_READ(pipe_dsl_reg) >= vactive)
367 ;
368 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
369 ;
370 /*
371 * Watch ST00 for an entire scanline
372 */
373 detect = 0;
374 count = 0;
375 do {
376 count++;
377 /* Read the ST00 VGA status register */
378 st00 = I915_READ8(VGA_MSR_WRITE);
379 if (st00 & (1 << 4))
380 detect++;
381 } while ((I915_READ(pipe_dsl_reg) == dsl));
382
383 /* restore vblank if necessary */
384 if (restore_vblank)
385 I915_WRITE(vblank_reg, vblank);
386 /*
387 * If more than 3/4 of the scanline detected a monitor,
388 * then it is assumed to be present. This works even on i830,
389 * where there isn't any way to force the border color across
390 * the screen
391 */
392 status = detect * 4 > count * 3 ?
393 connector_status_connected :
394 connector_status_disconnected;
395 }
396
397 /* Restore previous settings */
398 I915_WRITE(bclrpat_reg, save_bclrpat);
399
400 return status;
401}
402
Chris Wilson7b334fc2010-09-09 23:51:02 +0100403static enum drm_connector_status
Chris Wilson930a9e22010-09-14 11:07:23 +0100404intel_crt_detect(struct drm_connector *connector, bool force)
Jesse Barnes79e53942008-11-07 14:24:08 -0800405{
406 struct drm_device *dev = connector->dev;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800407 struct drm_encoder *encoder = intel_attached_encoder(connector);
408 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
Ma Linge4a5d542009-05-26 11:31:00 +0800409 struct drm_crtc *crtc;
410 int dpms_mode;
411 enum drm_connector_status status;
Jesse Barnes79e53942008-11-07 14:24:08 -0800412
413 if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
414 if (intel_crt_detect_hotplug(connector))
415 return connector_status_connected;
416 else
417 return connector_status_disconnected;
418 }
419
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800420 if (intel_crt_detect_ddc(encoder))
Jesse Barnes79e53942008-11-07 14:24:08 -0800421 return connector_status_connected;
422
Chris Wilson930a9e22010-09-14 11:07:23 +0100423 if (!force)
Chris Wilson7b334fc2010-09-09 23:51:02 +0100424 return connector->status;
425
Ma Linge4a5d542009-05-26 11:31:00 +0800426 /* for pre-945g platforms use load detect */
427 if (encoder->crtc && encoder->crtc->enabled) {
Eric Anholt21d40d32010-03-25 11:11:14 -0700428 status = intel_crt_load_detect(encoder->crtc, intel_encoder);
Ma Linge4a5d542009-05-26 11:31:00 +0800429 } else {
Zhenyu Wangc1c43972010-03-30 14:39:30 +0800430 crtc = intel_get_load_detect_pipe(intel_encoder, connector,
Ma Linge4a5d542009-05-26 11:31:00 +0800431 NULL, &dpms_mode);
432 if (crtc) {
Eric Anholt21d40d32010-03-25 11:11:14 -0700433 status = intel_crt_load_detect(crtc, intel_encoder);
Zhenyu Wangc1c43972010-03-30 14:39:30 +0800434 intel_release_load_detect_pipe(intel_encoder,
435 connector, dpms_mode);
Ma Linge4a5d542009-05-26 11:31:00 +0800436 } else
437 status = connector_status_unknown;
438 }
439
440 return status;
Jesse Barnes79e53942008-11-07 14:24:08 -0800441}
442
443static void intel_crt_destroy(struct drm_connector *connector)
444{
Jesse Barnes79e53942008-11-07 14:24:08 -0800445 drm_sysfs_connector_remove(connector);
446 drm_connector_cleanup(connector);
447 kfree(connector);
448}
449
450static int intel_crt_get_modes(struct drm_connector *connector)
451{
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800452 int ret;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800453 struct drm_encoder *encoder = intel_attached_encoder(connector);
454 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800455 struct i2c_adapter *ddc_bus;
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800456 struct drm_device *dev = connector->dev;
457
458
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800459 ret = intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800460 if (ret || !IS_G4X(dev))
461 goto end;
462
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800463 /* Try to probe digital port for output in DVI-I -> VGA mode. */
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800464 ddc_bus = intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800465
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800466 if (!ddc_bus) {
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800467 dev_printk(KERN_ERR, &connector->dev->pdev->dev,
468 "DDC bus registration failed for CRTDDC_D.\n");
469 goto end;
470 }
471 /* Try to get modes by GPIOD port */
Zhenyu Wang335af9a2010-03-30 14:39:31 +0800472 ret = intel_ddc_get_modes(connector, ddc_bus);
473 intel_i2c_destroy(ddc_bus);
ling.ma@intel.com8e4d36b2009-06-30 11:35:34 +0800474
475end:
476 return ret;
477
Jesse Barnes79e53942008-11-07 14:24:08 -0800478}
479
480static int intel_crt_set_property(struct drm_connector *connector,
481 struct drm_property *property,
482 uint64_t value)
483{
Jesse Barnes79e53942008-11-07 14:24:08 -0800484 return 0;
485}
486
487/*
488 * Routines for controlling stuff on the analog port
489 */
490
491static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
492 .dpms = intel_crt_dpms,
493 .mode_fixup = intel_crt_mode_fixup,
494 .prepare = intel_encoder_prepare,
495 .commit = intel_encoder_commit,
496 .mode_set = intel_crt_mode_set,
497};
498
499static const struct drm_connector_funcs intel_crt_connector_funcs = {
Keith Packardc9fb15f2009-05-30 20:42:28 -0700500 .dpms = drm_helper_connector_dpms,
Jesse Barnes79e53942008-11-07 14:24:08 -0800501 .detect = intel_crt_detect,
502 .fill_modes = drm_helper_probe_single_connector_modes,
503 .destroy = intel_crt_destroy,
504 .set_property = intel_crt_set_property,
505};
506
507static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
508 .mode_valid = intel_crt_mode_valid,
509 .get_modes = intel_crt_get_modes,
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800510 .best_encoder = intel_attached_encoder,
Jesse Barnes79e53942008-11-07 14:24:08 -0800511};
512
Jesse Barnes79e53942008-11-07 14:24:08 -0800513static const struct drm_encoder_funcs intel_crt_enc_funcs = {
Chris Wilsonea5b2132010-08-04 13:50:23 +0100514 .destroy = intel_encoder_destroy,
Jesse Barnes79e53942008-11-07 14:24:08 -0800515};
516
517void intel_crt_init(struct drm_device *dev)
518{
519 struct drm_connector *connector;
Eric Anholt21d40d32010-03-25 11:11:14 -0700520 struct intel_encoder *intel_encoder;
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800521 struct intel_connector *intel_connector;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200522 struct drm_i915_private *dev_priv = dev->dev_private;
Zhenyu Wang2c072452009-06-05 15:38:42 +0800523 u32 i2c_reg;
Jesse Barnes79e53942008-11-07 14:24:08 -0800524
Eric Anholt21d40d32010-03-25 11:11:14 -0700525 intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
526 if (!intel_encoder)
Jesse Barnes79e53942008-11-07 14:24:08 -0800527 return;
528
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800529 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
530 if (!intel_connector) {
531 kfree(intel_encoder);
532 return;
533 }
534
535 connector = &intel_connector->base;
536 drm_connector_init(dev, &intel_connector->base,
Jesse Barnes79e53942008-11-07 14:24:08 -0800537 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
538
Eric Anholt21d40d32010-03-25 11:11:14 -0700539 drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs,
Jesse Barnes79e53942008-11-07 14:24:08 -0800540 DRM_MODE_ENCODER_DAC);
541
Zhenyu Wang454c1ca2010-03-29 15:53:23 +0800542 drm_mode_connector_attach_encoder(&intel_connector->base,
Eric Anholt21d40d32010-03-25 11:11:14 -0700543 &intel_encoder->enc);
Jesse Barnes79e53942008-11-07 14:24:08 -0800544
545 /* Set up the DDC bus. */
Eric Anholtbad720f2009-10-22 16:11:14 -0700546 if (HAS_PCH_SPLIT(dev))
Zhenyu Wang2c072452009-06-05 15:38:42 +0800547 i2c_reg = PCH_GPIOA;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200548 else {
Zhenyu Wang2c072452009-06-05 15:38:42 +0800549 i2c_reg = GPIOA;
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200550 /* Use VBT information for CRT DDC if available */
Shaohua Li29874f42009-11-18 15:15:02 +0800551 if (dev_priv->crt_ddc_bus != 0)
David Müller (ELSOFT AG)db545012009-08-29 08:54:45 +0200552 i2c_reg = dev_priv->crt_ddc_bus;
553 }
Eric Anholt21d40d32010-03-25 11:11:14 -0700554 intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
555 if (!intel_encoder->ddc_bus) {
Jesse Barnes79e53942008-11-07 14:24:08 -0800556 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
557 "failed.\n");
558 return;
559 }
560
Eric Anholt21d40d32010-03-25 11:11:14 -0700561 intel_encoder->type = INTEL_OUTPUT_ANALOG;
562 intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
Ma Lingf8aed702009-08-24 13:50:24 +0800563 (1 << INTEL_ANALOG_CLONE_BIT) |
564 (1 << INTEL_SDVO_LVDS_CLONE_BIT);
Eric Anholt21d40d32010-03-25 11:11:14 -0700565 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
Krzysztof Halasa734b4152010-05-25 18:41:46 +0200566 connector->interlace_allowed = 1;
Jesse Barnes79e53942008-11-07 14:24:08 -0800567 connector->doublescan_allowed = 0;
568
Eric Anholt21d40d32010-03-25 11:11:14 -0700569 drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs);
Jesse Barnes79e53942008-11-07 14:24:08 -0800570 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
571
572 drm_sysfs_connector_add(connector);
Jesse Barnesb01f2c32009-12-11 11:07:17 -0800573
Dave Airlieeb1f8e42010-05-07 06:42:51 +0000574 if (I915_HAS_HOTPLUG(dev))
575 connector->polled = DRM_CONNECTOR_POLL_HPD;
576 else
577 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
578
Jesse Barnesb01f2c32009-12-11 11:07:17 -0800579 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
Jesse Barnes79e53942008-11-07 14:24:08 -0800580}