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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_radisys.c - Intel PATA/SATA controllers
3 *
4 * (C) 2006 Red Hat <alan@redhat.com>
5 *
6 * Some parts based on ata_piix.c by Jeff Garzik and others.
7 *
8 * A PIIX relative, this device has a single ATA channel and no
9 * slave timings, SITRE or PPE. In that sense it is a close relative
10 * of the original PIIX. It does however support UDMA 33/66 per channel
11 * although no other modes/timings. Also lacking is 32bit I/O on the ATA
12 * port.
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/init.h>
19#include <linux/blkdev.h>
20#include <linux/delay.h>
21#include <linux/device.h>
22#include <scsi/scsi_host.h>
23#include <linux/libata.h>
24#include <linux/ata.h>
25
26#define DRV_NAME "pata_radisys"
Alan Coxd36a7642007-03-08 22:56:07 +000027#define DRV_VERSION "0.4.4"
Jeff Garzik669a5db2006-08-29 18:12:40 -040028
29/**
30 * radisys_set_piomode - Initialize host controller PATA PIO timings
Alan Coxd36a7642007-03-08 22:56:07 +000031 * @ap: ATA port
32 * @adev: Device whose timings we are configuring
Jeff Garzik669a5db2006-08-29 18:12:40 -040033 *
34 * Set PIO mode for device, in host controller PCI config space.
35 *
36 * LOCKING:
37 * None (inherited from caller).
38 */
39
40static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
41{
42 unsigned int pio = adev->pio_mode - XFER_PIO_0;
43 struct pci_dev *dev = to_pci_dev(ap->host->dev);
44 u16 idetm_data;
45 int control = 0;
46
47 /*
48 * See Intel Document 298600-004 for the timing programing rules
49 * for PIIX/ICH. Note that the early PIIX does not have the slave
50 * timing port at 0x44. The Radisys is a relative of the PIIX
51 * but not the same so be careful.
52 */
53
54 static const /* ISP RTC */
55 u8 timings[][2] = { { 0, 0 }, /* Check me */
56 { 0, 0 },
57 { 1, 1 },
58 { 2, 2 },
59 { 3, 3 }, };
60
61 if (pio > 0)
62 control |= 1; /* TIME1 enable */
63 if (ata_pio_need_iordy(adev))
64 control |= 2; /* IE IORDY */
65
66 pci_read_config_word(dev, 0x40, &idetm_data);
67
68 /* Enable IE and TIME as appropriate. Clear the other
69 drive timing bits */
70 idetm_data &= 0xCCCC;
71 idetm_data |= (control << (4 * adev->devno));
72 idetm_data |= (timings[pio][0] << 12) |
73 (timings[pio][1] << 8);
74 pci_write_config_word(dev, 0x40, idetm_data);
75
76 /* Track which port is configured */
77 ap->private_data = adev;
78}
79
80/**
81 * radisys_set_dmamode - Initialize host controller PATA DMA timings
82 * @ap: Port whose timings we are configuring
83 * @adev: Device to program
84 * @isich: True if the device is an ICH and has IOCFG registers
85 *
86 * Set MWDMA mode for device, in host controller PCI config space.
87 *
88 * LOCKING:
89 * None (inherited from caller).
90 */
91
92static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
93{
94 struct pci_dev *dev = to_pci_dev(ap->host->dev);
95 u16 idetm_data;
96 u8 udma_enable;
Jeff Garzik85cd7252006-08-31 00:03:49 -040097
Jeff Garzik669a5db2006-08-29 18:12:40 -040098 static const /* ISP RTC */
99 u8 timings[][2] = { { 0, 0 },
100 { 0, 0 },
101 { 1, 1 },
102 { 2, 2 },
103 { 3, 3 }, };
104
105 /*
106 * MWDMA is driven by the PIO timings. We must also enable
107 * IORDY unconditionally.
108 */
109
110 pci_read_config_word(dev, 0x40, &idetm_data);
111 pci_read_config_byte(dev, 0x48, &udma_enable);
112
113 if (adev->dma_mode < XFER_UDMA_0) {
114 unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
115 const unsigned int needed_pio[3] = {
116 XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
117 };
118 int pio = needed_pio[mwdma] - XFER_PIO_0;
119 int control = 3; /* IORDY|TIME0 */
120
121 /* If the drive MWDMA is faster than it can do PIO then
122 we must force PIO0 for PIO cycles. */
123
124 if (adev->pio_mode < needed_pio[mwdma])
125 control = 1;
126
127 /* Mask out the relevant control and timing bits we will load. Also
128 clear the other drive TIME register as a precaution */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400129
Jeff Garzik669a5db2006-08-29 18:12:40 -0400130 idetm_data &= 0xCCCC;
131 idetm_data |= control << (4 * adev->devno);
132 idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
133
134 udma_enable &= ~(1 << adev->devno);
135 } else {
136 u8 udma_mode;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400137
Jeff Garzik669a5db2006-08-29 18:12:40 -0400138 /* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400139
Jeff Garzik669a5db2006-08-29 18:12:40 -0400140 pci_read_config_byte(dev, 0x4A, &udma_mode);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400141
Jeff Garzik669a5db2006-08-29 18:12:40 -0400142 if (adev->xfer_mode == XFER_UDMA_2)
143 udma_mode &= ~ (1 << adev->devno);
144 else /* UDMA 4 */
145 udma_mode |= (1 << adev->devno);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400146
Jeff Garzik669a5db2006-08-29 18:12:40 -0400147 pci_write_config_byte(dev, 0x4A, udma_mode);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400148
Jeff Garzik669a5db2006-08-29 18:12:40 -0400149 udma_enable |= (1 << adev->devno);
150 }
151 pci_write_config_word(dev, 0x40, idetm_data);
152 pci_write_config_byte(dev, 0x48, udma_enable);
153
154 /* Track which port is configured */
155 ap->private_data = adev;
156}
157
158/**
Tejun Heo9363c382008-04-07 22:47:16 +0900159 * radisys_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400160 * @qc: command pending
161 *
162 * Called when the libata layer is about to issue a command. We wrap
163 * this interface so that we can load the correct ATA timings if
Robert P. J. Day3a4fa0a2007-10-19 23:10:43 +0200164 * necessary. Our logic also clears TIME0/TIME1 for the other device so
Jeff Garzik669a5db2006-08-29 18:12:40 -0400165 * that, even if we get this wrong, cycles to the other device will
166 * be made PIO0.
167 */
168
Tejun Heo9363c382008-04-07 22:47:16 +0900169static unsigned int radisys_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400170{
171 struct ata_port *ap = qc->ap;
172 struct ata_device *adev = qc->dev;
173
174 if (adev != ap->private_data) {
175 /* UDMA timing is not shared */
176 if (adev->dma_mode < XFER_UDMA_0) {
177 if (adev->dma_mode)
178 radisys_set_dmamode(ap, adev);
179 else if (adev->pio_mode)
180 radisys_set_piomode(ap, adev);
181 }
182 }
Tejun Heo9363c382008-04-07 22:47:16 +0900183 return ata_sff_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400184}
185
186
187static struct scsi_host_template radisys_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900188 ATA_BMDMA_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400189};
190
Tejun Heo029cfd62008-03-25 12:22:49 +0900191static struct ata_port_operations radisys_pata_ops = {
192 .inherits = &ata_bmdma_port_ops,
Tejun Heo9363c382008-04-07 22:47:16 +0900193 .qc_issue = radisys_qc_issue,
Tejun Heo029cfd62008-03-25 12:22:49 +0900194 .cable_detect = ata_cable_unknown,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400195 .set_piomode = radisys_set_piomode,
196 .set_dmamode = radisys_set_dmamode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197};
198
199
200/**
201 * radisys_init_one - Register PIIX ATA PCI device with kernel services
202 * @pdev: PCI device to register
203 * @ent: Entry in radisys_pci_tbl matching with @pdev
204 *
205 * Called from kernel PCI layer. We probe for combined mode (sigh),
206 * and then hand over control to libata, for it to do the rest.
207 *
208 * LOCKING:
209 * Inherited from PCI layer (may sleep).
210 *
211 * RETURNS:
212 * Zero on success, or -ERRNO value.
213 */
214
215static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
216{
217 static int printed_version;
Tejun Heo1626aeb2007-05-04 12:43:58 +0200218 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400219 .flags = ATA_FLAG_SLAVE_POSS,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400220 .pio_mask = 0x1f, /* pio0-4 */
221 .mwdma_mask = 0x07, /* mwdma1-2 */
222 .udma_mask = 0x14, /* UDMA33/66 only */
223 .port_ops = &radisys_pata_ops,
224 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200225 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400226
227 if (!printed_version++)
228 dev_printk(KERN_DEBUG, &pdev->dev,
229 "version " DRV_VERSION "\n");
230
Tejun Heo9363c382008-04-07 22:47:16 +0900231 return ata_pci_sff_init_one(pdev, ppi, &radisys_sht, NULL);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400232}
233
234static const struct pci_device_id radisys_pci_tbl[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400235 { PCI_VDEVICE(RADISYS, 0x8201), },
236
Jeff Garzik669a5db2006-08-29 18:12:40 -0400237 { } /* terminate list */
238};
239
240static struct pci_driver radisys_pci_driver = {
241 .name = DRV_NAME,
242 .id_table = radisys_pci_tbl,
243 .probe = radisys_init_one,
244 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900245#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000246 .suspend = ata_pci_device_suspend,
247 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900248#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400249};
250
251static int __init radisys_init(void)
252{
253 return pci_register_driver(&radisys_pci_driver);
254}
255
256static void __exit radisys_exit(void)
257{
258 pci_unregister_driver(&radisys_pci_driver);
259}
260
Jeff Garzik669a5db2006-08-29 18:12:40 -0400261module_init(radisys_init);
262module_exit(radisys_exit);
263
264MODULE_AUTHOR("Alan Cox");
265MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
266MODULE_LICENSE("GPL");
267MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
268MODULE_VERSION(DRV_VERSION);
269