Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006, Intel Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License along with |
| 14 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple |
| 15 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
| 16 | * |
| 17 | * Copyright (C) Ashok Raj <ashok.raj@intel.com> |
| 18 | * Copyright (C) Shaohua Li <shaohua.li@intel.com> |
| 19 | */ |
| 20 | |
| 21 | #ifndef __DMAR_H__ |
| 22 | #define __DMAR_H__ |
| 23 | |
| 24 | #include <linux/acpi.h> |
| 25 | #include <linux/types.h> |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 26 | #include <linux/msi.h> |
Suresh Siddha | 1531a6a | 2009-03-16 17:04:57 -0700 | [diff] [blame] | 27 | #include <linux/irqreturn.h> |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 28 | |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 29 | struct intel_iommu; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 30 | #if defined(CONFIG_DMAR) || defined(CONFIG_INTR_REMAP) |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 31 | struct dmar_drhd_unit { |
| 32 | struct list_head list; /* list of drhd units */ |
Suresh Siddha | 1886e8a | 2008-07-10 11:16:37 -0700 | [diff] [blame] | 33 | struct acpi_dmar_header *hdr; /* ACPI header */ |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 34 | u64 reg_base_addr; /* register base address*/ |
| 35 | struct pci_dev **devices; /* target device array */ |
| 36 | int devices_cnt; /* target device count */ |
David Woodhouse | 276dbf99 | 2009-04-04 01:45:37 +0100 | [diff] [blame] | 37 | u16 segment; /* PCI domain */ |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 38 | u8 ignored:1; /* ignore drhd */ |
| 39 | u8 include_all:1; |
| 40 | struct intel_iommu *iommu; |
| 41 | }; |
| 42 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 43 | extern struct list_head dmar_drhd_units; |
| 44 | |
| 45 | #define for_each_drhd_unit(drhd) \ |
| 46 | list_for_each_entry(drhd, &dmar_drhd_units, list) |
| 47 | |
David Woodhouse | 8f912ba | 2009-04-03 15:19:32 +0100 | [diff] [blame] | 48 | #define for_each_active_iommu(i, drhd) \ |
| 49 | list_for_each_entry(drhd, &dmar_drhd_units, list) \ |
| 50 | if (i=drhd->iommu, drhd->ignored) {} else |
| 51 | |
| 52 | #define for_each_iommu(i, drhd) \ |
| 53 | list_for_each_entry(drhd, &dmar_drhd_units, list) \ |
| 54 | if (i=drhd->iommu, 0) {} else |
| 55 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 56 | extern int dmar_table_init(void); |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 57 | extern int dmar_dev_scope_init(void); |
| 58 | |
| 59 | /* Intel IOMMU detection */ |
| 60 | extern void detect_intel_iommu(void); |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 61 | extern int enable_drhd_fault_handling(void); |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 62 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 63 | extern int parse_ioapics_under_ir(void); |
| 64 | extern int alloc_iommu(struct dmar_drhd_unit *); |
| 65 | #else |
| 66 | static inline void detect_intel_iommu(void) |
| 67 | { |
| 68 | return; |
| 69 | } |
| 70 | |
| 71 | static inline int dmar_table_init(void) |
| 72 | { |
| 73 | return -ENODEV; |
| 74 | } |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 75 | static inline int enable_drhd_fault_handling(void) |
| 76 | { |
| 77 | return -1; |
| 78 | } |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 79 | #endif /* !CONFIG_DMAR && !CONFIG_INTR_REMAP */ |
| 80 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 81 | struct irte { |
| 82 | union { |
| 83 | struct { |
| 84 | __u64 present : 1, |
| 85 | fpd : 1, |
| 86 | dst_mode : 1, |
| 87 | redir_hint : 1, |
| 88 | trigger_mode : 1, |
| 89 | dlvry_mode : 3, |
| 90 | avail : 4, |
| 91 | __reserved_1 : 4, |
| 92 | vector : 8, |
| 93 | __reserved_2 : 8, |
| 94 | dest_id : 32; |
| 95 | }; |
| 96 | __u64 low; |
| 97 | }; |
| 98 | |
| 99 | union { |
| 100 | struct { |
| 101 | __u64 sid : 16, |
| 102 | sq : 2, |
| 103 | svt : 2, |
| 104 | __reserved_3 : 44; |
| 105 | }; |
| 106 | __u64 high; |
| 107 | }; |
| 108 | }; |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 109 | #ifdef CONFIG_INTR_REMAP |
| 110 | extern int intr_remapping_enabled; |
Weidong Han | 9375823 | 2009-04-17 16:42:14 +0800 | [diff] [blame^] | 111 | extern int intr_remapping_supported(void); |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 112 | extern int enable_intr_remapping(int); |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 113 | extern void disable_intr_remapping(void); |
| 114 | extern int reenable_intr_remapping(int); |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 115 | |
Suresh Siddha | b6fcb33 | 2008-07-10 11:16:44 -0700 | [diff] [blame] | 116 | extern int get_irte(int irq, struct irte *entry); |
| 117 | extern int modify_irte(int irq, struct irte *irte_modified); |
| 118 | extern int alloc_irte(struct intel_iommu *iommu, int irq, u16 count); |
| 119 | extern int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, |
| 120 | u16 sub_handle); |
| 121 | extern int map_irq_to_irte_handle(int irq, u16 *sub_handle); |
| 122 | extern int clear_irte_irq(int irq, struct intel_iommu *iommu, u16 index); |
| 123 | extern int flush_irte(int irq); |
| 124 | extern int free_irte(int irq); |
| 125 | |
| 126 | extern int irq_remapped(int irq); |
Suresh Siddha | 75c46fa | 2008-07-10 11:16:57 -0700 | [diff] [blame] | 127 | extern struct intel_iommu *map_dev_to_ir(struct pci_dev *dev); |
Suresh Siddha | 89027d3 | 2008-07-10 11:16:56 -0700 | [diff] [blame] | 128 | extern struct intel_iommu *map_ioapic_to_ir(int apic); |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 129 | #else |
Suresh Siddha | 29b61be | 2009-03-16 17:05:02 -0700 | [diff] [blame] | 130 | static inline int alloc_irte(struct intel_iommu *iommu, int irq, u16 count) |
| 131 | { |
| 132 | return -1; |
| 133 | } |
| 134 | static inline int modify_irte(int irq, struct irte *irte_modified) |
| 135 | { |
| 136 | return -1; |
| 137 | } |
| 138 | static inline int free_irte(int irq) |
| 139 | { |
| 140 | return -1; |
| 141 | } |
| 142 | static inline int map_irq_to_irte_handle(int irq, u16 *sub_handle) |
| 143 | { |
| 144 | return -1; |
| 145 | } |
| 146 | static inline int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, |
| 147 | u16 sub_handle) |
| 148 | { |
| 149 | return -1; |
| 150 | } |
| 151 | static inline struct intel_iommu *map_dev_to_ir(struct pci_dev *dev) |
| 152 | { |
| 153 | return NULL; |
| 154 | } |
| 155 | static inline struct intel_iommu *map_ioapic_to_ir(int apic) |
| 156 | { |
| 157 | return NULL; |
| 158 | } |
Suresh Siddha | b6fcb33 | 2008-07-10 11:16:44 -0700 | [diff] [blame] | 159 | #define irq_remapped(irq) (0) |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 160 | #define enable_intr_remapping(mode) (-1) |
| 161 | #define intr_remapping_enabled (0) |
| 162 | #endif |
| 163 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 164 | /* Can't use the common MSI interrupt functions |
| 165 | * since DMAR is not a pci device |
| 166 | */ |
| 167 | extern void dmar_msi_unmask(unsigned int irq); |
| 168 | extern void dmar_msi_mask(unsigned int irq); |
| 169 | extern void dmar_msi_read(int irq, struct msi_msg *msg); |
| 170 | extern void dmar_msi_write(int irq, struct msi_msg *msg); |
| 171 | extern int dmar_set_interrupt(struct intel_iommu *iommu); |
Suresh Siddha | 1531a6a | 2009-03-16 17:04:57 -0700 | [diff] [blame] | 172 | extern irqreturn_t dmar_fault(int irq, void *dev_id); |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 173 | extern int arch_setup_dmar_msi(unsigned int irq); |
| 174 | |
Suresh Siddha | 9d783ba | 2009-03-16 17:04:55 -0700 | [diff] [blame] | 175 | #ifdef CONFIG_DMAR |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 176 | extern int iommu_detected, no_iommu; |
| 177 | extern struct list_head dmar_rmrr_units; |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 178 | struct dmar_rmrr_unit { |
| 179 | struct list_head list; /* list of rmrr units */ |
Suresh Siddha | 1886e8a | 2008-07-10 11:16:37 -0700 | [diff] [blame] | 180 | struct acpi_dmar_header *hdr; /* ACPI header */ |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 181 | u64 base_address; /* reserved base address*/ |
| 182 | u64 end_address; /* reserved end address */ |
| 183 | struct pci_dev **devices; /* target devices */ |
| 184 | int devices_cnt; /* target device count */ |
| 185 | }; |
| 186 | |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 187 | #define for_each_rmrr_units(rmrr) \ |
| 188 | list_for_each_entry(rmrr, &dmar_rmrr_units, list) |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 189 | /* Intel DMAR initialization functions */ |
| 190 | extern int intel_iommu_init(void); |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 191 | #else |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 192 | static inline int intel_iommu_init(void) |
| 193 | { |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 194 | #ifdef CONFIG_INTR_REMAP |
| 195 | return dmar_dev_scope_init(); |
| 196 | #else |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 197 | return -ENODEV; |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 198 | #endif |
Suresh Siddha | 1886e8a | 2008-07-10 11:16:37 -0700 | [diff] [blame] | 199 | } |
Keshavamurthy, Anil S | ba39592 | 2007-10-21 16:41:49 -0700 | [diff] [blame] | 200 | #endif /* !CONFIG_DMAR */ |
Keshavamurthy, Anil S | 10e5247 | 2007-10-21 16:41:41 -0700 | [diff] [blame] | 201 | #endif /* __DMAR_H__ */ |