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Grant Likelyca632f52011-06-06 01:16:30 -06001/*
Wan ZongShun30eaed02009-12-01 14:29:20 +00002 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
Grant Likelyca632f52011-06-06 01:16:30 -06009 */
Wan ZongShun30eaed02009-12-01 14:29:20 +000010
Axel Lin00d29522011-11-24 11:10:51 +080011#include <linux/module.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000012#include <linux/init.h>
13#include <linux/spinlock.h>
14#include <linux/workqueue.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/errno.h>
18#include <linux/err.h>
19#include <linux/clk.h>
20#include <linux/device.h>
21#include <linux/platform_device.h>
22#include <linux/gpio.h>
23#include <linux/io.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090024#include <linux/slab.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000025
26#include <linux/spi/spi.h>
27#include <linux/spi/spi_bitbang.h>
28
Arnd Bergmann54ecf4f2012-08-24 15:18:36 +020029#include <linux/platform_data/spi-nuc900.h>
Wan ZongShun30eaed02009-12-01 14:29:20 +000030
31/* usi registers offset */
32#define USI_CNT 0x00
33#define USI_DIV 0x04
34#define USI_SSR 0x08
35#define USI_RX0 0x10
36#define USI_TX0 0x10
37
38/* usi register bit */
39#define ENINT (0x01 << 17)
40#define ENFLG (0x01 << 16)
41#define TXNUM (0x03 << 8)
42#define TXNEG (0x01 << 2)
43#define RXNEG (0x01 << 1)
44#define LSB (0x01 << 10)
45#define SELECTLEV (0x01 << 2)
46#define SELECTPOL (0x01 << 31)
47#define SELECTSLAVE 0x01
48#define GOBUSY 0x01
49
50struct nuc900_spi {
51 struct spi_bitbang bitbang;
52 struct completion done;
53 void __iomem *regs;
54 int irq;
55 int len;
56 int count;
57 const unsigned char *tx;
58 unsigned char *rx;
59 struct clk *clk;
60 struct resource *ioarea;
61 struct spi_master *master;
62 struct spi_device *curdev;
63 struct device *dev;
64 struct nuc900_spi_info *pdata;
65 spinlock_t lock;
66 struct resource *res;
67};
68
69static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
70{
71 return spi_master_get_devdata(sdev->master);
72}
73
74static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
75{
76 struct nuc900_spi *hw = to_hw(spi);
77 unsigned int val;
78 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
79 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
80 unsigned long flags;
81
82 spin_lock_irqsave(&hw->lock, flags);
83
84 val = __raw_readl(hw->regs + USI_SSR);
85
86 if (!cs)
87 val &= ~SELECTLEV;
88 else
89 val |= SELECTLEV;
90
91 if (!ssr)
92 val &= ~SELECTSLAVE;
93 else
94 val |= SELECTSLAVE;
95
96 __raw_writel(val, hw->regs + USI_SSR);
97
98 val = __raw_readl(hw->regs + USI_CNT);
99
100 if (!cpol)
101 val &= ~SELECTPOL;
102 else
103 val |= SELECTPOL;
104
105 __raw_writel(val, hw->regs + USI_CNT);
106
107 spin_unlock_irqrestore(&hw->lock, flags);
108}
109
110static void nuc900_spi_chipsel(struct spi_device *spi, int value)
111{
112 switch (value) {
113 case BITBANG_CS_INACTIVE:
114 nuc900_slave_select(spi, 0);
115 break;
116
117 case BITBANG_CS_ACTIVE:
118 nuc900_slave_select(spi, 1);
119 break;
120 }
121}
122
123static void nuc900_spi_setup_txnum(struct nuc900_spi *hw,
124 unsigned int txnum)
125{
126 unsigned int val;
127 unsigned long flags;
128
129 spin_lock_irqsave(&hw->lock, flags);
130
131 val = __raw_readl(hw->regs + USI_CNT);
132
133 if (!txnum)
134 val &= ~TXNUM;
135 else
136 val |= txnum << 0x08;
137
138 __raw_writel(val, hw->regs + USI_CNT);
139
140 spin_unlock_irqrestore(&hw->lock, flags);
141
142}
143
144static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
145 unsigned int txbitlen)
146{
147 unsigned int val;
148 unsigned long flags;
149
150 spin_lock_irqsave(&hw->lock, flags);
151
152 val = __raw_readl(hw->regs + USI_CNT);
153
154 val |= (txbitlen << 0x03);
155
156 __raw_writel(val, hw->regs + USI_CNT);
157
158 spin_unlock_irqrestore(&hw->lock, flags);
159}
160
161static void nuc900_spi_gobusy(struct nuc900_spi *hw)
162{
163 unsigned int val;
164 unsigned long flags;
165
166 spin_lock_irqsave(&hw->lock, flags);
167
168 val = __raw_readl(hw->regs + USI_CNT);
169
170 val |= GOBUSY;
171
172 __raw_writel(val, hw->regs + USI_CNT);
173
174 spin_unlock_irqrestore(&hw->lock, flags);
175}
176
Wan ZongShun30eaed02009-12-01 14:29:20 +0000177static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
178{
179 return hw->tx ? hw->tx[count] : 0;
180}
181
182static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
183{
184 struct nuc900_spi *hw = to_hw(spi);
185
186 hw->tx = t->tx_buf;
187 hw->rx = t->rx_buf;
188 hw->len = t->len;
189 hw->count = 0;
190
191 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
192
193 nuc900_spi_gobusy(hw);
194
195 wait_for_completion(&hw->done);
196
197 return hw->count;
198}
199
200static irqreturn_t nuc900_spi_irq(int irq, void *dev)
201{
202 struct nuc900_spi *hw = dev;
203 unsigned int status;
204 unsigned int count = hw->count;
205
206 status = __raw_readl(hw->regs + USI_CNT);
207 __raw_writel(status, hw->regs + USI_CNT);
208
209 if (status & ENFLG) {
210 hw->count++;
211
212 if (hw->rx)
213 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
214 count++;
215
216 if (count < hw->len) {
217 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
218 nuc900_spi_gobusy(hw);
219 } else {
220 complete(&hw->done);
221 }
222
223 return IRQ_HANDLED;
224 }
225
226 complete(&hw->done);
227 return IRQ_HANDLED;
228}
229
230static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
231{
232 unsigned int val;
233 unsigned long flags;
234
235 spin_lock_irqsave(&hw->lock, flags);
236
237 val = __raw_readl(hw->regs + USI_CNT);
238
239 if (edge)
240 val |= TXNEG;
241 else
242 val &= ~TXNEG;
243 __raw_writel(val, hw->regs + USI_CNT);
244
245 spin_unlock_irqrestore(&hw->lock, flags);
246}
247
248static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
249{
250 unsigned int val;
251 unsigned long flags;
252
253 spin_lock_irqsave(&hw->lock, flags);
254
255 val = __raw_readl(hw->regs + USI_CNT);
256
257 if (edge)
258 val |= RXNEG;
259 else
260 val &= ~RXNEG;
261 __raw_writel(val, hw->regs + USI_CNT);
262
263 spin_unlock_irqrestore(&hw->lock, flags);
264}
265
266static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
267{
268 unsigned int val;
269 unsigned long flags;
270
271 spin_lock_irqsave(&hw->lock, flags);
272
273 val = __raw_readl(hw->regs + USI_CNT);
274
275 if (lsb)
276 val |= LSB;
277 else
278 val &= ~LSB;
279 __raw_writel(val, hw->regs + USI_CNT);
280
281 spin_unlock_irqrestore(&hw->lock, flags);
282}
283
284static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
285{
286 unsigned int val;
287 unsigned long flags;
288
289 spin_lock_irqsave(&hw->lock, flags);
290
291 val = __raw_readl(hw->regs + USI_CNT);
292
293 if (sleep)
294 val |= (sleep << 12);
295 else
296 val &= ~(0x0f << 12);
297 __raw_writel(val, hw->regs + USI_CNT);
298
299 spin_unlock_irqrestore(&hw->lock, flags);
300}
301
302static void nuc900_enable_int(struct nuc900_spi *hw)
303{
304 unsigned int val;
305 unsigned long flags;
306
307 spin_lock_irqsave(&hw->lock, flags);
308
309 val = __raw_readl(hw->regs + USI_CNT);
310
311 val |= ENINT;
312
313 __raw_writel(val, hw->regs + USI_CNT);
314
315 spin_unlock_irqrestore(&hw->lock, flags);
316}
317
318static void nuc900_set_divider(struct nuc900_spi *hw)
319{
320 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
321}
322
323static void nuc900_init_spi(struct nuc900_spi *hw)
324{
325 clk_enable(hw->clk);
326 spin_lock_init(&hw->lock);
327
328 nuc900_tx_edge(hw, hw->pdata->txneg);
329 nuc900_rx_edge(hw, hw->pdata->rxneg);
330 nuc900_send_first(hw, hw->pdata->lsb);
331 nuc900_set_sleep(hw, hw->pdata->sleep);
332 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
333 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
334 nuc900_set_divider(hw);
335 nuc900_enable_int(hw);
336}
337
Grant Likelyfd4a3192012-12-07 16:57:14 +0000338static int nuc900_spi_probe(struct platform_device *pdev)
Wan ZongShun30eaed02009-12-01 14:29:20 +0000339{
340 struct nuc900_spi *hw;
341 struct spi_master *master;
342 int err = 0;
343
344 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
345 if (master == NULL) {
346 dev_err(&pdev->dev, "No memory for spi_master\n");
347 err = -ENOMEM;
348 goto err_nomem;
349 }
350
351 hw = spi_master_get_devdata(master);
Axel Lin94c69f72013-09-10 15:43:41 +0800352 hw->master = master;
Jingoo Han8074cf02013-07-30 16:58:59 +0900353 hw->pdata = dev_get_platdata(&pdev->dev);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000354 hw->dev = &pdev->dev;
355
356 if (hw->pdata == NULL) {
357 dev_err(&pdev->dev, "No platform data supplied\n");
358 err = -ENOENT;
359 goto err_pdata;
360 }
361
362 platform_set_drvdata(pdev, hw);
363 init_completion(&hw->done);
364
Axel Lin044d0bb2013-08-15 14:11:21 +0800365 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000366 master->num_chipselect = hw->pdata->num_cs;
367 master->bus_num = hw->pdata->bus_num;
368 hw->bitbang.master = hw->master;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000369 hw->bitbang.chipselect = nuc900_spi_chipsel;
370 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
Wan ZongShun30eaed02009-12-01 14:29:20 +0000371
372 hw->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
373 if (hw->res == NULL) {
374 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
375 err = -ENOENT;
376 goto err_pdata;
377 }
378
379 hw->ioarea = request_mem_region(hw->res->start,
380 resource_size(hw->res), pdev->name);
381
382 if (hw->ioarea == NULL) {
383 dev_err(&pdev->dev, "Cannot reserve region\n");
384 err = -ENXIO;
385 goto err_pdata;
386 }
387
388 hw->regs = ioremap(hw->res->start, resource_size(hw->res));
389 if (hw->regs == NULL) {
390 dev_err(&pdev->dev, "Cannot map IO\n");
391 err = -ENXIO;
392 goto err_iomap;
393 }
394
395 hw->irq = platform_get_irq(pdev, 0);
396 if (hw->irq < 0) {
397 dev_err(&pdev->dev, "No IRQ specified\n");
398 err = -ENOENT;
399 goto err_irq;
400 }
401
402 err = request_irq(hw->irq, nuc900_spi_irq, 0, pdev->name, hw);
403 if (err) {
404 dev_err(&pdev->dev, "Cannot claim IRQ\n");
405 goto err_irq;
406 }
407
408 hw->clk = clk_get(&pdev->dev, "spi");
409 if (IS_ERR(hw->clk)) {
410 dev_err(&pdev->dev, "No clock for device\n");
411 err = PTR_ERR(hw->clk);
412 goto err_clk;
413 }
414
Axel Lin97371fa2011-11-25 00:23:28 +0100415 mfp_set_groupg(&pdev->dev, NULL);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000416 nuc900_init_spi(hw);
417
418 err = spi_bitbang_start(&hw->bitbang);
419 if (err) {
420 dev_err(&pdev->dev, "Failed to register SPI master\n");
421 goto err_register;
422 }
423
424 return 0;
425
426err_register:
427 clk_disable(hw->clk);
428 clk_put(hw->clk);
429err_clk:
430 free_irq(hw->irq, hw);
431err_irq:
432 iounmap(hw->regs);
433err_iomap:
434 release_mem_region(hw->res->start, resource_size(hw->res));
435 kfree(hw->ioarea);
436err_pdata:
Joe Perchesbc3f67a2010-11-14 19:04:47 -0800437 spi_master_put(hw->master);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000438err_nomem:
439 return err;
440}
441
Grant Likelyfd4a3192012-12-07 16:57:14 +0000442static int nuc900_spi_remove(struct platform_device *dev)
Wan ZongShun30eaed02009-12-01 14:29:20 +0000443{
444 struct nuc900_spi *hw = platform_get_drvdata(dev);
445
446 free_irq(hw->irq, hw);
447
Axel Lin708a7e42011-05-15 07:33:28 +0800448 spi_bitbang_stop(&hw->bitbang);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000449
450 clk_disable(hw->clk);
451 clk_put(hw->clk);
452
453 iounmap(hw->regs);
454
455 release_mem_region(hw->res->start, resource_size(hw->res));
456 kfree(hw->ioarea);
457
458 spi_master_put(hw->master);
459 return 0;
460}
461
462static struct platform_driver nuc900_spi_driver = {
463 .probe = nuc900_spi_probe,
Grant Likelyfd4a3192012-12-07 16:57:14 +0000464 .remove = nuc900_spi_remove,
Wan ZongShun30eaed02009-12-01 14:29:20 +0000465 .driver = {
466 .name = "nuc900-spi",
467 .owner = THIS_MODULE,
468 },
469};
Grant Likely940ab882011-10-05 11:29:49 -0600470module_platform_driver(nuc900_spi_driver);
Wan ZongShun30eaed02009-12-01 14:29:20 +0000471
472MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
473MODULE_DESCRIPTION("nuc900 spi driver!");
474MODULE_LICENSE("GPL");
475MODULE_ALIAS("platform:nuc900-spi");