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Baruch Siach1e9c2852009-06-18 16:48:58 -07001/*
Grant Likelyc103de22011-06-04 18:38:28 -06002 * Copyright (C) 2008, 2009 Provigent Ltd.
Baruch Siach1e9c2852009-06-18 16:48:58 -07003 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Driver for the ARM PrimeCell(tm) General Purpose Input/Output (PL061)
9 *
10 * Data sheet: ARM DDI 0190B, September 2000
11 */
12#include <linux/spinlock.h>
13#include <linux/errno.h>
14#include <linux/module.h>
15#include <linux/list.h>
16#include <linux/io.h>
17#include <linux/ioport.h>
18#include <linux/irq.h>
19#include <linux/bitops.h>
20#include <linux/workqueue.h>
21#include <linux/gpio.h>
22#include <linux/device.h>
23#include <linux/amba/bus.h>
24#include <linux/amba/pl061.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090025#include <linux/slab.h>
Baruch Siach1e9c2852009-06-18 16:48:58 -070026
27#define GPIODIR 0x400
28#define GPIOIS 0x404
29#define GPIOIBE 0x408
30#define GPIOIEV 0x40C
31#define GPIOIE 0x410
32#define GPIORIS 0x414
33#define GPIOMIS 0x418
34#define GPIOIC 0x41C
35
36#define PL061_GPIO_NR 8
37
38struct pl061_gpio {
39 /* We use a list of pl061_gpio structs for each trigger IRQ in the main
40 * interrupts controller of the system. We need this to support systems
41 * in which more that one PL061s are connected to the same IRQ. The ISR
42 * interates through this list to find the source of the interrupt.
43 */
44 struct list_head list;
45
46 /* Each of the two spinlocks protects a different set of hardware
47 * regiters and data structurs. This decouples the code of the IRQ from
48 * the GPIO code. This also makes the case of a GPIO routine call from
49 * the IRQ code simpler.
50 */
51 spinlock_t lock; /* GPIO registers */
52 spinlock_t irq_lock; /* IRQ registers */
53
54 void __iomem *base;
55 unsigned irq_base;
56 struct gpio_chip gc;
57};
58
59static int pl061_direction_input(struct gpio_chip *gc, unsigned offset)
60{
61 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
62 unsigned long flags;
63 unsigned char gpiodir;
64
65 if (offset >= gc->ngpio)
66 return -EINVAL;
67
68 spin_lock_irqsave(&chip->lock, flags);
69 gpiodir = readb(chip->base + GPIODIR);
70 gpiodir &= ~(1 << offset);
71 writeb(gpiodir, chip->base + GPIODIR);
72 spin_unlock_irqrestore(&chip->lock, flags);
73
74 return 0;
75}
76
77static int pl061_direction_output(struct gpio_chip *gc, unsigned offset,
78 int value)
79{
80 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
81 unsigned long flags;
82 unsigned char gpiodir;
83
84 if (offset >= gc->ngpio)
85 return -EINVAL;
86
87 spin_lock_irqsave(&chip->lock, flags);
88 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
89 gpiodir = readb(chip->base + GPIODIR);
90 gpiodir |= 1 << offset;
91 writeb(gpiodir, chip->base + GPIODIR);
viresh kumar64b997c52010-04-21 09:42:05 +010092
93 /*
94 * gpio value is set again, because pl061 doesn't allow to set value of
95 * a gpio pin before configuring it in OUT mode.
96 */
97 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
Baruch Siach1e9c2852009-06-18 16:48:58 -070098 spin_unlock_irqrestore(&chip->lock, flags);
99
100 return 0;
101}
102
103static int pl061_get_value(struct gpio_chip *gc, unsigned offset)
104{
105 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
106
107 return !!readb(chip->base + (1 << (offset + 2)));
108}
109
110static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value)
111{
112 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
113
114 writeb(!!value << offset, chip->base + (1 << (offset + 2)));
115}
116
Baruch Siach50efacf2009-06-30 11:41:39 -0700117static int pl061_to_irq(struct gpio_chip *gc, unsigned offset)
118{
119 struct pl061_gpio *chip = container_of(gc, struct pl061_gpio, gc);
120
Rob Herring76c05c82011-08-10 16:31:46 -0500121 if (chip->irq_base == NO_IRQ)
Baruch Siach50efacf2009-06-30 11:41:39 -0700122 return -EINVAL;
123
124 return chip->irq_base + offset;
125}
126
Baruch Siach1e9c2852009-06-18 16:48:58 -0700127/*
128 * PL061 GPIO IRQ
129 */
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800130static void pl061_irq_disable(struct irq_data *d)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700131{
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800132 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
133 int offset = d->irq - chip->irq_base;
Baruch Siach1e9c2852009-06-18 16:48:58 -0700134 unsigned long flags;
135 u8 gpioie;
136
137 spin_lock_irqsave(&chip->irq_lock, flags);
138 gpioie = readb(chip->base + GPIOIE);
139 gpioie &= ~(1 << offset);
140 writeb(gpioie, chip->base + GPIOIE);
141 spin_unlock_irqrestore(&chip->irq_lock, flags);
142}
143
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800144static void pl061_irq_enable(struct irq_data *d)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700145{
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800146 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
147 int offset = d->irq - chip->irq_base;
Baruch Siach1e9c2852009-06-18 16:48:58 -0700148 unsigned long flags;
149 u8 gpioie;
150
151 spin_lock_irqsave(&chip->irq_lock, flags);
152 gpioie = readb(chip->base + GPIOIE);
153 gpioie |= 1 << offset;
154 writeb(gpioie, chip->base + GPIOIE);
155 spin_unlock_irqrestore(&chip->irq_lock, flags);
156}
157
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800158static int pl061_irq_type(struct irq_data *d, unsigned trigger)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700159{
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800160 struct pl061_gpio *chip = irq_data_get_irq_chip_data(d);
161 int offset = d->irq - chip->irq_base;
Baruch Siach1e9c2852009-06-18 16:48:58 -0700162 unsigned long flags;
163 u8 gpiois, gpioibe, gpioiev;
164
Axel Linc1cc9b92010-05-26 14:42:19 -0700165 if (offset < 0 || offset >= PL061_GPIO_NR)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700166 return -EINVAL;
167
168 spin_lock_irqsave(&chip->irq_lock, flags);
169
170 gpioiev = readb(chip->base + GPIOIEV);
171
172 gpiois = readb(chip->base + GPIOIS);
173 if (trigger & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
174 gpiois |= 1 << offset;
175 if (trigger & IRQ_TYPE_LEVEL_HIGH)
176 gpioiev |= 1 << offset;
177 else
178 gpioiev &= ~(1 << offset);
179 } else
180 gpiois &= ~(1 << offset);
181 writeb(gpiois, chip->base + GPIOIS);
182
183 gpioibe = readb(chip->base + GPIOIBE);
184 if ((trigger & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
185 gpioibe |= 1 << offset;
186 else {
187 gpioibe &= ~(1 << offset);
188 if (trigger & IRQ_TYPE_EDGE_RISING)
189 gpioiev |= 1 << offset;
viresh kumardb7e1bc2010-04-29 12:22:52 +0100190 else if (trigger & IRQ_TYPE_EDGE_FALLING)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700191 gpioiev &= ~(1 << offset);
192 }
193 writeb(gpioibe, chip->base + GPIOIBE);
194
195 writeb(gpioiev, chip->base + GPIOIEV);
196
197 spin_unlock_irqrestore(&chip->irq_lock, flags);
198
199 return 0;
200}
201
202static struct irq_chip pl061_irqchip = {
203 .name = "GPIO",
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800204 .irq_enable = pl061_irq_enable,
205 .irq_disable = pl061_irq_disable,
206 .irq_set_type = pl061_irq_type,
Baruch Siach1e9c2852009-06-18 16:48:58 -0700207};
208
209static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
210{
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000211 struct list_head *chip_list = irq_get_handler_data(irq);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700212 struct list_head *ptr;
213 struct pl061_gpio *chip;
214
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800215 desc->irq_data.chip->irq_ack(&desc->irq_data);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700216 list_for_each(ptr, chip_list) {
217 unsigned long pending;
Baruch Siach50efacf2009-06-30 11:41:39 -0700218 int offset;
Baruch Siach1e9c2852009-06-18 16:48:58 -0700219
220 chip = list_entry(ptr, struct pl061_gpio, list);
221 pending = readb(chip->base + GPIOMIS);
222 writeb(pending, chip->base + GPIOIC);
223
224 if (pending == 0)
225 continue;
226
Akinobu Mita984b3f52010-03-05 13:41:37 -0800227 for_each_set_bit(offset, &pending, PL061_GPIO_NR)
Baruch Siach50efacf2009-06-30 11:41:39 -0700228 generic_handle_irq(pl061_to_irq(&chip->gc, offset));
Baruch Siach1e9c2852009-06-18 16:48:58 -0700229 }
Lennert Buytenhekb2221862011-01-12 17:00:16 -0800230 desc->irq_data.chip->irq_unmask(&desc->irq_data);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700231}
232
Russell Kingaa25afa2011-02-19 15:55:00 +0000233static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700234{
235 struct pl061_platform_data *pdata;
236 struct pl061_gpio *chip;
237 struct list_head *chip_list;
238 int ret, irq, i;
Baruch Siach79d7f4e2009-06-30 11:41:38 -0700239 static DECLARE_BITMAP(init_irq, NR_IRQS);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700240
241 pdata = dev->dev.platform_data;
242 if (pdata == NULL)
243 return -ENODEV;
244
245 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
246 if (chip == NULL)
247 return -ENOMEM;
248
Rob Herring76c05c82011-08-10 16:31:46 -0500249 pdata = dev->dev.platform_data;
250 if (pdata) {
251 chip->gc.base = pdata->gpio_base;
252 chip->irq_base = pdata->irq_base;
253 } else if (dev->dev.of_node) {
254 chip->gc.base = -1;
255 chip->irq_base = NO_IRQ;
256 } else {
257 ret = -ENODEV;
258 goto free_mem;
259 }
260
Baruch Siach1e9c2852009-06-18 16:48:58 -0700261 if (!request_mem_region(dev->res.start,
262 resource_size(&dev->res), "pl061")) {
263 ret = -EBUSY;
264 goto free_mem;
265 }
266
267 chip->base = ioremap(dev->res.start, resource_size(&dev->res));
268 if (chip->base == NULL) {
269 ret = -ENOMEM;
270 goto release_region;
271 }
272
273 spin_lock_init(&chip->lock);
274 spin_lock_init(&chip->irq_lock);
275 INIT_LIST_HEAD(&chip->list);
276
277 chip->gc.direction_input = pl061_direction_input;
278 chip->gc.direction_output = pl061_direction_output;
279 chip->gc.get = pl061_get_value;
280 chip->gc.set = pl061_set_value;
Baruch Siach50efacf2009-06-30 11:41:39 -0700281 chip->gc.to_irq = pl061_to_irq;
Baruch Siach1e9c2852009-06-18 16:48:58 -0700282 chip->gc.ngpio = PL061_GPIO_NR;
283 chip->gc.label = dev_name(&dev->dev);
284 chip->gc.dev = &dev->dev;
285 chip->gc.owner = THIS_MODULE;
286
Baruch Siach1e9c2852009-06-18 16:48:58 -0700287 ret = gpiochip_add(&chip->gc);
288 if (ret)
289 goto iounmap;
290
291 /*
292 * irq_chip support
293 */
294
Rob Herring76c05c82011-08-10 16:31:46 -0500295 if (chip->irq_base == NO_IRQ)
Baruch Siach1e9c2852009-06-18 16:48:58 -0700296 return 0;
297
298 writeb(0, chip->base + GPIOIE); /* disable irqs */
299 irq = dev->irq[0];
300 if (irq < 0) {
301 ret = -ENODEV;
302 goto iounmap;
303 }
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000304 irq_set_chained_handler(irq, pl061_irq_handler);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700305 if (!test_and_set_bit(irq, init_irq)) { /* list initialized? */
306 chip_list = kmalloc(sizeof(*chip_list), GFP_KERNEL);
307 if (chip_list == NULL) {
Baruch Siach79d7f4e2009-06-30 11:41:38 -0700308 clear_bit(irq, init_irq);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700309 ret = -ENOMEM;
310 goto iounmap;
311 }
312 INIT_LIST_HEAD(chip_list);
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000313 irq_set_handler_data(irq, chip_list);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700314 } else
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000315 chip_list = irq_get_handler_data(irq);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700316 list_add(&chip->list, chip_list);
317
318 for (i = 0; i < PL061_GPIO_NR; i++) {
Rob Herring76c05c82011-08-10 16:31:46 -0500319 if (pdata) {
320 if (pdata->directions & (1 << i))
321 pl061_direction_output(&chip->gc, i,
322 pdata->values & (1 << i));
323 else
324 pl061_direction_input(&chip->gc, i);
325 }
Baruch Siach1e9c2852009-06-18 16:48:58 -0700326
Thomas Gleixner08f1b802011-03-24 21:27:37 +0000327 irq_set_chip_and_handler(i + chip->irq_base, &pl061_irqchip,
328 handle_simple_irq);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700329 set_irq_flags(i+chip->irq_base, IRQF_VALID);
Thomas Gleixnerb51804b2011-03-24 21:27:36 +0000330 irq_set_chip_data(i + chip->irq_base, chip);
Baruch Siach1e9c2852009-06-18 16:48:58 -0700331 }
332
333 return 0;
334
335iounmap:
336 iounmap(chip->base);
337release_region:
338 release_mem_region(dev->res.start, resource_size(&dev->res));
339free_mem:
340 kfree(chip);
341
342 return ret;
343}
344
Russell King2c39c9e2010-07-27 08:50:16 +0100345static struct amba_id pl061_ids[] = {
Baruch Siach1e9c2852009-06-18 16:48:58 -0700346 {
347 .id = 0x00041061,
348 .mask = 0x000fffff,
349 },
350 { 0, 0 },
351};
352
Dave Martin955b6782011-10-05 15:15:21 +0100353MODULE_DEVICE_TABLE(amba, pl061_ids);
354
Baruch Siach1e9c2852009-06-18 16:48:58 -0700355static struct amba_driver pl061_gpio_driver = {
356 .drv = {
357 .name = "pl061_gpio",
358 },
359 .id_table = pl061_ids,
360 .probe = pl061_probe,
361};
362
363static int __init pl061_gpio_init(void)
364{
365 return amba_driver_register(&pl061_gpio_driver);
366}
367subsys_initcall(pl061_gpio_init);
368
369MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
370MODULE_DESCRIPTION("PL061 GPIO driver");
371MODULE_LICENSE("GPL");