blob: 1bb16ffb4e41a9d0f252fc8a563188f97f343642 [file] [log] [blame]
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001/*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
Linus Walleij33d78642011-06-09 11:08:47 +02007 * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/device.h>
Rabin Vincent3e3c62c2010-03-03 04:52:34 +010017#include <linux/platform_device.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010018#include <linux/io.h>
Rabin Vincentaf7dc222010-05-06 11:14:17 +010019#include <linux/clk.h>
20#include <linux/err.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010021#include <linux/gpio.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
Lee Jonesa60b57e2012-04-19 21:36:31 +010025#include <linux/irqdomain.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090026#include <linux/slab.h>
Lee Jones855f80c2012-05-26 06:09:29 +010027#include <linux/of_device.h>
Linus Walleije98ea772012-04-26 23:57:25 +020028#include <linux/pinctrl/pinctrl.h>
Linus Walleijdbfe8ca2012-05-02 22:56:47 +020029#include <linux/pinctrl/pinmux.h>
Linus Walleijd41af622012-05-03 15:58:12 +020030#include <linux/pinctrl/pinconf.h>
Linus Walleijdbfe8ca2012-05-02 22:56:47 +020031/* Since we request GPIOs from ourself */
32#include <linux/pinctrl/consumer.h>
Linus Walleijbb16bd92012-10-10 14:27:58 +020033#include <linux/platform_data/pinctrl-nomadik.h>
Will Deaconadfed152011-02-28 10:12:29 +000034#include <asm/mach/irq.h>
Linus Walleijc3b9d1d2012-10-18 11:08:05 +020035#include <mach/irqs.h>
Linus Walleije98ea772012-04-26 23:57:25 +020036#include "pinctrl-nomadik.h"
37
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010038/*
39 * The GPIO module in the Nomadik family of Systems-on-Chip is an
40 * AMBA device, managing 32 pins and alternate functions. The logic block
Jonas Aaberg9c66ee62010-10-13 13:14:17 +020041 * is currently used in the Nomadik and ux500.
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010042 *
43 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
44 */
45
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010046struct nmk_gpio_chip {
47 struct gpio_chip chip;
Lee Jonesa60b57e2012-04-19 21:36:31 +010048 struct irq_domain *domain;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010049 void __iomem *addr;
Rabin Vincentaf7dc222010-05-06 11:14:17 +010050 struct clk *clk;
Rabin Vincent33b744b2010-10-14 10:38:03 +053051 unsigned int bank;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010052 unsigned int parent_irq;
Virupax Sadashivpetimath2c8bb0e2010-11-11 14:10:38 +053053 int secondary_parent_irq;
Rabin Vincent33b744b2010-10-14 10:38:03 +053054 u32 (*get_secondary_status)(unsigned int bank);
Rabin Vincent01727e62010-12-13 12:02:40 +053055 void (*set_ioforce)(bool enable);
Rabin Vincentc0fcb8d2010-03-03 04:48:54 +010056 spinlock_t lock;
Linus Walleij33d78642011-06-09 11:08:47 +020057 bool sleepmode;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010058 /* Keep track of configured edges */
59 u32 edge_rising;
60 u32 edge_falling;
Rabin Vincentb9df4682011-02-10 11:45:58 +053061 u32 real_wake;
62 u32 rwimsc;
63 u32 fwimsc;
Rabin Vincent6c12fe82011-05-23 12:13:33 +053064 u32 rimsc;
65 u32 fimsc;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +020066 u32 pull_up;
Rabin Vincentebc61782011-09-28 15:49:11 +053067 u32 lowemi;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010068};
69
Jonas Aabergf1671bf2012-10-25 08:40:42 +020070/**
71 * struct nmk_pinctrl - state container for the Nomadik pin controller
72 * @dev: containing device pointer
73 * @pctl: corresponding pin controller device
74 * @soc: SoC data for this specific chip
75 * @prcm_base: PRCM register range virtual base
76 */
Linus Walleije98ea772012-04-26 23:57:25 +020077struct nmk_pinctrl {
78 struct device *dev;
79 struct pinctrl_dev *pctl;
80 const struct nmk_pinctrl_soc_data *soc;
Jonas Aabergf1671bf2012-10-25 08:40:42 +020081 void __iomem *prcm_base;
Linus Walleije98ea772012-04-26 23:57:25 +020082};
83
Rabin Vincent01727e62010-12-13 12:02:40 +053084static struct nmk_gpio_chip *
85nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
86
87static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
88
89#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
90
Rabin Vincent6f9a9742010-06-02 05:50:28 +010091static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
92 unsigned offset, int gpio_mode)
93{
94 u32 bit = 1 << offset;
95 u32 afunc, bfunc;
96
97 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
98 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
99 if (gpio_mode & NMK_GPIO_ALT_A)
100 afunc |= bit;
101 if (gpio_mode & NMK_GPIO_ALT_B)
102 bfunc |= bit;
103 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
104 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
105}
106
Rabin Vincent81a3c292010-05-27 12:39:23 +0100107static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
108 unsigned offset, enum nmk_gpio_slpm mode)
109{
110 u32 bit = 1 << offset;
111 u32 slpm;
112
113 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
114 if (mode == NMK_GPIO_SLPM_NOCHANGE)
115 slpm |= bit;
116 else
117 slpm &= ~bit;
118 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
119}
120
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100121static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
122 unsigned offset, enum nmk_gpio_pull pull)
123{
124 u32 bit = 1 << offset;
125 u32 pdis;
126
127 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200128 if (pull == NMK_GPIO_PULL_NONE) {
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100129 pdis |= bit;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200130 nmk_chip->pull_up &= ~bit;
131 } else {
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100132 pdis &= ~bit;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200133 }
134
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100135 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
136
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200137 if (pull == NMK_GPIO_PULL_UP) {
138 nmk_chip->pull_up |= bit;
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100139 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200140 } else if (pull == NMK_GPIO_PULL_DOWN) {
141 nmk_chip->pull_up &= ~bit;
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100142 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200143 }
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100144}
145
Rabin Vincentebc61782011-09-28 15:49:11 +0530146static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip,
147 unsigned offset, bool lowemi)
148{
149 u32 bit = BIT(offset);
150 bool enabled = nmk_chip->lowemi & bit;
151
152 if (lowemi == enabled)
153 return;
154
155 if (lowemi)
156 nmk_chip->lowemi |= bit;
157 else
158 nmk_chip->lowemi &= ~bit;
159
160 writel_relaxed(nmk_chip->lowemi,
161 nmk_chip->addr + NMK_GPIO_LOWEMI);
162}
163
Rabin Vincent378be062010-06-02 06:06:29 +0100164static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
165 unsigned offset)
166{
167 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
168}
169
Rabin Vincent6720db72010-09-02 11:28:48 +0100170static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
171 unsigned offset, int val)
172{
173 if (val)
174 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
175 else
176 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
177}
178
179static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
180 unsigned offset, int val)
181{
182 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
183 __nmk_gpio_set_output(nmk_chip, offset, val);
184}
185
Rabin Vincent01727e62010-12-13 12:02:40 +0530186static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
187 unsigned offset, int gpio_mode,
188 bool glitch)
189{
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530190 u32 rwimsc = nmk_chip->rwimsc;
191 u32 fwimsc = nmk_chip->fwimsc;
Rabin Vincent01727e62010-12-13 12:02:40 +0530192
193 if (glitch && nmk_chip->set_ioforce) {
194 u32 bit = BIT(offset);
195
Rabin Vincent01727e62010-12-13 12:02:40 +0530196 /* Prevent spurious wakeups */
197 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
198 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
199
200 nmk_chip->set_ioforce(true);
201 }
202
203 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
204
205 if (glitch && nmk_chip->set_ioforce) {
206 nmk_chip->set_ioforce(false);
207
208 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
209 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
210 }
211}
212
Rabin Vincent6c42ad12011-05-23 12:22:18 +0530213static void
214nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)
215{
216 u32 falling = nmk_chip->fimsc & BIT(offset);
217 u32 rising = nmk_chip->rimsc & BIT(offset);
218 int gpio = nmk_chip->chip.base + offset;
219 int irq = NOMADIK_GPIO_TO_IRQ(gpio);
220 struct irq_data *d = irq_get_irq_data(irq);
221
222 if (!rising && !falling)
223 return;
224
225 if (!d || !irqd_irq_disabled(d))
226 return;
227
228 if (rising) {
229 nmk_chip->rimsc &= ~BIT(offset);
230 writel_relaxed(nmk_chip->rimsc,
231 nmk_chip->addr + NMK_GPIO_RIMSC);
232 }
233
234 if (falling) {
235 nmk_chip->fimsc &= ~BIT(offset);
236 writel_relaxed(nmk_chip->fimsc,
237 nmk_chip->addr + NMK_GPIO_FIMSC);
238 }
239
240 dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio);
241}
242
Jonas Aabergf1671bf2012-10-25 08:40:42 +0200243static void nmk_write_masked(void __iomem *reg, u32 mask, u32 value)
244{
245 u32 val;
246
247 val = readl(reg);
248 val = ((val & ~mask) | (value & mask));
249 writel(val, reg);
250}
251
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +0200252static void nmk_prcm_altcx_set_mode(struct nmk_pinctrl *npct,
253 unsigned offset, unsigned alt_num)
254{
255 int i;
256 u16 reg;
257 u8 bit;
258 u8 alt_index;
259 const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
260 const u16 *gpiocr_regs;
261
Fabio Baltieri4ca075d2012-12-18 10:12:11 +0100262 if (!npct->prcm_base)
263 return;
264
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +0200265 if (alt_num > PRCM_IDX_GPIOCR_ALTC_MAX) {
266 dev_err(npct->dev, "PRCM GPIOCR: alternate-C%i is invalid\n",
267 alt_num);
268 return;
269 }
270
271 for (i = 0 ; i < npct->soc->npins_altcx ; i++) {
272 if (npct->soc->altcx_pins[i].pin == offset)
273 break;
274 }
275 if (i == npct->soc->npins_altcx) {
276 dev_dbg(npct->dev, "PRCM GPIOCR: pin %i is not found\n",
277 offset);
278 return;
279 }
280
281 pin_desc = npct->soc->altcx_pins + i;
282 gpiocr_regs = npct->soc->prcm_gpiocr_registers;
283
284 /*
285 * If alt_num is NULL, just clear current ALTCx selection
286 * to make sure we come back to a pure ALTC selection
287 */
288 if (!alt_num) {
289 for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) {
290 if (pin_desc->altcx[i].used == true) {
291 reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
292 bit = pin_desc->altcx[i].control_bit;
Jonas Aabergf1671bf2012-10-25 08:40:42 +0200293 if (readl(npct->prcm_base + reg) & BIT(bit)) {
294 nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0);
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +0200295 dev_dbg(npct->dev,
296 "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n",
297 offset, i+1);
298 }
299 }
300 }
301 return;
302 }
303
304 alt_index = alt_num - 1;
305 if (pin_desc->altcx[alt_index].used == false) {
306 dev_warn(npct->dev,
307 "PRCM GPIOCR: pin %i: alternate-C%i does not exist\n",
308 offset, alt_num);
309 return;
310 }
311
312 /*
313 * Check if any other ALTCx functions are activated on this pin
314 * and disable it first.
315 */
316 for (i = 0 ; i < PRCM_IDX_GPIOCR_ALTC_MAX ; i++) {
317 if (i == alt_index)
318 continue;
319 if (pin_desc->altcx[i].used == true) {
320 reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
321 bit = pin_desc->altcx[i].control_bit;
Jonas Aabergf1671bf2012-10-25 08:40:42 +0200322 if (readl(npct->prcm_base + reg) & BIT(bit)) {
323 nmk_write_masked(npct->prcm_base + reg, BIT(bit), 0);
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +0200324 dev_dbg(npct->dev,
325 "PRCM GPIOCR: pin %i: alternate-C%i has been disabled\n",
326 offset, i+1);
327 }
328 }
329 }
330
331 reg = gpiocr_regs[pin_desc->altcx[alt_index].reg_index];
332 bit = pin_desc->altcx[alt_index].control_bit;
333 dev_dbg(npct->dev, "PRCM GPIOCR: pin %i: alternate-C%i has been selected\n",
334 offset, alt_index+1);
Jonas Aabergf1671bf2012-10-25 08:40:42 +0200335 nmk_write_masked(npct->prcm_base + reg, BIT(bit), BIT(bit));
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +0200336}
337
Rabin Vincent378be062010-06-02 06:06:29 +0100338static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
Rabin Vincent01727e62010-12-13 12:02:40 +0530339 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
Rabin Vincent378be062010-06-02 06:06:29 +0100340{
341 static const char *afnames[] = {
342 [NMK_GPIO_ALT_GPIO] = "GPIO",
343 [NMK_GPIO_ALT_A] = "A",
344 [NMK_GPIO_ALT_B] = "B",
345 [NMK_GPIO_ALT_C] = "C"
346 };
347 static const char *pullnames[] = {
348 [NMK_GPIO_PULL_NONE] = "none",
349 [NMK_GPIO_PULL_UP] = "up",
350 [NMK_GPIO_PULL_DOWN] = "down",
351 [3] /* illegal */ = "??"
352 };
353 static const char *slpmnames[] = {
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100354 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
355 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
Rabin Vincent378be062010-06-02 06:06:29 +0100356 };
357
358 int pin = PIN_NUM(cfg);
359 int pull = PIN_PULL(cfg);
360 int af = PIN_ALT(cfg);
361 int slpm = PIN_SLPM(cfg);
Rabin Vincent6720db72010-09-02 11:28:48 +0100362 int output = PIN_DIR(cfg);
363 int val = PIN_VAL(cfg);
Rabin Vincent01727e62010-12-13 12:02:40 +0530364 bool glitch = af == NMK_GPIO_ALT_C;
Rabin Vincent378be062010-06-02 06:06:29 +0100365
Rabin Vincentdacdc962010-12-03 20:35:37 +0530366 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
367 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
Rabin Vincent6720db72010-09-02 11:28:48 +0100368 output ? "output " : "input",
369 output ? (val ? "high" : "low") : "");
Rabin Vincent378be062010-06-02 06:06:29 +0100370
Rabin Vincentdacdc962010-12-03 20:35:37 +0530371 if (sleep) {
372 int slpm_pull = PIN_SLPM_PULL(cfg);
373 int slpm_output = PIN_SLPM_DIR(cfg);
374 int slpm_val = PIN_SLPM_VAL(cfg);
375
Rabin Vincent3546d152010-11-25 11:38:27 +0530376 af = NMK_GPIO_ALT_GPIO;
377
Rabin Vincentdacdc962010-12-03 20:35:37 +0530378 /*
379 * The SLPM_* values are normal values + 1 to allow zero to
380 * mean "same as normal".
381 */
382 if (slpm_pull)
383 pull = slpm_pull - 1;
384 if (slpm_output)
385 output = slpm_output - 1;
386 if (slpm_val)
387 val = slpm_val - 1;
388
389 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
390 pin,
391 slpm_pull ? pullnames[pull] : "same",
392 slpm_output ? (output ? "output" : "input") : "same",
393 slpm_val ? (val ? "high" : "low") : "same");
394 }
395
Rabin Vincent6720db72010-09-02 11:28:48 +0100396 if (output)
397 __nmk_gpio_make_output(nmk_chip, offset, val);
398 else {
399 __nmk_gpio_make_input(nmk_chip, offset);
400 __nmk_gpio_set_pull(nmk_chip, offset, pull);
401 }
402
Rabin Vincentebc61782011-09-28 15:49:11 +0530403 __nmk_gpio_set_lowemi(nmk_chip, offset, PIN_LOWEMI(cfg));
404
Rabin Vincent01727e62010-12-13 12:02:40 +0530405 /*
Rabin Vincent6c42ad12011-05-23 12:22:18 +0530406 * If the pin is switching to altfunc, and there was an interrupt
407 * installed on it which has been lazy disabled, actually mask the
408 * interrupt to prevent spurious interrupts that would occur while the
409 * pin is under control of the peripheral. Only SKE does this.
410 */
411 if (af != NMK_GPIO_ALT_GPIO)
412 nmk_gpio_disable_lazy_irq(nmk_chip, offset);
413
414 /*
Rabin Vincent01727e62010-12-13 12:02:40 +0530415 * If we've backed up the SLPM registers (glitch workaround), modify
416 * the backups since they will be restored.
417 */
418 if (slpmregs) {
419 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
420 slpmregs[nmk_chip->bank] |= BIT(offset);
421 else
422 slpmregs[nmk_chip->bank] &= ~BIT(offset);
423 } else
424 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
425
426 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
427}
428
429/*
430 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
431 * - Save SLPM registers
432 * - Set SLPM=0 for the IOs you want to switch and others to 1
433 * - Configure the GPIO registers for the IOs that are being switched
434 * - Set IOFORCE=1
435 * - Modify the AFLSA/B registers for the IOs that are being switched
436 * - Set IOFORCE=0
437 * - Restore SLPM registers
438 * - Any spurious wake up event during switch sequence to be ignored and
439 * cleared
440 */
441static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
442{
443 int i;
444
445 for (i = 0; i < NUM_BANKS; i++) {
446 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
447 unsigned int temp = slpm[i];
448
449 if (!chip)
450 break;
451
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200452 clk_enable(chip->clk);
453
Rabin Vincent01727e62010-12-13 12:02:40 +0530454 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
455 writel(temp, chip->addr + NMK_GPIO_SLPC);
456 }
457}
458
459static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
460{
461 int i;
462
463 for (i = 0; i < NUM_BANKS; i++) {
464 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
465
466 if (!chip)
467 break;
468
469 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200470
471 clk_disable(chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530472 }
473}
474
475static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
476{
477 static unsigned int slpm[NUM_BANKS];
478 unsigned long flags;
479 bool glitch = false;
480 int ret = 0;
481 int i;
482
483 for (i = 0; i < num; i++) {
484 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
485 glitch = true;
486 break;
487 }
488 }
489
490 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
491
492 if (glitch) {
493 memset(slpm, 0xff, sizeof(slpm));
494
495 for (i = 0; i < num; i++) {
496 int pin = PIN_NUM(cfgs[i]);
497 int offset = pin % NMK_GPIO_PER_CHIP;
498
499 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
500 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
501 }
502
503 nmk_gpio_glitch_slpm_init(slpm);
504 }
505
506 for (i = 0; i < num; i++) {
507 struct nmk_gpio_chip *nmk_chip;
508 int pin = PIN_NUM(cfgs[i]);
509
Lee Jonesa60b57e2012-04-19 21:36:31 +0100510 nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];
Rabin Vincent01727e62010-12-13 12:02:40 +0530511 if (!nmk_chip) {
512 ret = -EINVAL;
513 break;
514 }
515
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200516 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530517 spin_lock(&nmk_chip->lock);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100518 __nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,
Rabin Vincent01727e62010-12-13 12:02:40 +0530519 cfgs[i], sleep, glitch ? slpm : NULL);
520 spin_unlock(&nmk_chip->lock);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200521 clk_disable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530522 }
523
524 if (glitch)
525 nmk_gpio_glitch_slpm_restore(slpm);
526
527 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
528
529 return ret;
Rabin Vincent378be062010-06-02 06:06:29 +0100530}
531
532/**
533 * nmk_config_pin - configure a pin's mux attributes
534 * @cfg: pin confguration
Linus Walleij50bcd472012-07-04 11:25:36 +0200535 * @sleep: Non-zero to apply the sleep mode configuration
Rabin Vincent378be062010-06-02 06:06:29 +0100536 * Configures a pin's mode (alternate function or GPIO), its pull up status,
537 * and its sleep mode based on the specified configuration. The @cfg is
538 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
539 * are constructed using, and can be further enhanced with, the macros in
Linus Walleij287f1212012-10-10 14:35:17 +0200540 * <linux/platform_data/pinctrl-nomadik.h>
Rabin Vincent378be062010-06-02 06:06:29 +0100541 *
542 * If a pin's mode is set to GPIO, it is configured as an input to avoid
543 * side-effects. The gpio can be manipulated later using standard GPIO API
544 * calls.
545 */
Rabin Vincentdacdc962010-12-03 20:35:37 +0530546int nmk_config_pin(pin_cfg_t cfg, bool sleep)
Rabin Vincent378be062010-06-02 06:06:29 +0100547{
Rabin Vincent01727e62010-12-13 12:02:40 +0530548 return __nmk_config_pins(&cfg, 1, sleep);
Rabin Vincent378be062010-06-02 06:06:29 +0100549}
550EXPORT_SYMBOL(nmk_config_pin);
551
552/**
553 * nmk_config_pins - configure several pins at once
554 * @cfgs: array of pin configurations
555 * @num: number of elments in the array
556 *
557 * Configures several pins using nmk_config_pin(). Refer to that function for
558 * further information.
559 */
560int nmk_config_pins(pin_cfg_t *cfgs, int num)
561{
Rabin Vincent01727e62010-12-13 12:02:40 +0530562 return __nmk_config_pins(cfgs, num, false);
Rabin Vincent378be062010-06-02 06:06:29 +0100563}
564EXPORT_SYMBOL(nmk_config_pins);
565
Rabin Vincentdacdc962010-12-03 20:35:37 +0530566int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
567{
Rabin Vincent01727e62010-12-13 12:02:40 +0530568 return __nmk_config_pins(cfgs, num, true);
Rabin Vincentdacdc962010-12-03 20:35:37 +0530569}
570EXPORT_SYMBOL(nmk_config_pins_sleep);
571
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100572/**
Rabin Vincent81a3c292010-05-27 12:39:23 +0100573 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
574 * @gpio: pin number
575 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
576 *
Linus Walleij33d78642011-06-09 11:08:47 +0200577 * This register is actually in the pinmux layer, not the GPIO block itself.
578 * The GPIO1B_SLPM register defines the GPIO mode when SLEEP/DEEP-SLEEP
579 * mode is entered (i.e. when signal IOFORCE is HIGH by the platform code).
580 * Each GPIO can be configured to be forced into GPIO mode when IOFORCE is
581 * HIGH, overriding the normal setting defined by GPIO_AFSELx registers.
582 * When IOFORCE returns LOW (by software, after SLEEP/DEEP-SLEEP exit),
583 * the GPIOs return to the normal setting defined by GPIO_AFSELx registers.
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100584 *
Linus Walleij33d78642011-06-09 11:08:47 +0200585 * If @mode is NMK_GPIO_SLPM_INPUT, the corresponding GPIO is switched to GPIO
586 * mode when signal IOFORCE is HIGH (i.e. when SLEEP/DEEP-SLEEP mode is
587 * entered) regardless of the altfunction selected. Also wake-up detection is
588 * ENABLED.
589 *
590 * If @mode is NMK_GPIO_SLPM_NOCHANGE, the corresponding GPIO remains
591 * controlled by NMK_GPIO_DATC, NMK_GPIO_DATS, NMK_GPIO_DIR, NMK_GPIO_PDIS
592 * (for altfunction GPIO) or respective on-chip peripherals (for other
593 * altfuncs) when IOFORCE is HIGH. Also wake-up detection DISABLED.
594 *
595 * Note that enable_irq_wake() will automatically enable wakeup detection.
Rabin Vincent81a3c292010-05-27 12:39:23 +0100596 */
597int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
598{
599 struct nmk_gpio_chip *nmk_chip;
600 unsigned long flags;
601
Lee Jonesa60b57e2012-04-19 21:36:31 +0100602 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Rabin Vincent81a3c292010-05-27 12:39:23 +0100603 if (!nmk_chip)
604 return -EINVAL;
605
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200606 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530607 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
608 spin_lock(&nmk_chip->lock);
609
Lee Jonesa60b57e2012-04-19 21:36:31 +0100610 __nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);
Rabin Vincent01727e62010-12-13 12:02:40 +0530611
612 spin_unlock(&nmk_chip->lock);
613 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200614 clk_disable(nmk_chip->clk);
Rabin Vincent81a3c292010-05-27 12:39:23 +0100615
616 return 0;
617}
618
619/**
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100620 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
621 * @gpio: pin number
622 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
623 *
624 * Enables/disables pull up/down on a specified pin. This only takes effect if
625 * the pin is configured as an input (either explicitly or by the alternate
626 * function).
627 *
628 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
629 * configured as an input. Otherwise, due to the way the controller registers
630 * work, this function will change the value output on the pin.
631 */
632int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
633{
634 struct nmk_gpio_chip *nmk_chip;
635 unsigned long flags;
636
Lee Jonesa60b57e2012-04-19 21:36:31 +0100637 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100638 if (!nmk_chip)
639 return -EINVAL;
640
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200641 clk_enable(nmk_chip->clk);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100642 spin_lock_irqsave(&nmk_chip->lock, flags);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100643 __nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100644 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200645 clk_disable(nmk_chip->clk);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100646
647 return 0;
648}
649
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100650/* Mode functions */
Jonas Aaberg9c66ee62010-10-13 13:14:17 +0200651/**
652 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
653 * @gpio: pin number
654 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
655 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
656 *
657 * Sets the mode of the specified pin to one of the alternate functions or
658 * plain GPIO.
659 */
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100660int nmk_gpio_set_mode(int gpio, int gpio_mode)
661{
662 struct nmk_gpio_chip *nmk_chip;
663 unsigned long flags;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100664
Lee Jonesa60b57e2012-04-19 21:36:31 +0100665 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100666 if (!nmk_chip)
667 return -EINVAL;
668
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200669 clk_enable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100670 spin_lock_irqsave(&nmk_chip->lock, flags);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100671 __nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100672 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200673 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100674
675 return 0;
676}
677EXPORT_SYMBOL(nmk_gpio_set_mode);
678
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +0200679static int nmk_prcm_gpiocr_get_mode(struct pinctrl_dev *pctldev, int gpio)
680{
681 int i;
682 u16 reg;
683 u8 bit;
684 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
685 const struct prcm_gpiocr_altcx_pin_desc *pin_desc;
686 const u16 *gpiocr_regs;
687
Fabio Baltieri4ca075d2012-12-18 10:12:11 +0100688 if (!npct->prcm_base)
689 return NMK_GPIO_ALT_C;
690
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +0200691 for (i = 0; i < npct->soc->npins_altcx; i++) {
692 if (npct->soc->altcx_pins[i].pin == gpio)
693 break;
694 }
695 if (i == npct->soc->npins_altcx)
696 return NMK_GPIO_ALT_C;
697
698 pin_desc = npct->soc->altcx_pins + i;
699 gpiocr_regs = npct->soc->prcm_gpiocr_registers;
700 for (i = 0; i < PRCM_IDX_GPIOCR_ALTC_MAX; i++) {
701 if (pin_desc->altcx[i].used == true) {
702 reg = gpiocr_regs[pin_desc->altcx[i].reg_index];
703 bit = pin_desc->altcx[i].control_bit;
Jonas Aabergf1671bf2012-10-25 08:40:42 +0200704 if (readl(npct->prcm_base + reg) & BIT(bit))
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +0200705 return NMK_GPIO_ALT_C+i+1;
706 }
707 }
708 return NMK_GPIO_ALT_C;
709}
710
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100711int nmk_gpio_get_mode(int gpio)
712{
713 struct nmk_gpio_chip *nmk_chip;
714 u32 afunc, bfunc, bit;
715
Lee Jonesa60b57e2012-04-19 21:36:31 +0100716 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100717 if (!nmk_chip)
718 return -EINVAL;
719
Lee Jonesa60b57e2012-04-19 21:36:31 +0100720 bit = 1 << (gpio % NMK_GPIO_PER_CHIP);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100721
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200722 clk_enable(nmk_chip->clk);
723
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100724 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
725 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
726
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200727 clk_disable(nmk_chip->clk);
728
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100729 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
730}
731EXPORT_SYMBOL(nmk_gpio_get_mode);
732
733
734/* IRQ functions */
735static inline int nmk_gpio_get_bitmask(int gpio)
736{
Lee Jonesa60b57e2012-04-19 21:36:31 +0100737 return 1 << (gpio % NMK_GPIO_PER_CHIP);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100738}
739
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100740static void nmk_gpio_irq_ack(struct irq_data *d)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100741{
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100742 struct nmk_gpio_chip *nmk_chip;
743
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100744 nmk_chip = irq_data_get_irq_chip_data(d);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100745 if (!nmk_chip)
746 return;
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200747
748 clk_enable(nmk_chip->clk);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100749 writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200750 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100751}
752
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100753enum nmk_gpio_irq_type {
754 NORMAL,
755 WAKE,
756};
757
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100758static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100759 int gpio, enum nmk_gpio_irq_type which,
760 bool enable)
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100761{
762 u32 bitmask = nmk_gpio_get_bitmask(gpio);
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530763 u32 *rimscval;
764 u32 *fimscval;
765 u32 rimscreg;
766 u32 fimscreg;
767
768 if (which == NORMAL) {
769 rimscreg = NMK_GPIO_RIMSC;
770 fimscreg = NMK_GPIO_FIMSC;
771 rimscval = &nmk_chip->rimsc;
772 fimscval = &nmk_chip->fimsc;
773 } else {
774 rimscreg = NMK_GPIO_RWIMSC;
775 fimscreg = NMK_GPIO_FWIMSC;
776 rimscval = &nmk_chip->rwimsc;
777 fimscval = &nmk_chip->fwimsc;
778 }
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100779
780 /* we must individually set/clear the two edges */
781 if (nmk_chip->edge_rising & bitmask) {
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100782 if (enable)
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530783 *rimscval |= bitmask;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100784 else
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530785 *rimscval &= ~bitmask;
786 writel(*rimscval, nmk_chip->addr + rimscreg);
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100787 }
788 if (nmk_chip->edge_falling & bitmask) {
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100789 if (enable)
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530790 *fimscval |= bitmask;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100791 else
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530792 *fimscval &= ~bitmask;
793 writel(*fimscval, nmk_chip->addr + fimscreg);
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100794 }
795}
796
Rabin Vincentb9df4682011-02-10 11:45:58 +0530797static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
798 int gpio, bool on)
799{
Rabin Vincentb982ff02011-04-26 09:03:27 +0530800 /*
801 * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is
802 * disabled, since setting SLPM to 1 increases power consumption, and
803 * wakeup is anyhow controlled by the RIMSC and FIMSC registers.
804 */
805 if (nmk_chip->sleepmode && on) {
Linus Walleije85bbc12012-06-12 12:43:06 +0200806 __nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP,
Rabin Vincentb982ff02011-04-26 09:03:27 +0530807 NMK_GPIO_SLPM_WAKEUP_ENABLE);
Linus Walleij33d78642011-06-09 11:08:47 +0200808 }
809
Rabin Vincentb9df4682011-02-10 11:45:58 +0530810 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
811}
812
813static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100814{
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100815 struct nmk_gpio_chip *nmk_chip;
816 unsigned long flags;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100817 u32 bitmask;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100818
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100819 nmk_chip = irq_data_get_irq_chip_data(d);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100820 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100821 if (!nmk_chip)
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100822 return -EINVAL;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100823
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200824 clk_enable(nmk_chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530825 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
826 spin_lock(&nmk_chip->lock);
827
Lee Jonesa60b57e2012-04-19 21:36:31 +0100828 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530829
830 if (!(nmk_chip->real_wake & bitmask))
Lee Jonesa60b57e2012-04-19 21:36:31 +0100831 __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530832
833 spin_unlock(&nmk_chip->lock);
834 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200835 clk_disable(nmk_chip->clk);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100836
837 return 0;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100838}
839
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100840static void nmk_gpio_irq_mask(struct irq_data *d)
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100841{
Rabin Vincentb9df4682011-02-10 11:45:58 +0530842 nmk_gpio_irq_maskunmask(d, false);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100843}
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100844
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100845static void nmk_gpio_irq_unmask(struct irq_data *d)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100846{
Rabin Vincentb9df4682011-02-10 11:45:58 +0530847 nmk_gpio_irq_maskunmask(d, true);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100848}
849
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100850static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100851{
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100852 struct nmk_gpio_chip *nmk_chip;
853 unsigned long flags;
Rabin Vincentb9df4682011-02-10 11:45:58 +0530854 u32 bitmask;
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100855
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100856 nmk_chip = irq_data_get_irq_chip_data(d);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100857 if (!nmk_chip)
858 return -EINVAL;
Lee Jonesa60b57e2012-04-19 21:36:31 +0100859 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100860
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200861 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530862 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
863 spin_lock(&nmk_chip->lock);
864
Linus Walleij479a0c72011-09-20 10:50:15 +0200865 if (irqd_irq_disabled(d))
Lee Jonesa60b57e2012-04-19 21:36:31 +0100866 __nmk_gpio_set_wake(nmk_chip, d->hwirq, on);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530867
868 if (on)
869 nmk_chip->real_wake |= bitmask;
870 else
871 nmk_chip->real_wake &= ~bitmask;
Rabin Vincent01727e62010-12-13 12:02:40 +0530872
873 spin_unlock(&nmk_chip->lock);
874 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200875 clk_disable(nmk_chip->clk);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100876
877 return 0;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100878}
879
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100880static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100881{
Linus Walleij479a0c72011-09-20 10:50:15 +0200882 bool enabled = !irqd_irq_disabled(d);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200883 bool wake = irqd_is_wakeup_set(d);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100884 struct nmk_gpio_chip *nmk_chip;
885 unsigned long flags;
886 u32 bitmask;
887
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100888 nmk_chip = irq_data_get_irq_chip_data(d);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100889 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100890 if (!nmk_chip)
891 return -EINVAL;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100892 if (type & IRQ_TYPE_LEVEL_HIGH)
893 return -EINVAL;
894 if (type & IRQ_TYPE_LEVEL_LOW)
895 return -EINVAL;
896
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200897 clk_enable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100898 spin_lock_irqsave(&nmk_chip->lock, flags);
899
Rabin Vincent7a852d82010-05-06 10:43:55 +0100900 if (enabled)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100901 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100902
Rabin Vincentb9df4682011-02-10 11:45:58 +0530903 if (enabled || wake)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100904 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
Rabin Vincent7a852d82010-05-06 10:43:55 +0100905
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100906 nmk_chip->edge_rising &= ~bitmask;
907 if (type & IRQ_TYPE_EDGE_RISING)
908 nmk_chip->edge_rising |= bitmask;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100909
910 nmk_chip->edge_falling &= ~bitmask;
911 if (type & IRQ_TYPE_EDGE_FALLING)
912 nmk_chip->edge_falling |= bitmask;
Rabin Vincent7a852d82010-05-06 10:43:55 +0100913
914 if (enabled)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100915 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100916
Rabin Vincentb9df4682011-02-10 11:45:58 +0530917 if (enabled || wake)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100918 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100919
920 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200921 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100922
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100923 return 0;
924}
925
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200926static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
927{
928 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
929
930 clk_enable(nmk_chip->clk);
931 nmk_gpio_irq_unmask(d);
932 return 0;
933}
934
935static void nmk_gpio_irq_shutdown(struct irq_data *d)
936{
937 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
938
939 nmk_gpio_irq_mask(d);
940 clk_disable(nmk_chip->clk);
941}
942
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100943static struct irq_chip nmk_gpio_irq_chip = {
944 .name = "Nomadik-GPIO",
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100945 .irq_ack = nmk_gpio_irq_ack,
946 .irq_mask = nmk_gpio_irq_mask,
947 .irq_unmask = nmk_gpio_irq_unmask,
948 .irq_set_type = nmk_gpio_irq_set_type,
949 .irq_set_wake = nmk_gpio_irq_set_wake,
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200950 .irq_startup = nmk_gpio_irq_startup,
951 .irq_shutdown = nmk_gpio_irq_shutdown,
Etienne Carriere4921e7452012-08-22 10:44:16 +0200952 .flags = IRQCHIP_MASK_ON_SUSPEND,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100953};
954
Rabin Vincent33b744b2010-10-14 10:38:03 +0530955static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
956 u32 status)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100957{
958 struct nmk_gpio_chip *nmk_chip;
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100959 struct irq_chip *host_chip = irq_get_chip(irq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100960
Will Deaconadfed152011-02-28 10:12:29 +0000961 chained_irq_enter(host_chip, desc);
Rabin Vincentaaedaa22010-03-03 04:50:27 +0100962
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100963 nmk_chip = irq_get_handler_data(irq);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530964 while (status) {
965 int bit = __ffs(status);
966
Linus Walleij95f0bc92012-09-27 14:14:09 +0200967 generic_handle_irq(irq_find_mapping(nmk_chip->domain, bit));
Rabin Vincent33b744b2010-10-14 10:38:03 +0530968 status &= ~BIT(bit);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100969 }
Rabin Vincentaaedaa22010-03-03 04:50:27 +0100970
Will Deaconadfed152011-02-28 10:12:29 +0000971 chained_irq_exit(host_chip, desc);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100972}
973
Rabin Vincent33b744b2010-10-14 10:38:03 +0530974static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
975{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100976 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200977 u32 status;
978
979 clk_enable(nmk_chip->clk);
980 status = readl(nmk_chip->addr + NMK_GPIO_IS);
981 clk_disable(nmk_chip->clk);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530982
983 __nmk_gpio_irq_handler(irq, desc, status);
984}
985
986static void nmk_gpio_secondary_irq_handler(unsigned int irq,
987 struct irq_desc *desc)
988{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100989 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530990 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
991
992 __nmk_gpio_irq_handler(irq, desc, status);
993}
994
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100995static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
996{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100997 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
998 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530999
1000 if (nmk_chip->secondary_parent_irq >= 0) {
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001001 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
Rabin Vincent33b744b2010-10-14 10:38:03 +05301002 nmk_gpio_secondary_irq_handler);
Thomas Gleixner6845664a2011-03-24 13:25:22 +01001003 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
Rabin Vincent33b744b2010-10-14 10:38:03 +05301004 }
1005
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001006 return 0;
1007}
1008
1009/* I/O Functions */
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001010
1011static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)
1012{
1013 /*
1014 * Map back to global GPIO space and request muxing, the direction
1015 * parameter does not matter for this controller.
1016 */
1017 int gpio = chip->base + offset;
1018
1019 return pinctrl_request_gpio(gpio);
1020}
1021
1022static void nmk_gpio_free(struct gpio_chip *chip, unsigned offset)
1023{
1024 int gpio = chip->base + offset;
1025
1026 pinctrl_free_gpio(gpio);
1027}
1028
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001029static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
1030{
1031 struct nmk_gpio_chip *nmk_chip =
1032 container_of(chip, struct nmk_gpio_chip, chip);
1033
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001034 clk_enable(nmk_chip->clk);
1035
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001036 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001037
1038 clk_disable(nmk_chip->clk);
1039
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001040 return 0;
1041}
1042
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001043static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
1044{
1045 struct nmk_gpio_chip *nmk_chip =
1046 container_of(chip, struct nmk_gpio_chip, chip);
1047 u32 bit = 1 << offset;
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001048 int value;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001049
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001050 clk_enable(nmk_chip->clk);
1051
1052 value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
1053
1054 clk_disable(nmk_chip->clk);
1055
1056 return value;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001057}
1058
1059static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
1060 int val)
1061{
1062 struct nmk_gpio_chip *nmk_chip =
1063 container_of(chip, struct nmk_gpio_chip, chip);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001064
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001065 clk_enable(nmk_chip->clk);
1066
Rabin Vincent6720db72010-09-02 11:28:48 +01001067 __nmk_gpio_set_output(nmk_chip, offset, val);
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001068
1069 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001070}
1071
Rabin Vincent6647c6c2010-05-27 12:22:42 +01001072static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
1073 int val)
1074{
1075 struct nmk_gpio_chip *nmk_chip =
1076 container_of(chip, struct nmk_gpio_chip, chip);
1077
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001078 clk_enable(nmk_chip->clk);
1079
Rabin Vincent6720db72010-09-02 11:28:48 +01001080 __nmk_gpio_make_output(nmk_chip, offset, val);
Rabin Vincent6647c6c2010-05-27 12:22:42 +01001081
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001082 clk_disable(nmk_chip->clk);
1083
Rabin Vincent6647c6c2010-05-27 12:22:42 +01001084 return 0;
1085}
1086
Rabin Vincent0d2aec92010-06-16 06:10:43 +01001087static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
1088{
1089 struct nmk_gpio_chip *nmk_chip =
1090 container_of(chip, struct nmk_gpio_chip, chip);
1091
Linus Walleij268300b2012-10-19 17:06:54 +02001092 return irq_create_mapping(nmk_chip->domain, offset);
Rabin Vincent0d2aec92010-06-16 06:10:43 +01001093}
1094
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301095#ifdef CONFIG_DEBUG_FS
1096
1097#include <linux/seq_file.h>
1098
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001099static void nmk_gpio_dbg_show_one(struct seq_file *s,
1100 struct pinctrl_dev *pctldev, struct gpio_chip *chip,
1101 unsigned offset, unsigned gpio)
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301102{
Linus Walleij6f4350a2012-05-02 21:06:13 +02001103 const char *label = gpiochip_is_requested(chip, offset);
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301104 struct nmk_gpio_chip *nmk_chip =
1105 container_of(chip, struct nmk_gpio_chip, chip);
Linus Walleij6f4350a2012-05-02 21:06:13 +02001106 int mode;
1107 bool is_out;
1108 bool pull;
1109 u32 bit = 1 << offset;
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301110 const char *modes[] = {
1111 [NMK_GPIO_ALT_GPIO] = "gpio",
1112 [NMK_GPIO_ALT_A] = "altA",
1113 [NMK_GPIO_ALT_B] = "altB",
1114 [NMK_GPIO_ALT_C] = "altC",
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001115 [NMK_GPIO_ALT_C+1] = "altC1",
1116 [NMK_GPIO_ALT_C+2] = "altC2",
1117 [NMK_GPIO_ALT_C+3] = "altC3",
1118 [NMK_GPIO_ALT_C+4] = "altC4",
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301119 };
1120
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001121 clk_enable(nmk_chip->clk);
Linus Walleij6f4350a2012-05-02 21:06:13 +02001122 is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & bit);
1123 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
1124 mode = nmk_gpio_get_mode(gpio);
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001125 if ((mode == NMK_GPIO_ALT_C) && pctldev)
1126 mode = nmk_prcm_gpiocr_get_mode(pctldev, gpio);
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001127
Linus Walleij6f4350a2012-05-02 21:06:13 +02001128 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
1129 gpio, label ?: "(none)",
1130 is_out ? "out" : "in ",
1131 chip->get
1132 ? (chip->get(chip, offset) ? "hi" : "lo")
1133 : "? ",
1134 (mode < 0) ? "unknown" : modes[mode],
1135 pull ? "pull" : "none");
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301136
Linus Walleij6f4350a2012-05-02 21:06:13 +02001137 if (label && !is_out) {
1138 int irq = gpio_to_irq(gpio);
1139 struct irq_desc *desc = irq_to_desc(irq);
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001140
Linus Walleij6f4350a2012-05-02 21:06:13 +02001141 /* This races with request_irq(), set_irq_type(),
1142 * and set_irq_wake() ... but those are "rare".
1143 */
1144 if (irq >= 0 && desc->action) {
1145 char *trigger;
1146 u32 bitmask = nmk_gpio_get_bitmask(gpio);
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001147
Linus Walleij6f4350a2012-05-02 21:06:13 +02001148 if (nmk_chip->edge_rising & bitmask)
1149 trigger = "edge-rising";
1150 else if (nmk_chip->edge_falling & bitmask)
1151 trigger = "edge-falling";
1152 else
1153 trigger = "edge-undefined";
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001154
Linus Walleij6f4350a2012-05-02 21:06:13 +02001155 seq_printf(s, " irq-%d %s%s",
1156 irq, trigger,
1157 irqd_is_wakeup_set(&desc->irq_data)
1158 ? " wakeup" : "");
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001159 }
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301160 }
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001161 clk_disable(nmk_chip->clk);
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301162}
1163
Linus Walleij6f4350a2012-05-02 21:06:13 +02001164static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
1165{
1166 unsigned i;
1167 unsigned gpio = chip->base;
1168
1169 for (i = 0; i < chip->ngpio; i++, gpio++) {
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001170 nmk_gpio_dbg_show_one(s, NULL, chip, i, gpio);
Linus Walleij6f4350a2012-05-02 21:06:13 +02001171 seq_printf(s, "\n");
1172 }
1173}
1174
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301175#else
Linus Walleij6f4350a2012-05-02 21:06:13 +02001176static inline void nmk_gpio_dbg_show_one(struct seq_file *s,
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001177 struct pinctrl_dev *pctldev,
Linus Walleij6f4350a2012-05-02 21:06:13 +02001178 struct gpio_chip *chip,
1179 unsigned offset, unsigned gpio)
1180{
1181}
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301182#define nmk_gpio_dbg_show NULL
1183#endif
1184
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001185/* This structure is replicated for each GPIO block allocated at probe time */
1186static struct gpio_chip nmk_gpio_template = {
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001187 .request = nmk_gpio_request,
1188 .free = nmk_gpio_free,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001189 .direction_input = nmk_gpio_make_input,
1190 .get = nmk_gpio_get_input,
1191 .direction_output = nmk_gpio_make_output,
1192 .set = nmk_gpio_set_output,
Rabin Vincent0d2aec92010-06-16 06:10:43 +01001193 .to_irq = nmk_gpio_to_irq,
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301194 .dbg_show = nmk_gpio_dbg_show,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001195 .can_sleep = 0,
1196};
1197
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001198void nmk_gpio_clocks_enable(void)
1199{
1200 int i;
1201
1202 for (i = 0; i < NUM_BANKS; i++) {
1203 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1204
1205 if (!chip)
1206 continue;
1207
1208 clk_enable(chip->clk);
1209 }
1210}
1211
1212void nmk_gpio_clocks_disable(void)
1213{
1214 int i;
1215
1216 for (i = 0; i < NUM_BANKS; i++) {
1217 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1218
1219 if (!chip)
1220 continue;
1221
1222 clk_disable(chip->clk);
1223 }
1224}
1225
Rabin Vincentb9df4682011-02-10 11:45:58 +05301226/*
1227 * Called from the suspend/resume path to only keep the real wakeup interrupts
1228 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
1229 * and not the rest of the interrupts which we needed to have as wakeups for
1230 * cpuidle.
1231 *
1232 * PM ops are not used since this needs to be done at the end, after all the
1233 * other drivers are done with their suspend callbacks.
1234 */
1235void nmk_gpio_wakeups_suspend(void)
1236{
1237 int i;
1238
1239 for (i = 0; i < NUM_BANKS; i++) {
1240 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1241
1242 if (!chip)
1243 break;
1244
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001245 clk_enable(chip->clk);
1246
Rabin Vincentb9df4682011-02-10 11:45:58 +05301247 writel(chip->rwimsc & chip->real_wake,
1248 chip->addr + NMK_GPIO_RWIMSC);
1249 writel(chip->fwimsc & chip->real_wake,
1250 chip->addr + NMK_GPIO_FWIMSC);
1251
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001252 clk_disable(chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +05301253 }
1254}
1255
1256void nmk_gpio_wakeups_resume(void)
1257{
1258 int i;
1259
1260 for (i = 0; i < NUM_BANKS; i++) {
1261 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1262
1263 if (!chip)
1264 break;
1265
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001266 clk_enable(chip->clk);
1267
Rabin Vincentb9df4682011-02-10 11:45:58 +05301268 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
1269 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
1270
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001271 clk_disable(chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +05301272 }
1273}
1274
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +02001275/*
1276 * Read the pull up/pull down status.
1277 * A bit set in 'pull_up' means that pull up
1278 * is selected if pull is enabled in PDIS register.
1279 * Note: only pull up/down set via this driver can
1280 * be detected due to HW limitations.
1281 */
1282void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
1283{
1284 if (gpio_bank < NUM_BANKS) {
1285 struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank];
1286
1287 if (!chip)
1288 return;
1289
1290 *pull_up = chip->pull_up;
1291 }
1292}
1293
Axel Lin5212d092012-11-16 00:01:35 +08001294static int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
1295 irq_hw_number_t hwirq)
Lee Jonesa60b57e2012-04-19 21:36:31 +01001296{
1297 struct nmk_gpio_chip *nmk_chip = d->host_data;
1298
1299 if (!nmk_chip)
1300 return -EINVAL;
1301
1302 irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
1303 set_irq_flags(irq, IRQF_VALID);
1304 irq_set_chip_data(irq, nmk_chip);
1305 irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
1306
1307 return 0;
1308}
1309
1310const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
1311 .map = nmk_gpio_irq_map,
1312 .xlate = irq_domain_xlate_twocell,
1313};
1314
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -08001315static int nmk_gpio_probe(struct platform_device *dev)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001316{
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001317 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
Lee Jones513c27f2012-04-13 15:05:05 +01001318 struct device_node *np = dev->dev.of_node;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001319 struct nmk_gpio_chip *nmk_chip;
1320 struct gpio_chip *chip;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001321 struct resource *res;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001322 struct clk *clk;
Rabin Vincent33b744b2010-10-14 10:38:03 +05301323 int secondary_irq;
Linus Walleij8d917712012-04-17 10:15:54 +02001324 void __iomem *base;
Linus Walleij832b6cd2012-10-23 09:50:17 +02001325 int irq_start = 0;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001326 int irq;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001327 int ret;
1328
Lee Jones513c27f2012-04-13 15:05:05 +01001329 if (!pdata && !np) {
1330 dev_err(&dev->dev, "No platform data or device tree found\n");
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001331 return -ENODEV;
Lee Jones513c27f2012-04-13 15:05:05 +01001332 }
1333
1334 if (np) {
Linus Walleij5e754f32012-07-03 23:05:14 +02001335 pdata = devm_kzalloc(&dev->dev, sizeof(*pdata), GFP_KERNEL);
Lee Jones513c27f2012-04-13 15:05:05 +01001336 if (!pdata)
1337 return -ENOMEM;
1338
Lee Jones612e1d52012-06-14 11:27:56 +01001339 if (of_get_property(np, "st,supports-sleepmode", NULL))
Lee Jones513c27f2012-04-13 15:05:05 +01001340 pdata->supports_sleepmode = true;
1341
1342 if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
1343 dev_err(&dev->dev, "gpio-bank property not found\n");
1344 ret = -EINVAL;
Lee Jonesa60b57e2012-04-19 21:36:31 +01001345 goto out;
Lee Jones513c27f2012-04-13 15:05:05 +01001346 }
1347
1348 pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
1349 pdata->num_gpio = NMK_GPIO_PER_CHIP;
1350 }
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001351
1352 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1353 if (!res) {
1354 ret = -ENOENT;
1355 goto out;
1356 }
1357
1358 irq = platform_get_irq(dev, 0);
1359 if (irq < 0) {
1360 ret = irq;
1361 goto out;
1362 }
1363
Rabin Vincent33b744b2010-10-14 10:38:03 +05301364 secondary_irq = platform_get_irq(dev, 1);
1365 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
1366 ret = -EINVAL;
1367 goto out;
1368 }
1369
Linus Walleij5e754f32012-07-03 23:05:14 +02001370 base = devm_request_and_ioremap(&dev->dev, res);
1371 if (!base) {
1372 ret = -ENOMEM;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001373 goto out;
1374 }
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001375
Linus Walleij5e754f32012-07-03 23:05:14 +02001376 clk = devm_clk_get(&dev->dev, NULL);
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001377 if (IS_ERR(clk)) {
1378 ret = PTR_ERR(clk);
Linus Walleij5e754f32012-07-03 23:05:14 +02001379 goto out;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001380 }
Linus Walleijefec3812012-06-06 22:50:41 +02001381 clk_prepare(clk);
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001382
Linus Walleij5e754f32012-07-03 23:05:14 +02001383 nmk_chip = devm_kzalloc(&dev->dev, sizeof(*nmk_chip), GFP_KERNEL);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001384 if (!nmk_chip) {
1385 ret = -ENOMEM;
Linus Walleij5e754f32012-07-03 23:05:14 +02001386 goto out;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001387 }
Lee Jones513c27f2012-04-13 15:05:05 +01001388
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001389 /*
1390 * The virt address in nmk_chip->addr is in the nomadik register space,
1391 * so we can simply convert the resource address, without remapping
1392 */
Rabin Vincent33b744b2010-10-14 10:38:03 +05301393 nmk_chip->bank = dev->id;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001394 nmk_chip->clk = clk;
Linus Walleij8d917712012-04-17 10:15:54 +02001395 nmk_chip->addr = base;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001396 nmk_chip->chip = nmk_gpio_template;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001397 nmk_chip->parent_irq = irq;
Rabin Vincent33b744b2010-10-14 10:38:03 +05301398 nmk_chip->secondary_parent_irq = secondary_irq;
1399 nmk_chip->get_secondary_status = pdata->get_secondary_status;
Rabin Vincent01727e62010-12-13 12:02:40 +05301400 nmk_chip->set_ioforce = pdata->set_ioforce;
Linus Walleij33d78642011-06-09 11:08:47 +02001401 nmk_chip->sleepmode = pdata->supports_sleepmode;
Rabin Vincentc0fcb8d2010-03-03 04:48:54 +01001402 spin_lock_init(&nmk_chip->lock);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001403
1404 chip = &nmk_chip->chip;
1405 chip->base = pdata->first_gpio;
Rabin Vincente493e062010-03-18 12:35:22 +05301406 chip->ngpio = pdata->num_gpio;
Rabin Vincent8d568ae2010-12-08 11:07:54 +05301407 chip->label = pdata->name ?: dev_name(&dev->dev);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001408 chip->dev = &dev->dev;
1409 chip->owner = THIS_MODULE;
1410
Rabin Vincentebc61782011-09-28 15:49:11 +05301411 clk_enable(nmk_chip->clk);
1412 nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI);
1413 clk_disable(nmk_chip->clk);
1414
Arnd Bergmann072e82a2012-05-10 13:39:52 +02001415#ifdef CONFIG_OF_GPIO
Lee Jones513c27f2012-04-13 15:05:05 +01001416 chip->of_node = np;
Arnd Bergmann072e82a2012-05-10 13:39:52 +02001417#endif
Lee Jones513c27f2012-04-13 15:05:05 +01001418
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001419 ret = gpiochip_add(&nmk_chip->chip);
1420 if (ret)
Linus Walleij5e754f32012-07-03 23:05:14 +02001421 goto out;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001422
Rabin Vincent01727e62010-12-13 12:02:40 +05301423 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
1424
1425 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
Lee Jones513c27f2012-04-13 15:05:05 +01001426
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001427 platform_set_drvdata(dev, nmk_chip);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001428
Linus Walleij51f58c62012-10-11 16:33:44 +02001429 if (!np)
Linus Walleij6054b9c2012-09-26 19:03:51 +02001430 irq_start = NOMADIK_GPIO_TO_IRQ(pdata->first_gpio);
Linus Walleij38843e22012-10-23 11:44:42 +02001431 nmk_chip->domain = irq_domain_add_simple(np,
Linus Walleij6054b9c2012-09-26 19:03:51 +02001432 NMK_GPIO_PER_CHIP, irq_start,
1433 &nmk_gpio_irq_simple_ops, nmk_chip);
Lee Jonesa60b57e2012-04-19 21:36:31 +01001434 if (!nmk_chip->domain) {
Linus Walleij2ee38d42012-08-10 11:07:51 +02001435 dev_err(&dev->dev, "failed to create irqdomain\n");
Lee Jonesa60b57e2012-04-19 21:36:31 +01001436 ret = -ENOSYS;
Linus Walleij5e754f32012-07-03 23:05:14 +02001437 goto out;
Lee Jonesa60b57e2012-04-19 21:36:31 +01001438 }
1439
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001440 nmk_gpio_init_irq(nmk_chip);
1441
Lee Jones513c27f2012-04-13 15:05:05 +01001442 dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);
1443
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001444 return 0;
1445
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001446out:
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001447 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
1448 pdata->first_gpio, pdata->first_gpio+31);
Lee Jones513c27f2012-04-13 15:05:05 +01001449
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001450 return ret;
1451}
1452
Linus Walleije98ea772012-04-26 23:57:25 +02001453static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev)
1454{
1455 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1456
1457 return npct->soc->ngroups;
1458}
1459
1460static const char *nmk_get_group_name(struct pinctrl_dev *pctldev,
1461 unsigned selector)
1462{
1463 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1464
1465 return npct->soc->groups[selector].name;
1466}
1467
1468static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
1469 const unsigned **pins,
1470 unsigned *num_pins)
1471{
1472 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1473
1474 *pins = npct->soc->groups[selector].pins;
1475 *num_pins = npct->soc->groups[selector].npins;
1476 return 0;
1477}
1478
Linus Walleij24cbdd72012-05-02 21:28:00 +02001479static struct pinctrl_gpio_range *
1480nmk_match_gpio_range(struct pinctrl_dev *pctldev, unsigned offset)
1481{
1482 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1483 int i;
1484
1485 for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
1486 struct pinctrl_gpio_range *range;
1487
1488 range = &npct->soc->gpio_ranges[i];
1489 if (offset >= range->pin_base &&
1490 offset <= (range->pin_base + range->npins - 1))
1491 return range;
1492 }
1493 return NULL;
1494}
1495
Linus Walleije98ea772012-04-26 23:57:25 +02001496static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
1497 unsigned offset)
1498{
Linus Walleij24cbdd72012-05-02 21:28:00 +02001499 struct pinctrl_gpio_range *range;
1500 struct gpio_chip *chip;
1501
1502 range = nmk_match_gpio_range(pctldev, offset);
1503 if (!range || !range->gc) {
1504 seq_printf(s, "invalid pin offset");
1505 return;
1506 }
1507 chip = range->gc;
Jean-Nicolas Graux2249b192012-10-15 09:47:05 +02001508 nmk_gpio_dbg_show_one(s, pctldev, chip, offset - chip->base, offset);
Linus Walleije98ea772012-04-26 23:57:25 +02001509}
1510
1511static struct pinctrl_ops nmk_pinctrl_ops = {
1512 .get_groups_count = nmk_get_groups_cnt,
1513 .get_group_name = nmk_get_group_name,
1514 .get_group_pins = nmk_get_group_pins,
1515 .pin_dbg_show = nmk_pin_dbg_show,
1516};
1517
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001518static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
1519{
1520 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1521
1522 return npct->soc->nfunctions;
1523}
1524
1525static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev,
1526 unsigned function)
1527{
1528 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1529
1530 return npct->soc->functions[function].name;
1531}
1532
1533static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
1534 unsigned function,
1535 const char * const **groups,
1536 unsigned * const num_groups)
1537{
1538 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1539
1540 *groups = npct->soc->functions[function].groups;
1541 *num_groups = npct->soc->functions[function].ngroups;
1542
1543 return 0;
1544}
1545
1546static int nmk_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
1547 unsigned group)
1548{
1549 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1550 const struct nmk_pingroup *g;
1551 static unsigned int slpm[NUM_BANKS];
1552 unsigned long flags;
1553 bool glitch;
1554 int ret = -EINVAL;
1555 int i;
1556
1557 g = &npct->soc->groups[group];
1558
1559 if (g->altsetting < 0)
1560 return -EINVAL;
1561
1562 dev_dbg(npct->dev, "enable group %s, %u pins\n", g->name, g->npins);
1563
Linus Walleijdaf73172012-05-22 11:46:45 +02001564 /*
1565 * If we're setting altfunc C by setting both AFSLA and AFSLB to 1,
1566 * we may pass through an undesired state. In this case we take
1567 * some extra care.
1568 *
1569 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
1570 * - Save SLPM registers (since we have a shadow register in the
1571 * nmk_chip we're using that as backup)
1572 * - Set SLPM=0 for the IOs you want to switch and others to 1
1573 * - Configure the GPIO registers for the IOs that are being switched
1574 * - Set IOFORCE=1
1575 * - Modify the AFLSA/B registers for the IOs that are being switched
1576 * - Set IOFORCE=0
1577 * - Restore SLPM registers
1578 * - Any spurious wake up event during switch sequence to be ignored
1579 * and cleared
1580 *
1581 * We REALLY need to save ALL slpm registers, because the external
1582 * IOFORCE will switch *all* ports to their sleepmode setting to as
1583 * to avoid glitches. (Not just one port!)
1584 */
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +02001585 glitch = ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C);
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001586
1587 if (glitch) {
1588 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
1589
1590 /* Initially don't put any pins to sleep when switching */
1591 memset(slpm, 0xff, sizeof(slpm));
1592
1593 /*
1594 * Then mask the pins that need to be sleeping now when we're
1595 * switching to the ALT C function.
1596 */
1597 for (i = 0; i < g->npins; i++)
1598 slpm[g->pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->pins[i]);
1599 nmk_gpio_glitch_slpm_init(slpm);
1600 }
1601
1602 for (i = 0; i < g->npins; i++) {
1603 struct pinctrl_gpio_range *range;
1604 struct nmk_gpio_chip *nmk_chip;
1605 struct gpio_chip *chip;
1606 unsigned bit;
1607
1608 range = nmk_match_gpio_range(pctldev, g->pins[i]);
1609 if (!range) {
1610 dev_err(npct->dev,
1611 "invalid pin offset %d in group %s at index %d\n",
1612 g->pins[i], g->name, i);
1613 goto out_glitch;
1614 }
1615 if (!range->gc) {
1616 dev_err(npct->dev, "GPIO chip missing in range for pin offset %d in group %s at index %d\n",
1617 g->pins[i], g->name, i);
1618 goto out_glitch;
1619 }
1620 chip = range->gc;
1621 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1622 dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->pins[i], g->altsetting);
1623
1624 clk_enable(nmk_chip->clk);
1625 bit = g->pins[i] % NMK_GPIO_PER_CHIP;
1626 /*
1627 * If the pin is switching to altfunc, and there was an
1628 * interrupt installed on it which has been lazy disabled,
1629 * actually mask the interrupt to prevent spurious interrupts
1630 * that would occur while the pin is under control of the
1631 * peripheral. Only SKE does this.
1632 */
1633 nmk_gpio_disable_lazy_irq(nmk_chip, bit);
1634
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +02001635 __nmk_gpio_set_mode_safe(nmk_chip, bit,
1636 (g->altsetting & NMK_GPIO_ALT_C), glitch);
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001637 clk_disable(nmk_chip->clk);
Jean-Nicolas Grauxc22df082012-09-27 15:38:50 +02001638
1639 /*
1640 * Call PRCM GPIOCR config function in case ALTC
1641 * has been selected:
1642 * - If selection is a ALTCx, some bits in PRCM GPIOCR registers
1643 * must be set.
1644 * - If selection is pure ALTC and previous selection was ALTCx,
1645 * then some bits in PRCM GPIOCR registers must be cleared.
1646 */
1647 if ((g->altsetting & NMK_GPIO_ALT_C) == NMK_GPIO_ALT_C)
1648 nmk_prcm_altcx_set_mode(npct, g->pins[i],
1649 g->altsetting >> NMK_GPIO_ALT_CX_SHIFT);
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001650 }
1651
1652 /* When all pins are successfully reconfigured we get here */
1653 ret = 0;
1654
1655out_glitch:
1656 if (glitch) {
1657 nmk_gpio_glitch_slpm_restore(slpm);
1658 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
1659 }
1660
1661 return ret;
1662}
1663
1664static void nmk_pmx_disable(struct pinctrl_dev *pctldev,
1665 unsigned function, unsigned group)
1666{
1667 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1668 const struct nmk_pingroup *g;
1669
1670 g = &npct->soc->groups[group];
1671
1672 if (g->altsetting < 0)
1673 return;
1674
1675 /* Poke out the mux, set the pin to some default state? */
1676 dev_dbg(npct->dev, "disable group %s, %u pins\n", g->name, g->npins);
1677}
1678
Axel Lin5212d092012-11-16 00:01:35 +08001679static int nmk_gpio_request_enable(struct pinctrl_dev *pctldev,
1680 struct pinctrl_gpio_range *range,
1681 unsigned offset)
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001682{
1683 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1684 struct nmk_gpio_chip *nmk_chip;
1685 struct gpio_chip *chip;
1686 unsigned bit;
1687
1688 if (!range) {
1689 dev_err(npct->dev, "invalid range\n");
1690 return -EINVAL;
1691 }
1692 if (!range->gc) {
1693 dev_err(npct->dev, "missing GPIO chip in range\n");
1694 return -EINVAL;
1695 }
1696 chip = range->gc;
1697 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1698
1699 dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset);
1700
1701 clk_enable(nmk_chip->clk);
1702 bit = offset % NMK_GPIO_PER_CHIP;
1703 /* There is no glitch when converting any pin to GPIO */
1704 __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
1705 clk_disable(nmk_chip->clk);
1706
1707 return 0;
1708}
1709
Axel Lin5212d092012-11-16 00:01:35 +08001710static void nmk_gpio_disable_free(struct pinctrl_dev *pctldev,
1711 struct pinctrl_gpio_range *range,
1712 unsigned offset)
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001713{
1714 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1715
1716 dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset);
1717 /* Set the pin to some default state, GPIO is usually default */
1718}
1719
1720static struct pinmux_ops nmk_pinmux_ops = {
1721 .get_functions_count = nmk_pmx_get_funcs_cnt,
1722 .get_function_name = nmk_pmx_get_func_name,
1723 .get_function_groups = nmk_pmx_get_func_groups,
1724 .enable = nmk_pmx_enable,
1725 .disable = nmk_pmx_disable,
1726 .gpio_request_enable = nmk_gpio_request_enable,
1727 .gpio_disable_free = nmk_gpio_disable_free,
1728};
1729
Axel Lin5212d092012-11-16 00:01:35 +08001730static int nmk_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin,
1731 unsigned long *config)
Linus Walleijd41af622012-05-03 15:58:12 +02001732{
1733 /* Not implemented */
1734 return -EINVAL;
1735}
1736
Axel Lin5212d092012-11-16 00:01:35 +08001737static int nmk_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin,
1738 unsigned long config)
Linus Walleijd41af622012-05-03 15:58:12 +02001739{
1740 static const char *pullnames[] = {
1741 [NMK_GPIO_PULL_NONE] = "none",
1742 [NMK_GPIO_PULL_UP] = "up",
1743 [NMK_GPIO_PULL_DOWN] = "down",
1744 [3] /* illegal */ = "??"
1745 };
1746 static const char *slpmnames[] = {
1747 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
1748 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
1749 };
1750 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1751 struct nmk_gpio_chip *nmk_chip;
1752 struct pinctrl_gpio_range *range;
1753 struct gpio_chip *chip;
1754 unsigned bit;
1755
1756 /*
1757 * The pin config contains pin number and altfunction fields, here
1758 * we just ignore that part. It's being handled by the framework and
1759 * pinmux callback respectively.
1760 */
1761 pin_cfg_t cfg = (pin_cfg_t) config;
1762 int pull = PIN_PULL(cfg);
1763 int slpm = PIN_SLPM(cfg);
1764 int output = PIN_DIR(cfg);
1765 int val = PIN_VAL(cfg);
1766 bool lowemi = PIN_LOWEMI(cfg);
1767 bool gpiomode = PIN_GPIOMODE(cfg);
1768 bool sleep = PIN_SLEEPMODE(cfg);
1769
1770 range = nmk_match_gpio_range(pctldev, pin);
1771 if (!range) {
1772 dev_err(npct->dev, "invalid pin offset %d\n", pin);
1773 return -EINVAL;
1774 }
1775 if (!range->gc) {
1776 dev_err(npct->dev, "GPIO chip missing in range for pin %d\n",
1777 pin);
1778 return -EINVAL;
1779 }
1780 chip = range->gc;
1781 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1782
1783 if (sleep) {
1784 int slpm_pull = PIN_SLPM_PULL(cfg);
1785 int slpm_output = PIN_SLPM_DIR(cfg);
1786 int slpm_val = PIN_SLPM_VAL(cfg);
1787
1788 /* All pins go into GPIO mode at sleep */
1789 gpiomode = true;
1790
1791 /*
1792 * The SLPM_* values are normal values + 1 to allow zero to
1793 * mean "same as normal".
1794 */
1795 if (slpm_pull)
1796 pull = slpm_pull - 1;
1797 if (slpm_output)
1798 output = slpm_output - 1;
1799 if (slpm_val)
1800 val = slpm_val - 1;
1801
1802 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
1803 pin,
1804 slpm_pull ? pullnames[pull] : "same",
1805 slpm_output ? (output ? "output" : "input") : "same",
1806 slpm_val ? (val ? "high" : "low") : "same");
1807 }
1808
1809 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",
1810 pin, cfg, pullnames[pull], slpmnames[slpm],
1811 output ? "output " : "input",
1812 output ? (val ? "high" : "low") : "",
1813 lowemi ? "on" : "off" );
1814
1815 clk_enable(nmk_chip->clk);
1816 bit = pin % NMK_GPIO_PER_CHIP;
1817 if (gpiomode)
1818 /* No glitch when going to GPIO mode */
1819 __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
1820 if (output)
1821 __nmk_gpio_make_output(nmk_chip, bit, val);
1822 else {
1823 __nmk_gpio_make_input(nmk_chip, bit);
1824 __nmk_gpio_set_pull(nmk_chip, bit, pull);
1825 }
1826 /* TODO: isn't this only applicable on output pins? */
1827 __nmk_gpio_set_lowemi(nmk_chip, bit, lowemi);
1828
1829 __nmk_gpio_set_slpm(nmk_chip, bit, slpm);
1830 clk_disable(nmk_chip->clk);
1831 return 0;
1832}
1833
1834static struct pinconf_ops nmk_pinconf_ops = {
1835 .pin_config_get = nmk_pin_config_get,
1836 .pin_config_set = nmk_pin_config_set,
1837};
1838
Linus Walleije98ea772012-04-26 23:57:25 +02001839static struct pinctrl_desc nmk_pinctrl_desc = {
1840 .name = "pinctrl-nomadik",
1841 .pctlops = &nmk_pinctrl_ops,
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001842 .pmxops = &nmk_pinmux_ops,
Linus Walleijd41af622012-05-03 15:58:12 +02001843 .confops = &nmk_pinconf_ops,
Linus Walleije98ea772012-04-26 23:57:25 +02001844 .owner = THIS_MODULE,
1845};
1846
Lee Jones855f80c2012-05-26 06:09:29 +01001847static const struct of_device_id nmk_pinctrl_match[] = {
1848 {
1849 .compatible = "stericsson,nmk_pinctrl",
1850 .data = (void *)PINCTRL_NMK_DB8500,
1851 },
1852 {},
1853};
1854
Greg Kroah-Hartman150632b2012-12-21 13:10:23 -08001855static int nmk_pinctrl_probe(struct platform_device *pdev)
Linus Walleije98ea772012-04-26 23:57:25 +02001856{
1857 const struct platform_device_id *platid = platform_get_device_id(pdev);
Lee Jones855f80c2012-05-26 06:09:29 +01001858 struct device_node *np = pdev->dev.of_node;
Linus Walleije98ea772012-04-26 23:57:25 +02001859 struct nmk_pinctrl *npct;
Jonas Aabergf1671bf2012-10-25 08:40:42 +02001860 struct resource *res;
Lee Jones855f80c2012-05-26 06:09:29 +01001861 unsigned int version = 0;
Linus Walleije98ea772012-04-26 23:57:25 +02001862 int i;
1863
1864 npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL);
1865 if (!npct)
1866 return -ENOMEM;
1867
Lee Jones855f80c2012-05-26 06:09:29 +01001868 if (platid)
1869 version = platid->driver_data;
Axel Lin953e9e92012-11-15 12:56:05 +08001870 else if (np) {
1871 const struct of_device_id *match;
1872
1873 match = of_match_device(nmk_pinctrl_match, &pdev->dev);
1874 if (!match)
1875 return -ENODEV;
1876 version = (unsigned int) match->data;
1877 }
Lee Jones855f80c2012-05-26 06:09:29 +01001878
Linus Walleije98ea772012-04-26 23:57:25 +02001879 /* Poke in other ASIC variants here */
Linus Walleijf79c5ed2012-08-10 00:43:28 +02001880 if (version == PINCTRL_NMK_STN8815)
1881 nmk_pinctrl_stn8815_init(&npct->soc);
Lee Jones855f80c2012-05-26 06:09:29 +01001882 if (version == PINCTRL_NMK_DB8500)
Linus Walleije98ea772012-04-26 23:57:25 +02001883 nmk_pinctrl_db8500_init(&npct->soc);
Patrice Chotard45a1b532012-07-20 15:45:22 +02001884 if (version == PINCTRL_NMK_DB8540)
1885 nmk_pinctrl_db8540_init(&npct->soc);
Linus Walleije98ea772012-04-26 23:57:25 +02001886
Jonas Aabergf1671bf2012-10-25 08:40:42 +02001887 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1888 if (res) {
1889 npct->prcm_base = devm_ioremap(&pdev->dev, res->start,
1890 resource_size(res));
1891 if (!npct->prcm_base) {
1892 dev_err(&pdev->dev,
1893 "failed to ioremap PRCM registers\n");
1894 return -ENOMEM;
1895 }
Fabio Baltieri4ca075d2012-12-18 10:12:11 +01001896 } else if (version == PINCTRL_NMK_STN8815) {
Jonas Aabergf1671bf2012-10-25 08:40:42 +02001897 dev_info(&pdev->dev,
1898 "No PRCM base, assume no ALT-Cx control is available\n");
Fabio Baltieri4ca075d2012-12-18 10:12:11 +01001899 } else {
1900 dev_err(&pdev->dev, "missing PRCM base address\n");
1901 return -EINVAL;
Jonas Aabergf1671bf2012-10-25 08:40:42 +02001902 }
1903
Linus Walleije98ea772012-04-26 23:57:25 +02001904 /*
1905 * We need all the GPIO drivers to probe FIRST, or we will not be able
1906 * to obtain references to the struct gpio_chip * for them, and we
1907 * need this to proceed.
1908 */
1909 for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
Patrice Chotard1d853ca2012-10-08 16:50:24 +02001910 if (!nmk_gpio_chips[npct->soc->gpio_ranges[i].id]) {
Linus Walleije98ea772012-04-26 23:57:25 +02001911 dev_warn(&pdev->dev, "GPIO chip %d not registered yet\n", i);
Linus Walleije98ea772012-04-26 23:57:25 +02001912 return -EPROBE_DEFER;
1913 }
Patrice Chotard1d853ca2012-10-08 16:50:24 +02001914 npct->soc->gpio_ranges[i].gc = &nmk_gpio_chips[npct->soc->gpio_ranges[i].id]->chip;
Linus Walleije98ea772012-04-26 23:57:25 +02001915 }
1916
1917 nmk_pinctrl_desc.pins = npct->soc->pins;
1918 nmk_pinctrl_desc.npins = npct->soc->npins;
1919 npct->dev = &pdev->dev;
Jonas Aabergf1671bf2012-10-25 08:40:42 +02001920
Linus Walleije98ea772012-04-26 23:57:25 +02001921 npct->pctl = pinctrl_register(&nmk_pinctrl_desc, &pdev->dev, npct);
1922 if (!npct->pctl) {
1923 dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n");
1924 return -EINVAL;
1925 }
1926
1927 /* We will handle a range of GPIO pins */
1928 for (i = 0; i < npct->soc->gpio_num_ranges; i++)
1929 pinctrl_add_gpio_range(npct->pctl, &npct->soc->gpio_ranges[i]);
1930
1931 platform_set_drvdata(pdev, npct);
1932 dev_info(&pdev->dev, "initialized Nomadik pin control driver\n");
1933
1934 return 0;
1935}
1936
Lee Jones513c27f2012-04-13 15:05:05 +01001937static const struct of_device_id nmk_gpio_match[] = {
1938 { .compatible = "st,nomadik-gpio", },
1939 {}
1940};
1941
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001942static struct platform_driver nmk_gpio_driver = {
1943 .driver = {
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001944 .owner = THIS_MODULE,
1945 .name = "gpio",
Lee Jones513c27f2012-04-13 15:05:05 +01001946 .of_match_table = nmk_gpio_match,
Rabin Vincent5317e4d12011-02-10 09:29:53 +05301947 },
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001948 .probe = nmk_gpio_probe,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001949};
1950
Linus Walleije98ea772012-04-26 23:57:25 +02001951static const struct platform_device_id nmk_pinctrl_id[] = {
1952 { "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
1953 { "pinctrl-db8500", PINCTRL_NMK_DB8500 },
Patrice Chotard45a1b532012-07-20 15:45:22 +02001954 { "pinctrl-db8540", PINCTRL_NMK_DB8540 },
Axel Lin8c995d62012-11-04 23:30:42 +08001955 { }
Linus Walleije98ea772012-04-26 23:57:25 +02001956};
1957
1958static struct platform_driver nmk_pinctrl_driver = {
1959 .driver = {
1960 .owner = THIS_MODULE,
1961 .name = "pinctrl-nomadik",
Lee Jones855f80c2012-05-26 06:09:29 +01001962 .of_match_table = nmk_pinctrl_match,
Linus Walleije98ea772012-04-26 23:57:25 +02001963 },
1964 .probe = nmk_pinctrl_probe,
1965 .id_table = nmk_pinctrl_id,
1966};
1967
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001968static int __init nmk_gpio_init(void)
1969{
Linus Walleije98ea772012-04-26 23:57:25 +02001970 int ret;
1971
1972 ret = platform_driver_register(&nmk_gpio_driver);
1973 if (ret)
1974 return ret;
1975 return platform_driver_register(&nmk_pinctrl_driver);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001976}
1977
Rabin Vincent33f45ea2010-06-02 06:09:52 +01001978core_initcall(nmk_gpio_init);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001979
1980MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1981MODULE_DESCRIPTION("Nomadik GPIO Driver");
1982MODULE_LICENSE("GPL");