Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1 | config ARM64 |
| 2 | def_bool y |
Suthikulpanit, Suravee | b6197b9 | 2015-06-10 11:08:53 -0500 | [diff] [blame] | 3 | select ACPI_CCA_REQUIRED if ACPI |
Lorenzo Pieralisi | d8f4f16 | 2015-03-24 17:58:51 +0000 | [diff] [blame] | 4 | select ACPI_GENERIC_GSI if ACPI |
Al Stone | 6933de0 | 2015-03-24 14:02:51 +0000 | [diff] [blame] | 5 | select ACPI_REDUCED_HARDWARE_ONLY if ACPI |
Tomasz Nowicki | 0cb0786 | 2016-06-10 21:55:19 +0200 | [diff] [blame] | 6 | select ACPI_MCFG if ACPI |
Aleksey Makarov | 888125a | 2016-09-27 23:54:14 +0300 | [diff] [blame] | 7 | select ACPI_SPCR_TABLE if ACPI |
Scott Wood | 1d8f51d | 2016-09-22 03:35:18 -0500 | [diff] [blame] | 8 | select ARCH_CLOCKSOURCE_DATA |
Dan Williams | 21266be | 2015-11-19 18:19:29 -0800 | [diff] [blame] | 9 | select ARCH_HAS_DEVMEM_IS_ALLOWED |
Jon Masters | 38b04a7 | 2016-06-20 13:56:13 +0300 | [diff] [blame] | 10 | select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI |
Kees Cook | 2b68f6c | 2015-04-14 15:48:00 -0700 | [diff] [blame] | 11 | select ARCH_HAS_ELF_RANDOMIZE |
Riku Voipio | 957e3fa | 2014-12-12 16:57:44 -0800 | [diff] [blame] | 12 | select ARCH_HAS_GCOV_PROFILE_ALL |
Yisheng Xie | 14f0991 | 2016-10-07 17:01:49 -0700 | [diff] [blame] | 13 | select ARCH_HAS_GIGANTIC_PAGE |
Alexander Potapenko | 5e4c754 | 2016-06-16 18:39:52 +0200 | [diff] [blame] | 14 | select ARCH_HAS_KCOV |
Laura Abbott | 308c09f | 2014-08-08 14:23:25 -0700 | [diff] [blame] | 15 | select ARCH_HAS_SG_CHAIN |
Lorenzo Pieralisi | 1f85008 | 2013-09-04 10:55:17 +0100 | [diff] [blame] | 16 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
Sudeep Holla | c63c870 | 2014-05-09 10:33:01 +0100 | [diff] [blame] | 17 | select ARCH_USE_CMPXCHG_LOCKREF |
Sami Tolvanen | 957e674 | 2017-11-02 09:34:42 -0700 | [diff] [blame] | 18 | select ARCH_SUPPORTS_LTO_CLANG |
Peter Zijlstra | 4badad3 | 2014-06-06 19:53:16 +0200 | [diff] [blame] | 19 | select ARCH_SUPPORTS_ATOMIC_RMW |
Ganapatrao Kulkarni | 5616623 | 2016-04-08 15:50:28 -0700 | [diff] [blame] | 20 | select ARCH_SUPPORTS_NUMA_BALANCING |
Will Deacon | 6212a51 | 2012-11-07 14:16:28 +0000 | [diff] [blame] | 21 | select ARCH_WANT_COMPAT_IPC_PARSE_VERSION |
Catalin Marinas | b6f3598 | 2013-01-29 18:25:41 +0000 | [diff] [blame] | 22 | select ARCH_WANT_FRAME_POINTERS |
Yang Shi | f0b7f8a | 2016-02-05 15:50:18 -0800 | [diff] [blame] | 23 | select ARCH_HAS_UBSAN_SANITIZE_ALL |
Catalin Marinas | 25c92a3 | 2012-12-18 15:26:13 +0000 | [diff] [blame] | 24 | select ARM_AMBA |
Mark Rutland | 1aee5d7 | 2012-11-20 10:06:00 +0000 | [diff] [blame] | 25 | select ARM_ARCH_TIMER |
Catalin Marinas | c4188ed | 2013-01-14 12:39:31 +0000 | [diff] [blame] | 26 | select ARM_GIC |
AKASHI Takahiro | 875cbf3 | 2014-07-04 08:28:30 +0100 | [diff] [blame] | 27 | select AUDIT_ARCH_COMPAT_GENERIC |
Arnd Bergmann | 3ee8036 | 2016-06-15 15:47:33 -0500 | [diff] [blame] | 28 | select ARM_GIC_V2M if PCI |
Marc Zyngier | 021f653 | 2014-06-30 16:01:31 +0100 | [diff] [blame] | 29 | select ARM_GIC_V3 |
Arnd Bergmann | 3ee8036 | 2016-06-15 15:47:33 -0500 | [diff] [blame] | 30 | select ARM_GIC_V3_ITS if PCI |
Mark Rutland | bff6079 | 2015-07-31 15:46:16 +0100 | [diff] [blame] | 31 | select ARM_PSCI_FW |
Will Deacon | adace89 | 2013-05-08 17:29:24 +0100 | [diff] [blame] | 32 | select BUILDTIME_EXTABLE_SORT |
Catalin Marinas | db2789b | 2012-12-18 15:27:25 +0000 | [diff] [blame] | 33 | select CLONE_BACKWARDS |
Deepak Saxena | 7ca2ef3 | 2012-09-22 10:33:36 -0700 | [diff] [blame] | 34 | select COMMON_CLK |
Lorenzo Pieralisi | 166936b | 2013-11-07 18:37:14 +0000 | [diff] [blame] | 35 | select CPU_PM if (SUSPEND || CPU_IDLE) |
Will Deacon | 7bc13fd | 2013-11-06 19:32:13 +0000 | [diff] [blame] | 36 | select DCACHE_WORD_ACCESS |
Catalin Marinas | ef37566 | 2015-07-07 17:15:39 +0100 | [diff] [blame] | 37 | select EDAC_SUPPORT |
Yang Shi | 2f34f17 | 2015-11-09 10:09:55 -0800 | [diff] [blame] | 38 | select FRAME_POINTER |
Laura Abbott | d4932f9 | 2014-10-09 15:26:44 -0700 | [diff] [blame] | 39 | select GENERIC_ALLOCATOR |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 40 | select GENERIC_CLOCKEVENTS |
Will Deacon | 4b3dc96 | 2015-05-29 18:28:44 +0100 | [diff] [blame] | 41 | select GENERIC_CLOCKEVENTS_BROADCAST |
Ard Biesheuvel | 3be1a5c | 2014-03-04 01:10:04 +0000 | [diff] [blame] | 42 | select GENERIC_CPU_AUTOPROBE |
Mark Salter | bf4b558 | 2014-04-07 15:39:52 -0700 | [diff] [blame] | 43 | select GENERIC_EARLY_IOREMAP |
Leo Yan | 2314ee4 | 2015-08-21 04:40:22 +0100 | [diff] [blame] | 44 | select GENERIC_IDLE_POLL_SETUP |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 45 | select GENERIC_IRQ_PROBE |
| 46 | select GENERIC_IRQ_SHOW |
Sudeep Holla | 6544e67 | 2015-04-22 18:16:33 +0100 | [diff] [blame] | 47 | select GENERIC_IRQ_SHOW_LEVEL |
Arnd Bergmann | cb61f67 | 2014-11-19 14:09:07 +0100 | [diff] [blame] | 48 | select GENERIC_PCI_IOMAP |
Stephen Boyd | 65cd4f6 | 2013-07-18 16:21:18 -0700 | [diff] [blame] | 49 | select GENERIC_SCHED_CLOCK |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 50 | select GENERIC_SMP_IDLE_THREAD |
Will Deacon | 12a0ef7 | 2013-11-06 17:20:22 +0000 | [diff] [blame] | 51 | select GENERIC_STRNCPY_FROM_USER |
| 52 | select GENERIC_STRNLEN_USER |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 53 | select GENERIC_TIME_VSYSCALL |
Marc Zyngier | a1ddc74 | 2014-08-26 11:03:17 +0100 | [diff] [blame] | 54 | select HANDLE_DOMAIN_IRQ |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 55 | select HARDIRQS_SW_RESEND |
Steve Capper | 5284e1b | 2014-10-24 13:22:20 +0100 | [diff] [blame] | 56 | select HAVE_ALIGNED_STRUCT_PAGE if SLUB |
AKASHI Takahiro | 875cbf3 | 2014-07-04 08:28:30 +0100 | [diff] [blame] | 57 | select HAVE_ARCH_AUDITSYSCALL |
Yalin Wang | 8e7a4ce | 2014-11-03 03:02:23 +0100 | [diff] [blame] | 58 | select HAVE_ARCH_BITREVERSE |
Kees Cook | faf5b63 | 2016-06-23 15:59:42 -0700 | [diff] [blame] | 59 | select HAVE_ARCH_HARDENED_USERCOPY |
Ard Biesheuvel | 324420b | 2016-02-16 13:52:35 +0100 | [diff] [blame] | 60 | select HAVE_ARCH_HUGE_VMAP |
Jiang Liu | 9732caf | 2014-01-07 22:17:13 +0800 | [diff] [blame] | 61 | select HAVE_ARCH_JUMP_LABEL |
Andrey Ryabinin | f1b9032 | 2015-11-17 18:47:08 +0300 | [diff] [blame] | 62 | select HAVE_ARCH_KASAN if SPARSEMEM_VMEMMAP && !(ARM64_16K_PAGES && ARM64_VA_BITS_48) |
Vijaya Kumar K | 9529247 | 2014-01-28 11:20:22 +0000 | [diff] [blame] | 63 | select HAVE_ARCH_KGDB |
Daniel Cashman | 8f0d3aa | 2016-01-14 15:20:01 -0800 | [diff] [blame] | 64 | select HAVE_ARCH_MMAP_RND_BITS |
| 65 | select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT |
AKASHI Takahiro | a1ae65b | 2014-11-28 05:26:39 +0000 | [diff] [blame] | 66 | select HAVE_ARCH_SECCOMP_FILTER |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 67 | select HAVE_ARCH_TRACEHOOK |
Yang Shi | 8ee7087 | 2016-04-18 11:16:14 -0700 | [diff] [blame] | 68 | select HAVE_ARCH_TRANSPARENT_HUGEPAGE |
| 69 | select HAVE_ARM_SMCCC |
Daniel Borkmann | 6077776 | 2016-05-13 19:08:28 +0200 | [diff] [blame] | 70 | select HAVE_EBPF_JIT |
AKASHI Takahiro | af64d2a | 2014-04-30 10:54:32 +0100 | [diff] [blame] | 71 | select HAVE_C_RECORDMCOUNT |
Laura Abbott | c0c264a | 2014-06-25 23:55:03 +0100 | [diff] [blame] | 72 | select HAVE_CC_STACKPROTECTOR |
Steve Capper | 5284e1b | 2014-10-24 13:22:20 +0100 | [diff] [blame] | 73 | select HAVE_CMPXCHG_DOUBLE |
Will Deacon | 95eff6b | 2015-05-29 14:57:47 +0100 | [diff] [blame] | 74 | select HAVE_CMPXCHG_LOCAL |
Yang Shi | 8ee7087 | 2016-04-18 11:16:14 -0700 | [diff] [blame] | 75 | select HAVE_CONTEXT_TRACKING |
Catalin Marinas | 9b2a60c | 2012-10-08 16:28:13 -0700 | [diff] [blame] | 76 | select HAVE_DEBUG_BUGVERBOSE |
Catalin Marinas | b69ec42 | 2012-10-08 16:28:11 -0700 | [diff] [blame] | 77 | select HAVE_DEBUG_KMEMLEAK |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 78 | select HAVE_DMA_API_DEBUG |
Laura Abbott | 6ac2104 | 2013-12-12 19:28:33 +0000 | [diff] [blame] | 79 | select HAVE_DMA_CONTIGUOUS |
AKASHI Takahiro | bd7d38d | 2014-04-30 10:54:34 +0100 | [diff] [blame] | 80 | select HAVE_DYNAMIC_FTRACE |
Will Deacon | 50afc33 | 2013-12-16 17:50:08 +0000 | [diff] [blame] | 81 | select HAVE_EFFICIENT_UNALIGNED_ACCESS |
AKASHI Takahiro | af64d2a | 2014-04-30 10:54:32 +0100 | [diff] [blame] | 82 | select HAVE_FTRACE_MCOUNT_RECORD |
AKASHI Takahiro | 819e50e | 2014-04-30 18:54:33 +0900 | [diff] [blame] | 83 | select HAVE_FUNCTION_TRACER |
| 84 | select HAVE_FUNCTION_GRAPH_TRACER |
Emese Revfy | 6b90bd4 | 2016-05-24 00:09:38 +0200 | [diff] [blame] | 85 | select HAVE_GCC_PLUGINS |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 86 | select HAVE_GENERIC_DMA_COHERENT |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 87 | select HAVE_HW_BREAKPOINT if PERF_EVENTS |
Will Deacon | 24da208 | 2015-11-23 15:12:59 +0000 | [diff] [blame] | 88 | select HAVE_IRQ_TIME_ACCOUNTING |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 89 | select HAVE_MEMBLOCK |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 90 | select HAVE_MEMBLOCK_NODE_MAP if NUMA |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 91 | select HAVE_PATA_PLATFORM |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 92 | select HAVE_PERF_EVENTS |
Jean Pihet | 2ee0d7f | 2014-02-03 19:18:27 +0100 | [diff] [blame] | 93 | select HAVE_PERF_REGS |
| 94 | select HAVE_PERF_USER_STACK_DUMP |
David A. Long | 0a8ea52 | 2016-07-08 12:35:45 -0400 | [diff] [blame] | 95 | select HAVE_REGS_AND_STACK_ACCESS_API |
Steve Capper | 5e5f6dc | 2014-10-09 15:29:23 -0700 | [diff] [blame] | 96 | select HAVE_RCU_TABLE_FREE |
AKASHI Takahiro | 055b121 | 2014-04-30 10:54:36 +0100 | [diff] [blame] | 97 | select HAVE_SYSCALL_TRACEPOINTS |
Sandeepa Prabhu | 2dd0e8d | 2016-07-08 12:35:48 -0400 | [diff] [blame] | 98 | select HAVE_KPROBES |
Sandeepa Prabhu | fcfd708 | 2016-07-08 12:35:53 -0400 | [diff] [blame] | 99 | select HAVE_KRETPROBES if HAVE_KPROBES |
Robin Murphy | 876945d | 2015-10-01 20:14:00 +0100 | [diff] [blame] | 100 | select IOMMU_DMA if IOMMU_SUPPORT |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 101 | select IRQ_DOMAIN |
Anders Roxell | e8557d1 | 2015-04-27 22:53:09 +0200 | [diff] [blame] | 102 | select IRQ_FORCED_THREADING |
Catalin Marinas | fea2aca | 2012-10-16 11:26:57 +0100 | [diff] [blame] | 103 | select MODULES_USE_ELF_RELA |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 104 | select NO_BOOTMEM |
| 105 | select OF |
| 106 | select OF_EARLY_FLATTREE |
Marek Szyprowski | 9bf14b7 | 2014-02-28 14:42:55 +0100 | [diff] [blame] | 107 | select OF_RESERVED_MEM |
Tomasz Nowicki | 0cb0786 | 2016-06-10 21:55:19 +0200 | [diff] [blame] | 108 | select PCI_ECAM if ACPI |
Catalin Marinas | aa1e8ec | 2013-02-28 18:14:37 +0000 | [diff] [blame] | 109 | select POWER_RESET |
| 110 | select POWER_SUPPLY |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 111 | select SPARSE_IRQ |
Catalin Marinas | 7ac57a8 | 2012-10-08 16:28:16 -0700 | [diff] [blame] | 112 | select SYSCTL_EXCEPTION_TRACE |
Mark Rutland | 5b7e8f7 | 2016-11-03 20:23:13 +0000 | [diff] [blame] | 113 | select THREAD_INFO_IN_TASK |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 114 | help |
| 115 | ARM 64-bit (AArch64) Linux support. |
| 116 | |
| 117 | config 64BIT |
| 118 | def_bool y |
| 119 | |
| 120 | config ARCH_PHYS_ADDR_T_64BIT |
| 121 | def_bool y |
| 122 | |
| 123 | config MMU |
| 124 | def_bool y |
| 125 | |
Mark Rutland | 40982fd | 2016-08-25 17:23:23 +0100 | [diff] [blame] | 126 | config DEBUG_RODATA |
| 127 | def_bool y |
| 128 | |
Mark Rutland | 030c4d2 | 2016-05-31 15:57:59 +0100 | [diff] [blame] | 129 | config ARM64_PAGE_SHIFT |
| 130 | int |
| 131 | default 16 if ARM64_64K_PAGES |
| 132 | default 14 if ARM64_16K_PAGES |
| 133 | default 12 |
| 134 | |
| 135 | config ARM64_CONT_SHIFT |
| 136 | int |
| 137 | default 5 if ARM64_64K_PAGES |
| 138 | default 7 if ARM64_16K_PAGES |
| 139 | default 4 |
| 140 | |
Daniel Cashman | 8f0d3aa | 2016-01-14 15:20:01 -0800 | [diff] [blame] | 141 | config ARCH_MMAP_RND_BITS_MIN |
| 142 | default 14 if ARM64_64K_PAGES |
| 143 | default 16 if ARM64_16K_PAGES |
| 144 | default 18 |
| 145 | |
| 146 | # max bits determined by the following formula: |
| 147 | # VA_BITS - PAGE_SHIFT - 3 |
| 148 | config ARCH_MMAP_RND_BITS_MAX |
| 149 | default 19 if ARM64_VA_BITS=36 |
| 150 | default 24 if ARM64_VA_BITS=39 |
| 151 | default 27 if ARM64_VA_BITS=42 |
| 152 | default 30 if ARM64_VA_BITS=47 |
| 153 | default 29 if ARM64_VA_BITS=48 && ARM64_64K_PAGES |
| 154 | default 31 if ARM64_VA_BITS=48 && ARM64_16K_PAGES |
| 155 | default 33 if ARM64_VA_BITS=48 |
| 156 | default 14 if ARM64_64K_PAGES |
| 157 | default 16 if ARM64_16K_PAGES |
| 158 | default 18 |
| 159 | |
| 160 | config ARCH_MMAP_RND_COMPAT_BITS_MIN |
| 161 | default 7 if ARM64_64K_PAGES |
| 162 | default 9 if ARM64_16K_PAGES |
| 163 | default 11 |
| 164 | |
| 165 | config ARCH_MMAP_RND_COMPAT_BITS_MAX |
| 166 | default 16 |
| 167 | |
Uwe Kleine-König | ce816fa | 2014-04-07 15:39:19 -0700 | [diff] [blame] | 168 | config NO_IOPORT_MAP |
Liviu Dudau | d1e6dc9 | 2014-09-29 15:29:31 +0100 | [diff] [blame] | 169 | def_bool y if !PCI |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 170 | |
| 171 | config STACKTRACE_SUPPORT |
| 172 | def_bool y |
| 173 | |
Jeff Vander Stoep | bf0c4e0 | 2015-08-18 20:50:10 +0100 | [diff] [blame] | 174 | config ILLEGAL_POINTER_VALUE |
| 175 | hex |
| 176 | default 0xdead000000000000 |
| 177 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 178 | config LOCKDEP_SUPPORT |
| 179 | def_bool y |
| 180 | |
| 181 | config TRACE_IRQFLAGS_SUPPORT |
| 182 | def_bool y |
| 183 | |
Will Deacon | c209f79 | 2014-03-14 17:47:05 +0000 | [diff] [blame] | 184 | config RWSEM_XCHGADD_ALGORITHM |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 185 | def_bool y |
| 186 | |
Dave P Martin | 9fb7410 | 2015-07-24 16:37:48 +0100 | [diff] [blame] | 187 | config GENERIC_BUG |
| 188 | def_bool y |
| 189 | depends on BUG |
| 190 | |
| 191 | config GENERIC_BUG_RELATIVE_POINTERS |
| 192 | def_bool y |
| 193 | depends on GENERIC_BUG |
| 194 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 195 | config GENERIC_HWEIGHT |
| 196 | def_bool y |
| 197 | |
| 198 | config GENERIC_CSUM |
| 199 | def_bool y |
| 200 | |
| 201 | config GENERIC_CALIBRATE_DELAY |
| 202 | def_bool y |
| 203 | |
Catalin Marinas | 19e7640 | 2014-02-27 12:09:22 +0000 | [diff] [blame] | 204 | config ZONE_DMA |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 205 | def_bool y |
| 206 | |
Steve Capper | 29e5694 | 2014-10-09 15:29:25 -0700 | [diff] [blame] | 207 | config HAVE_GENERIC_RCU_GUP |
| 208 | def_bool y |
| 209 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 210 | config ARCH_DMA_ADDR_T_64BIT |
| 211 | def_bool y |
| 212 | |
| 213 | config NEED_DMA_MAP_STATE |
| 214 | def_bool y |
| 215 | |
| 216 | config NEED_SG_DMA_LENGTH |
| 217 | def_bool y |
| 218 | |
Will Deacon | 4b3dc96 | 2015-05-29 18:28:44 +0100 | [diff] [blame] | 219 | config SMP |
| 220 | def_bool y |
| 221 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 222 | config SWIOTLB |
| 223 | def_bool y |
| 224 | |
| 225 | config IOMMU_HELPER |
| 226 | def_bool SWIOTLB |
| 227 | |
Ard Biesheuvel | 4cfb361 | 2013-07-09 14:18:12 +0100 | [diff] [blame] | 228 | config KERNEL_MODE_NEON |
| 229 | def_bool y |
| 230 | |
Rob Herring | 92cc15f | 2014-04-18 17:19:59 -0500 | [diff] [blame] | 231 | config FIX_EARLYCON_MEM |
| 232 | def_bool y |
| 233 | |
Kirill A. Shutemov | 9f25e6a | 2015-04-14 15:45:39 -0700 | [diff] [blame] | 234 | config PGTABLE_LEVELS |
| 235 | int |
Suzuki K. Poulose | 2153993 | 2015-10-19 14:19:38 +0100 | [diff] [blame] | 236 | default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36 |
Kirill A. Shutemov | 9f25e6a | 2015-04-14 15:45:39 -0700 | [diff] [blame] | 237 | default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42 |
| 238 | default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48 |
| 239 | default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39 |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 240 | default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47 |
| 241 | default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48 |
Kirill A. Shutemov | 9f25e6a | 2015-04-14 15:45:39 -0700 | [diff] [blame] | 242 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 243 | source "init/Kconfig" |
| 244 | |
| 245 | source "kernel/Kconfig.freezer" |
| 246 | |
Olof Johansson | 6a37749 | 2015-07-20 12:09:16 -0700 | [diff] [blame] | 247 | source "arch/arm64/Kconfig.platforms" |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 248 | |
| 249 | menu "Bus support" |
| 250 | |
Liviu Dudau | d1e6dc9 | 2014-09-29 15:29:31 +0100 | [diff] [blame] | 251 | config PCI |
| 252 | bool "PCI support" |
| 253 | help |
| 254 | This feature enables support for PCI bus system. If you say Y |
| 255 | here, the kernel will include drivers and infrastructure code |
| 256 | to support PCI bus devices. |
| 257 | |
| 258 | config PCI_DOMAINS |
| 259 | def_bool PCI |
| 260 | |
| 261 | config PCI_DOMAINS_GENERIC |
| 262 | def_bool PCI |
| 263 | |
| 264 | config PCI_SYSCALL |
| 265 | def_bool PCI |
| 266 | |
| 267 | source "drivers/pci/Kconfig" |
Liviu Dudau | d1e6dc9 | 2014-09-29 15:29:31 +0100 | [diff] [blame] | 268 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 269 | endmenu |
| 270 | |
| 271 | menu "Kernel Features" |
| 272 | |
Andre Przywara | c0a01b8 | 2014-11-14 15:54:12 +0000 | [diff] [blame] | 273 | menu "ARM errata workarounds via the alternatives framework" |
| 274 | |
| 275 | config ARM64_ERRATUM_826319 |
| 276 | bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted" |
| 277 | default y |
| 278 | help |
| 279 | This option adds an alternative code sequence to work around ARM |
| 280 | erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or |
| 281 | AXI master interface and an L2 cache. |
| 282 | |
| 283 | If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors |
| 284 | and is unable to accept a certain write via this interface, it will |
| 285 | not progress on read data presented on the read data channel and the |
| 286 | system can deadlock. |
| 287 | |
| 288 | The workaround promotes data cache clean instructions to |
| 289 | data cache clean-and-invalidate. |
| 290 | Please note that this does not necessarily enable the workaround, |
| 291 | as it depends on the alternative framework, which will only patch |
| 292 | the kernel if an affected CPU is detected. |
| 293 | |
| 294 | If unsure, say Y. |
| 295 | |
| 296 | config ARM64_ERRATUM_827319 |
| 297 | bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect" |
| 298 | default y |
| 299 | help |
| 300 | This option adds an alternative code sequence to work around ARM |
| 301 | erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI |
| 302 | master interface and an L2 cache. |
| 303 | |
| 304 | Under certain conditions this erratum can cause a clean line eviction |
| 305 | to occur at the same time as another transaction to the same address |
| 306 | on the AMBA 5 CHI interface, which can cause data corruption if the |
| 307 | interconnect reorders the two transactions. |
| 308 | |
| 309 | The workaround promotes data cache clean instructions to |
| 310 | data cache clean-and-invalidate. |
| 311 | Please note that this does not necessarily enable the workaround, |
| 312 | as it depends on the alternative framework, which will only patch |
| 313 | the kernel if an affected CPU is detected. |
| 314 | |
| 315 | If unsure, say Y. |
| 316 | |
| 317 | config ARM64_ERRATUM_824069 |
| 318 | bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop" |
| 319 | default y |
| 320 | help |
| 321 | This option adds an alternative code sequence to work around ARM |
| 322 | erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected |
| 323 | to a coherent interconnect. |
| 324 | |
| 325 | If a Cortex-A53 processor is executing a store or prefetch for |
| 326 | write instruction at the same time as a processor in another |
| 327 | cluster is executing a cache maintenance operation to the same |
| 328 | address, then this erratum might cause a clean cache line to be |
| 329 | incorrectly marked as dirty. |
| 330 | |
| 331 | The workaround promotes data cache clean instructions to |
| 332 | data cache clean-and-invalidate. |
| 333 | Please note that this option does not necessarily enable the |
| 334 | workaround, as it depends on the alternative framework, which will |
| 335 | only patch the kernel if an affected CPU is detected. |
| 336 | |
| 337 | If unsure, say Y. |
| 338 | |
| 339 | config ARM64_ERRATUM_819472 |
| 340 | bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption" |
| 341 | default y |
| 342 | help |
| 343 | This option adds an alternative code sequence to work around ARM |
| 344 | erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache |
| 345 | present when it is connected to a coherent interconnect. |
| 346 | |
| 347 | If the processor is executing a load and store exclusive sequence at |
| 348 | the same time as a processor in another cluster is executing a cache |
| 349 | maintenance operation to the same address, then this erratum might |
| 350 | cause data corruption. |
| 351 | |
| 352 | The workaround promotes data cache clean instructions to |
| 353 | data cache clean-and-invalidate. |
| 354 | Please note that this does not necessarily enable the workaround, |
| 355 | as it depends on the alternative framework, which will only patch |
| 356 | the kernel if an affected CPU is detected. |
| 357 | |
| 358 | If unsure, say Y. |
| 359 | |
| 360 | config ARM64_ERRATUM_832075 |
| 361 | bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads" |
| 362 | default y |
| 363 | help |
| 364 | This option adds an alternative code sequence to work around ARM |
| 365 | erratum 832075 on Cortex-A57 parts up to r1p2. |
| 366 | |
| 367 | Affected Cortex-A57 parts might deadlock when exclusive load/store |
| 368 | instructions to Write-Back memory are mixed with Device loads. |
| 369 | |
| 370 | The workaround is to promote device loads to use Load-Acquire |
| 371 | semantics. |
| 372 | Please note that this does not necessarily enable the workaround, |
| 373 | as it depends on the alternative framework, which will only patch |
| 374 | the kernel if an affected CPU is detected. |
| 375 | |
| 376 | If unsure, say Y. |
| 377 | |
Marc Zyngier | 498cd5c | 2015-11-16 10:28:18 +0000 | [diff] [blame] | 378 | config ARM64_ERRATUM_834220 |
| 379 | bool "Cortex-A57: 834220: Stage 2 translation fault might be incorrectly reported in presence of a Stage 1 fault" |
| 380 | depends on KVM |
| 381 | default y |
| 382 | help |
| 383 | This option adds an alternative code sequence to work around ARM |
| 384 | erratum 834220 on Cortex-A57 parts up to r1p2. |
| 385 | |
| 386 | Affected Cortex-A57 parts might report a Stage 2 translation |
| 387 | fault as the result of a Stage 1 fault for load crossing a |
| 388 | page boundary when there is a permission or device memory |
| 389 | alignment fault at Stage 1 and a translation fault at Stage 2. |
| 390 | |
| 391 | The workaround is to verify that the Stage 1 translation |
| 392 | doesn't generate a fault before handling the Stage 2 fault. |
| 393 | Please note that this does not necessarily enable the workaround, |
| 394 | as it depends on the alternative framework, which will only patch |
| 395 | the kernel if an affected CPU is detected. |
| 396 | |
| 397 | If unsure, say Y. |
| 398 | |
Will Deacon | 905e8c5 | 2015-03-23 19:07:02 +0000 | [diff] [blame] | 399 | config ARM64_ERRATUM_845719 |
| 400 | bool "Cortex-A53: 845719: a load might read incorrect data" |
| 401 | depends on COMPAT |
| 402 | default y |
| 403 | help |
| 404 | This option adds an alternative code sequence to work around ARM |
| 405 | erratum 845719 on Cortex-A53 parts up to r0p4. |
| 406 | |
| 407 | When running a compat (AArch32) userspace on an affected Cortex-A53 |
| 408 | part, a load at EL0 from a virtual address that matches the bottom 32 |
| 409 | bits of the virtual address used by a recent load at (AArch64) EL1 |
| 410 | might return incorrect data. |
| 411 | |
| 412 | The workaround is to write the contextidr_el1 register on exception |
| 413 | return to a 32-bit task. |
| 414 | Please note that this does not necessarily enable the workaround, |
| 415 | as it depends on the alternative framework, which will only patch |
| 416 | the kernel if an affected CPU is detected. |
| 417 | |
| 418 | If unsure, say Y. |
| 419 | |
Will Deacon | df057cc | 2015-03-17 12:15:02 +0000 | [diff] [blame] | 420 | config ARM64_ERRATUM_843419 |
| 421 | bool "Cortex-A53: 843419: A load or store might access an incorrect address" |
Sami Tolvanen | 84ab089 | 2018-01-29 11:19:19 -0800 | [diff] [blame] | 422 | default y if !LTO_CLANG |
Will Deacon | 6ffe992 | 2016-08-22 11:58:36 +0100 | [diff] [blame] | 423 | select ARM64_MODULE_CMODEL_LARGE if MODULES |
Will Deacon | df057cc | 2015-03-17 12:15:02 +0000 | [diff] [blame] | 424 | help |
Will Deacon | 6ffe992 | 2016-08-22 11:58:36 +0100 | [diff] [blame] | 425 | This option links the kernel with '--fix-cortex-a53-843419' and |
| 426 | builds modules using the large memory model in order to avoid the use |
| 427 | of the ADRP instruction, which can cause a subsequent memory access |
| 428 | to use an incorrect address on Cortex-A53 parts up to r0p4. |
Will Deacon | df057cc | 2015-03-17 12:15:02 +0000 | [diff] [blame] | 429 | |
| 430 | If unsure, say Y. |
| 431 | |
Suzuki K Poulose | b8c3208 | 2018-03-26 15:12:49 +0100 | [diff] [blame] | 432 | config ARM64_ERRATUM_1024718 |
| 433 | bool "Cortex-A55: 1024718: Update of DBM/AP bits without break before make might result in incorrect update" |
| 434 | default y |
| 435 | help |
| 436 | This option adds work around for Arm Cortex-A55 Erratum 1024718. |
| 437 | |
| 438 | Affected Cortex-A55 cores (r0p0, r0p1, r1p0) could cause incorrect |
| 439 | update of the hardware dirty bit when the DBM/AP bits are updated |
| 440 | without a break-before-make. The work around is to disable the usage |
| 441 | of hardware DBM locally on the affected cores. CPUs not affected by |
| 442 | erratum will continue to use the feature. |
| 443 | |
| 444 | If unsure, say Y. |
| 445 | |
Robert Richter | 9410097 | 2015-09-21 22:58:38 +0200 | [diff] [blame] | 446 | config CAVIUM_ERRATUM_22375 |
| 447 | bool "Cavium erratum 22375, 24313" |
| 448 | default y |
| 449 | help |
| 450 | Enable workaround for erratum 22375, 24313. |
| 451 | |
| 452 | This implements two gicv3-its errata workarounds for ThunderX. Both |
| 453 | with small impact affecting only ITS table allocation. |
| 454 | |
| 455 | erratum 22375: only alloc 8MB table size |
| 456 | erratum 24313: ignore memory access type |
| 457 | |
| 458 | The fixes are in ITS initialization and basically ignore memory access |
| 459 | type and table size provided by the TYPER and BASER registers. |
| 460 | |
| 461 | If unsure, say Y. |
| 462 | |
Ganapatrao Kulkarni | fbf8f40 | 2016-05-25 15:29:20 +0200 | [diff] [blame] | 463 | config CAVIUM_ERRATUM_23144 |
| 464 | bool "Cavium erratum 23144: ITS SYNC hang on dual socket system" |
| 465 | depends on NUMA |
| 466 | default y |
| 467 | help |
| 468 | ITS SYNC command hang for cross node io and collections/cpu mapping. |
| 469 | |
| 470 | If unsure, say Y. |
| 471 | |
Robert Richter | 6d4e11c | 2015-09-21 22:58:35 +0200 | [diff] [blame] | 472 | config CAVIUM_ERRATUM_23154 |
| 473 | bool "Cavium erratum 23154: Access to ICC_IAR1_EL1 is not sync'ed" |
| 474 | default y |
| 475 | help |
| 476 | The gicv3 of ThunderX requires a modified version for |
| 477 | reading the IAR status to ensure data synchronization |
| 478 | (access to icc_iar1_el1 is not sync'ed before and after). |
| 479 | |
| 480 | If unsure, say Y. |
| 481 | |
Andrew Pinski | 104a0c0 | 2016-02-24 17:44:57 -0800 | [diff] [blame] | 482 | config CAVIUM_ERRATUM_27456 |
| 483 | bool "Cavium erratum 27456: Broadcast TLBI instructions may cause icache corruption" |
| 484 | default y |
| 485 | help |
| 486 | On ThunderX T88 pass 1.x through 2.1 parts, broadcast TLBI |
| 487 | instructions may cause the icache to become corrupted if it |
| 488 | contains data for a non-current ASID. The fix is to |
| 489 | invalidate the icache when changing the mm context. |
| 490 | |
| 491 | If unsure, say Y. |
| 492 | |
Shanker Donthineni | 095635b | 2017-03-07 08:20:38 -0600 | [diff] [blame] | 493 | config QCOM_QDF2400_ERRATUM_0065 |
| 494 | bool "QDF2400 E0065: Incorrect GITS_TYPER.ITT_Entry_size" |
| 495 | default y |
| 496 | help |
| 497 | On Qualcomm Datacenter Technologies QDF2400 SoC, ITS hardware reports |
| 498 | ITE size incorrectly. The GITS_TYPER.ITT_Entry_size field should have |
| 499 | been indicated as 16Bytes (0xf), not 8Bytes (0x7). |
| 500 | |
| 501 | If unsure, say Y. |
| 502 | |
Andre Przywara | c0a01b8 | 2014-11-14 15:54:12 +0000 | [diff] [blame] | 503 | endmenu |
| 504 | |
| 505 | |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 506 | choice |
| 507 | prompt "Page size" |
| 508 | default ARM64_4K_PAGES |
| 509 | help |
| 510 | Page size (translation granule) configuration. |
| 511 | |
| 512 | config ARM64_4K_PAGES |
| 513 | bool "4KB" |
| 514 | help |
| 515 | This feature enables 4KB pages support. |
| 516 | |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 517 | config ARM64_16K_PAGES |
| 518 | bool "16KB" |
| 519 | help |
| 520 | The system will use 16KB pages support. AArch32 emulation |
| 521 | requires applications compiled with 16K (or a multiple of 16K) |
| 522 | aligned segments. |
| 523 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 524 | config ARM64_64K_PAGES |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 525 | bool "64KB" |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 526 | help |
| 527 | This feature enables 64KB pages support (4KB by default) |
| 528 | allowing only two levels of page tables and faster TLB |
Suzuki K. Poulose | db488be | 2015-10-19 14:19:34 +0100 | [diff] [blame] | 529 | look-up. AArch32 emulation requires applications compiled |
| 530 | with 64K aligned segments. |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 531 | |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 532 | endchoice |
| 533 | |
| 534 | choice |
| 535 | prompt "Virtual address space size" |
| 536 | default ARM64_VA_BITS_39 if ARM64_4K_PAGES |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 537 | default ARM64_VA_BITS_47 if ARM64_16K_PAGES |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 538 | default ARM64_VA_BITS_42 if ARM64_64K_PAGES |
| 539 | help |
| 540 | Allows choosing one of multiple possible virtual address |
| 541 | space sizes. The level of translation table is determined by |
| 542 | a combination of page size and virtual address space size. |
| 543 | |
Suzuki K. Poulose | 2153993 | 2015-10-19 14:19:38 +0100 | [diff] [blame] | 544 | config ARM64_VA_BITS_36 |
Catalin Marinas | 56a3f30 | 2015-10-20 14:59:20 +0100 | [diff] [blame] | 545 | bool "36-bit" if EXPERT |
Suzuki K. Poulose | 2153993 | 2015-10-19 14:19:38 +0100 | [diff] [blame] | 546 | depends on ARM64_16K_PAGES |
| 547 | |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 548 | config ARM64_VA_BITS_39 |
| 549 | bool "39-bit" |
| 550 | depends on ARM64_4K_PAGES |
| 551 | |
| 552 | config ARM64_VA_BITS_42 |
| 553 | bool "42-bit" |
| 554 | depends on ARM64_64K_PAGES |
| 555 | |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 556 | config ARM64_VA_BITS_47 |
| 557 | bool "47-bit" |
| 558 | depends on ARM64_16K_PAGES |
| 559 | |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 560 | config ARM64_VA_BITS_48 |
| 561 | bool "48-bit" |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 562 | |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 563 | endchoice |
| 564 | |
| 565 | config ARM64_VA_BITS |
| 566 | int |
Suzuki K. Poulose | 2153993 | 2015-10-19 14:19:38 +0100 | [diff] [blame] | 567 | default 36 if ARM64_VA_BITS_36 |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 568 | default 39 if ARM64_VA_BITS_39 |
| 569 | default 42 if ARM64_VA_BITS_42 |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 570 | default 47 if ARM64_VA_BITS_47 |
Jungseok Lee | c79b954 | 2014-05-12 18:40:51 +0900 | [diff] [blame] | 571 | default 48 if ARM64_VA_BITS_48 |
Jungseok Lee | e41ceed | 2014-05-12 10:40:38 +0100 | [diff] [blame] | 572 | |
Will Deacon | a872013 | 2013-10-11 14:52:19 +0100 | [diff] [blame] | 573 | config CPU_BIG_ENDIAN |
| 574 | bool "Build big-endian kernel" |
| 575 | help |
| 576 | Say Y if you plan on running a kernel in big-endian mode. |
| 577 | |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 578 | config SCHED_MC |
| 579 | bool "Multi-core scheduler support" |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 580 | help |
| 581 | Multi-core scheduler support improves the CPU scheduler's decision |
| 582 | making when dealing with multi-core CPU chips at a cost of slightly |
| 583 | increased overhead in some places. If unsure say N here. |
| 584 | |
| 585 | config SCHED_SMT |
| 586 | bool "SMT scheduler support" |
Mark Brown | f6e763b | 2014-03-04 07:51:17 +0000 | [diff] [blame] | 587 | help |
| 588 | Improves the CPU scheduler's decision making when dealing with |
| 589 | MultiThreading at a cost of slightly increased overhead in some |
| 590 | places. If unsure say N here. |
| 591 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 592 | config NR_CPUS |
Ganapatrao Kulkarni | 62aa965 | 2015-03-18 11:01:18 +0000 | [diff] [blame] | 593 | int "Maximum number of CPUs (2-4096)" |
| 594 | range 2 4096 |
Vinayak Kale | 1594285 | 2013-04-24 10:06:57 +0100 | [diff] [blame] | 595 | # These have to remain sorted largest to smallest |
Robert Richter | e367264 | 2014-09-08 12:44:48 +0100 | [diff] [blame] | 596 | default "64" |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 597 | |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 598 | config HOTPLUG_CPU |
| 599 | bool "Support for hot-pluggable CPUs" |
Yang Yingliang | 217d453 | 2015-09-24 17:32:14 +0800 | [diff] [blame] | 600 | select GENERIC_IRQ_MIGRATION |
Mark Rutland | 9327e2c | 2013-10-24 20:30:18 +0100 | [diff] [blame] | 601 | help |
| 602 | Say Y here to experiment with turning CPUs off and on. CPUs |
| 603 | can be controlled through /sys/devices/system/cpu. |
| 604 | |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 605 | # Common NUMA Features |
| 606 | config NUMA |
| 607 | bool "Numa Memory Allocation and Scheduler Support" |
Kefeng Wang | 0c2a6cc | 2016-09-26 15:36:50 +0800 | [diff] [blame] | 608 | select ACPI_NUMA if ACPI |
| 609 | select OF_NUMA |
Ganapatrao Kulkarni | 1a2db30 | 2016-04-08 15:50:27 -0700 | [diff] [blame] | 610 | help |
| 611 | Enable NUMA (Non Uniform Memory Access) support. |
| 612 | |
| 613 | The kernel will try to allocate memory used by a CPU on the |
| 614 | local memory of the CPU and add some more |
| 615 | NUMA awareness to the kernel. |
| 616 | |
| 617 | config NODES_SHIFT |
| 618 | int "Maximum NUMA Nodes (as a power of 2)" |
| 619 | range 1 10 |
| 620 | default "2" |
| 621 | depends on NEED_MULTIPLE_NODES |
| 622 | help |
| 623 | Specify the maximum number of NUMA Nodes available on the target |
| 624 | system. Increases memory reserved to accommodate various tables. |
| 625 | |
| 626 | config USE_PERCPU_NUMA_NODE_ID |
| 627 | def_bool y |
| 628 | depends on NUMA |
| 629 | |
Zhen Lei | 7af3a0a | 2016-09-01 14:55:00 +0800 | [diff] [blame] | 630 | config HAVE_SETUP_PER_CPU_AREA |
| 631 | def_bool y |
| 632 | depends on NUMA |
| 633 | |
| 634 | config NEED_PER_CPU_EMBED_FIRST_CHUNK |
| 635 | def_bool y |
| 636 | depends on NUMA |
| 637 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 638 | source kernel/Kconfig.preempt |
Kefeng Wang | f90df5e | 2015-10-26 11:48:16 +0800 | [diff] [blame] | 639 | source kernel/Kconfig.hz |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 640 | |
Laura Abbott | 83863f2 | 2016-02-05 16:24:47 -0800 | [diff] [blame] | 641 | config ARCH_SUPPORTS_DEBUG_PAGEALLOC |
| 642 | def_bool y |
| 643 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 644 | config ARCH_HAS_HOLES_MEMORYMODEL |
| 645 | def_bool y if SPARSEMEM |
| 646 | |
| 647 | config ARCH_SPARSEMEM_ENABLE |
| 648 | def_bool y |
| 649 | select SPARSEMEM_VMEMMAP_ENABLE |
| 650 | |
| 651 | config ARCH_SPARSEMEM_DEFAULT |
| 652 | def_bool ARCH_SPARSEMEM_ENABLE |
| 653 | |
| 654 | config ARCH_SELECT_MEMORY_MODEL |
| 655 | def_bool ARCH_SPARSEMEM_ENABLE |
| 656 | |
| 657 | config HAVE_ARCH_PFN_VALID |
| 658 | def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM |
| 659 | |
| 660 | config HW_PERF_EVENTS |
Mark Rutland | 6475b2d | 2015-10-02 10:55:03 +0100 | [diff] [blame] | 661 | def_bool y |
| 662 | depends on ARM_PMU |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 663 | |
Steve Capper | 084bd29 | 2013-04-10 13:48:00 +0100 | [diff] [blame] | 664 | config SYS_SUPPORTS_HUGETLBFS |
| 665 | def_bool y |
| 666 | |
Steve Capper | 084bd29 | 2013-04-10 13:48:00 +0100 | [diff] [blame] | 667 | config ARCH_WANT_HUGE_PMD_SHARE |
Suzuki K. Poulose | 2153993 | 2015-10-19 14:19:38 +0100 | [diff] [blame] | 668 | def_bool y if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36) |
Steve Capper | 084bd29 | 2013-04-10 13:48:00 +0100 | [diff] [blame] | 669 | |
Catalin Marinas | a41dc0e | 2014-04-03 17:48:54 +0100 | [diff] [blame] | 670 | config ARCH_HAS_CACHE_LINE_SIZE |
| 671 | def_bool y |
| 672 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 673 | source "mm/Kconfig" |
| 674 | |
AKASHI Takahiro | a1ae65b | 2014-11-28 05:26:39 +0000 | [diff] [blame] | 675 | config SECCOMP |
| 676 | bool "Enable seccomp to safely compute untrusted bytecode" |
| 677 | ---help--- |
| 678 | This kernel feature is useful for number crunching applications |
| 679 | that may need to compute untrusted bytecode during their |
| 680 | execution. By using pipes or other transports made available to |
| 681 | the process as file descriptors supporting the read/write |
| 682 | syscalls, it's possible to isolate those applications in |
| 683 | their own address space using seccomp. Once seccomp is |
| 684 | enabled via prctl(PR_SET_SECCOMP), it cannot be disabled |
| 685 | and the task is only allowed to execute a few safe syscalls |
| 686 | defined by each seccomp mode. |
| 687 | |
Stefano Stabellini | dfd57bc | 2015-11-23 10:33:49 +0000 | [diff] [blame] | 688 | config PARAVIRT |
| 689 | bool "Enable paravirtualization code" |
| 690 | help |
| 691 | This changes the kernel so it can modify itself when it is run |
| 692 | under a hypervisor, potentially improving performance significantly |
| 693 | over full virtualization. |
| 694 | |
| 695 | config PARAVIRT_TIME_ACCOUNTING |
| 696 | bool "Paravirtual steal time accounting" |
| 697 | select PARAVIRT |
| 698 | default n |
| 699 | help |
| 700 | Select this option to enable fine granularity task steal time |
| 701 | accounting. Time spent executing other tasks in parallel with |
| 702 | the current vCPU is discounted from the vCPU power. To account for |
| 703 | that, there can be a small performance impact. |
| 704 | |
| 705 | If in doubt, say N here. |
| 706 | |
Geoff Levand | d28f6df | 2016-06-23 17:54:48 +0000 | [diff] [blame] | 707 | config KEXEC |
| 708 | depends on PM_SLEEP_SMP |
| 709 | select KEXEC_CORE |
| 710 | bool "kexec system call" |
| 711 | ---help--- |
| 712 | kexec is a system call that implements the ability to shutdown your |
| 713 | current kernel, and to start another kernel. It is like a reboot |
| 714 | but it is independent of the system firmware. And like a reboot |
| 715 | you can start any kernel with it, not just Linux. |
| 716 | |
Stefano Stabellini | aa42aa1 | 2013-06-03 17:05:43 +0000 | [diff] [blame] | 717 | config XEN_DOM0 |
| 718 | def_bool y |
| 719 | depends on XEN |
| 720 | |
| 721 | config XEN |
Julien Grall | c2ba1f7 | 2014-09-17 14:07:06 -0700 | [diff] [blame] | 722 | bool "Xen guest support on ARM64" |
Stefano Stabellini | aa42aa1 | 2013-06-03 17:05:43 +0000 | [diff] [blame] | 723 | depends on ARM64 && OF |
Stefano Stabellini | 83862cc | 2013-10-10 13:40:44 +0000 | [diff] [blame] | 724 | select SWIOTLB_XEN |
Stefano Stabellini | dfd57bc | 2015-11-23 10:33:49 +0000 | [diff] [blame] | 725 | select PARAVIRT |
Stefano Stabellini | aa42aa1 | 2013-06-03 17:05:43 +0000 | [diff] [blame] | 726 | help |
| 727 | Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64. |
| 728 | |
Steve Capper | d03bb14 | 2013-04-25 15:19:21 +0100 | [diff] [blame] | 729 | config FORCE_MAX_ZONEORDER |
| 730 | int |
| 731 | default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 732 | default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) |
Steve Capper | d03bb14 | 2013-04-25 15:19:21 +0100 | [diff] [blame] | 733 | default "11" |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 734 | help |
| 735 | The kernel memory allocator divides physically contiguous memory |
| 736 | blocks into "zones", where each zone is a power of two number of |
| 737 | pages. This option selects the largest power of two that the kernel |
| 738 | keeps in the memory allocator. If you need to allocate very large |
| 739 | blocks of physically contiguous memory, then you may need to |
| 740 | increase this value. |
| 741 | |
| 742 | This config option is actually maximum order plus one. For example, |
| 743 | a value of 11 means that the largest free memory block is 2^10 pages. |
| 744 | |
| 745 | We make sure that we can allocate upto a HugePage size for each configuration. |
| 746 | Hence we have : |
| 747 | MAX_ORDER = (PMD_SHIFT - PAGE_SHIFT) + 1 => PAGE_SHIFT - 2 |
| 748 | |
| 749 | However for 4K, we choose a higher default value, 11 as opposed to 10, giving us |
| 750 | 4M allocations matching the default size used by generic code. |
Steve Capper | d03bb14 | 2013-04-25 15:19:21 +0100 | [diff] [blame] | 751 | |
Will Deacon | 16f712b | 2017-11-14 14:41:01 +0000 | [diff] [blame] | 752 | config UNMAP_KERNEL_AT_EL0 |
Will Deacon | 5f5e5d4 | 2017-11-14 16:19:39 +0000 | [diff] [blame] | 753 | bool "Unmap kernel when running in userspace (aka \"KAISER\")" if EXPERT |
Will Deacon | 16f712b | 2017-11-14 14:41:01 +0000 | [diff] [blame] | 754 | default y |
| 755 | help |
Will Deacon | 5f5e5d4 | 2017-11-14 16:19:39 +0000 | [diff] [blame] | 756 | Speculation attacks against some high-performance processors can |
| 757 | be used to bypass MMU permission checks and leak kernel data to |
| 758 | userspace. This can be defended against by unmapping the kernel |
| 759 | when running in userspace, mapping it back in on exception entry |
| 760 | via a trampoline page in the vector table. |
Will Deacon | 16f712b | 2017-11-14 14:41:01 +0000 | [diff] [blame] | 761 | |
| 762 | If unsure, say Y. |
| 763 | |
Mark Rutland | 4732001 | 2018-04-12 12:11:13 +0100 | [diff] [blame] | 764 | config HARDEN_BRANCH_PREDICTOR |
| 765 | bool "Harden the branch predictor against aliasing attacks" if EXPERT |
| 766 | default y |
| 767 | help |
| 768 | Speculation attacks against some high-performance processors rely on |
| 769 | being able to manipulate the branch predictor for a victim context by |
| 770 | executing aliasing branches in the attacker context. Such attacks |
| 771 | can be partially mitigated against by clearing internal branch |
| 772 | predictor state and limiting the prediction logic in some situations. |
| 773 | |
| 774 | This config option will take CPU-specific actions to harden the |
| 775 | branch predictor against aliasing attacks and may rely on specific |
| 776 | instruction sequences or control bits being set by the system |
| 777 | firmware. |
| 778 | |
| 779 | If unsure, say Y. |
| 780 | |
Will Deacon | 1b907f4 | 2014-11-20 16:51:10 +0000 | [diff] [blame] | 781 | menuconfig ARMV8_DEPRECATED |
| 782 | bool "Emulate deprecated/obsolete ARMv8 instructions" |
| 783 | depends on COMPAT |
| 784 | help |
| 785 | Legacy software support may require certain instructions |
| 786 | that have been deprecated or obsoleted in the architecture. |
| 787 | |
| 788 | Enable this config to enable selective emulation of these |
| 789 | features. |
| 790 | |
| 791 | If unsure, say Y |
| 792 | |
| 793 | if ARMV8_DEPRECATED |
| 794 | |
| 795 | config SWP_EMULATION |
| 796 | bool "Emulate SWP/SWPB instructions" |
| 797 | help |
| 798 | ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that |
| 799 | they are always undefined. Say Y here to enable software |
| 800 | emulation of these instructions for userspace using LDXR/STXR. |
| 801 | |
| 802 | In some older versions of glibc [<=2.8] SWP is used during futex |
| 803 | trylock() operations with the assumption that the code will not |
| 804 | be preempted. This invalid assumption may be more likely to fail |
| 805 | with SWP emulation enabled, leading to deadlock of the user |
| 806 | application. |
| 807 | |
| 808 | NOTE: when accessing uncached shared regions, LDXR/STXR rely |
| 809 | on an external transaction monitoring block called a global |
| 810 | monitor to maintain update atomicity. If your system does not |
| 811 | implement a global monitor, this option can cause programs that |
| 812 | perform SWP operations to uncached memory to deadlock. |
| 813 | |
| 814 | If unsure, say Y |
| 815 | |
| 816 | config CP15_BARRIER_EMULATION |
| 817 | bool "Emulate CP15 Barrier instructions" |
| 818 | help |
| 819 | The CP15 barrier instructions - CP15ISB, CP15DSB, and |
| 820 | CP15DMB - are deprecated in ARMv8 (and ARMv7). It is |
| 821 | strongly recommended to use the ISB, DSB, and DMB |
| 822 | instructions instead. |
| 823 | |
| 824 | Say Y here to enable software emulation of these |
| 825 | instructions for AArch32 userspace code. When this option is |
| 826 | enabled, CP15 barrier usage is traced which can help |
| 827 | identify software that needs updating. |
| 828 | |
| 829 | If unsure, say Y |
| 830 | |
Suzuki K. Poulose | 2d888f4 | 2015-01-21 12:43:11 +0000 | [diff] [blame] | 831 | config SETEND_EMULATION |
| 832 | bool "Emulate SETEND instruction" |
| 833 | help |
| 834 | The SETEND instruction alters the data-endianness of the |
| 835 | AArch32 EL0, and is deprecated in ARMv8. |
| 836 | |
| 837 | Say Y here to enable software emulation of the instruction |
| 838 | for AArch32 userspace code. |
| 839 | |
| 840 | Note: All the cpus on the system must have mixed endian support at EL0 |
| 841 | for this feature to be enabled. If a new CPU - which doesn't support mixed |
| 842 | endian - is hotplugged in after this feature has been enabled, there could |
| 843 | be unexpected results in the applications. |
| 844 | |
| 845 | If unsure, say Y |
Will Deacon | 1b907f4 | 2014-11-20 16:51:10 +0000 | [diff] [blame] | 846 | endif |
| 847 | |
Catalin Marinas | 7285f41 | 2016-07-01 18:25:31 +0100 | [diff] [blame] | 848 | config ARM64_SW_TTBR0_PAN |
| 849 | bool "Emulate Privileged Access Never using TTBR0_EL1 switching" |
| 850 | help |
| 851 | Enabling this option prevents the kernel from accessing |
| 852 | user-space memory directly by pointing TTBR0_EL1 to a reserved |
| 853 | zeroed area and reserved ASID. The user access routines |
| 854 | restore the valid TTBR0_EL1 temporarily. |
| 855 | |
Will Deacon | 0e4a070 | 2015-07-27 15:54:13 +0100 | [diff] [blame] | 856 | menu "ARMv8.1 architectural features" |
| 857 | |
| 858 | config ARM64_HW_AFDBM |
| 859 | bool "Support for hardware updates of the Access and Dirty page flags" |
| 860 | default y |
| 861 | help |
| 862 | The ARMv8.1 architecture extensions introduce support for |
| 863 | hardware updates of the access and dirty information in page |
| 864 | table entries. When enabled in TCR_EL1 (HA and HD bits) on |
| 865 | capable processors, accesses to pages with PTE_AF cleared will |
| 866 | set this bit instead of raising an access flag fault. |
| 867 | Similarly, writes to read-only pages with the DBM bit set will |
| 868 | clear the read-only bit (AP[2]) instead of raising a |
| 869 | permission fault. |
| 870 | |
| 871 | Kernels built with this configuration option enabled continue |
| 872 | to work on pre-ARMv8.1 hardware and the performance impact is |
| 873 | minimal. If unsure, say Y. |
| 874 | |
| 875 | config ARM64_PAN |
| 876 | bool "Enable support for Privileged Access Never (PAN)" |
| 877 | default y |
| 878 | help |
| 879 | Privileged Access Never (PAN; part of the ARMv8.1 Extensions) |
| 880 | prevents the kernel or hypervisor from accessing user-space (EL0) |
| 881 | memory directly. |
| 882 | |
| 883 | Choosing this option will cause any unprotected (not using |
| 884 | copy_to_user et al) memory access to fail with a permission fault. |
| 885 | |
| 886 | The feature is detected at runtime, and will remain as a 'nop' |
| 887 | instruction if the cpu does not implement the feature. |
| 888 | |
| 889 | config ARM64_LSE_ATOMICS |
| 890 | bool "Atomic instructions" |
| 891 | help |
| 892 | As part of the Large System Extensions, ARMv8.1 introduces new |
| 893 | atomic instructions that are designed specifically to scale in |
| 894 | very large systems. |
| 895 | |
| 896 | Say Y here to make use of these instructions for the in-kernel |
| 897 | atomic routines. This incurs a small overhead on CPUs that do |
| 898 | not support these instructions and requires the kernel to be |
| 899 | built with binutils >= 2.25. |
| 900 | |
Marc Zyngier | 1f364c8 | 2014-02-19 09:33:14 +0000 | [diff] [blame] | 901 | config ARM64_VHE |
| 902 | bool "Enable support for Virtualization Host Extensions (VHE)" |
| 903 | default y |
| 904 | help |
| 905 | Virtualization Host Extensions (VHE) allow the kernel to run |
| 906 | directly at EL2 (instead of EL1) on processors that support |
| 907 | it. This leads to better performance for KVM, as they reduce |
| 908 | the cost of the world switch. |
| 909 | |
| 910 | Selecting this option allows the VHE feature to be detected |
| 911 | at runtime, and does not affect processors that do not |
| 912 | implement this feature. |
| 913 | |
Will Deacon | 0e4a070 | 2015-07-27 15:54:13 +0100 | [diff] [blame] | 914 | endmenu |
| 915 | |
Will Deacon | f993318 | 2016-02-26 16:30:14 +0000 | [diff] [blame] | 916 | menu "ARMv8.2 architectural features" |
| 917 | |
James Morse | 57f4959 | 2016-02-05 14:58:48 +0000 | [diff] [blame] | 918 | config ARM64_UAO |
| 919 | bool "Enable support for User Access Override (UAO)" |
| 920 | default y |
| 921 | help |
| 922 | User Access Override (UAO; part of the ARMv8.2 Extensions) |
| 923 | causes the 'unprivileged' variant of the load/store instructions to |
| 924 | be overriden to be privileged. |
| 925 | |
| 926 | This option changes get_user() and friends to use the 'unprivileged' |
| 927 | variant of the load/store instructions. This ensures that user-space |
| 928 | really did have access to the supplied memory. When addr_limit is |
| 929 | set to kernel memory the UAO bit will be set, allowing privileged |
| 930 | access to kernel memory. |
| 931 | |
| 932 | Choosing this option will cause copy_to_user() et al to use user-space |
| 933 | memory permissions. |
| 934 | |
| 935 | The feature is detected at runtime, the kernel will use the |
| 936 | regular load/store instructions if the cpu does not implement the |
| 937 | feature. |
| 938 | |
Will Deacon | f993318 | 2016-02-26 16:30:14 +0000 | [diff] [blame] | 939 | endmenu |
| 940 | |
Ard Biesheuvel | fd045f6 | 2015-11-24 12:37:35 +0100 | [diff] [blame] | 941 | config ARM64_MODULE_CMODEL_LARGE |
| 942 | bool |
| 943 | |
| 944 | config ARM64_MODULE_PLTS |
| 945 | bool |
| 946 | select ARM64_MODULE_CMODEL_LARGE |
| 947 | select HAVE_MOD_ARCH_SPECIFIC |
| 948 | |
Ard Biesheuvel | 1e48ef7 | 2016-01-26 09:13:44 +0100 | [diff] [blame] | 949 | config RELOCATABLE |
| 950 | bool |
| 951 | help |
| 952 | This builds the kernel as a Position Independent Executable (PIE), |
| 953 | which retains all relocation metadata required to relocate the |
| 954 | kernel binary at runtime to a different virtual address than the |
| 955 | address it was linked at. |
| 956 | Since AArch64 uses the RELA relocation format, this requires a |
| 957 | relocation pass at runtime even if the kernel is loaded at the |
| 958 | same address it was linked at. |
| 959 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 960 | config RANDOMIZE_BASE |
| 961 | bool "Randomize the address of the kernel image" |
Catalin Marinas | b9c220b | 2016-07-26 10:16:55 -0700 | [diff] [blame] | 962 | select ARM64_MODULE_PLTS if MODULES |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 963 | select RELOCATABLE |
| 964 | help |
| 965 | Randomizes the virtual address at which the kernel image is |
| 966 | loaded, as a security feature that deters exploit attempts |
| 967 | relying on knowledge of the location of kernel internals. |
| 968 | |
| 969 | It is the bootloader's job to provide entropy, by passing a |
| 970 | random u64 value in /chosen/kaslr-seed at kernel entry. |
| 971 | |
Ard Biesheuvel | 2b5fe07 | 2016-01-26 14:48:29 +0100 | [diff] [blame] | 972 | When booting via the UEFI stub, it will invoke the firmware's |
| 973 | EFI_RNG_PROTOCOL implementation (if available) to supply entropy |
| 974 | to the kernel proper. In addition, it will randomise the physical |
| 975 | location of the kernel Image as well. |
| 976 | |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 977 | If unsure, say N. |
| 978 | |
| 979 | config RANDOMIZE_MODULE_REGION_FULL |
| 980 | bool "Randomize the module region independently from the core kernel" |
Sami Tolvanen | 2bea1d0 | 2017-11-10 14:00:24 -0800 | [diff] [blame] | 981 | depends on RANDOMIZE_BASE && !DYNAMIC_FTRACE && !LTO_CLANG |
Ard Biesheuvel | f80fb3a | 2016-01-26 14:12:01 +0100 | [diff] [blame] | 982 | default y |
| 983 | help |
| 984 | Randomizes the location of the module region without considering the |
| 985 | location of the core kernel. This way, it is impossible for modules |
| 986 | to leak information about the location of core kernel data structures |
| 987 | but it does imply that function calls between modules and the core |
| 988 | kernel will need to be resolved via veneers in the module PLT. |
| 989 | |
| 990 | When this option is not set, the module region will be randomized over |
| 991 | a limited range that contains the [_stext, _etext] interval of the |
| 992 | core kernel, so branch relocations are always in range. |
| 993 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 994 | endmenu |
| 995 | |
| 996 | menu "Boot options" |
| 997 | |
Lorenzo Pieralisi | 5e89c55 | 2016-01-26 11:10:38 +0000 | [diff] [blame] | 998 | config ARM64_ACPI_PARKING_PROTOCOL |
| 999 | bool "Enable support for the ARM64 ACPI parking protocol" |
| 1000 | depends on ACPI |
| 1001 | help |
| 1002 | Enable support for the ARM64 ACPI parking protocol. If disabled |
| 1003 | the kernel will not allow booting through the ARM64 ACPI parking |
| 1004 | protocol even if the corresponding data is present in the ACPI |
| 1005 | MADT table. |
| 1006 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1007 | config CMDLINE |
| 1008 | string "Default kernel command string" |
| 1009 | default "" |
| 1010 | help |
| 1011 | Provide a set of default command-line options at build time by |
| 1012 | entering them here. As a minimum, you should specify the the |
| 1013 | root device (e.g. root=/dev/nfs). |
| 1014 | |
Colin Cross | 8e56764 | 2014-04-02 18:02:15 -0700 | [diff] [blame] | 1015 | choice |
| 1016 | prompt "Kernel command line type" if CMDLINE != "" |
| 1017 | default CMDLINE_FROM_BOOTLOADER |
| 1018 | |
| 1019 | config CMDLINE_FROM_BOOTLOADER |
| 1020 | bool "Use bootloader kernel arguments if available" |
| 1021 | help |
| 1022 | Uses the command-line options passed by the boot loader. If |
| 1023 | the boot loader doesn't provide any, the default kernel command |
| 1024 | string provided in CMDLINE will be used. |
| 1025 | |
| 1026 | config CMDLINE_EXTEND |
| 1027 | bool "Extend bootloader kernel arguments" |
| 1028 | help |
| 1029 | The command-line arguments provided by the boot loader will be |
| 1030 | appended to the default kernel command string. |
| 1031 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1032 | config CMDLINE_FORCE |
| 1033 | bool "Always use the default kernel command string" |
| 1034 | help |
| 1035 | Always use the default kernel command string, even if the boot |
| 1036 | loader passes other arguments to the kernel. |
| 1037 | This is useful if you cannot or don't want to change the |
| 1038 | command-line options your boot loader passes to the kernel. |
Colin Cross | 8e56764 | 2014-04-02 18:02:15 -0700 | [diff] [blame] | 1039 | endchoice |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1040 | |
Ard Biesheuvel | f4f75ad5 | 2014-07-02 14:54:43 +0200 | [diff] [blame] | 1041 | config EFI_STUB |
| 1042 | bool |
| 1043 | |
Mark Salter | f84d027 | 2014-04-15 21:59:30 -0400 | [diff] [blame] | 1044 | config EFI |
| 1045 | bool "UEFI runtime support" |
| 1046 | depends on OF && !CPU_BIG_ENDIAN |
| 1047 | select LIBFDT |
| 1048 | select UCS2_STRING |
| 1049 | select EFI_PARAMS_FROM_FDT |
Ard Biesheuvel | e15dd49 | 2014-07-04 19:41:53 +0200 | [diff] [blame] | 1050 | select EFI_RUNTIME_WRAPPERS |
Ard Biesheuvel | f4f75ad5 | 2014-07-02 14:54:43 +0200 | [diff] [blame] | 1051 | select EFI_STUB |
| 1052 | select EFI_ARMSTUB |
Mark Salter | f84d027 | 2014-04-15 21:59:30 -0400 | [diff] [blame] | 1053 | default y |
| 1054 | help |
| 1055 | This option provides support for runtime services provided |
| 1056 | by UEFI firmware (such as non-volatile variables, realtime |
Mark Salter | 3c7f255 | 2014-04-15 22:47:52 -0400 | [diff] [blame] | 1057 | clock, and platform reset). A UEFI stub is also provided to |
| 1058 | allow the kernel to be booted as an EFI application. This |
| 1059 | is only useful on systems that have UEFI firmware. |
Mark Salter | f84d027 | 2014-04-15 21:59:30 -0400 | [diff] [blame] | 1060 | |
Yi Li | d1ae8c0 | 2014-10-04 23:46:43 +0800 | [diff] [blame] | 1061 | config DMI |
| 1062 | bool "Enable support for SMBIOS (DMI) tables" |
| 1063 | depends on EFI |
| 1064 | default y |
| 1065 | help |
| 1066 | This enables SMBIOS/DMI feature for systems. |
| 1067 | |
| 1068 | This option is only useful on systems that have UEFI firmware. |
| 1069 | However, even with this option, the resultant kernel should |
| 1070 | continue to boot on existing non-UEFI platforms. |
| 1071 | |
Alex Ray | 911da23 | 2014-03-17 13:44:01 -0700 | [diff] [blame] | 1072 | config BUILD_ARM64_APPENDED_DTB_IMAGE |
| 1073 | bool "Build a concatenated Image.gz/dtb by default" |
| 1074 | depends on OF |
| 1075 | help |
| 1076 | Enabling this option will cause a concatenated Image.gz and list of |
| 1077 | DTBs to be built by default (instead of a standalone Image.gz.) |
| 1078 | The image will built in arch/arm64/boot/Image.gz-dtb |
| 1079 | |
Dmitry Shmidt | 4bdcc93 | 2017-03-28 13:30:18 -0700 | [diff] [blame] | 1080 | choice |
| 1081 | prompt "Appended DTB Kernel Image name" |
| 1082 | depends on BUILD_ARM64_APPENDED_DTB_IMAGE |
| 1083 | help |
| 1084 | Enabling this option will cause a specific kernel image Image or |
| 1085 | Image.gz to be used for final image creation. |
| 1086 | The image will built in arch/arm64/boot/IMAGE-NAME-dtb |
| 1087 | |
| 1088 | config IMG_GZ_DTB |
| 1089 | bool "Image.gz-dtb" |
| 1090 | config IMG_DTB |
| 1091 | bool "Image-dtb" |
| 1092 | endchoice |
| 1093 | |
| 1094 | config BUILD_ARM64_APPENDED_KERNEL_IMAGE_NAME |
| 1095 | string |
| 1096 | depends on BUILD_ARM64_APPENDED_DTB_IMAGE |
| 1097 | default "Image.gz-dtb" if IMG_GZ_DTB |
| 1098 | default "Image-dtb" if IMG_DTB |
| 1099 | |
Alex Ray | 911da23 | 2014-03-17 13:44:01 -0700 | [diff] [blame] | 1100 | config BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES |
| 1101 | string "Default dtb names" |
| 1102 | depends on BUILD_ARM64_APPENDED_DTB_IMAGE |
| 1103 | help |
| 1104 | Space separated list of names of dtbs to append when |
| 1105 | building a concatenated Image.gz-dtb. |
| 1106 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1107 | endmenu |
| 1108 | |
| 1109 | menu "Userspace binary formats" |
| 1110 | |
| 1111 | source "fs/Kconfig.binfmt" |
| 1112 | |
| 1113 | config COMPAT |
| 1114 | bool "Kernel support for 32-bit EL0" |
Suzuki K. Poulose | 755e70b | 2015-10-19 14:19:32 +0100 | [diff] [blame] | 1115 | depends on ARM64_4K_PAGES || EXPERT |
Kefeng Wang | e631a1a | 2017-01-26 11:19:55 +0800 | [diff] [blame] | 1116 | select COMPAT_BINFMT_ELF if BINFMT_ELF |
Catalin Marinas | af1839e | 2012-10-08 16:28:08 -0700 | [diff] [blame] | 1117 | select HAVE_UID16 |
Al Viro | 84b9e9b | 2012-12-25 16:29:11 -0500 | [diff] [blame] | 1118 | select OLD_SIGSUSPEND3 |
Al Viro | 5168203 | 2012-12-25 19:31:29 -0500 | [diff] [blame] | 1119 | select COMPAT_OLD_SIGACTION |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1120 | help |
| 1121 | This option enables support for a 32-bit EL0 running under a 64-bit |
| 1122 | kernel at EL1. AArch32-specific components such as system calls, |
| 1123 | the user helper functions, VFP support and the ptrace interface are |
| 1124 | handled appropriately by the kernel. |
| 1125 | |
Suzuki K. Poulose | 44eaacf | 2015-10-19 14:19:37 +0100 | [diff] [blame] | 1126 | If you use a page size other than 4KB (i.e, 16KB or 64KB), please be aware |
| 1127 | that you will only be able to execute AArch32 binaries that were compiled |
| 1128 | with page size aligned segments. |
Alexander Graf | a8fcd8b | 2015-03-16 16:32:23 +0000 | [diff] [blame] | 1129 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1130 | If you want to execute 32-bit userspace applications, say Y. |
| 1131 | |
| 1132 | config SYSVIPC_COMPAT |
| 1133 | def_bool y |
| 1134 | depends on COMPAT && SYSVIPC |
| 1135 | |
| 1136 | endmenu |
| 1137 | |
Lorenzo Pieralisi | 166936b | 2013-11-07 18:37:14 +0000 | [diff] [blame] | 1138 | menu "Power management options" |
| 1139 | |
| 1140 | source "kernel/power/Kconfig" |
| 1141 | |
James Morse | 82869ac | 2016-04-27 17:47:12 +0100 | [diff] [blame] | 1142 | config ARCH_HIBERNATION_POSSIBLE |
| 1143 | def_bool y |
| 1144 | depends on CPU_PM |
| 1145 | |
| 1146 | config ARCH_HIBERNATION_HEADER |
| 1147 | def_bool y |
| 1148 | depends on HIBERNATION |
| 1149 | |
Lorenzo Pieralisi | 166936b | 2013-11-07 18:37:14 +0000 | [diff] [blame] | 1150 | config ARCH_SUSPEND_POSSIBLE |
| 1151 | def_bool y |
| 1152 | |
Lorenzo Pieralisi | 166936b | 2013-11-07 18:37:14 +0000 | [diff] [blame] | 1153 | endmenu |
| 1154 | |
Lorenzo Pieralisi | 1307220 | 2013-07-17 14:54:21 +0100 | [diff] [blame] | 1155 | menu "CPU Power Management" |
| 1156 | |
| 1157 | source "drivers/cpuidle/Kconfig" |
| 1158 | |
Rob Herring | 52e7e81 | 2014-02-24 11:27:57 +0900 | [diff] [blame] | 1159 | source "drivers/cpufreq/Kconfig" |
| 1160 | |
| 1161 | endmenu |
| 1162 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1163 | source "net/Kconfig" |
| 1164 | |
| 1165 | source "drivers/Kconfig" |
| 1166 | |
Mark Salter | f84d027 | 2014-04-15 21:59:30 -0400 | [diff] [blame] | 1167 | source "drivers/firmware/Kconfig" |
| 1168 | |
Graeme Gregory | b6a0217 | 2015-03-24 14:02:53 +0000 | [diff] [blame] | 1169 | source "drivers/acpi/Kconfig" |
| 1170 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1171 | source "fs/Kconfig" |
| 1172 | |
Marc Zyngier | c3eb5b1 | 2013-07-04 13:34:32 +0100 | [diff] [blame] | 1173 | source "arch/arm64/kvm/Kconfig" |
| 1174 | |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1175 | source "arch/arm64/Kconfig.debug" |
| 1176 | |
| 1177 | source "security/Kconfig" |
| 1178 | |
| 1179 | source "crypto/Kconfig" |
Ard Biesheuvel | 2c98833 | 2014-03-06 16:23:33 +0800 | [diff] [blame] | 1180 | if CRYPTO |
| 1181 | source "arch/arm64/crypto/Kconfig" |
| 1182 | endif |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1183 | |
| 1184 | source "lib/Kconfig" |