Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 1 | /************************************************************************** |
| 2 | * |
| 3 | * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA |
| 4 | * All Rights Reserved. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the |
| 8 | * "Software"), to deal in the Software without restriction, including |
| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
| 11 | * permit persons to whom the Software is furnished to do so, subject to |
| 12 | * the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice (including the |
| 15 | * next paragraph) shall be included in all copies or substantial portions |
| 16 | * of the Software. |
| 17 | * |
| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 25 | * |
| 26 | **************************************************************************/ |
| 27 | /* |
| 28 | * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com> |
| 29 | */ |
| 30 | |
Paul Gortmaker | 2d1a8a4 | 2011-08-30 18:16:33 -0400 | [diff] [blame] | 31 | #include <linux/export.h> |
David Howells | 760285e | 2012-10-02 18:01:07 +0100 | [diff] [blame] | 32 | #include <drm/drmP.h> |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 33 | |
| 34 | #if defined(CONFIG_X86) |
Ross Zwisler | 2a0c772 | 2014-02-26 12:06:51 -0700 | [diff] [blame] | 35 | |
| 36 | /* |
| 37 | * clflushopt is an unordered instruction which needs fencing with mfence or |
| 38 | * sfence to avoid ordering issues. For drm_clflush_page this fencing happens |
| 39 | * in the caller. |
| 40 | */ |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 41 | static void |
| 42 | drm_clflush_page(struct page *page) |
| 43 | { |
| 44 | uint8_t *page_virtual; |
| 45 | unsigned int i; |
Dave Airlie | 87229ad | 2012-09-19 11:12:41 +1000 | [diff] [blame] | 46 | const int size = boot_cpu_data.x86_clflush_size; |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 47 | |
| 48 | if (unlikely(page == NULL)) |
| 49 | return; |
| 50 | |
Cong Wang | 1c9c20f | 2011-11-25 23:14:20 +0800 | [diff] [blame] | 51 | page_virtual = kmap_atomic(page); |
Dave Airlie | 87229ad | 2012-09-19 11:12:41 +1000 | [diff] [blame] | 52 | for (i = 0; i < PAGE_SIZE; i += size) |
Ross Zwisler | 2a0c772 | 2014-02-26 12:06:51 -0700 | [diff] [blame] | 53 | clflushopt(page_virtual + i); |
Cong Wang | 1c9c20f | 2011-11-25 23:14:20 +0800 | [diff] [blame] | 54 | kunmap_atomic(page_virtual); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 55 | } |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 56 | |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 57 | static void drm_cache_flush_clflush(struct page *pages[], |
| 58 | unsigned long num_pages) |
| 59 | { |
| 60 | unsigned long i; |
| 61 | |
| 62 | mb(); |
| 63 | for (i = 0; i < num_pages; i++) |
| 64 | drm_clflush_page(*pages++); |
| 65 | mb(); |
| 66 | } |
| 67 | |
| 68 | static void |
| 69 | drm_clflush_ipi_handler(void *null) |
| 70 | { |
| 71 | wbinvd(); |
| 72 | } |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 73 | #endif |
Dave Airlie | ed017d9 | 2009-09-02 09:41:13 +1000 | [diff] [blame] | 74 | |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 75 | void |
| 76 | drm_clflush_pages(struct page *pages[], unsigned long num_pages) |
| 77 | { |
| 78 | |
| 79 | #if defined(CONFIG_X86) |
| 80 | if (cpu_has_clflush) { |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 81 | drm_cache_flush_clflush(pages, num_pages); |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 82 | return; |
| 83 | } |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 84 | |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 85 | if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0) |
| 86 | printk(KERN_ERR "Timed out waiting for cache flush.\n"); |
| 87 | |
| 88 | #elif defined(__powerpc__) |
| 89 | unsigned long i; |
| 90 | for (i = 0; i < num_pages; i++) { |
| 91 | struct page *page = pages[i]; |
| 92 | void *page_virtual; |
| 93 | |
| 94 | if (unlikely(page == NULL)) |
| 95 | continue; |
| 96 | |
Cong Wang | 1c9c20f | 2011-11-25 23:14:20 +0800 | [diff] [blame] | 97 | page_virtual = kmap_atomic(page); |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 98 | flush_dcache_range((unsigned long)page_virtual, |
| 99 | (unsigned long)page_virtual + PAGE_SIZE); |
Cong Wang | 1c9c20f | 2011-11-25 23:14:20 +0800 | [diff] [blame] | 100 | kunmap_atomic(page_virtual); |
Dave Airlie | c9c97b8 | 2009-08-27 09:53:47 +1000 | [diff] [blame] | 101 | } |
| 102 | #else |
Dave Airlie | ed017d9 | 2009-09-02 09:41:13 +1000 | [diff] [blame] | 103 | printk(KERN_ERR "Architecture has no drm_cache.c support\n"); |
| 104 | WARN_ON_ONCE(1); |
Dave Airlie | e0f0754 | 2008-10-07 13:41:49 +1000 | [diff] [blame] | 105 | #endif |
Eric Anholt | 673a394 | 2008-07-30 12:06:12 -0700 | [diff] [blame] | 106 | } |
| 107 | EXPORT_SYMBOL(drm_clflush_pages); |
Daniel Vetter | 6d5cd9c | 2012-03-25 19:47:30 +0200 | [diff] [blame] | 108 | |
| 109 | void |
Chris Wilson | 9da3da6 | 2012-06-01 15:20:22 +0100 | [diff] [blame] | 110 | drm_clflush_sg(struct sg_table *st) |
| 111 | { |
| 112 | #if defined(CONFIG_X86) |
| 113 | if (cpu_has_clflush) { |
Imre Deak | f5ddf69 | 2013-02-18 19:28:01 +0200 | [diff] [blame] | 114 | struct sg_page_iter sg_iter; |
Chris Wilson | 9da3da6 | 2012-06-01 15:20:22 +0100 | [diff] [blame] | 115 | |
| 116 | mb(); |
Imre Deak | f5ddf69 | 2013-02-18 19:28:01 +0200 | [diff] [blame] | 117 | for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) |
Imre Deak | 2db76d7 | 2013-03-26 15:14:18 +0200 | [diff] [blame] | 118 | drm_clflush_page(sg_page_iter_page(&sg_iter)); |
Chris Wilson | 9da3da6 | 2012-06-01 15:20:22 +0100 | [diff] [blame] | 119 | mb(); |
| 120 | |
| 121 | return; |
| 122 | } |
| 123 | |
| 124 | if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0) |
| 125 | printk(KERN_ERR "Timed out waiting for cache flush.\n"); |
| 126 | #else |
| 127 | printk(KERN_ERR "Architecture has no drm_cache.c support\n"); |
| 128 | WARN_ON_ONCE(1); |
| 129 | #endif |
| 130 | } |
| 131 | EXPORT_SYMBOL(drm_clflush_sg); |
| 132 | |
| 133 | void |
Daniel Vetter | 6d5cd9c | 2012-03-25 19:47:30 +0200 | [diff] [blame] | 134 | drm_clflush_virt_range(char *addr, unsigned long length) |
| 135 | { |
| 136 | #if defined(CONFIG_X86) |
| 137 | if (cpu_has_clflush) { |
| 138 | char *end = addr + length; |
| 139 | mb(); |
| 140 | for (; addr < end; addr += boot_cpu_data.x86_clflush_size) |
| 141 | clflush(addr); |
Ross Zwisler | 2a0788d | 2014-02-26 12:06:52 -0700 | [diff] [blame] | 142 | clflushopt(end - 1); |
Daniel Vetter | 6d5cd9c | 2012-03-25 19:47:30 +0200 | [diff] [blame] | 143 | mb(); |
| 144 | return; |
| 145 | } |
| 146 | |
| 147 | if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0) |
| 148 | printk(KERN_ERR "Timed out waiting for cache flush.\n"); |
| 149 | #else |
| 150 | printk(KERN_ERR "Architecture has no drm_cache.c support\n"); |
| 151 | WARN_ON_ONCE(1); |
| 152 | #endif |
| 153 | } |
| 154 | EXPORT_SYMBOL(drm_clflush_virt_range); |