Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 1 | /* |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 2 | * Copyright (C) 2008 Nokia Corporation |
| 3 | * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
Tomi Valkeinen | a0b38cc | 2011-05-11 14:05:07 +0300 | [diff] [blame] | 18 | #ifndef __OMAP_OMAPDSS_H |
| 19 | #define __OMAP_OMAPDSS_H |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 20 | |
| 21 | #include <linux/list.h> |
| 22 | #include <linux/kobject.h> |
| 23 | #include <linux/device.h> |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 24 | |
| 25 | #define DISPC_IRQ_FRAMEDONE (1 << 0) |
| 26 | #define DISPC_IRQ_VSYNC (1 << 1) |
| 27 | #define DISPC_IRQ_EVSYNC_EVEN (1 << 2) |
| 28 | #define DISPC_IRQ_EVSYNC_ODD (1 << 3) |
| 29 | #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4) |
| 30 | #define DISPC_IRQ_PROG_LINE_NUM (1 << 5) |
| 31 | #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6) |
| 32 | #define DISPC_IRQ_GFX_END_WIN (1 << 7) |
| 33 | #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8) |
| 34 | #define DISPC_IRQ_OCP_ERR (1 << 9) |
| 35 | #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10) |
| 36 | #define DISPC_IRQ_VID1_END_WIN (1 << 11) |
| 37 | #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12) |
| 38 | #define DISPC_IRQ_VID2_END_WIN (1 << 13) |
| 39 | #define DISPC_IRQ_SYNC_LOST (1 << 14) |
| 40 | #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15) |
| 41 | #define DISPC_IRQ_WAKEUP (1 << 16) |
Sumit Semwal | 2a205f3 | 2010-12-02 11:27:12 +0000 | [diff] [blame] | 42 | #define DISPC_IRQ_SYNC_LOST2 (1 << 17) |
| 43 | #define DISPC_IRQ_VSYNC2 (1 << 18) |
Archit Taneja | b8c095b | 2011-09-13 18:20:33 +0530 | [diff] [blame] | 44 | #define DISPC_IRQ_VID3_END_WIN (1 << 19) |
| 45 | #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20) |
Sumit Semwal | 2a205f3 | 2010-12-02 11:27:12 +0000 | [diff] [blame] | 46 | #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21) |
| 47 | #define DISPC_IRQ_FRAMEDONE2 (1 << 22) |
Tomi Valkeinen | 7f6f3c4 | 2011-08-31 13:39:03 +0300 | [diff] [blame] | 48 | #define DISPC_IRQ_FRAMEDONEWB (1 << 23) |
| 49 | #define DISPC_IRQ_FRAMEDONETV (1 << 24) |
| 50 | #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25) |
Chandrabhanu Mahapatra | e86d456 | 2012-06-29 10:43:13 +0530 | [diff] [blame] | 51 | #define DISPC_IRQ_FRAMEDONE3 (1 << 26) |
| 52 | #define DISPC_IRQ_VSYNC3 (1 << 27) |
| 53 | #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 28) |
| 54 | #define DISPC_IRQ_SYNC_LOST3 (1 << 29) |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 55 | |
| 56 | struct omap_dss_device; |
| 57 | struct omap_overlay_manager; |
Ricardo Neri | 9c0b842 | 2012-03-06 18:20:37 -0600 | [diff] [blame] | 58 | struct snd_aes_iec958; |
| 59 | struct snd_cea_861_aud_if; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 60 | |
| 61 | enum omap_display_type { |
| 62 | OMAP_DISPLAY_TYPE_NONE = 0, |
| 63 | OMAP_DISPLAY_TYPE_DPI = 1 << 0, |
| 64 | OMAP_DISPLAY_TYPE_DBI = 1 << 1, |
| 65 | OMAP_DISPLAY_TYPE_SDI = 1 << 2, |
| 66 | OMAP_DISPLAY_TYPE_DSI = 1 << 3, |
| 67 | OMAP_DISPLAY_TYPE_VENC = 1 << 4, |
Mythri P K | b119601 | 2011-03-08 17:15:54 +0530 | [diff] [blame] | 68 | OMAP_DISPLAY_TYPE_HDMI = 1 << 5, |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 69 | }; |
| 70 | |
| 71 | enum omap_plane { |
| 72 | OMAP_DSS_GFX = 0, |
| 73 | OMAP_DSS_VIDEO1 = 1, |
Archit Taneja | b8c095b | 2011-09-13 18:20:33 +0530 | [diff] [blame] | 74 | OMAP_DSS_VIDEO2 = 2, |
| 75 | OMAP_DSS_VIDEO3 = 3, |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 76 | }; |
| 77 | |
| 78 | enum omap_channel { |
| 79 | OMAP_DSS_CHANNEL_LCD = 0, |
| 80 | OMAP_DSS_CHANNEL_DIGIT = 1, |
Sumit Semwal | 8613b00 | 2010-12-02 11:27:09 +0000 | [diff] [blame] | 81 | OMAP_DSS_CHANNEL_LCD2 = 2, |
Chandrabhanu Mahapatra | ff6331e | 2012-06-19 15:08:16 +0530 | [diff] [blame] | 82 | OMAP_DSS_CHANNEL_LCD3 = 3, |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 83 | }; |
| 84 | |
| 85 | enum omap_color_mode { |
| 86 | OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */ |
| 87 | OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */ |
| 88 | OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */ |
| 89 | OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */ |
| 90 | OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */ |
| 91 | OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */ |
| 92 | OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */ |
| 93 | OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */ |
| 94 | OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */ |
| 95 | OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */ |
| 96 | OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */ |
| 97 | OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */ |
| 98 | OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */ |
| 99 | OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */ |
Amber Jain | f20e422 | 2011-05-19 19:47:50 +0530 | [diff] [blame] | 100 | OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */ |
| 101 | OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */ |
| 102 | OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */ |
| 103 | OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */ |
| 104 | OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */ |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 105 | }; |
| 106 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 107 | enum omap_dss_load_mode { |
| 108 | OMAP_DSS_LOAD_CLUT_AND_FRAME = 0, |
| 109 | OMAP_DSS_LOAD_CLUT_ONLY = 1, |
| 110 | OMAP_DSS_LOAD_FRAME_ONLY = 2, |
| 111 | OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3, |
| 112 | }; |
| 113 | |
| 114 | enum omap_dss_trans_key_type { |
| 115 | OMAP_DSS_COLOR_KEY_GFX_DST = 0, |
| 116 | OMAP_DSS_COLOR_KEY_VID_SRC = 1, |
| 117 | }; |
| 118 | |
| 119 | enum omap_rfbi_te_mode { |
| 120 | OMAP_DSS_RFBI_TE_MODE_1 = 1, |
| 121 | OMAP_DSS_RFBI_TE_MODE_2 = 2, |
| 122 | }; |
| 123 | |
Archit Taneja | a8d5e41 | 2012-06-25 12:26:38 +0530 | [diff] [blame] | 124 | enum omap_dss_signal_level { |
| 125 | OMAPDSS_SIG_ACTIVE_HIGH = 0, |
| 126 | OMAPDSS_SIG_ACTIVE_LOW = 1, |
| 127 | }; |
| 128 | |
| 129 | enum omap_dss_signal_edge { |
| 130 | OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES, |
| 131 | OMAPDSS_DRIVE_SIG_RISING_EDGE, |
| 132 | OMAPDSS_DRIVE_SIG_FALLING_EDGE, |
| 133 | }; |
| 134 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 135 | enum omap_dss_venc_type { |
| 136 | OMAP_DSS_VENC_TYPE_COMPOSITE, |
| 137 | OMAP_DSS_VENC_TYPE_SVIDEO, |
| 138 | }; |
| 139 | |
Archit Taneja | a3b3cc2 | 2011-09-08 18:42:16 +0530 | [diff] [blame] | 140 | enum omap_dss_dsi_pixel_format { |
| 141 | OMAP_DSS_DSI_FMT_RGB888, |
| 142 | OMAP_DSS_DSI_FMT_RGB666, |
| 143 | OMAP_DSS_DSI_FMT_RGB666_PACKED, |
| 144 | OMAP_DSS_DSI_FMT_RGB565, |
| 145 | }; |
| 146 | |
Archit Taneja | 7e951ee | 2011-07-22 12:45:04 +0530 | [diff] [blame] | 147 | enum omap_dss_dsi_mode { |
| 148 | OMAP_DSS_DSI_CMD_MODE = 0, |
| 149 | OMAP_DSS_DSI_VIDEO_MODE, |
| 150 | }; |
| 151 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 152 | enum omap_display_caps { |
| 153 | OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0, |
| 154 | OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1, |
| 155 | }; |
| 156 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 157 | enum omap_dss_display_state { |
| 158 | OMAP_DSS_DISPLAY_DISABLED = 0, |
| 159 | OMAP_DSS_DISPLAY_ACTIVE, |
| 160 | OMAP_DSS_DISPLAY_SUSPENDED, |
| 161 | }; |
| 162 | |
Ricardo Neri | 9c0b842 | 2012-03-06 18:20:37 -0600 | [diff] [blame] | 163 | enum omap_dss_audio_state { |
| 164 | OMAP_DSS_AUDIO_DISABLED = 0, |
| 165 | OMAP_DSS_AUDIO_ENABLED, |
| 166 | OMAP_DSS_AUDIO_CONFIGURED, |
| 167 | OMAP_DSS_AUDIO_PLAYING, |
| 168 | }; |
| 169 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 170 | enum omap_dss_rotation_type { |
Chandrabhanu Mahapatra | 65e006f | 2012-05-11 19:19:55 +0530 | [diff] [blame] | 171 | OMAP_DSS_ROT_DMA = 1 << 0, |
| 172 | OMAP_DSS_ROT_VRFB = 1 << 1, |
| 173 | OMAP_DSS_ROT_TILER = 1 << 2, |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 174 | }; |
| 175 | |
| 176 | /* clockwise rotation angle */ |
| 177 | enum omap_dss_rotation_angle { |
| 178 | OMAP_DSS_ROT_0 = 0, |
| 179 | OMAP_DSS_ROT_90 = 1, |
| 180 | OMAP_DSS_ROT_180 = 2, |
| 181 | OMAP_DSS_ROT_270 = 3, |
| 182 | }; |
| 183 | |
| 184 | enum omap_overlay_caps { |
| 185 | OMAP_DSS_OVL_CAP_SCALE = 1 << 0, |
Tomi Valkeinen | f6dc815 | 2011-08-15 15:18:20 +0300 | [diff] [blame] | 186 | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1, |
| 187 | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2, |
Archit Taneja | 11354dd | 2011-09-26 11:47:29 +0530 | [diff] [blame] | 188 | OMAP_DSS_OVL_CAP_ZORDER = 1 << 3, |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 189 | }; |
| 190 | |
| 191 | enum omap_overlay_manager_caps { |
Tomi Valkeinen | 4a9e78a | 2011-08-15 11:22:21 +0300 | [diff] [blame] | 192 | OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */ |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 193 | }; |
| 194 | |
Archit Taneja | 89a35e5 | 2011-04-12 13:52:23 +0530 | [diff] [blame] | 195 | enum omap_dss_clk_source { |
| 196 | OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK |
| 197 | * OMAP4: DSS_FCLK */ |
| 198 | OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK |
| 199 | * OMAP4: PLL1_CLK1 */ |
| 200 | OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK |
| 201 | * OMAP4: PLL1_CLK2 */ |
Archit Taneja | 5a8b572 | 2011-05-12 17:26:29 +0530 | [diff] [blame] | 202 | OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */ |
| 203 | OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */ |
Archit Taneja | 89a35e5 | 2011-04-12 13:52:23 +0530 | [diff] [blame] | 204 | }; |
| 205 | |
Mythri P K | 9a90168 | 2012-01-02 14:02:38 +0530 | [diff] [blame] | 206 | enum omap_hdmi_flags { |
| 207 | OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0, |
| 208 | }; |
| 209 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 210 | /* RFBI */ |
| 211 | |
| 212 | struct rfbi_timings { |
| 213 | int cs_on_time; |
| 214 | int cs_off_time; |
| 215 | int we_on_time; |
| 216 | int we_off_time; |
| 217 | int re_on_time; |
| 218 | int re_off_time; |
| 219 | int we_cycle_time; |
| 220 | int re_cycle_time; |
| 221 | int cs_pulse_width; |
| 222 | int access_time; |
| 223 | |
| 224 | int clk_div; |
| 225 | |
| 226 | u32 tim[5]; /* set by rfbi_convert_timings() */ |
| 227 | |
| 228 | int converted; |
| 229 | }; |
| 230 | |
| 231 | void omap_rfbi_write_command(const void *buf, u32 len); |
| 232 | void omap_rfbi_read_data(void *buf, u32 len); |
| 233 | void omap_rfbi_write_data(const void *buf, u32 len); |
| 234 | void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width, |
| 235 | u16 x, u16 y, |
| 236 | u16 w, u16 h); |
| 237 | int omap_rfbi_enable_te(bool enable, unsigned line); |
| 238 | int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode, |
| 239 | unsigned hs_pulse_time, unsigned vs_pulse_time, |
| 240 | int hs_pol_inv, int vs_pol_inv, int extif_div); |
Tomi Valkeinen | 773139f | 2011-04-21 19:50:31 +0300 | [diff] [blame] | 241 | void rfbi_bus_lock(void); |
| 242 | void rfbi_bus_unlock(void); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 243 | |
| 244 | /* DSI */ |
Archit Taneja | 8af6ff0 | 2011-09-05 16:48:27 +0530 | [diff] [blame] | 245 | |
| 246 | struct omap_dss_dsi_videomode_data { |
| 247 | /* DSI video mode blanking data */ |
| 248 | /* Unit: byte clock cycles */ |
| 249 | u16 hsa; |
| 250 | u16 hfp; |
| 251 | u16 hbp; |
| 252 | /* Unit: line clocks */ |
| 253 | u16 vsa; |
| 254 | u16 vfp; |
| 255 | u16 vbp; |
| 256 | |
| 257 | /* DSI blanking modes */ |
| 258 | int blanking_mode; |
| 259 | int hsa_blanking_mode; |
| 260 | int hbp_blanking_mode; |
| 261 | int hfp_blanking_mode; |
| 262 | |
| 263 | /* Video port sync events */ |
Archit Taneja | 8af6ff0 | 2011-09-05 16:48:27 +0530 | [diff] [blame] | 264 | bool vp_vsync_end; |
| 265 | bool vp_hsync_end; |
| 266 | |
| 267 | bool ddr_clk_always_on; |
| 268 | int window_sync; |
| 269 | }; |
| 270 | |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 271 | void dsi_bus_lock(struct omap_dss_device *dssdev); |
| 272 | void dsi_bus_unlock(struct omap_dss_device *dssdev); |
| 273 | int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data, |
| 274 | int len); |
Archit Taneja | 6ff8aa3 | 2011-08-25 18:35:58 +0530 | [diff] [blame] | 275 | int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data, |
| 276 | int len); |
| 277 | int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd); |
| 278 | int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel); |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 279 | int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
| 280 | u8 param); |
Archit Taneja | 6ff8aa3 | 2011-08-25 18:35:58 +0530 | [diff] [blame] | 281 | int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel, |
| 282 | u8 param); |
| 283 | int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel, |
| 284 | u8 param1, u8 param2); |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 285 | int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel, |
| 286 | u8 *data, int len); |
Archit Taneja | 6ff8aa3 | 2011-08-25 18:35:58 +0530 | [diff] [blame] | 287 | int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel, |
| 288 | u8 *data, int len); |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 289 | int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd, |
| 290 | u8 *buf, int buflen); |
Archit Taneja | b3b89c0 | 2011-08-30 16:07:39 +0530 | [diff] [blame] | 291 | int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf, |
| 292 | int buflen); |
| 293 | int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param, |
| 294 | u8 *buf, int buflen); |
| 295 | int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel, |
| 296 | u8 param1, u8 param2, u8 *buf, int buflen); |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 297 | int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel, |
| 298 | u16 len); |
| 299 | int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel); |
| 300 | int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel); |
Tomi Valkeinen | 9a147a6 | 2011-11-09 15:30:11 +0200 | [diff] [blame] | 301 | int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel); |
| 302 | void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 303 | |
| 304 | /* Board specific data */ |
| 305 | struct omap_dss_board_info { |
Tomi Valkeinen | aac927c | 2011-05-23 15:46:54 +0300 | [diff] [blame] | 306 | int (*get_context_loss_count)(struct device *dev); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 307 | int num_devices; |
| 308 | struct omap_dss_device **devices; |
| 309 | struct omap_dss_device *default_device; |
Tomi Valkeinen | 5bc416c | 2011-06-15 15:21:12 +0300 | [diff] [blame] | 310 | int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask); |
| 311 | void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask); |
Tomi Valkeinen | 62c1dcf | 2012-03-08 12:37:58 +0200 | [diff] [blame] | 312 | int (*set_min_bus_tput)(struct device *dev, unsigned long r); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 313 | }; |
| 314 | |
Sumit Semwal | b7ee79a | 2011-01-24 06:21:54 +0000 | [diff] [blame] | 315 | /* Init with the board info */ |
| 316 | extern int omap_display_init(struct omap_dss_board_info *board_data); |
Mythri P K | ee9dfd8 | 2012-01-02 14:02:37 +0530 | [diff] [blame] | 317 | /* HDMI mux init*/ |
Mythri P K | 9a90168 | 2012-01-02 14:02:38 +0530 | [diff] [blame] | 318 | extern int omap_hdmi_init(enum omap_hdmi_flags flags); |
Sumit Semwal | b7ee79a | 2011-01-24 06:21:54 +0000 | [diff] [blame] | 319 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 320 | struct omap_video_timings { |
| 321 | /* Unit: pixels */ |
| 322 | u16 x_res; |
| 323 | /* Unit: pixels */ |
| 324 | u16 y_res; |
| 325 | /* Unit: KHz */ |
| 326 | u32 pixel_clock; |
| 327 | /* Unit: pixel clocks */ |
| 328 | u16 hsw; /* Horizontal synchronization pulse width */ |
| 329 | /* Unit: pixel clocks */ |
| 330 | u16 hfp; /* Horizontal front porch */ |
| 331 | /* Unit: pixel clocks */ |
| 332 | u16 hbp; /* Horizontal back porch */ |
| 333 | /* Unit: line clocks */ |
| 334 | u16 vsw; /* Vertical synchronization pulse width */ |
| 335 | /* Unit: line clocks */ |
| 336 | u16 vfp; /* Vertical front porch */ |
| 337 | /* Unit: line clocks */ |
| 338 | u16 vbp; /* Vertical back porch */ |
Archit Taneja | a8d5e41 | 2012-06-25 12:26:38 +0530 | [diff] [blame] | 339 | |
| 340 | /* Vsync logic level */ |
| 341 | enum omap_dss_signal_level vsync_level; |
| 342 | /* Hsync logic level */ |
| 343 | enum omap_dss_signal_level hsync_level; |
Archit Taneja | 23c8f88 | 2012-06-28 11:15:51 +0530 | [diff] [blame] | 344 | /* Interlaced or Progressive timings */ |
| 345 | bool interlace; |
Archit Taneja | a8d5e41 | 2012-06-25 12:26:38 +0530 | [diff] [blame] | 346 | /* Pixel clock edge to drive LCD data */ |
| 347 | enum omap_dss_signal_edge data_pclk_edge; |
| 348 | /* Data enable logic level */ |
| 349 | enum omap_dss_signal_level de_level; |
| 350 | /* Pixel clock edges to drive HSYNC and VSYNC signals */ |
| 351 | enum omap_dss_signal_edge sync_pclk_edge; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 352 | }; |
| 353 | |
| 354 | #ifdef CONFIG_OMAP2_DSS_VENC |
| 355 | /* Hardcoded timings for tv modes. Venc only uses these to |
| 356 | * identify the mode, and does not actually use the configs |
| 357 | * itself. However, the configs should be something that |
| 358 | * a normal monitor can also show */ |
Tobias Klauser | 5a1819e | 2010-05-20 17:12:52 +0200 | [diff] [blame] | 359 | extern const struct omap_video_timings omap_dss_pal_timings; |
| 360 | extern const struct omap_video_timings omap_dss_ntsc_timings; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 361 | #endif |
| 362 | |
Tomi Valkeinen | 3c07cae | 2011-06-21 09:34:30 +0300 | [diff] [blame] | 363 | struct omap_dss_cpr_coefs { |
| 364 | s16 rr, rg, rb; |
| 365 | s16 gr, gg, gb; |
| 366 | s16 br, bg, bb; |
| 367 | }; |
| 368 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 369 | struct omap_overlay_info { |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 370 | u32 paddr; |
Amber Jain | 0d66cbb | 2011-05-19 19:47:54 +0530 | [diff] [blame] | 371 | u32 p_uv_addr; /* for NV12 format */ |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 372 | u16 screen_width; |
| 373 | u16 width; |
| 374 | u16 height; |
| 375 | enum omap_color_mode color_mode; |
| 376 | u8 rotation; |
| 377 | enum omap_dss_rotation_type rotation_type; |
| 378 | bool mirror; |
| 379 | |
| 380 | u16 pos_x; |
| 381 | u16 pos_y; |
| 382 | u16 out_width; /* if 0, out_width == width */ |
| 383 | u16 out_height; /* if 0, out_height == height */ |
| 384 | u8 global_alpha; |
Rajkumar N | fd28a39 | 2010-11-04 12:28:42 +0100 | [diff] [blame] | 385 | u8 pre_mult_alpha; |
Archit Taneja | 5412870 | 2011-09-08 11:29:17 +0530 | [diff] [blame] | 386 | u8 zorder; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 387 | }; |
| 388 | |
| 389 | struct omap_overlay { |
| 390 | struct kobject kobj; |
| 391 | struct list_head list; |
| 392 | |
| 393 | /* static fields */ |
| 394 | const char *name; |
Tomi Valkeinen | 4a9e78a | 2011-08-15 11:22:21 +0300 | [diff] [blame] | 395 | enum omap_plane id; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 396 | enum omap_color_mode supported_modes; |
| 397 | enum omap_overlay_caps caps; |
| 398 | |
| 399 | /* dynamic fields */ |
| 400 | struct omap_overlay_manager *manager; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 401 | |
Tomi Valkeinen | 9d11c32 | 2011-11-18 12:38:38 +0200 | [diff] [blame] | 402 | /* |
| 403 | * The following functions do not block: |
| 404 | * |
| 405 | * is_enabled |
| 406 | * set_overlay_info |
| 407 | * get_overlay_info |
| 408 | * |
| 409 | * The rest of the functions may block and cannot be called from |
| 410 | * interrupt context |
| 411 | */ |
| 412 | |
Tomi Valkeinen | aaa874a | 2011-11-15 16:37:53 +0200 | [diff] [blame] | 413 | int (*enable)(struct omap_overlay *ovl); |
| 414 | int (*disable)(struct omap_overlay *ovl); |
| 415 | bool (*is_enabled)(struct omap_overlay *ovl); |
| 416 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 417 | int (*set_manager)(struct omap_overlay *ovl, |
| 418 | struct omap_overlay_manager *mgr); |
| 419 | int (*unset_manager)(struct omap_overlay *ovl); |
| 420 | |
| 421 | int (*set_overlay_info)(struct omap_overlay *ovl, |
| 422 | struct omap_overlay_info *info); |
| 423 | void (*get_overlay_info)(struct omap_overlay *ovl, |
| 424 | struct omap_overlay_info *info); |
| 425 | |
| 426 | int (*wait_for_go)(struct omap_overlay *ovl); |
| 427 | }; |
| 428 | |
| 429 | struct omap_overlay_manager_info { |
| 430 | u32 default_color; |
| 431 | |
| 432 | enum omap_dss_trans_key_type trans_key_type; |
| 433 | u32 trans_key; |
| 434 | bool trans_enabled; |
| 435 | |
Archit Taneja | 11354dd | 2011-09-26 11:47:29 +0530 | [diff] [blame] | 436 | bool partial_alpha_enabled; |
Tomi Valkeinen | 3c07cae | 2011-06-21 09:34:30 +0300 | [diff] [blame] | 437 | |
| 438 | bool cpr_enable; |
| 439 | struct omap_dss_cpr_coefs cpr_coefs; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 440 | }; |
| 441 | |
| 442 | struct omap_overlay_manager { |
| 443 | struct kobject kobj; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 444 | |
| 445 | /* static fields */ |
| 446 | const char *name; |
Tomi Valkeinen | 4a9e78a | 2011-08-15 11:22:21 +0300 | [diff] [blame] | 447 | enum omap_channel id; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 448 | enum omap_overlay_manager_caps caps; |
Tomi Valkeinen | 07e327c | 2011-11-05 10:59:59 +0200 | [diff] [blame] | 449 | struct list_head overlays; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 450 | enum omap_display_type supported_displays; |
| 451 | |
| 452 | /* dynamic fields */ |
| 453 | struct omap_dss_device *device; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 454 | |
Tomi Valkeinen | 9d11c32 | 2011-11-18 12:38:38 +0200 | [diff] [blame] | 455 | /* |
| 456 | * The following functions do not block: |
| 457 | * |
| 458 | * set_manager_info |
| 459 | * get_manager_info |
| 460 | * apply |
| 461 | * |
| 462 | * The rest of the functions may block and cannot be called from |
| 463 | * interrupt context |
| 464 | */ |
| 465 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 466 | int (*set_device)(struct omap_overlay_manager *mgr, |
| 467 | struct omap_dss_device *dssdev); |
| 468 | int (*unset_device)(struct omap_overlay_manager *mgr); |
| 469 | |
| 470 | int (*set_manager_info)(struct omap_overlay_manager *mgr, |
| 471 | struct omap_overlay_manager_info *info); |
| 472 | void (*get_manager_info)(struct omap_overlay_manager *mgr, |
| 473 | struct omap_overlay_manager_info *info); |
| 474 | |
| 475 | int (*apply)(struct omap_overlay_manager *mgr); |
| 476 | int (*wait_for_go)(struct omap_overlay_manager *mgr); |
Tomi Valkeinen | 3f71cbe | 2010-01-08 17:06:04 +0200 | [diff] [blame] | 477 | int (*wait_for_vsync)(struct omap_overlay_manager *mgr); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 478 | }; |
| 479 | |
Tomi Valkeinen | e4a9e94 | 2012-03-28 15:58:56 +0300 | [diff] [blame] | 480 | /* 22 pins means 1 clk lane and 10 data lanes */ |
| 481 | #define OMAP_DSS_MAX_DSI_PINS 22 |
| 482 | |
| 483 | struct omap_dsi_pin_config { |
| 484 | int num_pins; |
| 485 | /* |
| 486 | * pin numbers in the following order: |
| 487 | * clk+, clk- |
| 488 | * data1+, data1- |
| 489 | * data2+, data2- |
| 490 | * ... |
| 491 | */ |
| 492 | int pins[OMAP_DSS_MAX_DSI_PINS]; |
| 493 | }; |
| 494 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 495 | struct omap_dss_device { |
| 496 | struct device dev; |
| 497 | |
| 498 | enum omap_display_type type; |
| 499 | |
Sumit Semwal | 18faa1b | 2010-12-02 11:27:14 +0000 | [diff] [blame] | 500 | enum omap_channel channel; |
| 501 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 502 | union { |
| 503 | struct { |
| 504 | u8 data_lines; |
| 505 | } dpi; |
| 506 | |
| 507 | struct { |
| 508 | u8 channel; |
| 509 | u8 data_lines; |
| 510 | } rfbi; |
| 511 | |
| 512 | struct { |
| 513 | u8 datapairs; |
| 514 | } sdi; |
| 515 | |
| 516 | struct { |
Archit Taneja | a72b64b | 2011-05-12 17:26:26 +0530 | [diff] [blame] | 517 | int module; |
| 518 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 519 | bool ext_te; |
| 520 | u8 ext_te_gpio; |
| 521 | } dsi; |
| 522 | |
| 523 | struct { |
| 524 | enum omap_dss_venc_type type; |
| 525 | bool invert_polarity; |
| 526 | } venc; |
| 527 | } phy; |
| 528 | |
| 529 | struct { |
Tomi Valkeinen | c6940a3 | 2011-02-22 13:36:10 +0200 | [diff] [blame] | 530 | struct { |
Archit Taneja | e888166 | 2011-04-12 13:52:24 +0530 | [diff] [blame] | 531 | struct { |
| 532 | u16 lck_div; |
| 533 | u16 pck_div; |
| 534 | enum omap_dss_clk_source lcd_clk_src; |
| 535 | } channel; |
| 536 | |
| 537 | enum omap_dss_clk_source dispc_fclk_src; |
Tomi Valkeinen | c6940a3 | 2011-02-22 13:36:10 +0200 | [diff] [blame] | 538 | } dispc; |
| 539 | |
| 540 | struct { |
Tomi Valkeinen | c90a78e | 2011-08-31 15:32:23 +0300 | [diff] [blame] | 541 | /* regn is one greater than TRM's REGN value */ |
Tomi Valkeinen | c6940a3 | 2011-02-22 13:36:10 +0200 | [diff] [blame] | 542 | u16 regn; |
| 543 | u16 regm; |
| 544 | u16 regm_dispc; |
| 545 | u16 regm_dsi; |
| 546 | |
| 547 | u16 lp_clk_div; |
Archit Taneja | e888166 | 2011-04-12 13:52:24 +0530 | [diff] [blame] | 548 | enum omap_dss_clk_source dsi_fclk_src; |
Tomi Valkeinen | c6940a3 | 2011-02-22 13:36:10 +0200 | [diff] [blame] | 549 | } dsi; |
Archit Taneja | 6cb07b2 | 2011-04-12 13:52:25 +0530 | [diff] [blame] | 550 | |
| 551 | struct { |
Tomi Valkeinen | b44e458 | 2011-08-22 13:16:24 +0300 | [diff] [blame] | 552 | /* regn is one greater than TRM's REGN value */ |
Archit Taneja | 6cb07b2 | 2011-04-12 13:52:25 +0530 | [diff] [blame] | 553 | u16 regn; |
| 554 | u16 regm2; |
| 555 | } hdmi; |
Tomi Valkeinen | c6940a3 | 2011-02-22 13:36:10 +0200 | [diff] [blame] | 556 | } clocks; |
| 557 | |
| 558 | struct { |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 559 | struct omap_video_timings timings; |
| 560 | |
| 561 | int acbi; /* ac-bias pin transitions per interrupt */ |
| 562 | /* Unit: line clocks */ |
| 563 | int acb; /* ac-bias pin frequency */ |
| 564 | |
Archit Taneja | a3b3cc2 | 2011-09-08 18:42:16 +0530 | [diff] [blame] | 565 | enum omap_dss_dsi_pixel_format dsi_pix_fmt; |
Archit Taneja | 7e951ee | 2011-07-22 12:45:04 +0530 | [diff] [blame] | 566 | enum omap_dss_dsi_mode dsi_mode; |
Archit Taneja | 8af6ff0 | 2011-09-05 16:48:27 +0530 | [diff] [blame] | 567 | struct omap_dss_dsi_videomode_data dsi_vm_data; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 568 | } panel; |
| 569 | |
| 570 | struct { |
| 571 | u8 pixel_size; |
| 572 | struct rfbi_timings rfbi_timings; |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 573 | } ctrl; |
| 574 | |
| 575 | int reset_gpio; |
| 576 | |
| 577 | int max_backlight_level; |
| 578 | |
| 579 | const char *name; |
| 580 | |
| 581 | /* used to match device to driver */ |
| 582 | const char *driver_name; |
| 583 | |
| 584 | void *data; |
| 585 | |
| 586 | struct omap_dss_driver *driver; |
| 587 | |
| 588 | /* helper variable for driver suspend/resume */ |
| 589 | bool activate_after_resume; |
| 590 | |
| 591 | enum omap_display_caps caps; |
| 592 | |
| 593 | struct omap_overlay_manager *manager; |
| 594 | |
| 595 | enum omap_dss_display_state state; |
| 596 | |
Ricardo Neri | 9c0b842 | 2012-03-06 18:20:37 -0600 | [diff] [blame] | 597 | enum omap_dss_audio_state audio_state; |
| 598 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 599 | /* platform specific */ |
| 600 | int (*platform_enable)(struct omap_dss_device *dssdev); |
| 601 | void (*platform_disable)(struct omap_dss_device *dssdev); |
| 602 | int (*set_backlight)(struct omap_dss_device *dssdev, int level); |
| 603 | int (*get_backlight)(struct omap_dss_device *dssdev); |
| 604 | }; |
| 605 | |
Tomi Valkeinen | c49d005 | 2012-01-17 11:09:57 +0200 | [diff] [blame] | 606 | struct omap_dss_hdmi_data |
| 607 | { |
| 608 | int hpd_gpio; |
| 609 | }; |
| 610 | |
Ricardo Neri | 9c0b842 | 2012-03-06 18:20:37 -0600 | [diff] [blame] | 611 | struct omap_dss_audio { |
| 612 | struct snd_aes_iec958 *iec; |
| 613 | struct snd_cea_861_aud_if *cea; |
| 614 | }; |
| 615 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 616 | struct omap_dss_driver { |
| 617 | struct device_driver driver; |
| 618 | |
| 619 | int (*probe)(struct omap_dss_device *); |
| 620 | void (*remove)(struct omap_dss_device *); |
| 621 | |
| 622 | int (*enable)(struct omap_dss_device *display); |
| 623 | void (*disable)(struct omap_dss_device *display); |
| 624 | int (*suspend)(struct omap_dss_device *display); |
| 625 | int (*resume)(struct omap_dss_device *display); |
| 626 | int (*run_test)(struct omap_dss_device *display, int test); |
| 627 | |
Tomi Valkeinen | 18946f6 | 2010-01-12 14:16:41 +0200 | [diff] [blame] | 628 | int (*update)(struct omap_dss_device *dssdev, |
| 629 | u16 x, u16 y, u16 w, u16 h); |
| 630 | int (*sync)(struct omap_dss_device *dssdev); |
| 631 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 632 | int (*enable_te)(struct omap_dss_device *dssdev, bool enable); |
Tomi Valkeinen | 225b650 | 2010-01-11 15:11:01 +0200 | [diff] [blame] | 633 | int (*get_te)(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 634 | |
| 635 | u8 (*get_rotate)(struct omap_dss_device *dssdev); |
| 636 | int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate); |
| 637 | |
| 638 | bool (*get_mirror)(struct omap_dss_device *dssdev); |
| 639 | int (*set_mirror)(struct omap_dss_device *dssdev, bool enable); |
| 640 | |
| 641 | int (*memory_read)(struct omap_dss_device *dssdev, |
| 642 | void *buf, size_t size, |
| 643 | u16 x, u16 y, u16 w, u16 h); |
Tomi Valkeinen | 96adcec | 2010-01-11 13:54:33 +0200 | [diff] [blame] | 644 | |
| 645 | void (*get_resolution)(struct omap_dss_device *dssdev, |
| 646 | u16 *xres, u16 *yres); |
Jani Nikula | 7a0987b | 2010-06-16 15:26:36 +0300 | [diff] [blame] | 647 | void (*get_dimensions)(struct omap_dss_device *dssdev, |
| 648 | u32 *width, u32 *height); |
Tomi Valkeinen | a269950 | 2010-01-11 14:33:40 +0200 | [diff] [blame] | 649 | int (*get_recommended_bpp)(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 3651131 | 2010-01-19 15:53:16 +0200 | [diff] [blame] | 650 | |
Tomi Valkeinen | 69b2048 | 2010-01-20 12:11:25 +0200 | [diff] [blame] | 651 | int (*check_timings)(struct omap_dss_device *dssdev, |
| 652 | struct omap_video_timings *timings); |
| 653 | void (*set_timings)(struct omap_dss_device *dssdev, |
| 654 | struct omap_video_timings *timings); |
| 655 | void (*get_timings)(struct omap_dss_device *dssdev, |
| 656 | struct omap_video_timings *timings); |
| 657 | |
Tomi Valkeinen | 3651131 | 2010-01-19 15:53:16 +0200 | [diff] [blame] | 658 | int (*set_wss)(struct omap_dss_device *dssdev, u32 wss); |
| 659 | u32 (*get_wss)(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 3d5e0ef | 2011-08-25 17:10:41 +0300 | [diff] [blame] | 660 | |
| 661 | int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len); |
Tomi Valkeinen | df4769c | 2011-08-29 17:26:01 +0300 | [diff] [blame] | 662 | bool (*detect)(struct omap_dss_device *dssdev); |
Ricardo Neri | 9c0b842 | 2012-03-06 18:20:37 -0600 | [diff] [blame] | 663 | |
| 664 | /* |
| 665 | * For display drivers that support audio. This encompasses |
| 666 | * HDMI and DisplayPort at the moment. |
| 667 | */ |
| 668 | /* |
| 669 | * Note: These functions might sleep. Do not call while |
| 670 | * holding a spinlock/readlock. |
| 671 | */ |
| 672 | int (*audio_enable)(struct omap_dss_device *dssdev); |
| 673 | void (*audio_disable)(struct omap_dss_device *dssdev); |
| 674 | bool (*audio_supported)(struct omap_dss_device *dssdev); |
| 675 | int (*audio_config)(struct omap_dss_device *dssdev, |
| 676 | struct omap_dss_audio *audio); |
| 677 | /* Note: These functions may not sleep */ |
| 678 | int (*audio_start)(struct omap_dss_device *dssdev); |
| 679 | void (*audio_stop)(struct omap_dss_device *dssdev); |
| 680 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 681 | }; |
| 682 | |
| 683 | int omap_dss_register_driver(struct omap_dss_driver *); |
| 684 | void omap_dss_unregister_driver(struct omap_dss_driver *); |
| 685 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 686 | void omap_dss_get_device(struct omap_dss_device *dssdev); |
| 687 | void omap_dss_put_device(struct omap_dss_device *dssdev); |
| 688 | #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL) |
| 689 | struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from); |
| 690 | struct omap_dss_device *omap_dss_find_device(void *data, |
| 691 | int (*match)(struct omap_dss_device *dssdev, void *data)); |
| 692 | |
| 693 | int omap_dss_start_device(struct omap_dss_device *dssdev); |
| 694 | void omap_dss_stop_device(struct omap_dss_device *dssdev); |
| 695 | |
| 696 | int omap_dss_get_num_overlay_managers(void); |
| 697 | struct omap_overlay_manager *omap_dss_get_overlay_manager(int num); |
| 698 | |
| 699 | int omap_dss_get_num_overlays(void); |
| 700 | struct omap_overlay *omap_dss_get_overlay(int num); |
| 701 | |
Tomi Valkeinen | 96adcec | 2010-01-11 13:54:33 +0200 | [diff] [blame] | 702 | void omapdss_default_get_resolution(struct omap_dss_device *dssdev, |
| 703 | u16 *xres, u16 *yres); |
Tomi Valkeinen | a269950 | 2010-01-11 14:33:40 +0200 | [diff] [blame] | 704 | int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev); |
Grazvydas Ignotas | 4b6430f | 2012-03-15 20:00:23 +0200 | [diff] [blame] | 705 | void omapdss_default_get_timings(struct omap_dss_device *dssdev, |
| 706 | struct omap_video_timings *timings); |
Tomi Valkeinen | a269950 | 2010-01-11 14:33:40 +0200 | [diff] [blame] | 707 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 708 | typedef void (*omap_dispc_isr_t) (void *arg, u32 mask); |
| 709 | int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask); |
| 710 | int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask); |
| 711 | |
| 712 | int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout); |
| 713 | int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask, |
| 714 | unsigned long timeout); |
| 715 | |
| 716 | #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver) |
| 717 | #define to_dss_device(x) container_of((x), struct omap_dss_device, dev) |
| 718 | |
Archit Taneja | 1ffefe7 | 2011-05-12 17:26:24 +0530 | [diff] [blame] | 719 | void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel, |
| 720 | bool enable); |
Tomi Valkeinen | 225b650 | 2010-01-11 15:11:01 +0200 | [diff] [blame] | 721 | int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable); |
Tomi Valkeinen | 61140c9 | 2010-01-12 16:00:30 +0200 | [diff] [blame] | 722 | |
Tomi Valkeinen | 5476e74 | 2011-11-03 16:34:20 +0200 | [diff] [blame] | 723 | int omap_dsi_update(struct omap_dss_device *dssdev, int channel, |
Tomi Valkeinen | 18946f6 | 2010-01-12 14:16:41 +0200 | [diff] [blame] | 724 | void (*callback)(int, void *), void *data); |
Archit Taneja | 5ee3c14 | 2011-03-02 12:35:53 +0530 | [diff] [blame] | 725 | int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel); |
| 726 | int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id); |
| 727 | void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel); |
Tomi Valkeinen | e4a9e94 | 2012-03-28 15:58:56 +0300 | [diff] [blame] | 728 | int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev, |
| 729 | const struct omap_dsi_pin_config *pin_cfg); |
Tomi Valkeinen | 18946f6 | 2010-01-12 14:16:41 +0200 | [diff] [blame] | 730 | |
Tomi Valkeinen | 37ac60e | 2010-01-12 15:12:07 +0200 | [diff] [blame] | 731 | int omapdss_dsi_display_enable(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 2a89dc1 | 2010-07-30 12:39:34 +0300 | [diff] [blame] | 732 | void omapdss_dsi_display_disable(struct omap_dss_device *dssdev, |
Tomi Valkeinen | 22d6d67 | 2010-10-11 11:33:30 +0300 | [diff] [blame] | 733 | bool disconnect_lanes, bool enter_ulps); |
Tomi Valkeinen | 37ac60e | 2010-01-12 15:12:07 +0200 | [diff] [blame] | 734 | |
| 735 | int omapdss_dpi_display_enable(struct omap_dss_device *dssdev); |
| 736 | void omapdss_dpi_display_disable(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 69b2048 | 2010-01-20 12:11:25 +0200 | [diff] [blame] | 737 | void dpi_set_timings(struct omap_dss_device *dssdev, |
| 738 | struct omap_video_timings *timings); |
| 739 | int dpi_check_timings(struct omap_dss_device *dssdev, |
| 740 | struct omap_video_timings *timings); |
Tomi Valkeinen | 37ac60e | 2010-01-12 15:12:07 +0200 | [diff] [blame] | 741 | |
| 742 | int omapdss_sdi_display_enable(struct omap_dss_device *dssdev); |
| 743 | void omapdss_sdi_display_disable(struct omap_dss_device *dssdev); |
| 744 | |
| 745 | int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev); |
| 746 | void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev); |
Tomi Valkeinen | 18946f6 | 2010-01-12 14:16:41 +0200 | [diff] [blame] | 747 | int omap_rfbi_prepare_update(struct omap_dss_device *dssdev, |
| 748 | u16 *x, u16 *y, u16 *w, u16 *h); |
| 749 | int omap_rfbi_update(struct omap_dss_device *dssdev, |
| 750 | u16 x, u16 y, u16 w, u16 h, |
| 751 | void (*callback)(void *), void *data); |
Tomi Valkeinen | 1d5952a | 2011-04-29 15:57:01 +0300 | [diff] [blame] | 752 | int omap_rfbi_configure(struct omap_dss_device *dssdev, int pixel_size, |
| 753 | int data_lines); |
Tomi Valkeinen | 18946f6 | 2010-01-12 14:16:41 +0200 | [diff] [blame] | 754 | |
Tomi Valkeinen | 559d670 | 2009-11-03 11:23:50 +0200 | [diff] [blame] | 755 | #endif |