Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 1 | #ifndef _DMA_REMAPPING_H |
| 2 | #define _DMA_REMAPPING_H |
| 3 | |
| 4 | /* |
Fenghua Yu | 5b6985c | 2008-10-16 18:02:32 -0700 | [diff] [blame] | 5 | * VT-d hardware uses 4KiB page size regardless of host page size. |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 6 | */ |
Fenghua Yu | 5b6985c | 2008-10-16 18:02:32 -0700 | [diff] [blame] | 7 | #define VTD_PAGE_SHIFT (12) |
| 8 | #define VTD_PAGE_SIZE (1UL << VTD_PAGE_SHIFT) |
| 9 | #define VTD_PAGE_MASK (((u64)-1) << VTD_PAGE_SHIFT) |
| 10 | #define VTD_PAGE_ALIGN(addr) (((addr) + VTD_PAGE_SIZE - 1) & VTD_PAGE_MASK) |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 11 | |
Mark McLoughlin | 46b08e1 | 2008-11-20 15:49:44 +0000 | [diff] [blame] | 12 | struct root_entry; |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 13 | |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 14 | #define DMA_PTE_READ (1) |
| 15 | #define DMA_PTE_WRITE (2) |
| 16 | |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 17 | struct intel_iommu; |
| 18 | |
| 19 | struct dmar_domain { |
| 20 | int id; /* domain id */ |
| 21 | struct intel_iommu *iommu; /* back pointer to owning iommu */ |
| 22 | |
| 23 | struct list_head devices; /* all devices' list */ |
| 24 | struct iova_domain iovad; /* iova's that belong to this domain */ |
| 25 | |
| 26 | struct dma_pte *pgd; /* virtual address */ |
| 27 | spinlock_t mapping_lock; /* page table lock */ |
| 28 | int gaw; /* max guest address width */ |
| 29 | |
| 30 | /* adjusted guest address width, 0 is level 2 30-bit */ |
| 31 | int agaw; |
| 32 | |
| 33 | #define DOMAIN_FLAG_MULTIPLE_DEVICES 1 |
| 34 | int flags; |
| 35 | }; |
| 36 | |
| 37 | /* PCI domain-device relationship */ |
| 38 | struct device_domain_info { |
| 39 | struct list_head link; /* link to domain siblings */ |
| 40 | struct list_head global; /* link to global list */ |
| 41 | u8 bus; /* PCI bus numer */ |
| 42 | u8 devfn; /* PCI devfn number */ |
| 43 | struct pci_dev *dev; /* it's NULL for PCIE-to-PCI bridge */ |
| 44 | struct dmar_domain *domain; /* pointer to domain */ |
| 45 | }; |
| 46 | |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 47 | extern void free_dmar_iommu(struct intel_iommu *iommu); |
| 48 | |
Suresh Siddha | 2ae2101 | 2008-07-10 11:16:43 -0700 | [diff] [blame] | 49 | extern int dmar_disabled; |
| 50 | |
Suresh Siddha | e61d98d | 2008-07-10 11:16:35 -0700 | [diff] [blame] | 51 | #ifndef CONFIG_DMAR_GFX_WA |
| 52 | static inline void iommu_prepare_gfx_mapping(void) |
| 53 | { |
| 54 | return; |
| 55 | } |
| 56 | #endif /* !CONFIG_DMAR_GFX_WA */ |
| 57 | |
| 58 | #endif |