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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
3 Philip Edelbrock <phil@netroedge.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
Linus Torvalds1da177e2005-04-16 15:20:36 -070014*/
15
16/*
17 Supports:
18 Intel PIIX4, 440MX
Flavio Leitner506a8b62009-03-28 21:34:46 +010019 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
Andrew Armenia2a2f7402012-07-24 14:13:57 +020020 ATI IXP200, IXP300, IXP400, SB600, SB700/SP5100, SB800
Shane Huang032f7082014-01-22 14:05:46 -080021 AMD Hudson-2, ML, CZ
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 SMSC Victory66
23
Andrew Armenia2a2f7402012-07-24 14:13:57 +020024 Note: we assume there can only be one device, with one or more
25 SMBus interfaces.
Linus Torvalds1da177e2005-04-16 15:20:36 -070026*/
27
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/pci.h>
31#include <linux/kernel.h>
32#include <linux/delay.h>
33#include <linux/stddef.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <linux/ioport.h>
35#include <linux/i2c.h>
Daniel J Bluemanc415b302012-10-05 22:23:55 +020036#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/dmi.h>
Jean Delvare54fb4a052008-07-14 22:38:33 +020038#include <linux/acpi.h>
H Hartley Sweeten21782182010-05-21 18:41:01 +020039#include <linux/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042/* PIIX4 SMBus address offsets */
43#define SMBHSTSTS (0 + piix4_smba)
44#define SMBHSLVSTS (1 + piix4_smba)
45#define SMBHSTCNT (2 + piix4_smba)
46#define SMBHSTCMD (3 + piix4_smba)
47#define SMBHSTADD (4 + piix4_smba)
48#define SMBHSTDAT0 (5 + piix4_smba)
49#define SMBHSTDAT1 (6 + piix4_smba)
50#define SMBBLKDAT (7 + piix4_smba)
51#define SMBSLVCNT (8 + piix4_smba)
52#define SMBSHDWCMD (9 + piix4_smba)
53#define SMBSLVEVT (0xA + piix4_smba)
54#define SMBSLVDAT (0xC + piix4_smba)
55
56/* count for request_region */
57#define SMBIOSIZE 8
58
59/* PCI Address Constants */
60#define SMBBA 0x090
61#define SMBHSTCFG 0x0D2
62#define SMBSLVC 0x0D3
63#define SMBSHDW1 0x0D4
64#define SMBSHDW2 0x0D5
65#define SMBREV 0x0D6
66
67/* Other settings */
68#define MAX_TIMEOUT 500
69#define ENABLE_INT9 0
70
71/* PIIX4 constants */
72#define PIIX4_QUICK 0x00
73#define PIIX4_BYTE 0x04
74#define PIIX4_BYTE_DATA 0x08
75#define PIIX4_WORD_DATA 0x0C
76#define PIIX4_BLOCK_DATA 0x14
77
78/* insmod parameters */
79
80/* If force is set to anything different from 0, we forcibly enable the
81 PIIX4. DANGEROUS! */
Jean Delvare60507092005-09-25 16:23:07 +020082static int force;
Linus Torvalds1da177e2005-04-16 15:20:36 -070083module_param (force, int, 0);
84MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
85
86/* If force_addr is set to anything different from 0, we forcibly enable
87 the PIIX4 at the given address. VERY DANGEROUS! */
Jean Delvare60507092005-09-25 16:23:07 +020088static int force_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -070089module_param (force_addr, int, 0);
90MODULE_PARM_DESC(force_addr,
91 "Forcibly enable the PIIX4 at the given address. "
92 "EXTREMELY DANGEROUS!");
93
David Milburnb1c17592008-05-11 20:37:05 +020094static int srvrworks_csb5_delay;
Jean Delvared6072f82005-09-25 16:37:04 +020095static struct pci_driver piix4_driver;
Linus Torvalds1da177e2005-04-16 15:20:36 -070096
Bill Pemberton0b255e92012-11-27 15:59:38 -050097static const struct dmi_system_id piix4_dmi_blacklist[] = {
Jean Delvarec2fc54f2008-05-11 20:37:05 +020098 {
99 .ident = "Sapphire AM2RD790",
100 .matches = {
101 DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
102 DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
103 },
104 },
105 {
106 .ident = "DFI Lanparty UT 790FX",
107 .matches = {
108 DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
109 DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
110 },
111 },
112 { }
113};
114
115/* The IBM entry is in a separate table because we only check it
116 on Intel-based systems */
Bill Pemberton0b255e92012-11-27 15:59:38 -0500117static const struct dmi_system_id piix4_dmi_ibm[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118 {
119 .ident = "IBM",
120 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
121 },
122 { },
123};
124
Andrew Armenia14a80862012-07-24 14:13:56 +0200125struct i2c_piix4_adapdata {
126 unsigned short smba;
127};
128
Bill Pemberton0b255e92012-11-27 15:59:38 -0500129static int piix4_setup(struct pci_dev *PIIX4_dev,
130 const struct pci_device_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131{
132 unsigned char temp;
Andrew Armenia14a80862012-07-24 14:13:56 +0200133 unsigned short piix4_smba;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
David Milburnb1c17592008-05-11 20:37:05 +0200135 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
136 (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
137 srvrworks_csb5_delay = 1;
138
Jean Delvarec2fc54f2008-05-11 20:37:05 +0200139 /* On some motherboards, it was reported that accessing the SMBus
140 caused severe hardware problems */
141 if (dmi_check_system(piix4_dmi_blacklist)) {
142 dev_err(&PIIX4_dev->dev,
143 "Accessing the SMBus on this system is unsafe!\n");
144 return -EPERM;
145 }
146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 /* Don't access SMBus on IBM systems which get corrupted eeproms */
Jean Delvarec2fc54f2008-05-11 20:37:05 +0200148 if (dmi_check_system(piix4_dmi_ibm) &&
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
Jean Delvaref9ba6c02006-04-25 13:37:25 +0200150 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151 "may corrupt your serial eeprom! Refusing to load "
152 "module!\n");
153 return -EPERM;
154 }
155
156 /* Determine the address of the SMBus areas */
157 if (force_addr) {
158 piix4_smba = force_addr & 0xfff0;
159 force = 0;
160 } else {
161 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
162 piix4_smba &= 0xfff0;
163 if(piix4_smba == 0) {
Jean Delvarefa63cd52008-07-14 22:38:25 +0200164 dev_err(&PIIX4_dev->dev, "SMBus base address "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 "uninitialized - upgrade BIOS or use "
166 "force_addr=0xaddr\n");
167 return -ENODEV;
168 }
169 }
170
Jean Delvare54fb4a052008-07-14 22:38:33 +0200171 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
Jean Delvare18669ea2009-10-04 22:53:45 +0200172 return -ENODEV;
Jean Delvare54fb4a052008-07-14 22:38:33 +0200173
Jean Delvared6072f82005-09-25 16:37:04 +0200174 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
Jean Delvarefa63cd52008-07-14 22:38:25 +0200175 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176 piix4_smba);
Jean Delvarefa63cd52008-07-14 22:38:25 +0200177 return -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 }
179
180 pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
181
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 /* If force_addr is set, we program the new address here. Just to make
183 sure, we disable the PIIX4 first. */
184 if (force_addr) {
185 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
186 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
187 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
188 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
189 "new address %04x!\n", piix4_smba);
190 } else if ((temp & 1) == 0) {
191 if (force) {
192 /* This should never need to be done, but has been
193 * noted that many Dell machines have the SMBus
194 * interface on the PIIX4 disabled!? NOTE: This assumes
195 * I/O space and other allocations WERE done by the
196 * Bios! Don't complain if your hardware does weird
197 * things after enabling this. :') Check for Bios
198 * updates before resorting to this.
199 */
200 pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
201 temp | 1);
Joe Perches8117e412012-12-16 21:11:55 +0100202 dev_notice(&PIIX4_dev->dev,
203 "WARNING: SMBus interface has been FORCEFULLY ENABLED!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204 } else {
205 dev_err(&PIIX4_dev->dev,
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100206 "SMBus Host Controller not enabled!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 release_region(piix4_smba, SMBIOSIZE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 return -ENODEV;
209 }
210 }
211
Rudolf Marek54aaa1c2006-04-25 13:06:41 +0200212 if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100213 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 else if ((temp & 0x0E) == 0)
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100215 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216 else
217 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
218 "(or code out of date)!\n");
219
220 pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
Jean Delvarefa63cd52008-07-14 22:38:25 +0200221 dev_info(&PIIX4_dev->dev,
222 "SMBus Host Controller at 0x%x, revision %d\n",
223 piix4_smba, temp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224
Andrew Armenia14a80862012-07-24 14:13:56 +0200225 return piix4_smba;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226}
227
Bill Pemberton0b255e92012-11-27 15:59:38 -0500228static int piix4_setup_sb800(struct pci_dev *PIIX4_dev,
Rudolf Mareka94dd002013-07-14 23:17:26 +0200229 const struct pci_device_id *id, u8 aux)
Shane Huang87e19602009-03-28 21:34:46 +0100230{
Andrew Armenia14a80862012-07-24 14:13:56 +0200231 unsigned short piix4_smba;
Shane Huang87e19602009-03-28 21:34:46 +0100232 unsigned short smba_idx = 0xcd6;
Shane Huang032f7082014-01-22 14:05:46 -0800233 u8 smba_en_lo, smba_en_hi, smb_en, smb_en_status;
234 u8 i2ccfg, i2ccfg_offset = 0x10;
Shane Huang87e19602009-03-28 21:34:46 +0100235
Crane Cai3806e94b2009-11-07 13:10:46 +0100236 /* SB800 and later SMBus does not support forcing address */
Shane Huang87e19602009-03-28 21:34:46 +0100237 if (force || force_addr) {
Crane Cai3806e94b2009-11-07 13:10:46 +0100238 dev_err(&PIIX4_dev->dev, "SMBus does not support "
Shane Huang87e19602009-03-28 21:34:46 +0100239 "forcing address!\n");
240 return -EINVAL;
241 }
242
243 /* Determine the address of the SMBus areas */
Shane Huang032f7082014-01-22 14:05:46 -0800244 if ((PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
245 PIIX4_dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS &&
246 PIIX4_dev->revision >= 0x41) ||
247 (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
Vincent Wanbcb29992015-06-11 20:11:46 +0800248 PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
Shane Huang032f7082014-01-22 14:05:46 -0800249 PIIX4_dev->revision >= 0x49))
250 smb_en = 0x00;
251 else
252 smb_en = (aux) ? 0x28 : 0x2c;
Rudolf Mareka94dd002013-07-14 23:17:26 +0200253
Shane Huang87e19602009-03-28 21:34:46 +0100254 if (!request_region(smba_idx, 2, "smba_idx")) {
255 dev_err(&PIIX4_dev->dev, "SMBus base address index region "
256 "0x%x already in use!\n", smba_idx);
257 return -EBUSY;
258 }
259 outb_p(smb_en, smba_idx);
260 smba_en_lo = inb_p(smba_idx + 1);
261 outb_p(smb_en + 1, smba_idx);
262 smba_en_hi = inb_p(smba_idx + 1);
263 release_region(smba_idx, 2);
264
Shane Huang032f7082014-01-22 14:05:46 -0800265 if (!smb_en) {
266 smb_en_status = smba_en_lo & 0x10;
267 piix4_smba = smba_en_hi << 8;
268 if (aux)
269 piix4_smba |= 0x20;
270 } else {
271 smb_en_status = smba_en_lo & 0x01;
272 piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
273 }
274
275 if (!smb_en_status) {
Shane Huang87e19602009-03-28 21:34:46 +0100276 dev_err(&PIIX4_dev->dev,
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100277 "SMBus Host Controller not enabled!\n");
Shane Huang87e19602009-03-28 21:34:46 +0100278 return -ENODEV;
279 }
280
Shane Huang87e19602009-03-28 21:34:46 +0100281 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
Jean Delvare18669ea2009-10-04 22:53:45 +0200282 return -ENODEV;
Shane Huang87e19602009-03-28 21:34:46 +0100283
284 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
285 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
286 piix4_smba);
287 return -EBUSY;
288 }
289
Rudolf Mareka94dd002013-07-14 23:17:26 +0200290 /* Aux SMBus does not support IRQ information */
291 if (aux) {
292 dev_info(&PIIX4_dev->dev,
Shane Huang85fd0fe2014-01-22 14:06:52 -0800293 "Auxiliary SMBus Host Controller at 0x%x\n",
294 piix4_smba);
Rudolf Mareka94dd002013-07-14 23:17:26 +0200295 return piix4_smba;
296 }
297
Shane Huang87e19602009-03-28 21:34:46 +0100298 /* Request the SMBus I2C bus config region */
299 if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
300 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
301 "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
302 release_region(piix4_smba, SMBIOSIZE);
Shane Huang87e19602009-03-28 21:34:46 +0100303 return -EBUSY;
304 }
305 i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
306 release_region(piix4_smba + i2ccfg_offset, 1);
307
308 if (i2ccfg & 1)
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100309 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus\n");
Shane Huang87e19602009-03-28 21:34:46 +0100310 else
Jean Delvare66f8a8f2014-01-23 16:59:38 +0100311 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus\n");
Shane Huang87e19602009-03-28 21:34:46 +0100312
313 dev_info(&PIIX4_dev->dev,
314 "SMBus Host Controller at 0x%x, revision %d\n",
315 piix4_smba, i2ccfg >> 4);
316
Andrew Armenia14a80862012-07-24 14:13:56 +0200317 return piix4_smba;
Shane Huang87e19602009-03-28 21:34:46 +0100318}
319
Bill Pemberton0b255e92012-11-27 15:59:38 -0500320static int piix4_setup_aux(struct pci_dev *PIIX4_dev,
321 const struct pci_device_id *id,
322 unsigned short base_reg_addr)
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200323{
324 /* Set up auxiliary SMBus controllers found on some
325 * AMD chipsets e.g. SP5100 (SB700 derivative) */
326
327 unsigned short piix4_smba;
328
329 /* Read address of auxiliary SMBus controller */
330 pci_read_config_word(PIIX4_dev, base_reg_addr, &piix4_smba);
331 if ((piix4_smba & 1) == 0) {
332 dev_dbg(&PIIX4_dev->dev,
333 "Auxiliary SMBus controller not enabled\n");
334 return -ENODEV;
335 }
336
337 piix4_smba &= 0xfff0;
338 if (piix4_smba == 0) {
339 dev_dbg(&PIIX4_dev->dev,
340 "Auxiliary SMBus base address uninitialized\n");
341 return -ENODEV;
342 }
343
344 if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
345 return -ENODEV;
346
347 if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
348 dev_err(&PIIX4_dev->dev, "Auxiliary SMBus region 0x%x "
349 "already in use!\n", piix4_smba);
350 return -EBUSY;
351 }
352
353 dev_info(&PIIX4_dev->dev,
354 "Auxiliary SMBus Host Controller at 0x%x\n",
355 piix4_smba);
356
357 return piix4_smba;
358}
359
Andrew Armeniae154bf62012-07-24 14:13:56 +0200360static int piix4_transaction(struct i2c_adapter *piix4_adapter)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361{
Andrew Armeniae154bf62012-07-24 14:13:56 +0200362 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
363 unsigned short piix4_smba = adapdata->smba;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364 int temp;
365 int result = 0;
366 int timeout = 0;
367
Andrew Armeniae154bf62012-07-24 14:13:56 +0200368 dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
370 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
371 inb_p(SMBHSTDAT1));
372
373 /* Make sure the SMBus host is ready to start transmitting */
374 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
Andrew Armeniae154bf62012-07-24 14:13:56 +0200375 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
Jean Delvare541e6a02005-06-23 22:18:08 +0200376 "Resetting...\n", temp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377 outb_p(temp, SMBHSTSTS);
378 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
Andrew Armeniae154bf62012-07-24 14:13:56 +0200379 dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
David Brownell97140342008-07-14 22:38:25 +0200380 return -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381 } else {
Andrew Armeniae154bf62012-07-24 14:13:56 +0200382 dev_dbg(&piix4_adapter->dev, "Successful!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383 }
384 }
385
386 /* start the transaction by setting bit 6 */
387 outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
388
389 /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
David Milburnb1c17592008-05-11 20:37:05 +0200390 if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
391 msleep(2);
392 else
Linus Torvalds1da177e2005-04-16 15:20:36 -0700393 msleep(1);
David Milburnb1c17592008-05-11 20:37:05 +0200394
Roel Kluinb6a31952010-01-16 20:43:12 +0100395 while ((++timeout < MAX_TIMEOUT) &&
David Milburnb1c17592008-05-11 20:37:05 +0200396 ((temp = inb_p(SMBHSTSTS)) & 0x01))
397 msleep(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398
399 /* If the SMBus is still busy, we give up */
Roel Kluinb6a31952010-01-16 20:43:12 +0100400 if (timeout == MAX_TIMEOUT) {
Andrew Armeniae154bf62012-07-24 14:13:56 +0200401 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
David Brownell97140342008-07-14 22:38:25 +0200402 result = -ETIMEDOUT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 }
404
405 if (temp & 0x10) {
David Brownell97140342008-07-14 22:38:25 +0200406 result = -EIO;
Andrew Armeniae154bf62012-07-24 14:13:56 +0200407 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408 }
409
410 if (temp & 0x08) {
David Brownell97140342008-07-14 22:38:25 +0200411 result = -EIO;
Andrew Armeniae154bf62012-07-24 14:13:56 +0200412 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 "locked until next hard reset. (sorry!)\n");
414 /* Clock stops and slave is stuck in mid-transmission */
415 }
416
417 if (temp & 0x04) {
David Brownell97140342008-07-14 22:38:25 +0200418 result = -ENXIO;
Andrew Armeniae154bf62012-07-24 14:13:56 +0200419 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420 }
421
422 if (inb_p(SMBHSTSTS) != 0x00)
423 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
424
425 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
Andrew Armeniae154bf62012-07-24 14:13:56 +0200426 dev_err(&piix4_adapter->dev, "Failed reset at end of "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 "transaction (%02x)\n", temp);
428 }
Andrew Armeniae154bf62012-07-24 14:13:56 +0200429 dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
431 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
432 inb_p(SMBHSTDAT1));
433 return result;
434}
435
David Brownell97140342008-07-14 22:38:25 +0200436/* Return negative errno on error. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
438 unsigned short flags, char read_write,
439 u8 command, int size, union i2c_smbus_data * data)
440{
Andrew Armenia14a80862012-07-24 14:13:56 +0200441 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
442 unsigned short piix4_smba = adapdata->smba;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 int i, len;
David Brownell97140342008-07-14 22:38:25 +0200444 int status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445
446 switch (size) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447 case I2C_SMBUS_QUICK:
Jean Delvarefa63cd52008-07-14 22:38:25 +0200448 outb_p((addr << 1) | read_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 SMBHSTADD);
450 size = PIIX4_QUICK;
451 break;
452 case I2C_SMBUS_BYTE:
Jean Delvarefa63cd52008-07-14 22:38:25 +0200453 outb_p((addr << 1) | read_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454 SMBHSTADD);
455 if (read_write == I2C_SMBUS_WRITE)
456 outb_p(command, SMBHSTCMD);
457 size = PIIX4_BYTE;
458 break;
459 case I2C_SMBUS_BYTE_DATA:
Jean Delvarefa63cd52008-07-14 22:38:25 +0200460 outb_p((addr << 1) | read_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700461 SMBHSTADD);
462 outb_p(command, SMBHSTCMD);
463 if (read_write == I2C_SMBUS_WRITE)
464 outb_p(data->byte, SMBHSTDAT0);
465 size = PIIX4_BYTE_DATA;
466 break;
467 case I2C_SMBUS_WORD_DATA:
Jean Delvarefa63cd52008-07-14 22:38:25 +0200468 outb_p((addr << 1) | read_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 SMBHSTADD);
470 outb_p(command, SMBHSTCMD);
471 if (read_write == I2C_SMBUS_WRITE) {
472 outb_p(data->word & 0xff, SMBHSTDAT0);
473 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
474 }
475 size = PIIX4_WORD_DATA;
476 break;
477 case I2C_SMBUS_BLOCK_DATA:
Jean Delvarefa63cd52008-07-14 22:38:25 +0200478 outb_p((addr << 1) | read_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479 SMBHSTADD);
480 outb_p(command, SMBHSTCMD);
481 if (read_write == I2C_SMBUS_WRITE) {
482 len = data->block[0];
Jean Delvarefa63cd52008-07-14 22:38:25 +0200483 if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
484 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485 outb_p(len, SMBHSTDAT0);
486 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
487 for (i = 1; i <= len; i++)
488 outb_p(data->block[i], SMBBLKDAT);
489 }
490 size = PIIX4_BLOCK_DATA;
491 break;
Jean Delvareac7fc4f2008-07-14 22:38:25 +0200492 default:
493 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
494 return -EOPNOTSUPP;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495 }
496
497 outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
498
Andrew Armeniae154bf62012-07-24 14:13:56 +0200499 status = piix4_transaction(adap);
David Brownell97140342008-07-14 22:38:25 +0200500 if (status)
501 return status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502
503 if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
504 return 0;
505
506
507 switch (size) {
Jean Delvare3578a072008-04-29 23:11:37 +0200508 case PIIX4_BYTE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 case PIIX4_BYTE_DATA:
510 data->byte = inb_p(SMBHSTDAT0);
511 break;
512 case PIIX4_WORD_DATA:
513 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
514 break;
515 case PIIX4_BLOCK_DATA:
516 data->block[0] = inb_p(SMBHSTDAT0);
Jean Delvarefa63cd52008-07-14 22:38:25 +0200517 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
518 return -EPROTO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700519 i = inb_p(SMBHSTCNT); /* Reset SMBBLKDAT */
520 for (i = 1; i <= data->block[0]; i++)
521 data->block[i] = inb_p(SMBBLKDAT);
522 break;
523 }
524 return 0;
525}
526
527static u32 piix4_func(struct i2c_adapter *adapter)
528{
529 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
530 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
531 I2C_FUNC_SMBUS_BLOCK_DATA;
532}
533
Jean Delvare8f9082c2006-09-03 22:39:46 +0200534static const struct i2c_algorithm smbus_algorithm = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535 .smbus_xfer = piix4_access,
536 .functionality = piix4_func,
537};
538
Jingoo Han392debf2013-12-03 08:11:20 +0900539static const struct pci_device_id piix4_ids[] = {
Jean Delvare9b7389c2008-01-27 18:14:51 +0100540 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
541 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
542 { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
543 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
544 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
545 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
546 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
Crane Cai3806e94b2009-11-07 13:10:46 +0100547 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
Vincent Wanbcb29992015-06-11 20:11:46 +0800548 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS) },
Jean Delvare9b7389c2008-01-27 18:14:51 +0100549 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
550 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
551 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
552 PCI_DEVICE_ID_SERVERWORKS_CSB5) },
553 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
554 PCI_DEVICE_ID_SERVERWORKS_CSB6) },
555 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
556 PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
Flavio Leitner506a8b62009-03-28 21:34:46 +0100557 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
558 PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700559 { 0, }
560};
561
562MODULE_DEVICE_TABLE (pci, piix4_ids);
563
Andrew Armeniae154bf62012-07-24 14:13:56 +0200564static struct i2c_adapter *piix4_main_adapter;
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200565static struct i2c_adapter *piix4_aux_adapter;
Andrew Armeniae154bf62012-07-24 14:13:56 +0200566
Bill Pemberton0b255e92012-11-27 15:59:38 -0500567static int piix4_add_adapter(struct pci_dev *dev, unsigned short smba,
568 struct i2c_adapter **padap)
Andrew Armeniae154bf62012-07-24 14:13:56 +0200569{
570 struct i2c_adapter *adap;
571 struct i2c_piix4_adapdata *adapdata;
572 int retval;
573
574 adap = kzalloc(sizeof(*adap), GFP_KERNEL);
575 if (adap == NULL) {
576 release_region(smba, SMBIOSIZE);
577 return -ENOMEM;
578 }
579
580 adap->owner = THIS_MODULE;
581 adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
582 adap->algo = &smbus_algorithm;
583
584 adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
585 if (adapdata == NULL) {
586 kfree(adap);
587 release_region(smba, SMBIOSIZE);
588 return -ENOMEM;
589 }
590
591 adapdata->smba = smba;
592
593 /* set up the sysfs linkage to our parent device */
594 adap->dev.parent = &dev->dev;
595
596 snprintf(adap->name, sizeof(adap->name),
597 "SMBus PIIX4 adapter at %04x", smba);
598
599 i2c_set_adapdata(adap, adapdata);
600
601 retval = i2c_add_adapter(adap);
602 if (retval) {
603 dev_err(&dev->dev, "Couldn't register adapter!\n");
604 kfree(adapdata);
605 kfree(adap);
606 release_region(smba, SMBIOSIZE);
607 return retval;
608 }
609
610 *padap = adap;
611 return 0;
612}
613
Bill Pemberton0b255e92012-11-27 15:59:38 -0500614static int piix4_probe(struct pci_dev *dev, const struct pci_device_id *id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615{
616 int retval;
617
Crane Cai76b3e282009-09-18 22:45:50 +0200618 if ((dev->vendor == PCI_VENDOR_ID_ATI &&
619 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
620 dev->revision >= 0x40) ||
621 dev->vendor == PCI_VENDOR_ID_AMD)
Shane Huang87e19602009-03-28 21:34:46 +0100622 /* base address location etc changed in SB800 */
Rudolf Mareka94dd002013-07-14 23:17:26 +0200623 retval = piix4_setup_sb800(dev, id, 0);
Shane Huang87e19602009-03-28 21:34:46 +0100624 else
625 retval = piix4_setup(dev, id);
626
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200627 /* If no main SMBus found, give up */
Andrew Armenia14a80862012-07-24 14:13:56 +0200628 if (retval < 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 return retval;
630
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200631 /* Try to register main SMBus adapter, give up if we can't */
632 retval = piix4_add_adapter(dev, retval, &piix4_main_adapter);
633 if (retval < 0)
634 return retval;
635
636 /* Check for auxiliary SMBus on some AMD chipsets */
Rudolf Mareka94dd002013-07-14 23:17:26 +0200637 retval = -ENODEV;
638
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200639 if (dev->vendor == PCI_VENDOR_ID_ATI &&
Rudolf Mareka94dd002013-07-14 23:17:26 +0200640 dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS) {
641 if (dev->revision < 0x40) {
642 retval = piix4_setup_aux(dev, id, 0x58);
643 } else {
644 /* SB800 added aux bus too */
645 retval = piix4_setup_sb800(dev, id, 1);
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200646 }
647 }
648
Rudolf Mareka94dd002013-07-14 23:17:26 +0200649 if (dev->vendor == PCI_VENDOR_ID_AMD &&
650 dev->device == PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) {
651 retval = piix4_setup_sb800(dev, id, 1);
652 }
653
654 if (retval > 0) {
655 /* Try to add the aux adapter if it exists,
656 * piix4_add_adapter will clean up if this fails */
657 piix4_add_adapter(dev, retval, &piix4_aux_adapter);
658 }
659
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200660 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700661}
662
Bill Pemberton0b255e92012-11-27 15:59:38 -0500663static void piix4_adap_remove(struct i2c_adapter *adap)
Andrew Armenia14a80862012-07-24 14:13:56 +0200664{
665 struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
666
667 if (adapdata->smba) {
668 i2c_del_adapter(adap);
669 release_region(adapdata->smba, SMBIOSIZE);
Andrew Armeniae154bf62012-07-24 14:13:56 +0200670 kfree(adapdata);
671 kfree(adap);
Andrew Armenia14a80862012-07-24 14:13:56 +0200672 }
673}
674
Bill Pemberton0b255e92012-11-27 15:59:38 -0500675static void piix4_remove(struct pci_dev *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700676{
Andrew Armeniae154bf62012-07-24 14:13:56 +0200677 if (piix4_main_adapter) {
678 piix4_adap_remove(piix4_main_adapter);
679 piix4_main_adapter = NULL;
680 }
Andrew Armenia2a2f7402012-07-24 14:13:57 +0200681
682 if (piix4_aux_adapter) {
683 piix4_adap_remove(piix4_aux_adapter);
684 piix4_aux_adapter = NULL;
685 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700686}
687
688static struct pci_driver piix4_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689 .name = "piix4_smbus",
690 .id_table = piix4_ids,
691 .probe = piix4_probe,
Bill Pemberton0b255e92012-11-27 15:59:38 -0500692 .remove = piix4_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693};
694
Axel Lin56f21782012-07-24 14:13:56 +0200695module_pci_driver(piix4_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700696
697MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
698 "Philip Edelbrock <phil@netroedge.com>");
699MODULE_DESCRIPTION("PIIX4 SMBus driver");
700MODULE_LICENSE("GPL");