Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 1 | /* |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 2 | * Copyright (C) 2010 Google, Inc. |
| 3 | * |
| 4 | * Author: |
| 5 | * Colin Cross <ccross@google.com> |
| 6 | * Based on arch/arm/plat-omap/cpu-omap.c, (C) 2005 Nokia Corporation |
| 7 | * |
| 8 | * This software is licensed under the terms of the GNU General Public |
| 9 | * License version 2, as published by the Free Software Foundation, and |
| 10 | * may be copied, distributed, and modified under those terms. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/cpufreq.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/init.h> |
| 26 | #include <linux/err.h> |
| 27 | #include <linux/clk.h> |
| 28 | #include <linux/io.h> |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 29 | #include <linux/suspend.h> |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 30 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 31 | static struct cpufreq_frequency_table freq_table[] = { |
Viresh Kumar | 5d69030 | 2013-05-14 19:08:50 +0530 | [diff] [blame] | 32 | { .frequency = 216000 }, |
| 33 | { .frequency = 312000 }, |
| 34 | { .frequency = 456000 }, |
| 35 | { .frequency = 608000 }, |
| 36 | { .frequency = 760000 }, |
| 37 | { .frequency = 816000 }, |
| 38 | { .frequency = 912000 }, |
| 39 | { .frequency = 1000000 }, |
| 40 | { .frequency = CPUFREQ_TABLE_END }, |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 41 | }; |
| 42 | |
| 43 | #define NUM_CPUS 2 |
| 44 | |
| 45 | static struct clk *cpu_clk; |
Stephen Warren | ce32dda | 2012-09-10 17:05:01 -0600 | [diff] [blame] | 46 | static struct clk *pll_x_clk; |
| 47 | static struct clk *pll_p_clk; |
Colin Cross | 7a28128 | 2010-11-22 18:54:36 -0800 | [diff] [blame] | 48 | static struct clk *emc_clk; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 49 | |
| 50 | static unsigned long target_cpu_speed[NUM_CPUS]; |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 51 | static DEFINE_MUTEX(tegra_cpu_lock); |
| 52 | static bool is_suspended; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 53 | |
Olof Johansson | 6686c73 | 2011-10-09 21:57:04 -0700 | [diff] [blame] | 54 | static unsigned int tegra_getspeed(unsigned int cpu) |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 55 | { |
| 56 | unsigned long rate; |
| 57 | |
| 58 | if (cpu >= NUM_CPUS) |
| 59 | return 0; |
| 60 | |
| 61 | rate = clk_get_rate(cpu_clk) / 1000; |
| 62 | return rate; |
| 63 | } |
| 64 | |
Stephen Warren | ce32dda | 2012-09-10 17:05:01 -0600 | [diff] [blame] | 65 | static int tegra_cpu_clk_set_rate(unsigned long rate) |
| 66 | { |
| 67 | int ret; |
| 68 | |
| 69 | /* |
| 70 | * Take an extra reference to the main pll so it doesn't turn |
| 71 | * off when we move the cpu off of it |
| 72 | */ |
| 73 | clk_prepare_enable(pll_x_clk); |
| 74 | |
| 75 | ret = clk_set_parent(cpu_clk, pll_p_clk); |
| 76 | if (ret) { |
| 77 | pr_err("Failed to switch cpu to clock pll_p\n"); |
| 78 | goto out; |
| 79 | } |
| 80 | |
| 81 | if (rate == clk_get_rate(pll_p_clk)) |
| 82 | goto out; |
| 83 | |
| 84 | ret = clk_set_rate(pll_x_clk, rate); |
| 85 | if (ret) { |
| 86 | pr_err("Failed to change pll_x to %lu\n", rate); |
| 87 | goto out; |
| 88 | } |
| 89 | |
| 90 | ret = clk_set_parent(cpu_clk, pll_x_clk); |
| 91 | if (ret) { |
| 92 | pr_err("Failed to switch cpu to clock pll_x\n"); |
| 93 | goto out; |
| 94 | } |
| 95 | |
| 96 | out: |
| 97 | clk_disable_unprepare(pll_x_clk); |
| 98 | return ret; |
| 99 | } |
| 100 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 101 | static int tegra_update_cpu_speed(struct cpufreq_policy *policy, |
| 102 | unsigned long rate) |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 103 | { |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 104 | int ret = 0; |
| 105 | struct cpufreq_freqs freqs; |
| 106 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 107 | freqs.old = tegra_getspeed(0); |
| 108 | freqs.new = rate; |
| 109 | |
| 110 | if (freqs.old == freqs.new) |
| 111 | return ret; |
| 112 | |
Colin Cross | 7a28128 | 2010-11-22 18:54:36 -0800 | [diff] [blame] | 113 | /* |
| 114 | * Vote on memory bus frequency based on cpu frequency |
| 115 | * This sets the minimum frequency, display or avp may request higher |
| 116 | */ |
| 117 | if (rate >= 816000) |
| 118 | clk_set_rate(emc_clk, 600000000); /* cpu 816 MHz, emc max */ |
| 119 | else if (rate >= 456000) |
| 120 | clk_set_rate(emc_clk, 300000000); /* cpu 456 MHz, emc 150Mhz */ |
| 121 | else |
| 122 | clk_set_rate(emc_clk, 100000000); /* emc 50Mhz */ |
| 123 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 124 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 125 | |
| 126 | #ifdef CONFIG_CPU_FREQ_DEBUG |
| 127 | printk(KERN_DEBUG "cpufreq-tegra: transition: %u --> %u\n", |
| 128 | freqs.old, freqs.new); |
| 129 | #endif |
| 130 | |
Stephen Warren | ce32dda | 2012-09-10 17:05:01 -0600 | [diff] [blame] | 131 | ret = tegra_cpu_clk_set_rate(freqs.new * 1000); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 132 | if (ret) { |
| 133 | pr_err("cpu-tegra: Failed to set cpu frequency to %d kHz\n", |
| 134 | freqs.new); |
Viresh Kumar | f56cc99 | 2013-06-19 11:18:20 +0530 | [diff] [blame] | 135 | freqs.new = freqs.old; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 136 | } |
| 137 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 138 | cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 139 | |
Viresh Kumar | f56cc99 | 2013-06-19 11:18:20 +0530 | [diff] [blame] | 140 | return ret; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 141 | } |
| 142 | |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 143 | static unsigned long tegra_cpu_highest_speed(void) |
| 144 | { |
| 145 | unsigned long rate = 0; |
| 146 | int i; |
| 147 | |
| 148 | for_each_online_cpu(i) |
| 149 | rate = max(rate, target_cpu_speed[i]); |
| 150 | return rate; |
| 151 | } |
| 152 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 153 | static int tegra_target(struct cpufreq_policy *policy, |
| 154 | unsigned int target_freq, |
| 155 | unsigned int relation) |
| 156 | { |
Olof Johansson | fdb684a | 2011-10-09 21:31:23 -0700 | [diff] [blame] | 157 | unsigned int idx; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 158 | unsigned int freq; |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 159 | int ret = 0; |
| 160 | |
| 161 | mutex_lock(&tegra_cpu_lock); |
| 162 | |
| 163 | if (is_suspended) { |
| 164 | ret = -EBUSY; |
| 165 | goto out; |
| 166 | } |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 167 | |
| 168 | cpufreq_frequency_table_target(policy, freq_table, target_freq, |
| 169 | relation, &idx); |
| 170 | |
| 171 | freq = freq_table[idx].frequency; |
| 172 | |
| 173 | target_cpu_speed[policy->cpu] = freq; |
| 174 | |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 175 | ret = tegra_update_cpu_speed(policy, tegra_cpu_highest_speed()); |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 176 | |
| 177 | out: |
| 178 | mutex_unlock(&tegra_cpu_lock); |
| 179 | return ret; |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 180 | } |
| 181 | |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 182 | static int tegra_pm_notify(struct notifier_block *nb, unsigned long event, |
| 183 | void *dummy) |
| 184 | { |
| 185 | mutex_lock(&tegra_cpu_lock); |
| 186 | if (event == PM_SUSPEND_PREPARE) { |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 187 | struct cpufreq_policy *policy = cpufreq_cpu_get(0); |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 188 | is_suspended = true; |
| 189 | pr_info("Tegra cpufreq suspend: setting frequency to %d kHz\n", |
| 190 | freq_table[0].frequency); |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 191 | tegra_update_cpu_speed(policy, freq_table[0].frequency); |
| 192 | cpufreq_cpu_put(policy); |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 193 | } else if (event == PM_POST_SUSPEND) { |
| 194 | is_suspended = false; |
| 195 | } |
| 196 | mutex_unlock(&tegra_cpu_lock); |
| 197 | |
| 198 | return NOTIFY_OK; |
| 199 | } |
| 200 | |
| 201 | static struct notifier_block tegra_cpu_pm_notifier = { |
| 202 | .notifier_call = tegra_pm_notify, |
| 203 | }; |
| 204 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 205 | static int tegra_cpu_init(struct cpufreq_policy *policy) |
| 206 | { |
Viresh Kumar | 99d428c | 2013-10-03 20:42:11 +0530 | [diff] [blame^] | 207 | int ret; |
| 208 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 209 | if (policy->cpu >= NUM_CPUS) |
| 210 | return -EINVAL; |
| 211 | |
Prashant Gaikwad | 6a5278d | 2012-06-05 09:59:35 +0530 | [diff] [blame] | 212 | clk_prepare_enable(emc_clk); |
| 213 | clk_prepare_enable(cpu_clk); |
Colin Cross | 89a5fb8 | 2010-10-20 17:47:59 -0700 | [diff] [blame] | 214 | |
Viresh Kumar | 21c895c | 2013-10-03 20:29:05 +0530 | [diff] [blame] | 215 | target_cpu_speed[policy->cpu] = tegra_getspeed(policy->cpu); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 216 | |
| 217 | /* FIXME: what's the actual transition time? */ |
Viresh Kumar | 99d428c | 2013-10-03 20:42:11 +0530 | [diff] [blame^] | 218 | ret = cpufreq_generic_init(policy, freq_table, 300 * 1000); |
| 219 | if (ret) { |
| 220 | clk_disable_unprepare(cpu_clk); |
| 221 | clk_disable_unprepare(emc_clk); |
| 222 | return ret; |
| 223 | } |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 224 | |
Colin Cross | 1eb2ecf | 2010-08-05 17:40:39 -0700 | [diff] [blame] | 225 | if (policy->cpu == 0) |
| 226 | register_pm_notifier(&tegra_cpu_pm_notifier); |
| 227 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | static int tegra_cpu_exit(struct cpufreq_policy *policy) |
| 232 | { |
Viresh Kumar | 2e6a5c80 | 2013-09-16 18:56:40 +0530 | [diff] [blame] | 233 | cpufreq_frequency_table_put_attr(policy->cpu); |
Viresh Kumar | 99d428c | 2013-10-03 20:42:11 +0530 | [diff] [blame^] | 234 | clk_disable_unprepare(cpu_clk); |
Prashant Gaikwad | 6a5278d | 2012-06-05 09:59:35 +0530 | [diff] [blame] | 235 | clk_disable_unprepare(emc_clk); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 236 | return 0; |
| 237 | } |
| 238 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 239 | static struct cpufreq_driver tegra_cpufreq_driver = { |
Viresh Kumar | 8e08cf0 | 2013-10-03 20:28:29 +0530 | [diff] [blame] | 240 | .verify = cpufreq_generic_frequency_table_verify, |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 241 | .target = tegra_target, |
| 242 | .get = tegra_getspeed, |
| 243 | .init = tegra_cpu_init, |
| 244 | .exit = tegra_cpu_exit, |
| 245 | .name = "tegra", |
Viresh Kumar | 8e08cf0 | 2013-10-03 20:28:29 +0530 | [diff] [blame] | 246 | .attr = cpufreq_generic_attr, |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 247 | }; |
| 248 | |
| 249 | static int __init tegra_cpufreq_init(void) |
| 250 | { |
Joseph Lo | b192b91 | 2013-08-23 09:43:58 +0800 | [diff] [blame] | 251 | cpu_clk = clk_get_sys(NULL, "cclk"); |
Richard Zhao | c26cefd | 2012-12-21 00:09:55 +0000 | [diff] [blame] | 252 | if (IS_ERR(cpu_clk)) |
| 253 | return PTR_ERR(cpu_clk); |
| 254 | |
| 255 | pll_x_clk = clk_get_sys(NULL, "pll_x"); |
| 256 | if (IS_ERR(pll_x_clk)) |
| 257 | return PTR_ERR(pll_x_clk); |
| 258 | |
Joseph Lo | b192b91 | 2013-08-23 09:43:58 +0800 | [diff] [blame] | 259 | pll_p_clk = clk_get_sys(NULL, "pll_p"); |
Richard Zhao | c26cefd | 2012-12-21 00:09:55 +0000 | [diff] [blame] | 260 | if (IS_ERR(pll_p_clk)) |
| 261 | return PTR_ERR(pll_p_clk); |
| 262 | |
| 263 | emc_clk = clk_get_sys("cpu", "emc"); |
| 264 | if (IS_ERR(emc_clk)) { |
| 265 | clk_put(cpu_clk); |
| 266 | return PTR_ERR(emc_clk); |
| 267 | } |
| 268 | |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 269 | return cpufreq_register_driver(&tegra_cpufreq_driver); |
| 270 | } |
| 271 | |
| 272 | static void __exit tegra_cpufreq_exit(void) |
| 273 | { |
| 274 | cpufreq_unregister_driver(&tegra_cpufreq_driver); |
Richard Zhao | c26cefd | 2012-12-21 00:09:55 +0000 | [diff] [blame] | 275 | clk_put(emc_clk); |
| 276 | clk_put(cpu_clk); |
Colin Cross | 7056d42 | 2010-04-22 20:30:13 -0700 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | |
| 280 | MODULE_AUTHOR("Colin Cross <ccross@android.com>"); |
| 281 | MODULE_DESCRIPTION("cpufreq driver for Nvidia Tegra2"); |
| 282 | MODULE_LICENSE("GPL"); |
| 283 | module_init(tegra_cpufreq_init); |
| 284 | module_exit(tegra_cpufreq_exit); |