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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Lennert Buytenhekc852ac82006-09-18 23:26:25 +01002 * arch/arm/mach-iop33x/irq.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Generic IOP331 IRQ handling functionality
5 *
6 * Author: Dave Jiang <dave.jiang@intel.com>
7 * Copyright (C) 2003 Intel Corp.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
Linus Torvalds1da177e2005-04-16 15:20:36 -070012 */
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010013
Linus Torvalds1da177e2005-04-16 15:20:36 -070014#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <asm/mach/irq.h>
18#include <asm/irq.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010019#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/mach-types.h>
21
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010022static u32 iop33x_mask0;
23static u32 iop33x_mask1;
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Dan Williamsd73d8012007-05-15 01:03:36 +010025static void intctl0_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070026{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010027 asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070028}
29
Dan Williamsd73d8012007-05-15 01:03:36 +010030static void intctl1_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070031{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010032 asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070033}
34
Dan Williamsd73d8012007-05-15 01:03:36 +010035static void intstr0_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070036{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010037 asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070038}
39
Dan Williamsd73d8012007-05-15 01:03:36 +010040static void intstr1_write(u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -070041{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010042 asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val));
Linus Torvalds1da177e2005-04-16 15:20:36 -070043}
44
Dan Williamsd73d8012007-05-15 01:03:36 +010045static void intbase_write(u32 val)
Lennert Buytenhek7412b102006-09-18 23:24:10 +010046{
Lennert Buytenhek7412b102006-09-18 23:24:10 +010047 asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val));
Lennert Buytenhek7412b102006-09-18 23:24:10 +010048}
49
Dan Williamsd73d8012007-05-15 01:03:36 +010050static void intsize_write(u32 val)
Lennert Buytenhek7412b102006-09-18 23:24:10 +010051{
Lennert Buytenhek7412b102006-09-18 23:24:10 +010052 asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val));
Lennert Buytenhek7412b102006-09-18 23:24:10 +010053}
54
Linus Torvalds1da177e2005-04-16 15:20:36 -070055static void
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010056iop33x_irq_mask1 (struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070057{
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010058 iop33x_mask0 &= ~(1 << d->irq);
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010059 intctl0_write(iop33x_mask0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070060}
61
62static void
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010063iop33x_irq_mask2 (struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070064{
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010065 iop33x_mask1 &= ~(1 << (d->irq - 32));
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010066 intctl1_write(iop33x_mask1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070067}
68
69static void
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010070iop33x_irq_unmask1(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070071{
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010072 iop33x_mask0 |= 1 << d->irq;
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010073 intctl0_write(iop33x_mask0);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074}
75
76static void
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010077iop33x_irq_unmask2(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070078{
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010079 iop33x_mask1 |= (1 << (d->irq - 32));
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010080 intctl1_write(iop33x_mask1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081}
82
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010083struct irq_chip iop33x_irqchip1 = {
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010084 .name = "IOP33x-1",
85 .irq_ack = iop33x_irq_mask1,
86 .irq_mask = iop33x_irq_mask1,
87 .irq_unmask = iop33x_irq_unmask1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070088};
89
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010090struct irq_chip iop33x_irqchip2 = {
Lennert Buytenheka0ad2a72010-11-29 10:32:37 +010091 .name = "IOP33x-2",
92 .irq_ack = iop33x_irq_mask2,
93 .irq_mask = iop33x_irq_mask2,
94 .irq_unmask = iop33x_irq_unmask2,
Linus Torvalds1da177e2005-04-16 15:20:36 -070095};
96
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010097void __init iop33x_init_irq(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070098{
Lennert Buytenhekc852ac82006-09-18 23:26:25 +010099 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700100
Dan Williams588ef762007-02-13 17:12:04 +0100101 iop_init_cp6_handler();
102
Lennert Buytenhekc852ac82006-09-18 23:26:25 +0100103 intctl0_write(0);
104 intctl1_write(0);
105 intstr0_write(0);
106 intstr1_write(0);
Lennert Buytenhek7412b102006-09-18 23:24:10 +0100107 intbase_write(0);
108 intsize_write(1);
Lennert Buytenhekc852ac82006-09-18 23:26:25 +0100109 if (machine_is_iq80331())
Lennert Buytenhek7e9740b2006-09-18 23:17:36 +0100110 *IOP3XX_PCIIRSR = 0x0f;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Lennert Buytenhekc852ac82006-09-18 23:26:25 +0100112 for (i = 0; i < NR_IRQS; i++) {
Thomas Gleixnerf38c02f2011-03-24 13:35:09 +0100113 irq_set_chip_and_handler(i,
114 (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2,
115 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
117 }
118}