Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand.c |
| 3 | * |
| 4 | * Overview: |
| 5 | * This is the generic MTD driver for NAND flash devices. It should be |
| 6 | * capable of working with almost all NAND chips currently available. |
| 7 | * Basic support for AG-AND chips is provided. |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 8 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | * Additional technical information is available on |
| 10 | * http://www.linux-mtd.infradead.org/tech/nand.html |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 11 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 13 | * 2002-2006 Thomas Gleixner (tglx@linutronix.de) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 15 | * Credits: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 16 | * David Woodhouse for adding multichip support |
| 17 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 18 | * Aleph One Ltd. and Toby Churchill Ltd. for supporting the |
| 19 | * rework for 2K page size chips |
| 20 | * |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 21 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * Enable cached programming for 2k page size chips |
| 23 | * Check, if mtd->ecctype should be set to MTD_ECC_HW |
| 24 | * if we have HW ecc support. |
| 25 | * The AG-AND chips have nice features for speed improvement, |
| 26 | * which are not supported yet. Read / program 4 pages in one go. |
| 27 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | * This program is free software; you can redistribute it and/or modify |
| 29 | * it under the terms of the GNU General Public License version 2 as |
| 30 | * published by the Free Software Foundation. |
| 31 | * |
| 32 | */ |
| 33 | |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 34 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 35 | #include <linux/delay.h> |
| 36 | #include <linux/errno.h> |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 37 | #include <linux/err.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include <linux/sched.h> |
| 39 | #include <linux/slab.h> |
| 40 | #include <linux/types.h> |
| 41 | #include <linux/mtd/mtd.h> |
| 42 | #include <linux/mtd/nand.h> |
| 43 | #include <linux/mtd/nand_ecc.h> |
| 44 | #include <linux/mtd/compatmac.h> |
| 45 | #include <linux/interrupt.h> |
| 46 | #include <linux/bitops.h> |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 47 | #include <linux/leds.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | #include <asm/io.h> |
| 49 | |
| 50 | #ifdef CONFIG_MTD_PARTITIONS |
| 51 | #include <linux/mtd/partitions.h> |
| 52 | #endif |
| 53 | |
| 54 | /* Define default oob placement schemes for large and small page devices */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 55 | static struct nand_ecclayout nand_oob_8 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 | .eccbytes = 3, |
| 57 | .eccpos = {0, 1, 2}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 58 | .oobfree = { |
| 59 | {.offset = 3, |
| 60 | .length = 2}, |
| 61 | {.offset = 6, |
| 62 | .length = 2}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | }; |
| 64 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 65 | static struct nand_ecclayout nand_oob_16 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | .eccbytes = 6, |
| 67 | .eccpos = {0, 1, 2, 3, 6, 7}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 68 | .oobfree = { |
| 69 | {.offset = 8, |
| 70 | . length = 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 71 | }; |
| 72 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 73 | static struct nand_ecclayout nand_oob_64 = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | .eccbytes = 24, |
| 75 | .eccpos = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 76 | 40, 41, 42, 43, 44, 45, 46, 47, |
| 77 | 48, 49, 50, 51, 52, 53, 54, 55, |
| 78 | 56, 57, 58, 59, 60, 61, 62, 63}, |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 79 | .oobfree = { |
| 80 | {.offset = 2, |
| 81 | .length = 38}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | }; |
| 83 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 84 | static int nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 85 | int new_state); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 87 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 88 | struct mtd_oob_ops *ops); |
| 89 | |
Thomas Gleixner | d470a97 | 2006-05-23 23:48:57 +0200 | [diff] [blame] | 90 | /* |
| 91 | * For devices which display every fart in the system on a seperate LED. Is |
| 92 | * compiled away when LED support is disabled. |
| 93 | */ |
| 94 | DEFINE_LED_TRIGGER(nand_led_trigger); |
| 95 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | /** |
| 97 | * nand_release_device - [GENERIC] release chip |
| 98 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 99 | * |
| 100 | * Deselect, release chip lock and wake up anyone waiting on the device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 101 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 102 | static void nand_release_device(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 104 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 | |
| 106 | /* De-select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 107 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 108 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 109 | /* Release the controller and the chip */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 110 | spin_lock(&chip->controller->lock); |
| 111 | chip->controller->active = NULL; |
| 112 | chip->state = FL_READY; |
| 113 | wake_up(&chip->controller->wq); |
| 114 | spin_unlock(&chip->controller->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | } |
| 116 | |
| 117 | /** |
| 118 | * nand_read_byte - [DEFAULT] read one byte from the chip |
| 119 | * @mtd: MTD device structure |
| 120 | * |
| 121 | * Default read function for 8bit buswith |
| 122 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 123 | static uint8_t nand_read_byte(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 125 | struct nand_chip *chip = mtd->priv; |
| 126 | return readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | } |
| 128 | |
| 129 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip |
| 131 | * @mtd: MTD device structure |
| 132 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 133 | * Default read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | * endianess conversion |
| 135 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 136 | static uint8_t nand_read_byte16(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 138 | struct nand_chip *chip = mtd->priv; |
| 139 | return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | } |
| 141 | |
| 142 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | * nand_read_word - [DEFAULT] read one word from the chip |
| 144 | * @mtd: MTD device structure |
| 145 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 146 | * Default read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | * endianess conversion |
| 148 | */ |
| 149 | static u16 nand_read_word(struct mtd_info *mtd) |
| 150 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 151 | struct nand_chip *chip = mtd->priv; |
| 152 | return readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | } |
| 154 | |
| 155 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | * nand_select_chip - [DEFAULT] control CE line |
| 157 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 158 | * @chipnr: chipnumber to select, -1 for deselect |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | * |
| 160 | * Default select function for 1 chip devices. |
| 161 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 162 | static void nand_select_chip(struct mtd_info *mtd, int chipnr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 163 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 164 | struct nand_chip *chip = mtd->priv; |
| 165 | |
| 166 | switch (chipnr) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 | case -1: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 168 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 169 | break; |
| 170 | case 0: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | break; |
| 172 | |
| 173 | default: |
| 174 | BUG(); |
| 175 | } |
| 176 | } |
| 177 | |
| 178 | /** |
| 179 | * nand_write_buf - [DEFAULT] write buffer to chip |
| 180 | * @mtd: MTD device structure |
| 181 | * @buf: data buffer |
| 182 | * @len: number of bytes to write |
| 183 | * |
| 184 | * Default write function for 8bit buswith |
| 185 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 186 | static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | { |
| 188 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 189 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 191 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 192 | writeb(buf[i], chip->IO_ADDR_W); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | } |
| 194 | |
| 195 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 196 | * nand_read_buf - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | * @mtd: MTD device structure |
| 198 | * @buf: buffer to store date |
| 199 | * @len: number of bytes to read |
| 200 | * |
| 201 | * Default read function for 8bit buswith |
| 202 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 203 | static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 204 | { |
| 205 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 206 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 208 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 209 | buf[i] = readb(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 213 | * nand_verify_buf - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 214 | * @mtd: MTD device structure |
| 215 | * @buf: buffer containing the data to compare |
| 216 | * @len: number of bytes to compare |
| 217 | * |
| 218 | * Default verify function for 8bit buswith |
| 219 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 220 | static int nand_verify_buf(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 221 | { |
| 222 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 223 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 225 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 226 | if (buf[i] != readb(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | return -EFAULT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | /** |
| 232 | * nand_write_buf16 - [DEFAULT] write buffer to chip |
| 233 | * @mtd: MTD device structure |
| 234 | * @buf: data buffer |
| 235 | * @len: number of bytes to write |
| 236 | * |
| 237 | * Default write function for 16bit buswith |
| 238 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 239 | static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | { |
| 241 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 242 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 243 | u16 *p = (u16 *) buf; |
| 244 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 245 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 246 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 247 | writew(p[i], chip->IO_ADDR_W); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 252 | * nand_read_buf16 - [DEFAULT] read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | * @mtd: MTD device structure |
| 254 | * @buf: buffer to store date |
| 255 | * @len: number of bytes to read |
| 256 | * |
| 257 | * Default read function for 16bit buswith |
| 258 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 259 | static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | { |
| 261 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 262 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | u16 *p = (u16 *) buf; |
| 264 | len >>= 1; |
| 265 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 266 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 267 | p[i] = readw(chip->IO_ADDR_R); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 271 | * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 272 | * @mtd: MTD device structure |
| 273 | * @buf: buffer containing the data to compare |
| 274 | * @len: number of bytes to compare |
| 275 | * |
| 276 | * Default verify function for 16bit buswith |
| 277 | */ |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 278 | static int nand_verify_buf16(struct mtd_info *mtd, const uint8_t *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | { |
| 280 | int i; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 281 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | u16 *p = (u16 *) buf; |
| 283 | len >>= 1; |
| 284 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 285 | for (i = 0; i < len; i++) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 286 | if (p[i] != readw(chip->IO_ADDR_R)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 287 | return -EFAULT; |
| 288 | |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | /** |
| 293 | * nand_block_bad - [DEFAULT] Read bad block marker from the chip |
| 294 | * @mtd: MTD device structure |
| 295 | * @ofs: offset from device start |
| 296 | * @getchip: 0, if the chip is already selected |
| 297 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 298 | * Check, if the block is bad. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | */ |
| 300 | static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) |
| 301 | { |
| 302 | int page, chipnr, res = 0; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 303 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | u16 bad; |
| 305 | |
| 306 | if (getchip) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 307 | page = (int)(ofs >> chip->page_shift); |
| 308 | chipnr = (int)(ofs >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 310 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 311 | |
| 312 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 313 | chip->select_chip(mtd, chipnr); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 314 | } else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 315 | page = (int)ofs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 316 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 317 | if (chip->options & NAND_BUSWIDTH_16) { |
| 318 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos & 0xFE, |
| 319 | page & chip->pagemask); |
| 320 | bad = cpu_to_le16(chip->read_word(mtd)); |
| 321 | if (chip->badblockpos & 0x1) |
Vitaly Wool | 49196f3 | 2005-11-02 16:54:46 +0000 | [diff] [blame] | 322 | bad >>= 8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | if ((bad & 0xFF) != 0xff) |
| 324 | res = 1; |
| 325 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 326 | chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, |
| 327 | page & chip->pagemask); |
| 328 | if (chip->read_byte(mtd) != 0xff) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | res = 1; |
| 330 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 331 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 332 | if (getchip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | nand_release_device(mtd); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 334 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | return res; |
| 336 | } |
| 337 | |
| 338 | /** |
| 339 | * nand_default_block_markbad - [DEFAULT] mark a block bad |
| 340 | * @mtd: MTD device structure |
| 341 | * @ofs: offset from device start |
| 342 | * |
| 343 | * This is the default implementation, which can be overridden by |
| 344 | * a hardware specific driver. |
| 345 | */ |
| 346 | static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) |
| 347 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 348 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 58dd8f2b | 2006-05-23 11:52:35 +0200 | [diff] [blame] | 349 | uint8_t buf[2] = { 0, 0 }; |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 350 | int block, ret; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 351 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 352 | /* Get block number */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 353 | block = ((int)ofs) >> chip->bbt_erase_shift; |
| 354 | if (chip->bbt) |
| 355 | chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 356 | |
| 357 | /* Do we have a flash based bad block table ? */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 358 | if (chip->options & NAND_USE_FLASH_BBT) |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 359 | ret = nand_update_bbt(mtd, ofs); |
| 360 | else { |
| 361 | /* We write two bytes, so we dont have to mess with 16 bit |
| 362 | * access |
| 363 | */ |
| 364 | ofs += mtd->oobsize; |
| 365 | chip->ops.len = 2; |
| 366 | chip->ops.datbuf = NULL; |
| 367 | chip->ops.oobbuf = buf; |
| 368 | chip->ops.ooboffs = chip->badblockpos & ~0x01; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 369 | |
Thomas Gleixner | f1a28c0 | 2006-05-30 00:37:34 +0200 | [diff] [blame] | 370 | ret = nand_do_write_oob(mtd, ofs, &chip->ops); |
| 371 | } |
| 372 | if (!ret) |
| 373 | mtd->ecc_stats.badblocks++; |
| 374 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | } |
| 376 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 377 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 378 | * nand_check_wp - [GENERIC] check if the chip is write protected |
| 379 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 380 | * Check, if the device is write protected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 382 | * The function expects, that the device is already selected |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 383 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 384 | static int nand_check_wp(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 386 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 387 | /* Check the WP bit */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 388 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
| 389 | return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 390 | } |
| 391 | |
| 392 | /** |
| 393 | * nand_block_checkbad - [GENERIC] Check if a block is marked bad |
| 394 | * @mtd: MTD device structure |
| 395 | * @ofs: offset from device start |
| 396 | * @getchip: 0, if the chip is already selected |
| 397 | * @allowbbt: 1, if its allowed to access the bbt area |
| 398 | * |
| 399 | * Check, if the block is bad. Either by reading the bad block table or |
| 400 | * calling of the scan function. |
| 401 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 402 | static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, |
| 403 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 404 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 405 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 406 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 407 | if (!chip->bbt) |
| 408 | return chip->block_bad(mtd, ofs, getchip); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 409 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 410 | /* Return info from the table */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 411 | return nand_isbad_bbt(mtd, ofs, allowbbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | } |
| 413 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 414 | /* |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 415 | * Wait for the ready pin, after a command |
| 416 | * The timeout is catched later. |
| 417 | */ |
| 418 | static void nand_wait_ready(struct mtd_info *mtd) |
| 419 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 420 | struct nand_chip *chip = mtd->priv; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 421 | unsigned long timeo = jiffies + 2; |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 422 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 423 | led_trigger_event(nand_led_trigger, LED_FULL); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 424 | /* wait until command is processed or timeout occures */ |
| 425 | do { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 426 | if (chip->dev_ready(mtd)) |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 427 | break; |
Ingo Molnar | 8446f1d | 2005-09-06 15:16:27 -0700 | [diff] [blame] | 428 | touch_softlockup_watchdog(); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 429 | } while (time_before(jiffies, timeo)); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 430 | led_trigger_event(nand_led_trigger, LED_OFF); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 431 | } |
| 432 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | /** |
| 434 | * nand_command - [DEFAULT] Send command to NAND device |
| 435 | * @mtd: MTD device structure |
| 436 | * @command: the command to be sent |
| 437 | * @column: the column address for this command, -1 if none |
| 438 | * @page_addr: the page address for this command, -1 if none |
| 439 | * |
| 440 | * Send command to NAND device. This function is used for small page |
| 441 | * devices (256/512 Bytes per page) |
| 442 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 443 | static void nand_command(struct mtd_info *mtd, unsigned int command, |
| 444 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 446 | register struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 447 | int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | /* |
| 450 | * Write out the command to the device. |
| 451 | */ |
| 452 | if (command == NAND_CMD_SEQIN) { |
| 453 | int readcmd; |
| 454 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 455 | if (column >= mtd->writesize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 457 | column -= mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 458 | readcmd = NAND_CMD_READOOB; |
| 459 | } else if (column < 256) { |
| 460 | /* First 256 bytes --> READ0 */ |
| 461 | readcmd = NAND_CMD_READ0; |
| 462 | } else { |
| 463 | column -= 256; |
| 464 | readcmd = NAND_CMD_READ1; |
| 465 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 466 | chip->cmd_ctrl(mtd, readcmd, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 467 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 469 | chip->cmd_ctrl(mtd, command, ctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 471 | /* |
| 472 | * Address cycle, when necessary |
| 473 | */ |
| 474 | ctrl = NAND_CTRL_ALE | NAND_CTRL_CHANGE; |
| 475 | /* Serially input address */ |
| 476 | if (column != -1) { |
| 477 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 478 | if (chip->options & NAND_BUSWIDTH_16) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 479 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 480 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 481 | ctrl &= ~NAND_CTRL_CHANGE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | } |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 483 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 484 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 485 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 486 | chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 487 | /* One more address cycle for devices > 32MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 488 | if (chip->chipsize > (32 << 20)) |
| 489 | chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 490 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 491 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 492 | |
| 493 | /* |
| 494 | * program and erase have their own busy handlers |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 495 | * status and sequential in needs no delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 496 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 498 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 499 | case NAND_CMD_PAGEPROG: |
| 500 | case NAND_CMD_ERASE1: |
| 501 | case NAND_CMD_ERASE2: |
| 502 | case NAND_CMD_SEQIN: |
| 503 | case NAND_CMD_STATUS: |
| 504 | return; |
| 505 | |
| 506 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 507 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 509 | udelay(chip->chip_delay); |
| 510 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 511 | NAND_CTRL_CLE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 512 | chip->cmd_ctrl(mtd, |
| 513 | NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 514 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 515 | return; |
| 516 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 517 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 518 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 519 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 520 | * If we don't have access to the busy pin, we apply the given |
| 521 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 522 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 523 | if (!chip->dev_ready) { |
| 524 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 526 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 528 | /* Apply this short delay always to ensure that we do wait tWB in |
| 529 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 530 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 531 | |
| 532 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 533 | } |
| 534 | |
| 535 | /** |
| 536 | * nand_command_lp - [DEFAULT] Send command to NAND large page device |
| 537 | * @mtd: MTD device structure |
| 538 | * @command: the command to be sent |
| 539 | * @column: the column address for this command, -1 if none |
| 540 | * @page_addr: the page address for this command, -1 if none |
| 541 | * |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 542 | * Send command to NAND device. This is the version for the new large page |
| 543 | * devices We dont have the separate regions as we have in the small page |
| 544 | * devices. We must emulate NAND_CMD_READOOB to keep the code compatible. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 545 | */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 546 | static void nand_command_lp(struct mtd_info *mtd, unsigned int command, |
| 547 | int column, int page_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 549 | register struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 550 | |
| 551 | /* Emulate NAND_CMD_READOOB */ |
| 552 | if (command == NAND_CMD_READOOB) { |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 553 | column += mtd->writesize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | command = NAND_CMD_READ0; |
| 555 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 556 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 557 | /* Command latch cycle */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 558 | chip->cmd_ctrl(mtd, command & 0xff, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 559 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | |
| 561 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 562 | int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 563 | |
| 564 | /* Serially input address */ |
| 565 | if (column != -1) { |
| 566 | /* Adjust columns for 16 bit buswidth */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 567 | if (chip->options & NAND_BUSWIDTH_16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 568 | column >>= 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 569 | chip->cmd_ctrl(mtd, column, ctrl); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 570 | ctrl &= ~NAND_CTRL_CHANGE; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 571 | chip->cmd_ctrl(mtd, column >> 8, ctrl); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 572 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | if (page_addr != -1) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 574 | chip->cmd_ctrl(mtd, page_addr, ctrl); |
| 575 | chip->cmd_ctrl(mtd, page_addr >> 8, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 576 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | /* One more address cycle for devices > 128MiB */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 578 | if (chip->chipsize > (128 << 20)) |
| 579 | chip->cmd_ctrl(mtd, page_addr >> 16, |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 580 | NAND_NCE | NAND_ALE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 581 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | } |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 583 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 584 | |
| 585 | /* |
| 586 | * program and erase have their own busy handlers |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 587 | * status, sequential in, and deplete1 need no delay |
| 588 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 589 | switch (command) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 590 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 591 | case NAND_CMD_CACHEDPROG: |
| 592 | case NAND_CMD_PAGEPROG: |
| 593 | case NAND_CMD_ERASE1: |
| 594 | case NAND_CMD_ERASE2: |
| 595 | case NAND_CMD_SEQIN: |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 596 | case NAND_CMD_RNDIN: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 597 | case NAND_CMD_STATUS: |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 598 | case NAND_CMD_DEPLETE1: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | return; |
| 600 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 601 | /* |
| 602 | * read error status commands require only a short delay |
| 603 | */ |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 604 | case NAND_CMD_STATUS_ERROR: |
| 605 | case NAND_CMD_STATUS_ERROR0: |
| 606 | case NAND_CMD_STATUS_ERROR1: |
| 607 | case NAND_CMD_STATUS_ERROR2: |
| 608 | case NAND_CMD_STATUS_ERROR3: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 609 | udelay(chip->chip_delay); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 610 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | |
| 612 | case NAND_CMD_RESET: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 613 | if (chip->dev_ready) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | break; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 615 | udelay(chip->chip_delay); |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 616 | chip->cmd_ctrl(mtd, NAND_CMD_STATUS, |
| 617 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 618 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 619 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 620 | while (!(chip->read_byte(mtd) & NAND_STATUS_READY)) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 621 | return; |
| 622 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 623 | case NAND_CMD_RNDOUT: |
| 624 | /* No ready / busy check necessary */ |
| 625 | chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, |
| 626 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 627 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 628 | NAND_NCE | NAND_CTRL_CHANGE); |
| 629 | return; |
| 630 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | case NAND_CMD_READ0: |
Thomas Gleixner | 12efdde | 2006-05-24 22:57:09 +0200 | [diff] [blame] | 632 | chip->cmd_ctrl(mtd, NAND_CMD_READSTART, |
| 633 | NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); |
| 634 | chip->cmd_ctrl(mtd, NAND_CMD_NONE, |
| 635 | NAND_NCE | NAND_CTRL_CHANGE); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 636 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 637 | /* This applies to read commands */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 638 | default: |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 639 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 640 | * If we don't have access to the busy pin, we apply the given |
| 641 | * command delay |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 642 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 643 | if (!chip->dev_ready) { |
| 644 | udelay(chip->chip_delay); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 645 | return; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 646 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 647 | } |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 648 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | /* Apply this short delay always to ensure that we do wait tWB in |
| 650 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 651 | ndelay(100); |
Thomas Gleixner | 3b88775 | 2005-02-22 21:56:49 +0000 | [diff] [blame] | 652 | |
| 653 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | } |
| 655 | |
| 656 | /** |
| 657 | * nand_get_device - [GENERIC] Get chip for selected access |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 658 | * @chip: the nand chip descriptor |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 659 | * @mtd: MTD device structure |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 660 | * @new_state: the state which is requested |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 661 | * |
| 662 | * Get the device and lock it for exclusive access |
| 663 | */ |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 664 | static int |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 665 | nand_get_device(struct nand_chip *chip, struct mtd_info *mtd, int new_state) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 666 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 667 | spinlock_t *lock = &chip->controller->lock; |
| 668 | wait_queue_head_t *wq = &chip->controller->wq; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 669 | DECLARE_WAITQUEUE(wait, current); |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 670 | retry: |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 671 | spin_lock(lock); |
| 672 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 673 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 674 | /* Hardware controller shared among independend devices */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 675 | if (!chip->controller->active) |
| 676 | chip->controller->active = chip; |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 677 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 678 | if (chip->controller->active == chip && chip->state == FL_READY) { |
| 679 | chip->state = new_state; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 680 | spin_unlock(lock); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 681 | return 0; |
| 682 | } |
| 683 | if (new_state == FL_PM_SUSPENDED) { |
| 684 | spin_unlock(lock); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 685 | return (chip->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; |
Thomas Gleixner | 0dfc624 | 2005-05-31 20:39:20 +0100 | [diff] [blame] | 686 | } |
| 687 | set_current_state(TASK_UNINTERRUPTIBLE); |
| 688 | add_wait_queue(wq, &wait); |
| 689 | spin_unlock(lock); |
| 690 | schedule(); |
| 691 | remove_wait_queue(wq, &wait); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | goto retry; |
| 693 | } |
| 694 | |
| 695 | /** |
| 696 | * nand_wait - [DEFAULT] wait until the command is done |
| 697 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 698 | * @chip: NAND chip structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 699 | * |
| 700 | * Wait for command done. This applies to erase and program only |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 701 | * Erase can take up to 400ms and program up to 20ms according to |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 702 | * general NAND and SmartMedia specs |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 703 | */ |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 704 | static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 705 | { |
| 706 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 707 | unsigned long timeo = jiffies; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 708 | int status, state = chip->state; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 709 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | if (state == FL_ERASING) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 711 | timeo += (HZ * 400) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 712 | else |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 713 | timeo += (HZ * 20) / 1000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 714 | |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 715 | led_trigger_event(nand_led_trigger, LED_FULL); |
| 716 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 717 | /* Apply this short delay always to ensure that we do wait tWB in |
| 718 | * any case on any machine. */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 719 | ndelay(100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 720 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 721 | if ((state == FL_ERASING) && (chip->options & NAND_IS_AND)) |
| 722 | chip->cmdfunc(mtd, NAND_CMD_STATUS_MULTI, -1, -1); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 723 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 724 | chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 726 | while (time_before(jiffies, timeo)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 727 | if (chip->dev_ready) { |
| 728 | if (chip->dev_ready(mtd)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 729 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | } else { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 731 | if (chip->read_byte(mtd) & NAND_STATUS_READY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | break; |
| 733 | } |
Thomas Gleixner | 20a6c21 | 2005-03-01 09:32:48 +0000 | [diff] [blame] | 734 | cond_resched(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | } |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 736 | led_trigger_event(nand_led_trigger, LED_OFF); |
| 737 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 738 | status = (int)chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 739 | return status; |
| 740 | } |
| 741 | |
| 742 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 743 | * nand_read_page_raw - [Intern] read raw page data without ecc |
| 744 | * @mtd: mtd info structure |
| 745 | * @chip: nand chip info structure |
| 746 | * @buf: buffer to store read data |
| 747 | */ |
| 748 | static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 749 | uint8_t *buf) |
| 750 | { |
| 751 | chip->read_buf(mtd, buf, mtd->writesize); |
| 752 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 753 | return 0; |
| 754 | } |
| 755 | |
| 756 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 757 | * nand_read_page_swecc - {REPLACABLE] software ecc based page read function |
| 758 | * @mtd: mtd info structure |
| 759 | * @chip: nand chip info structure |
| 760 | * @buf: buffer to store read data |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 761 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 762 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 763 | uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 764 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 765 | int i, eccsize = chip->ecc.size; |
| 766 | int eccbytes = chip->ecc.bytes; |
| 767 | int eccsteps = chip->ecc.steps; |
| 768 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 769 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 770 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 771 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 772 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 773 | nand_read_page_raw(mtd, chip, buf); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 774 | |
| 775 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 776 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 777 | |
| 778 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 779 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 780 | |
| 781 | eccsteps = chip->ecc.steps; |
| 782 | p = buf; |
| 783 | |
| 784 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 785 | int stat; |
| 786 | |
| 787 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 788 | if (stat == -1) |
| 789 | mtd->ecc_stats.failed++; |
| 790 | else |
| 791 | mtd->ecc_stats.corrected += stat; |
| 792 | } |
| 793 | return 0; |
Thomas Gleixner | 22c60f5 | 2005-04-04 19:56:32 +0100 | [diff] [blame] | 794 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 795 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | /** |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 797 | * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function |
| 798 | * @mtd: mtd info structure |
| 799 | * @chip: nand chip info structure |
| 800 | * @buf: buffer to store read data |
| 801 | * |
| 802 | * Not for syndrome calculating ecc controllers which need a special oob layout |
| 803 | */ |
| 804 | static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 805 | uint8_t *buf) |
| 806 | { |
| 807 | int i, eccsize = chip->ecc.size; |
| 808 | int eccbytes = chip->ecc.bytes; |
| 809 | int eccsteps = chip->ecc.steps; |
| 810 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 811 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 812 | uint8_t *ecc_code = chip->buffers.ecccode; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 813 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 814 | |
| 815 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 816 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 817 | chip->read_buf(mtd, p, eccsize); |
| 818 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 819 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 820 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 821 | |
| 822 | for (i = 0; i < chip->ecc.total; i++) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 823 | ecc_code[i] = chip->oob_poi[eccpos[i]]; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 824 | |
| 825 | eccsteps = chip->ecc.steps; |
| 826 | p = buf; |
| 827 | |
| 828 | for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 829 | int stat; |
| 830 | |
| 831 | stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); |
| 832 | if (stat == -1) |
| 833 | mtd->ecc_stats.failed++; |
| 834 | else |
| 835 | mtd->ecc_stats.corrected += stat; |
| 836 | } |
| 837 | return 0; |
| 838 | } |
| 839 | |
| 840 | /** |
| 841 | * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read |
| 842 | * @mtd: mtd info structure |
| 843 | * @chip: nand chip info structure |
| 844 | * @buf: buffer to store read data |
| 845 | * |
| 846 | * The hw generator calculates the error syndrome automatically. Therefor |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 847 | * we need a special oob layout and handling. |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 848 | */ |
| 849 | static int nand_read_page_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 850 | uint8_t *buf) |
| 851 | { |
| 852 | int i, eccsize = chip->ecc.size; |
| 853 | int eccbytes = chip->ecc.bytes; |
| 854 | int eccsteps = chip->ecc.steps; |
| 855 | uint8_t *p = buf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 856 | uint8_t *oob = chip->oob_poi; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 857 | |
| 858 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 859 | int stat; |
| 860 | |
| 861 | chip->ecc.hwctl(mtd, NAND_ECC_READ); |
| 862 | chip->read_buf(mtd, p, eccsize); |
| 863 | |
| 864 | if (chip->ecc.prepad) { |
| 865 | chip->read_buf(mtd, oob, chip->ecc.prepad); |
| 866 | oob += chip->ecc.prepad; |
| 867 | } |
| 868 | |
| 869 | chip->ecc.hwctl(mtd, NAND_ECC_READSYN); |
| 870 | chip->read_buf(mtd, oob, eccbytes); |
| 871 | stat = chip->ecc.correct(mtd, p, oob, NULL); |
| 872 | |
| 873 | if (stat == -1) |
| 874 | mtd->ecc_stats.failed++; |
| 875 | else |
| 876 | mtd->ecc_stats.corrected += stat; |
| 877 | |
| 878 | oob += eccbytes; |
| 879 | |
| 880 | if (chip->ecc.postpad) { |
| 881 | chip->read_buf(mtd, oob, chip->ecc.postpad); |
| 882 | oob += chip->ecc.postpad; |
| 883 | } |
| 884 | } |
| 885 | |
| 886 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 887 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 888 | if (i) |
| 889 | chip->read_buf(mtd, oob, i); |
| 890 | |
| 891 | return 0; |
| 892 | } |
| 893 | |
| 894 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 895 | * nand_transfer_oob - [Internal] Transfer oob to client buffer |
| 896 | * @chip: nand chip structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 897 | * @oob: oob destination address |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 898 | * @ops: oob ops structure |
| 899 | */ |
| 900 | static uint8_t *nand_transfer_oob(struct nand_chip *chip, uint8_t *oob, |
| 901 | struct mtd_oob_ops *ops) |
| 902 | { |
| 903 | size_t len = ops->ooblen; |
| 904 | |
| 905 | switch(ops->mode) { |
| 906 | |
| 907 | case MTD_OOB_PLACE: |
| 908 | case MTD_OOB_RAW: |
| 909 | memcpy(oob, chip->oob_poi + ops->ooboffs, len); |
| 910 | return oob + len; |
| 911 | |
| 912 | case MTD_OOB_AUTO: { |
| 913 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 914 | uint32_t boffs = 0, roffs = ops->ooboffs; |
| 915 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 916 | |
| 917 | for(; free->length && len; free++, len -= bytes) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 918 | /* Read request not from offset 0 ? */ |
| 919 | if (unlikely(roffs)) { |
| 920 | if (roffs >= free->length) { |
| 921 | roffs -= free->length; |
| 922 | continue; |
| 923 | } |
| 924 | boffs = free->offset + roffs; |
| 925 | bytes = min_t(size_t, len, |
| 926 | (free->length - roffs)); |
| 927 | roffs = 0; |
| 928 | } else { |
| 929 | bytes = min_t(size_t, len, free->length); |
| 930 | boffs = free->offset; |
| 931 | } |
| 932 | memcpy(oob, chip->oob_poi + boffs, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 933 | oob += bytes; |
| 934 | } |
| 935 | return oob; |
| 936 | } |
| 937 | default: |
| 938 | BUG(); |
| 939 | } |
| 940 | return NULL; |
| 941 | } |
| 942 | |
| 943 | /** |
| 944 | * nand_do_read_ops - [Internal] Read data with ECC |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 945 | * |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 946 | * @mtd: MTD device structure |
| 947 | * @from: offset to read from |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 948 | * @ops: oob ops structure |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 949 | * |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 950 | * Internal function. Called with chip held. |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 951 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 952 | static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, |
| 953 | struct mtd_oob_ops *ops) |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 954 | { |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 955 | int chipnr, page, realpage, col, bytes, aligned; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 956 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 957 | struct mtd_ecc_stats stats; |
| 958 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 959 | int sndcmd = 1; |
| 960 | int ret = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 961 | uint32_t readlen = ops->len; |
| 962 | uint8_t *bufpoi, *oob, *buf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 963 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 964 | stats = mtd->ecc_stats; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 965 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 966 | chipnr = (int)(from >> chip->chip_shift); |
| 967 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 968 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 969 | realpage = (int)(from >> chip->page_shift); |
| 970 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 971 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 972 | col = (int)(from & (mtd->writesize - 1)); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 973 | chip->oob_poi = chip->buffers.oobrbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 974 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 975 | buf = ops->datbuf; |
| 976 | oob = ops->oobbuf; |
| 977 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 978 | while(1) { |
| 979 | bytes = min(mtd->writesize - col, readlen); |
| 980 | aligned = (bytes == mtd->writesize); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 981 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 982 | /* Is the current page in the buffer ? */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 983 | if (realpage != chip->pagebuf || oob) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 984 | bufpoi = aligned ? buf : chip->buffers.databuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 985 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 986 | if (likely(sndcmd)) { |
| 987 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); |
| 988 | sndcmd = 0; |
| 989 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 990 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 991 | /* Now read the page into the buffer */ |
| 992 | ret = chip->ecc.read_page(mtd, chip, bufpoi); |
| 993 | if (ret < 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 994 | break; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 995 | |
| 996 | /* Transfer not aligned data */ |
| 997 | if (!aligned) { |
| 998 | chip->pagebuf = realpage; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 999 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1000 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1001 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1002 | buf += bytes; |
| 1003 | |
| 1004 | if (unlikely(oob)) { |
| 1005 | /* Raw mode does data:oob:data:oob */ |
| 1006 | if (ops->mode != MTD_OOB_RAW) |
| 1007 | oob = nand_transfer_oob(chip, oob, ops); |
| 1008 | else |
| 1009 | buf = nand_transfer_oob(chip, buf, ops); |
| 1010 | } |
| 1011 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1012 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1013 | /* |
| 1014 | * Apply delay or wait for ready/busy pin. Do |
| 1015 | * this before the AUTOINCR check, so no |
| 1016 | * problems arise if a chip which does auto |
| 1017 | * increment is marked as NOAUTOINCR by the |
| 1018 | * board driver. |
| 1019 | */ |
| 1020 | if (!chip->dev_ready) |
| 1021 | udelay(chip->chip_delay); |
| 1022 | else |
| 1023 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1024 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1025 | } else { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1026 | memcpy(buf, chip->buffers.databuf + col, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1027 | buf += bytes; |
| 1028 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1029 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1030 | readlen -= bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1031 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1032 | if (!readlen) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1033 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | |
| 1035 | /* For subsequent reads align to page boundary. */ |
| 1036 | col = 0; |
| 1037 | /* Increment page address */ |
| 1038 | realpage++; |
| 1039 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1040 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1041 | /* Check, if we cross a chip boundary */ |
| 1042 | if (!page) { |
| 1043 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1044 | chip->select_chip(mtd, -1); |
| 1045 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1046 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1047 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1048 | /* Check, if the chip supports auto page increment |
| 1049 | * or if we have hit a block boundary. |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1050 | */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1051 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1052 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1053 | } |
| 1054 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1055 | ops->retlen = ops->len - (size_t) readlen; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1056 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1057 | if (ret) |
| 1058 | return ret; |
| 1059 | |
Thomas Gleixner | 9a1fcdf | 2006-05-29 14:56:39 +0200 | [diff] [blame] | 1060 | if (mtd->ecc_stats.failed - stats.failed) |
| 1061 | return -EBADMSG; |
| 1062 | |
| 1063 | return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1064 | } |
| 1065 | |
| 1066 | /** |
| 1067 | * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc |
| 1068 | * @mtd: MTD device structure |
| 1069 | * @from: offset to read from |
| 1070 | * @len: number of bytes to read |
| 1071 | * @retlen: pointer to variable to store the number of read bytes |
| 1072 | * @buf: the databuffer to put data |
| 1073 | * |
| 1074 | * Get hold of the chip and call nand_do_read |
| 1075 | */ |
| 1076 | static int nand_read(struct mtd_info *mtd, loff_t from, size_t len, |
| 1077 | size_t *retlen, uint8_t *buf) |
| 1078 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1079 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1080 | int ret; |
| 1081 | |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1082 | /* Do not allow reads past end of device */ |
| 1083 | if ((from + len) > mtd->size) |
| 1084 | return -EINVAL; |
| 1085 | if (!len) |
| 1086 | return 0; |
| 1087 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1088 | nand_get_device(chip, mtd, FL_READING); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1089 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1090 | chip->ops.len = len; |
| 1091 | chip->ops.datbuf = buf; |
| 1092 | chip->ops.oobbuf = NULL; |
| 1093 | |
| 1094 | ret = nand_do_read_ops(mtd, from, &chip->ops); |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1095 | |
| 1096 | nand_release_device(mtd); |
| 1097 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1098 | *retlen = chip->ops.retlen; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 1099 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1100 | } |
| 1101 | |
| 1102 | /** |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1103 | * nand_read_oob_std - [REPLACABLE] the most common OOB data read function |
| 1104 | * @mtd: mtd info structure |
| 1105 | * @chip: nand chip info structure |
| 1106 | * @page: page number to read |
| 1107 | * @sndcmd: flag whether to issue read command or not |
| 1108 | */ |
| 1109 | static int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1110 | int page, int sndcmd) |
| 1111 | { |
| 1112 | if (sndcmd) { |
| 1113 | chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); |
| 1114 | sndcmd = 0; |
| 1115 | } |
| 1116 | chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1117 | return sndcmd; |
| 1118 | } |
| 1119 | |
| 1120 | /** |
| 1121 | * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC |
| 1122 | * with syndromes |
| 1123 | * @mtd: mtd info structure |
| 1124 | * @chip: nand chip info structure |
| 1125 | * @page: page number to read |
| 1126 | * @sndcmd: flag whether to issue read command or not |
| 1127 | */ |
| 1128 | static int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip, |
| 1129 | int page, int sndcmd) |
| 1130 | { |
| 1131 | uint8_t *buf = chip->oob_poi; |
| 1132 | int length = mtd->oobsize; |
| 1133 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1134 | int eccsize = chip->ecc.size; |
| 1135 | uint8_t *bufpoi = buf; |
| 1136 | int i, toread, sndrnd = 0, pos; |
| 1137 | |
| 1138 | chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); |
| 1139 | for (i = 0; i < chip->ecc.steps; i++) { |
| 1140 | if (sndrnd) { |
| 1141 | pos = eccsize + i * (eccsize + chunk); |
| 1142 | if (mtd->writesize > 512) |
| 1143 | chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); |
| 1144 | else |
| 1145 | chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); |
| 1146 | } else |
| 1147 | sndrnd = 1; |
| 1148 | toread = min_t(int, length, chunk); |
| 1149 | chip->read_buf(mtd, bufpoi, toread); |
| 1150 | bufpoi += toread; |
| 1151 | length -= toread; |
| 1152 | } |
| 1153 | if (length > 0) |
| 1154 | chip->read_buf(mtd, bufpoi, length); |
| 1155 | |
| 1156 | return 1; |
| 1157 | } |
| 1158 | |
| 1159 | /** |
| 1160 | * nand_write_oob_std - [REPLACABLE] the most common OOB data write function |
| 1161 | * @mtd: mtd info structure |
| 1162 | * @chip: nand chip info structure |
| 1163 | * @page: page number to write |
| 1164 | */ |
| 1165 | static int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, |
| 1166 | int page) |
| 1167 | { |
| 1168 | int status = 0; |
| 1169 | const uint8_t *buf = chip->oob_poi; |
| 1170 | int length = mtd->oobsize; |
| 1171 | |
| 1172 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); |
| 1173 | chip->write_buf(mtd, buf, length); |
| 1174 | /* Send command to program the OOB data */ |
| 1175 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1176 | |
| 1177 | status = chip->waitfunc(mtd, chip); |
| 1178 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1179 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1180 | } |
| 1181 | |
| 1182 | /** |
| 1183 | * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC |
| 1184 | * with syndrome - only for large page flash ! |
| 1185 | * @mtd: mtd info structure |
| 1186 | * @chip: nand chip info structure |
| 1187 | * @page: page number to write |
| 1188 | */ |
| 1189 | static int nand_write_oob_syndrome(struct mtd_info *mtd, |
| 1190 | struct nand_chip *chip, int page) |
| 1191 | { |
| 1192 | int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; |
| 1193 | int eccsize = chip->ecc.size, length = mtd->oobsize; |
| 1194 | int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; |
| 1195 | const uint8_t *bufpoi = chip->oob_poi; |
| 1196 | |
| 1197 | /* |
| 1198 | * data-ecc-data-ecc ... ecc-oob |
| 1199 | * or |
| 1200 | * data-pad-ecc-pad-data-pad .... ecc-pad-oob |
| 1201 | */ |
| 1202 | if (!chip->ecc.prepad && !chip->ecc.postpad) { |
| 1203 | pos = steps * (eccsize + chunk); |
| 1204 | steps = 0; |
| 1205 | } else |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1206 | pos = eccsize; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1207 | |
| 1208 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); |
| 1209 | for (i = 0; i < steps; i++) { |
| 1210 | if (sndcmd) { |
| 1211 | if (mtd->writesize <= 512) { |
| 1212 | uint32_t fill = 0xFFFFFFFF; |
| 1213 | |
| 1214 | len = eccsize; |
| 1215 | while (len > 0) { |
| 1216 | int num = min_t(int, len, 4); |
| 1217 | chip->write_buf(mtd, (uint8_t *)&fill, |
| 1218 | num); |
| 1219 | len -= num; |
| 1220 | } |
| 1221 | } else { |
| 1222 | pos = eccsize + i * (eccsize + chunk); |
| 1223 | chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); |
| 1224 | } |
| 1225 | } else |
| 1226 | sndcmd = 1; |
| 1227 | len = min_t(int, length, chunk); |
| 1228 | chip->write_buf(mtd, bufpoi, len); |
| 1229 | bufpoi += len; |
| 1230 | length -= len; |
| 1231 | } |
| 1232 | if (length > 0) |
| 1233 | chip->write_buf(mtd, bufpoi, length); |
| 1234 | |
| 1235 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
| 1236 | status = chip->waitfunc(mtd, chip); |
| 1237 | |
| 1238 | return status & NAND_STATUS_FAIL ? -EIO : 0; |
| 1239 | } |
| 1240 | |
| 1241 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1242 | * nand_do_read_oob - [Intern] NAND read out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | * @mtd: MTD device structure |
| 1244 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1245 | * @ops: oob operations description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1246 | * |
| 1247 | * NAND read out-of-band data from the spare area |
| 1248 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1249 | static int nand_do_read_oob(struct mtd_info *mtd, loff_t from, |
| 1250 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1251 | { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1252 | int page, realpage, chipnr, sndcmd = 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1253 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1254 | int blkcheck = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1255 | int readlen = ops->len; |
| 1256 | uint8_t *buf = ops->oobbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | |
Andrew Morton | 7e9a0bb | 2006-05-30 09:06:41 +0100 | [diff] [blame] | 1258 | DEBUG(MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08Lx, len = %i\n", |
| 1259 | (unsigned long long)from, readlen); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1260 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1261 | chipnr = (int)(from >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1262 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1263 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1264 | /* Shift to get page */ |
| 1265 | realpage = (int)(from >> chip->page_shift); |
| 1266 | page = realpage & chip->pagemask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1267 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1268 | chip->oob_poi = chip->buffers.oobrbuf; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1269 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1270 | while(1) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1271 | sndcmd = chip->ecc.read_oob(mtd, chip, page, sndcmd); |
| 1272 | buf = nand_transfer_oob(chip, buf, ops); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1273 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1274 | if (!(chip->options & NAND_NO_READRDY)) { |
| 1275 | /* |
| 1276 | * Apply delay or wait for ready/busy pin. Do this |
| 1277 | * before the AUTOINCR check, so no problems arise if a |
| 1278 | * chip which does auto increment is marked as |
| 1279 | * NOAUTOINCR by the board driver. |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1280 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1281 | if (!chip->dev_ready) |
| 1282 | udelay(chip->chip_delay); |
Thomas Gleixner | 19870da | 2005-07-15 14:53:51 +0100 | [diff] [blame] | 1283 | else |
| 1284 | nand_wait_ready(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1285 | } |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1286 | |
Savin Zlobec | 0d420f9 | 2006-06-21 11:51:20 +0200 | [diff] [blame] | 1287 | readlen -= ops->ooblen; |
| 1288 | if (!readlen) |
| 1289 | break; |
| 1290 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1291 | /* Increment page address */ |
| 1292 | realpage++; |
| 1293 | |
| 1294 | page = realpage & chip->pagemask; |
| 1295 | /* Check, if we cross a chip boundary */ |
| 1296 | if (!page) { |
| 1297 | chipnr++; |
| 1298 | chip->select_chip(mtd, -1); |
| 1299 | chip->select_chip(mtd, chipnr); |
| 1300 | } |
| 1301 | |
| 1302 | /* Check, if the chip supports auto page increment |
| 1303 | * or if we have hit a block boundary. |
| 1304 | */ |
| 1305 | if (!NAND_CANAUTOINCR(chip) || !(page & blkcheck)) |
| 1306 | sndcmd = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1307 | } |
| 1308 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1309 | ops->retlen = ops->len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1310 | return 0; |
| 1311 | } |
| 1312 | |
| 1313 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1314 | * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1315 | * @mtd: MTD device structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1316 | * @from: offset to read from |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1317 | * @ops: oob operation description structure |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1318 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1319 | * NAND read data and/or out-of-band data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1320 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1321 | static int nand_read_oob(struct mtd_info *mtd, loff_t from, |
| 1322 | struct mtd_oob_ops *ops) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1323 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1324 | int (*read_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 1325 | uint8_t *buf) = NULL; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1326 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1327 | int ret = -ENOTSUPP; |
| 1328 | |
| 1329 | ops->retlen = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1330 | |
| 1331 | /* Do not allow reads past end of device */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1332 | if ((from + ops->len) > mtd->size) { |
| 1333 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1334 | "Attempt read beyond end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1335 | return -EINVAL; |
| 1336 | } |
| 1337 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1338 | nand_get_device(chip, mtd, FL_READING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1339 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1340 | switch(ops->mode) { |
| 1341 | case MTD_OOB_PLACE: |
| 1342 | case MTD_OOB_AUTO: |
| 1343 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1344 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1345 | case MTD_OOB_RAW: |
| 1346 | /* Replace the read_page algorithm temporary */ |
| 1347 | read_page = chip->ecc.read_page; |
| 1348 | chip->ecc.read_page = nand_read_page_raw; |
| 1349 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1350 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1351 | default: |
| 1352 | goto out; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1353 | } |
| 1354 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1355 | if (!ops->datbuf) |
| 1356 | ret = nand_do_read_oob(mtd, from, ops); |
| 1357 | else |
| 1358 | ret = nand_do_read_ops(mtd, from, ops); |
| 1359 | |
| 1360 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
| 1361 | chip->ecc.read_page = read_page; |
| 1362 | out: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1363 | nand_release_device(mtd); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1364 | return ret; |
| 1365 | } |
| 1366 | |
| 1367 | |
| 1368 | /** |
| 1369 | * nand_write_page_raw - [Intern] raw page write function |
| 1370 | * @mtd: mtd info structure |
| 1371 | * @chip: nand chip info structure |
| 1372 | * @buf: data buffer |
| 1373 | */ |
| 1374 | static void nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, |
| 1375 | const uint8_t *buf) |
| 1376 | { |
| 1377 | chip->write_buf(mtd, buf, mtd->writesize); |
| 1378 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1379 | } |
| 1380 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1381 | /** |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1382 | * nand_write_page_swecc - {REPLACABLE] software ecc based page write function |
| 1383 | * @mtd: mtd info structure |
| 1384 | * @chip: nand chip info structure |
| 1385 | * @buf: data buffer |
| 1386 | */ |
| 1387 | static void nand_write_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1388 | const uint8_t *buf) |
| 1389 | { |
| 1390 | int i, eccsize = chip->ecc.size; |
| 1391 | int eccbytes = chip->ecc.bytes; |
| 1392 | int eccsteps = chip->ecc.steps; |
| 1393 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1394 | const uint8_t *p = buf; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 1395 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1396 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1397 | /* Software ecc calculation */ |
| 1398 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) |
| 1399 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1400 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1401 | for (i = 0; i < chip->ecc.total; i++) |
| 1402 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1403 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1404 | nand_write_page_raw(mtd, chip, buf); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1405 | } |
| 1406 | |
| 1407 | /** |
| 1408 | * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function |
| 1409 | * @mtd: mtd info structure |
| 1410 | * @chip: nand chip info structure |
| 1411 | * @buf: data buffer |
| 1412 | */ |
| 1413 | static void nand_write_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, |
| 1414 | const uint8_t *buf) |
| 1415 | { |
| 1416 | int i, eccsize = chip->ecc.size; |
| 1417 | int eccbytes = chip->ecc.bytes; |
| 1418 | int eccsteps = chip->ecc.steps; |
| 1419 | uint8_t *ecc_calc = chip->buffers.ecccalc; |
| 1420 | const uint8_t *p = buf; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 1421 | int *eccpos = chip->ecc.layout->eccpos; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1422 | |
| 1423 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1424 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
David Woodhouse | 29da9ce | 2006-05-26 23:05:44 +0100 | [diff] [blame] | 1425 | chip->write_buf(mtd, p, eccsize); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1426 | chip->ecc.calculate(mtd, p, &ecc_calc[i]); |
| 1427 | } |
| 1428 | |
| 1429 | for (i = 0; i < chip->ecc.total; i++) |
| 1430 | chip->oob_poi[eccpos[i]] = ecc_calc[i]; |
| 1431 | |
| 1432 | chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); |
| 1433 | } |
| 1434 | |
| 1435 | /** |
| 1436 | * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write |
| 1437 | * @mtd: mtd info structure |
| 1438 | * @chip: nand chip info structure |
| 1439 | * @buf: data buffer |
| 1440 | * |
| 1441 | * The hw generator calculates the error syndrome automatically. Therefor |
| 1442 | * we need a special oob layout and handling. |
| 1443 | */ |
| 1444 | static void nand_write_page_syndrome(struct mtd_info *mtd, |
| 1445 | struct nand_chip *chip, const uint8_t *buf) |
| 1446 | { |
| 1447 | int i, eccsize = chip->ecc.size; |
| 1448 | int eccbytes = chip->ecc.bytes; |
| 1449 | int eccsteps = chip->ecc.steps; |
| 1450 | const uint8_t *p = buf; |
| 1451 | uint8_t *oob = chip->oob_poi; |
| 1452 | |
| 1453 | for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { |
| 1454 | |
| 1455 | chip->ecc.hwctl(mtd, NAND_ECC_WRITE); |
| 1456 | chip->write_buf(mtd, p, eccsize); |
| 1457 | |
| 1458 | if (chip->ecc.prepad) { |
| 1459 | chip->write_buf(mtd, oob, chip->ecc.prepad); |
| 1460 | oob += chip->ecc.prepad; |
| 1461 | } |
| 1462 | |
| 1463 | chip->ecc.calculate(mtd, p, oob); |
| 1464 | chip->write_buf(mtd, oob, eccbytes); |
| 1465 | oob += eccbytes; |
| 1466 | |
| 1467 | if (chip->ecc.postpad) { |
| 1468 | chip->write_buf(mtd, oob, chip->ecc.postpad); |
| 1469 | oob += chip->ecc.postpad; |
| 1470 | } |
| 1471 | } |
| 1472 | |
| 1473 | /* Calculate remaining oob bytes */ |
Vitaly Wool | 7e4178f | 2006-06-07 09:34:37 +0400 | [diff] [blame] | 1474 | i = mtd->oobsize - (oob - chip->oob_poi); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1475 | if (i) |
| 1476 | chip->write_buf(mtd, oob, i); |
| 1477 | } |
| 1478 | |
| 1479 | /** |
| 1480 | * nand_write_page - [INTERNAL] write one page |
| 1481 | * @mtd: MTD device structure |
| 1482 | * @chip: NAND chip descriptor |
| 1483 | * @buf: the data to write |
| 1484 | * @page: page number to write |
| 1485 | * @cached: cached programming |
| 1486 | */ |
| 1487 | static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip, |
| 1488 | const uint8_t *buf, int page, int cached) |
| 1489 | { |
| 1490 | int status; |
| 1491 | |
| 1492 | chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); |
| 1493 | |
| 1494 | chip->ecc.write_page(mtd, chip, buf); |
| 1495 | |
| 1496 | /* |
| 1497 | * Cached progamming disabled for now, Not sure if its worth the |
| 1498 | * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s) |
| 1499 | */ |
| 1500 | cached = 0; |
| 1501 | |
| 1502 | if (!cached || !(chip->options & NAND_CACHEPRG)) { |
| 1503 | |
| 1504 | chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1505 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1506 | /* |
| 1507 | * See if operation failed and additional status checks are |
| 1508 | * available |
| 1509 | */ |
| 1510 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1511 | status = chip->errstat(mtd, chip, FL_WRITING, status, |
| 1512 | page); |
| 1513 | |
| 1514 | if (status & NAND_STATUS_FAIL) |
| 1515 | return -EIO; |
| 1516 | } else { |
| 1517 | chip->cmdfunc(mtd, NAND_CMD_CACHEDPROG, -1, -1); |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1518 | status = chip->waitfunc(mtd, chip); |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1519 | } |
| 1520 | |
| 1521 | #ifdef CONFIG_MTD_NAND_VERIFY_WRITE |
| 1522 | /* Send command to read back the data */ |
| 1523 | chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); |
| 1524 | |
| 1525 | if (chip->verify_buf(mtd, buf, mtd->writesize)) |
| 1526 | return -EIO; |
| 1527 | #endif |
| 1528 | return 0; |
| 1529 | } |
| 1530 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1531 | /** |
| 1532 | * nand_fill_oob - [Internal] Transfer client buffer to oob |
| 1533 | * @chip: nand chip structure |
| 1534 | * @oob: oob data buffer |
| 1535 | * @ops: oob ops structure |
| 1536 | */ |
| 1537 | static uint8_t *nand_fill_oob(struct nand_chip *chip, uint8_t *oob, |
| 1538 | struct mtd_oob_ops *ops) |
| 1539 | { |
| 1540 | size_t len = ops->ooblen; |
| 1541 | |
| 1542 | switch(ops->mode) { |
| 1543 | |
| 1544 | case MTD_OOB_PLACE: |
| 1545 | case MTD_OOB_RAW: |
| 1546 | memcpy(chip->oob_poi + ops->ooboffs, oob, len); |
| 1547 | return oob + len; |
| 1548 | |
| 1549 | case MTD_OOB_AUTO: { |
| 1550 | struct nand_oobfree *free = chip->ecc.layout->oobfree; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1551 | uint32_t boffs = 0, woffs = ops->ooboffs; |
| 1552 | size_t bytes = 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1553 | |
| 1554 | for(; free->length && len; free++, len -= bytes) { |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1555 | /* Write request not from offset 0 ? */ |
| 1556 | if (unlikely(woffs)) { |
| 1557 | if (woffs >= free->length) { |
| 1558 | woffs -= free->length; |
| 1559 | continue; |
| 1560 | } |
| 1561 | boffs = free->offset + woffs; |
| 1562 | bytes = min_t(size_t, len, |
| 1563 | (free->length - woffs)); |
| 1564 | woffs = 0; |
| 1565 | } else { |
| 1566 | bytes = min_t(size_t, len, free->length); |
| 1567 | boffs = free->offset; |
| 1568 | } |
Vitaly Wool | 8b0036e | 2006-07-11 09:11:25 +0200 | [diff] [blame] | 1569 | memcpy(chip->oob_poi + boffs, oob, bytes); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1570 | oob += bytes; |
| 1571 | } |
| 1572 | return oob; |
| 1573 | } |
| 1574 | default: |
| 1575 | BUG(); |
| 1576 | } |
| 1577 | return NULL; |
| 1578 | } |
| 1579 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1580 | #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0 |
| 1581 | |
| 1582 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1583 | * nand_do_write_ops - [Internal] NAND write with ECC |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1584 | * @mtd: MTD device structure |
| 1585 | * @to: offset to write to |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1586 | * @ops: oob operations description structure |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1587 | * |
| 1588 | * NAND write with ECC |
| 1589 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1590 | static int nand_do_write_ops(struct mtd_info *mtd, loff_t to, |
| 1591 | struct mtd_oob_ops *ops) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1592 | { |
| 1593 | int chipnr, realpage, page, blockmask; |
| 1594 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1595 | uint32_t writelen = ops->len; |
| 1596 | uint8_t *oob = ops->oobbuf; |
| 1597 | uint8_t *buf = ops->datbuf; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1598 | int bytes = mtd->writesize; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1599 | int ret; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1600 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1601 | ops->retlen = 0; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1602 | |
| 1603 | /* reject writes, which are not page aligned */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1604 | if (NOTALIGNED(to) || NOTALIGNED(ops->len)) { |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1605 | printk(KERN_NOTICE "nand_write: " |
| 1606 | "Attempt to write not page aligned data\n"); |
| 1607 | return -EINVAL; |
| 1608 | } |
| 1609 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1610 | if (!writelen) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1611 | return 0; |
| 1612 | |
Thomas Gleixner | 6a93096 | 2006-06-28 00:11:45 +0200 | [diff] [blame] | 1613 | chipnr = (int)(to >> chip->chip_shift); |
| 1614 | chip->select_chip(mtd, chipnr); |
| 1615 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1616 | /* Check, if it is write protected */ |
| 1617 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1618 | return -EIO; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1619 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1620 | realpage = (int)(to >> chip->page_shift); |
| 1621 | page = realpage & chip->pagemask; |
| 1622 | blockmask = (1 << (chip->phys_erase_shift - chip->page_shift)) - 1; |
| 1623 | |
| 1624 | /* Invalidate the page cache, when we write to the cached page */ |
| 1625 | if (to <= (chip->pagebuf << chip->page_shift) && |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1626 | (chip->pagebuf << chip->page_shift) < (to + ops->len)) |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1627 | chip->pagebuf = -1; |
| 1628 | |
| 1629 | chip->oob_poi = chip->buffers.oobwbuf; |
| 1630 | |
| 1631 | while(1) { |
| 1632 | int cached = writelen > bytes && page != blockmask; |
| 1633 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1634 | if (unlikely(oob)) |
| 1635 | oob = nand_fill_oob(chip, oob, ops); |
| 1636 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1637 | ret = nand_write_page(mtd, chip, buf, page, cached); |
| 1638 | if (ret) |
| 1639 | break; |
| 1640 | |
| 1641 | writelen -= bytes; |
| 1642 | if (!writelen) |
| 1643 | break; |
| 1644 | |
| 1645 | buf += bytes; |
| 1646 | realpage++; |
| 1647 | |
| 1648 | page = realpage & chip->pagemask; |
| 1649 | /* Check, if we cross a chip boundary */ |
| 1650 | if (!page) { |
| 1651 | chipnr++; |
| 1652 | chip->select_chip(mtd, -1); |
| 1653 | chip->select_chip(mtd, chipnr); |
| 1654 | } |
| 1655 | } |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1656 | |
| 1657 | if (unlikely(oob)) |
| 1658 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 1659 | |
| 1660 | ops->retlen = ops->len - writelen; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 1661 | return ret; |
| 1662 | } |
| 1663 | |
| 1664 | /** |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1665 | * nand_write - [MTD Interface] NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1666 | * @mtd: MTD device structure |
| 1667 | * @to: offset to write to |
| 1668 | * @len: number of bytes to write |
| 1669 | * @retlen: pointer to variable to store the number of written bytes |
| 1670 | * @buf: the data to write |
| 1671 | * |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1672 | * NAND write with ECC |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1673 | */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1674 | static int nand_write(struct mtd_info *mtd, loff_t to, size_t len, |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1675 | size_t *retlen, const uint8_t *buf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1676 | { |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1677 | struct nand_chip *chip = mtd->priv; |
| 1678 | int ret; |
| 1679 | |
| 1680 | /* Do not allow reads past end of device */ |
| 1681 | if ((to + len) > mtd->size) |
| 1682 | return -EINVAL; |
| 1683 | if (!len) |
| 1684 | return 0; |
| 1685 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1686 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1687 | |
| 1688 | chip->ops.len = len; |
| 1689 | chip->ops.datbuf = (uint8_t *)buf; |
| 1690 | chip->ops.oobbuf = NULL; |
| 1691 | |
| 1692 | ret = nand_do_write_ops(mtd, to, &chip->ops); |
| 1693 | |
| 1694 | nand_release_device(mtd); |
| 1695 | |
| 1696 | *retlen = chip->ops.retlen; |
| 1697 | return ret; |
| 1698 | } |
| 1699 | |
| 1700 | /** |
| 1701 | * nand_do_write_oob - [MTD Interface] NAND write out-of-band |
| 1702 | * @mtd: MTD device structure |
| 1703 | * @to: offset to write to |
| 1704 | * @ops: oob operation description structure |
| 1705 | * |
| 1706 | * NAND write out-of-band |
| 1707 | */ |
| 1708 | static int nand_do_write_oob(struct mtd_info *mtd, loff_t to, |
| 1709 | struct mtd_oob_ops *ops) |
| 1710 | { |
| 1711 | int chipnr, page, status; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1712 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1713 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1714 | DEBUG(MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1715 | (unsigned int)to, (int)ops->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1716 | |
| 1717 | /* Do not allow write past end of page */ |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1718 | if ((ops->ooboffs + ops->len) > mtd->oobsize) { |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1719 | DEBUG(MTD_DEBUG_LEVEL0, "nand_write_oob: " |
| 1720 | "Attempt to write past end of page\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1721 | return -EINVAL; |
| 1722 | } |
| 1723 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1724 | chipnr = (int)(to >> chip->chip_shift); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1725 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1726 | |
Thomas Gleixner | 7314e9e | 2006-05-25 09:51:54 +0200 | [diff] [blame] | 1727 | /* Shift to get page */ |
| 1728 | page = (int)(to >> chip->page_shift); |
| 1729 | |
| 1730 | /* |
| 1731 | * Reset the chip. Some chips (like the Toshiba TC5832DC found in one |
| 1732 | * of my DiskOnChip 2000 test units) will clear the whole data page too |
| 1733 | * if we don't do this. I have no clue why, but I seem to have 'fixed' |
| 1734 | * it in the doc2000 driver in August 1999. dwmw2. |
| 1735 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1736 | chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1737 | |
| 1738 | /* Check, if it is write protected */ |
| 1739 | if (nand_check_wp(mtd)) |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1740 | return -EROFS; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1741 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1742 | /* Invalidate the page cache, if we write to the cached page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1743 | if (page == chip->pagebuf) |
| 1744 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1745 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1746 | chip->oob_poi = chip->buffers.oobwbuf; |
| 1747 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
| 1748 | nand_fill_oob(chip, ops->oobbuf, ops); |
| 1749 | status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); |
| 1750 | memset(chip->oob_poi, 0xff, mtd->oobsize); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1751 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1752 | if (status) |
| 1753 | return status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1754 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1755 | ops->retlen = ops->len; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1756 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1757 | return 0; |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1758 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1759 | |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1760 | /** |
| 1761 | * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band |
| 1762 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 1763 | * @to: offset to write to |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1764 | * @ops: oob operation description structure |
| 1765 | */ |
| 1766 | static int nand_write_oob(struct mtd_info *mtd, loff_t to, |
| 1767 | struct mtd_oob_ops *ops) |
| 1768 | { |
| 1769 | void (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, |
| 1770 | const uint8_t *buf) = NULL; |
| 1771 | struct nand_chip *chip = mtd->priv; |
| 1772 | int ret = -ENOTSUPP; |
| 1773 | |
| 1774 | ops->retlen = 0; |
| 1775 | |
| 1776 | /* Do not allow writes past end of device */ |
| 1777 | if ((to + ops->len) > mtd->size) { |
| 1778 | DEBUG(MTD_DEBUG_LEVEL0, "nand_read_oob: " |
| 1779 | "Attempt read beyond end of device\n"); |
| 1780 | return -EINVAL; |
| 1781 | } |
| 1782 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1783 | nand_get_device(chip, mtd, FL_WRITING); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 1784 | |
| 1785 | switch(ops->mode) { |
| 1786 | case MTD_OOB_PLACE: |
| 1787 | case MTD_OOB_AUTO: |
| 1788 | break; |
| 1789 | |
| 1790 | case MTD_OOB_RAW: |
| 1791 | /* Replace the write_page algorithm temporary */ |
| 1792 | write_page = chip->ecc.write_page; |
| 1793 | chip->ecc.write_page = nand_write_page_raw; |
| 1794 | break; |
| 1795 | |
| 1796 | default: |
| 1797 | goto out; |
| 1798 | } |
| 1799 | |
| 1800 | if (!ops->datbuf) |
| 1801 | ret = nand_do_write_oob(mtd, to, ops); |
| 1802 | else |
| 1803 | ret = nand_do_write_ops(mtd, to, ops); |
| 1804 | |
| 1805 | if (unlikely(ops->mode == MTD_OOB_RAW)) |
| 1806 | chip->ecc.write_page = write_page; |
| 1807 | out: |
| 1808 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1809 | return ret; |
| 1810 | } |
| 1811 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1812 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1813 | * single_erease_cmd - [GENERIC] NAND standard block erase command function |
| 1814 | * @mtd: MTD device structure |
| 1815 | * @page: the page address of the block which will be erased |
| 1816 | * |
| 1817 | * Standard erase command for NAND chips |
| 1818 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1819 | static void single_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1820 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1821 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1822 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1823 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1824 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1825 | } |
| 1826 | |
| 1827 | /** |
| 1828 | * multi_erease_cmd - [GENERIC] AND specific block erase command function |
| 1829 | * @mtd: MTD device structure |
| 1830 | * @page: the page address of the block which will be erased |
| 1831 | * |
| 1832 | * AND multi block erase command function |
| 1833 | * Erase 4 consecutive blocks |
| 1834 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1835 | static void multi_erase_cmd(struct mtd_info *mtd, int page) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1836 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1837 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1838 | /* Send commands to erase a block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1839 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1840 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1841 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page++); |
| 1842 | chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); |
| 1843 | chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1844 | } |
| 1845 | |
| 1846 | /** |
| 1847 | * nand_erase - [MTD Interface] erase block(s) |
| 1848 | * @mtd: MTD device structure |
| 1849 | * @instr: erase instruction |
| 1850 | * |
| 1851 | * Erase one ore more blocks |
| 1852 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1853 | static int nand_erase(struct mtd_info *mtd, struct erase_info *instr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1854 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1855 | return nand_erase_nand(mtd, instr, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1856 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1857 | |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1858 | #define BBT_PAGE_MASK 0xffffff3f |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1859 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1860 | * nand_erase_nand - [Internal] erase block(s) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1861 | * @mtd: MTD device structure |
| 1862 | * @instr: erase instruction |
| 1863 | * @allowbbt: allow erasing the bbt area |
| 1864 | * |
| 1865 | * Erase one ore more blocks |
| 1866 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1867 | int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, |
| 1868 | int allowbbt) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1869 | { |
| 1870 | int page, len, status, pages_per_block, ret, chipnr; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1871 | struct nand_chip *chip = mtd->priv; |
| 1872 | int rewrite_bbt[NAND_MAX_CHIPS]={0}; |
| 1873 | unsigned int bbt_masked_page = 0xffffffff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1874 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1875 | DEBUG(MTD_DEBUG_LEVEL3, "nand_erase: start = 0x%08x, len = %i\n", |
| 1876 | (unsigned int)instr->addr, (unsigned int)instr->len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1877 | |
| 1878 | /* Start address must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1879 | if (instr->addr & ((1 << chip->phys_erase_shift) - 1)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 1880 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1881 | return -EINVAL; |
| 1882 | } |
| 1883 | |
| 1884 | /* Length must align on block boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1885 | if (instr->len & ((1 << chip->phys_erase_shift) - 1)) { |
| 1886 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1887 | "Length not block aligned\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1888 | return -EINVAL; |
| 1889 | } |
| 1890 | |
| 1891 | /* Do not allow erase past end of device */ |
| 1892 | if ((instr->len + instr->addr) > mtd->size) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1893 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1894 | "Erase past end of device\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1895 | return -EINVAL; |
| 1896 | } |
| 1897 | |
| 1898 | instr->fail_addr = 0xffffffff; |
| 1899 | |
| 1900 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1901 | nand_get_device(chip, mtd, FL_ERASING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1902 | |
| 1903 | /* Shift to get first page */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1904 | page = (int)(instr->addr >> chip->page_shift); |
| 1905 | chipnr = (int)(instr->addr >> chip->chip_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1906 | |
| 1907 | /* Calculate pages in each block */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1908 | pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1909 | |
| 1910 | /* Select the NAND device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1911 | chip->select_chip(mtd, chipnr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1912 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1913 | /* Check, if it is write protected */ |
| 1914 | if (nand_check_wp(mtd)) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1915 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1916 | "Device is write protected!!!\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1917 | instr->state = MTD_ERASE_FAILED; |
| 1918 | goto erase_exit; |
| 1919 | } |
| 1920 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1921 | /* |
| 1922 | * If BBT requires refresh, set the BBT page mask to see if the BBT |
| 1923 | * should be rewritten. Otherwise the mask is set to 0xffffffff which |
| 1924 | * can not be matched. This is also done when the bbt is actually |
| 1925 | * erased to avoid recusrsive updates |
| 1926 | */ |
| 1927 | if (chip->options & BBT_AUTO_REFRESH && !allowbbt) |
| 1928 | bbt_masked_page = chip->bbt_td->pages[chipnr] & BBT_PAGE_MASK; |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1929 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1930 | /* Loop through the pages */ |
| 1931 | len = instr->len; |
| 1932 | |
| 1933 | instr->state = MTD_ERASING; |
| 1934 | |
| 1935 | while (len) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1936 | /* |
| 1937 | * heck if we have a bad block, we do not erase bad blocks ! |
| 1938 | */ |
| 1939 | if (nand_block_checkbad(mtd, ((loff_t) page) << |
| 1940 | chip->page_shift, 0, allowbbt)) { |
| 1941 | printk(KERN_WARNING "nand_erase: attempt to erase a " |
| 1942 | "bad block at page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1943 | instr->state = MTD_ERASE_FAILED; |
| 1944 | goto erase_exit; |
| 1945 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1946 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1947 | /* |
| 1948 | * Invalidate the page cache, if we erase the block which |
| 1949 | * contains the current cached page |
| 1950 | */ |
| 1951 | if (page <= chip->pagebuf && chip->pagebuf < |
| 1952 | (page + pages_per_block)) |
| 1953 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1954 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1955 | chip->erase_cmd(mtd, page & chip->pagemask); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1956 | |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 1957 | status = chip->waitfunc(mtd, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1958 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1959 | /* |
| 1960 | * See if operation failed and additional status checks are |
| 1961 | * available |
| 1962 | */ |
| 1963 | if ((status & NAND_STATUS_FAIL) && (chip->errstat)) |
| 1964 | status = chip->errstat(mtd, chip, FL_ERASING, |
| 1965 | status, page); |
David A. Marlin | 068e3c0 | 2005-01-24 03:07:46 +0000 | [diff] [blame] | 1966 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1967 | /* See if block erase succeeded */ |
David A. Marlin | a4ab4c5 | 2005-01-23 18:30:53 +0000 | [diff] [blame] | 1968 | if (status & NAND_STATUS_FAIL) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1969 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase: " |
| 1970 | "Failed erase, page 0x%08x\n", page); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1971 | instr->state = MTD_ERASE_FAILED; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1972 | instr->fail_addr = (page << chip->page_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1973 | goto erase_exit; |
| 1974 | } |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1975 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1976 | /* |
| 1977 | * If BBT requires refresh, set the BBT rewrite flag to the |
| 1978 | * page being erased |
| 1979 | */ |
| 1980 | if (bbt_masked_page != 0xffffffff && |
| 1981 | (page & BBT_PAGE_MASK) == bbt_masked_page) |
| 1982 | rewrite_bbt[chipnr] = (page << chip->page_shift); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 1983 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1984 | /* Increment page address and decrement length */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1985 | len -= (1 << chip->phys_erase_shift); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1986 | page += pages_per_block; |
| 1987 | |
| 1988 | /* Check, if we cross a chip boundary */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1989 | if (len && !(page & chip->pagemask)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1990 | chipnr++; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1991 | chip->select_chip(mtd, -1); |
| 1992 | chip->select_chip(mtd, chipnr); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 1993 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 1994 | /* |
| 1995 | * If BBT requires refresh and BBT-PERCHIP, set the BBT |
| 1996 | * page mask to see if this BBT should be rewritten |
| 1997 | */ |
| 1998 | if (bbt_masked_page != 0xffffffff && |
| 1999 | (chip->bbt_td->options & NAND_BBT_PERCHIP)) |
| 2000 | bbt_masked_page = chip->bbt_td->pages[chipnr] & |
| 2001 | BBT_PAGE_MASK; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2002 | } |
| 2003 | } |
| 2004 | instr->state = MTD_ERASE_DONE; |
| 2005 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2006 | erase_exit: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2007 | |
| 2008 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; |
| 2009 | /* Do call back function */ |
| 2010 | if (!ret) |
| 2011 | mtd_erase_callback(instr); |
| 2012 | |
| 2013 | /* Deselect and wake up anyone waiting on the device */ |
| 2014 | nand_release_device(mtd); |
| 2015 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2016 | /* |
| 2017 | * If BBT requires refresh and erase was successful, rewrite any |
| 2018 | * selected bad block tables |
| 2019 | */ |
| 2020 | if (bbt_masked_page == 0xffffffff || ret) |
| 2021 | return ret; |
| 2022 | |
| 2023 | for (chipnr = 0; chipnr < chip->numchips; chipnr++) { |
| 2024 | if (!rewrite_bbt[chipnr]) |
| 2025 | continue; |
| 2026 | /* update the BBT for chip */ |
| 2027 | DEBUG(MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt " |
| 2028 | "(%d:0x%0x 0x%0x)\n", chipnr, rewrite_bbt[chipnr], |
| 2029 | chip->bbt_td->pages[chipnr]); |
| 2030 | nand_update_bbt(mtd, rewrite_bbt[chipnr]); |
David A. Marlin | 30f464b | 2005-01-17 18:35:25 +0000 | [diff] [blame] | 2031 | } |
| 2032 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2033 | /* Return more or less happy */ |
| 2034 | return ret; |
| 2035 | } |
| 2036 | |
| 2037 | /** |
| 2038 | * nand_sync - [MTD Interface] sync |
| 2039 | * @mtd: MTD device structure |
| 2040 | * |
| 2041 | * Sync is actually a wait for chip ready function |
| 2042 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2043 | static void nand_sync(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2044 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2045 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2046 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2047 | DEBUG(MTD_DEBUG_LEVEL3, "nand_sync: called\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2048 | |
| 2049 | /* Grab the lock and see if the device is available */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2050 | nand_get_device(chip, mtd, FL_SYNCING); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2051 | /* Release it and go back */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2052 | nand_release_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2053 | } |
| 2054 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2055 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2056 | * nand_block_isbad - [MTD Interface] Check if block at offset is bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2057 | * @mtd: MTD device structure |
Randy Dunlap | 844d3b4 | 2006-06-28 21:48:27 -0700 | [diff] [blame] | 2058 | * @offs: offset relative to mtd start |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2059 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2060 | static int nand_block_isbad(struct mtd_info *mtd, loff_t offs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2061 | { |
| 2062 | /* Check for invalid offset */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2063 | if (offs > mtd->size) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2064 | return -EINVAL; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2065 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2066 | return nand_block_checkbad(mtd, offs, 1, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2067 | } |
| 2068 | |
| 2069 | /** |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2070 | * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2071 | * @mtd: MTD device structure |
| 2072 | * @ofs: offset relative to mtd start |
| 2073 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2074 | static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2075 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2076 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2077 | int ret; |
| 2078 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2079 | if ((ret = nand_block_isbad(mtd, ofs))) { |
| 2080 | /* If it was bad already, return success and do nothing. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2081 | if (ret > 0) |
| 2082 | return 0; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2083 | return ret; |
| 2084 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2085 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2086 | return chip->block_markbad(mtd, ofs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2087 | } |
| 2088 | |
| 2089 | /** |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2090 | * nand_suspend - [MTD Interface] Suspend the NAND flash |
| 2091 | * @mtd: MTD device structure |
| 2092 | */ |
| 2093 | static int nand_suspend(struct mtd_info *mtd) |
| 2094 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2095 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2096 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2097 | return nand_get_device(chip, mtd, FL_PM_SUSPENDED); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2098 | } |
| 2099 | |
| 2100 | /** |
| 2101 | * nand_resume - [MTD Interface] Resume the NAND flash |
| 2102 | * @mtd: MTD device structure |
| 2103 | */ |
| 2104 | static void nand_resume(struct mtd_info *mtd) |
| 2105 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2106 | struct nand_chip *chip = mtd->priv; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2107 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2108 | if (chip->state == FL_PM_SUSPENDED) |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2109 | nand_release_device(mtd); |
| 2110 | else |
Thomas Gleixner | 2c0a2be | 2006-05-23 11:50:56 +0200 | [diff] [blame] | 2111 | printk(KERN_ERR "nand_resume() called for a chip which is not " |
| 2112 | "in suspended state\n"); |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2113 | } |
| 2114 | |
Thomas Gleixner | a36ed29 | 2006-05-23 11:37:03 +0200 | [diff] [blame] | 2115 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2116 | * Set default functions |
| 2117 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2118 | static void nand_set_defaults(struct nand_chip *chip, int busw) |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2119 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2120 | /* check for proper chip_delay setup, set 20us if not */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2121 | if (!chip->chip_delay) |
| 2122 | chip->chip_delay = 20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2123 | |
| 2124 | /* check, if a user supplied command function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2125 | if (chip->cmdfunc == NULL) |
| 2126 | chip->cmdfunc = nand_command; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2127 | |
| 2128 | /* check, if a user supplied wait function given */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2129 | if (chip->waitfunc == NULL) |
| 2130 | chip->waitfunc = nand_wait; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2131 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2132 | if (!chip->select_chip) |
| 2133 | chip->select_chip = nand_select_chip; |
| 2134 | if (!chip->read_byte) |
| 2135 | chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; |
| 2136 | if (!chip->read_word) |
| 2137 | chip->read_word = nand_read_word; |
| 2138 | if (!chip->block_bad) |
| 2139 | chip->block_bad = nand_block_bad; |
| 2140 | if (!chip->block_markbad) |
| 2141 | chip->block_markbad = nand_default_block_markbad; |
| 2142 | if (!chip->write_buf) |
| 2143 | chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; |
| 2144 | if (!chip->read_buf) |
| 2145 | chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; |
| 2146 | if (!chip->verify_buf) |
| 2147 | chip->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf; |
| 2148 | if (!chip->scan_bbt) |
| 2149 | chip->scan_bbt = nand_default_bbt; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2150 | |
| 2151 | if (!chip->controller) { |
| 2152 | chip->controller = &chip->hwcontrol; |
| 2153 | spin_lock_init(&chip->controller->lock); |
| 2154 | init_waitqueue_head(&chip->controller->wq); |
| 2155 | } |
| 2156 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2157 | } |
| 2158 | |
| 2159 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2160 | * Get the flash and manufacturer id and lookup if the type is supported |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2161 | */ |
| 2162 | static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2163 | struct nand_chip *chip, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2164 | int busw, int *maf_id) |
| 2165 | { |
| 2166 | struct nand_flash_dev *type = NULL; |
| 2167 | int i, dev_id, maf_idx; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2168 | |
| 2169 | /* Select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2170 | chip->select_chip(mtd, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2171 | |
| 2172 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2173 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2174 | |
| 2175 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2176 | *maf_id = chip->read_byte(mtd); |
| 2177 | dev_id = chip->read_byte(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2178 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2179 | /* Lookup the flash id */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2180 | for (i = 0; nand_flash_ids[i].name != NULL; i++) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2181 | if (dev_id == nand_flash_ids[i].id) { |
| 2182 | type = &nand_flash_ids[i]; |
| 2183 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2184 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2185 | } |
| 2186 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2187 | if (!type) |
| 2188 | return ERR_PTR(-ENODEV); |
| 2189 | |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2190 | if (!mtd->name) |
| 2191 | mtd->name = type->name; |
| 2192 | |
| 2193 | chip->chipsize = type->chipsize << 20; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2194 | |
| 2195 | /* Newer devices have all the information in additional id bytes */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2196 | if (!type->pagesize) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2197 | int extid; |
| 2198 | /* The 3rd id byte contains non relevant data ATM */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2199 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2200 | /* The 4th id byte is the important one */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2201 | extid = chip->read_byte(mtd); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2202 | /* Calc pagesize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2203 | mtd->writesize = 1024 << (extid & 0x3); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2204 | extid >>= 2; |
| 2205 | /* Calc oobsize */ |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2206 | mtd->oobsize = (8 << (extid & 0x01)) * (mtd->writesize >> 9); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2207 | extid >>= 2; |
| 2208 | /* Calc blocksize. Blocksize is multiples of 64KiB */ |
| 2209 | mtd->erasesize = (64 * 1024) << (extid & 0x03); |
| 2210 | extid >>= 2; |
| 2211 | /* Get buswidth information */ |
| 2212 | busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0; |
| 2213 | |
| 2214 | } else { |
| 2215 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2216 | * Old devices have chip data hardcoded in the device id table |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2217 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2218 | mtd->erasesize = type->erasesize; |
| 2219 | mtd->writesize = type->pagesize; |
Thomas Gleixner | 4cbb9b8 | 2006-05-23 12:37:31 +0200 | [diff] [blame] | 2220 | mtd->oobsize = mtd->writesize / 32; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2221 | busw = type->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2222 | } |
| 2223 | |
| 2224 | /* Try to identify manufacturer */ |
| 2225 | for (maf_idx = 0; nand_manuf_ids[maf_idx].id != 0x0; maf_id++) { |
| 2226 | if (nand_manuf_ids[maf_idx].id == *maf_id) |
| 2227 | break; |
| 2228 | } |
| 2229 | |
| 2230 | /* |
| 2231 | * Check, if buswidth is correct. Hardware drivers should set |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2232 | * chip correct ! |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2233 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2234 | if (busw != (chip->options & NAND_BUSWIDTH_16)) { |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2235 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2236 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, |
| 2237 | dev_id, nand_manuf_ids[maf_idx].name, mtd->name); |
| 2238 | printk(KERN_WARNING "NAND bus width %d instead %d bit\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2239 | (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2240 | busw ? 16 : 8); |
| 2241 | return ERR_PTR(-EINVAL); |
| 2242 | } |
| 2243 | |
| 2244 | /* Calculate the address shift from the page size */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2245 | chip->page_shift = ffs(mtd->writesize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2246 | /* Convert chipsize to number of pages per chip -1. */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2247 | chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2248 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2249 | chip->bbt_erase_shift = chip->phys_erase_shift = |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2250 | ffs(mtd->erasesize) - 1; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2251 | chip->chip_shift = ffs(chip->chipsize) - 1; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2252 | |
| 2253 | /* Set the bad block position */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2254 | chip->badblockpos = mtd->writesize > 512 ? |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2255 | NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; |
| 2256 | |
| 2257 | /* Get chip options, preserve non chip based options */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2258 | chip->options &= ~NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2259 | chip->options |= type->options & NAND_CHIPOPTIONS_MSK; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2260 | |
| 2261 | /* |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2262 | * Set chip as a default. Board drivers can override it, if necessary |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2263 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2264 | chip->options |= NAND_NO_AUTOINCR; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2265 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2266 | /* Check if chip is a not a samsung device. Do not clear the |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2267 | * options for chips which are not having an extended id. |
| 2268 | */ |
Thomas Gleixner | ba0251f | 2006-05-27 01:02:13 +0200 | [diff] [blame] | 2269 | if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2270 | chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2271 | |
| 2272 | /* Check for AND chips with 4 page planes */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2273 | if (chip->options & NAND_4PAGE_ARRAY) |
| 2274 | chip->erase_cmd = multi_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2275 | else |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2276 | chip->erase_cmd = single_erase_cmd; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2277 | |
| 2278 | /* Do not replace user supplied command function ! */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2279 | if (mtd->writesize > 512 && chip->cmdfunc == nand_command) |
| 2280 | chip->cmdfunc = nand_command_lp; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2281 | |
| 2282 | printk(KERN_INFO "NAND device: Manufacturer ID:" |
| 2283 | " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id, dev_id, |
| 2284 | nand_manuf_ids[maf_idx].name, type->name); |
| 2285 | |
| 2286 | return type; |
| 2287 | } |
| 2288 | |
| 2289 | /* module_text_address() isn't exported, and it's mostly a pointless |
| 2290 | test if this is a module _anyway_ -- they'd have to try _really_ hard |
| 2291 | to call us from in-kernel code if the core NAND support is modular. */ |
| 2292 | #ifdef MODULE |
| 2293 | #define caller_is_module() (1) |
| 2294 | #else |
| 2295 | #define caller_is_module() \ |
| 2296 | module_text_address((unsigned long)__builtin_return_address(0)) |
| 2297 | #endif |
| 2298 | |
| 2299 | /** |
| 2300 | * nand_scan - [NAND Interface] Scan for the NAND device |
| 2301 | * @mtd: MTD device structure |
| 2302 | * @maxchips: Number of chips to scan for |
| 2303 | * |
| 2304 | * This fills out all the uninitialized function pointers |
| 2305 | * with the defaults. |
| 2306 | * The flash ID is read and the mtd/chip structures are |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2307 | * filled with the appropriate values. |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2308 | * The mtd->owner field must be set to the module of the caller |
| 2309 | * |
| 2310 | */ |
| 2311 | int nand_scan(struct mtd_info *mtd, int maxchips) |
| 2312 | { |
| 2313 | int i, busw, nand_maf_id; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2314 | struct nand_chip *chip = mtd->priv; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2315 | struct nand_flash_dev *type; |
| 2316 | |
| 2317 | /* Many callers got this wrong, so check for it for a while... */ |
| 2318 | if (!mtd->owner && caller_is_module()) { |
| 2319 | printk(KERN_CRIT "nand_scan() called with NULL mtd->owner!\n"); |
| 2320 | BUG(); |
| 2321 | } |
| 2322 | |
| 2323 | /* Get buswidth to select the correct functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2324 | busw = chip->options & NAND_BUSWIDTH_16; |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2325 | /* Set the default functions */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2326 | nand_set_defaults(chip, busw); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2327 | |
| 2328 | /* Read the flash type */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2329 | type = nand_get_flash_type(mtd, chip, busw, &nand_maf_id); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2330 | |
| 2331 | if (IS_ERR(type)) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2332 | printk(KERN_WARNING "No NAND device found!!!\n"); |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2333 | chip->select_chip(mtd, -1); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2334 | return PTR_ERR(type); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2335 | } |
| 2336 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2337 | /* Check for a chip array */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2338 | for (i = 1; i < maxchips; i++) { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2339 | chip->select_chip(mtd, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2340 | /* Send the command for reading device ID */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2341 | chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2342 | /* Read manufacturer and device IDs */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2343 | if (nand_maf_id != chip->read_byte(mtd) || |
| 2344 | type->id != chip->read_byte(mtd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2345 | break; |
| 2346 | } |
| 2347 | if (i > 1) |
| 2348 | printk(KERN_INFO "%d NAND chips detected\n", i); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2349 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2350 | /* Store the number of chips and calc total size for mtd */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2351 | chip->numchips = i; |
| 2352 | mtd->size = i * chip->chipsize; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2353 | |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2354 | /* Preset the internal oob write buffer */ |
| 2355 | memset(chip->buffers.oobwbuf, 0xff, mtd->oobsize); |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2356 | |
| 2357 | /* |
| 2358 | * If no default placement scheme is given, select an appropriate one |
| 2359 | */ |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2360 | if (!chip->ecc.layout) { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2361 | switch (mtd->oobsize) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2362 | case 8: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2363 | chip->ecc.layout = &nand_oob_8; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2364 | break; |
| 2365 | case 16: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2366 | chip->ecc.layout = &nand_oob_16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2367 | break; |
| 2368 | case 64: |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2369 | chip->ecc.layout = &nand_oob_64; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2370 | break; |
| 2371 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2372 | printk(KERN_WARNING "No oob scheme defined for " |
| 2373 | "oobsize %d\n", mtd->oobsize); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2374 | BUG(); |
| 2375 | } |
| 2376 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2377 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2378 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2379 | * check ECC mode, default to software if 3byte/512byte hardware ECC is |
| 2380 | * selected and we have 256 byte pagesize fallback to software ECC |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2381 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2382 | switch (chip->ecc.mode) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2383 | case NAND_ECC_HW: |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2384 | /* Use standard hwecc read page function ? */ |
| 2385 | if (!chip->ecc.read_page) |
| 2386 | chip->ecc.read_page = nand_read_page_hwecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2387 | if (!chip->ecc.write_page) |
| 2388 | chip->ecc.write_page = nand_write_page_hwecc; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2389 | if (!chip->ecc.read_oob) |
| 2390 | chip->ecc.read_oob = nand_read_oob_std; |
| 2391 | if (!chip->ecc.write_oob) |
| 2392 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2393 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2394 | case NAND_ECC_HW_SYNDROME: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2395 | if (!chip->ecc.calculate || !chip->ecc.correct || |
| 2396 | !chip->ecc.hwctl) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2397 | printk(KERN_WARNING "No ECC functions supplied, " |
| 2398 | "Hardware ECC not possible\n"); |
| 2399 | BUG(); |
| 2400 | } |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2401 | /* Use standard syndrome read/write page function ? */ |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2402 | if (!chip->ecc.read_page) |
| 2403 | chip->ecc.read_page = nand_read_page_syndrome; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2404 | if (!chip->ecc.write_page) |
| 2405 | chip->ecc.write_page = nand_write_page_syndrome; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2406 | if (!chip->ecc.read_oob) |
| 2407 | chip->ecc.read_oob = nand_read_oob_syndrome; |
| 2408 | if (!chip->ecc.write_oob) |
| 2409 | chip->ecc.write_oob = nand_write_oob_syndrome; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2410 | |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2411 | if (mtd->writesize >= chip->ecc.size) |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2412 | break; |
| 2413 | printk(KERN_WARNING "%d byte HW ECC not possible on " |
| 2414 | "%d byte page size, fallback to SW ECC\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2415 | chip->ecc.size, mtd->writesize); |
| 2416 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2417 | |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2418 | case NAND_ECC_SOFT: |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2419 | chip->ecc.calculate = nand_calculate_ecc; |
| 2420 | chip->ecc.correct = nand_correct_data; |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2421 | chip->ecc.read_page = nand_read_page_swecc; |
Thomas Gleixner | f75e509 | 2006-05-26 18:52:08 +0200 | [diff] [blame] | 2422 | chip->ecc.write_page = nand_write_page_swecc; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2423 | chip->ecc.read_oob = nand_read_oob_std; |
| 2424 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2425 | chip->ecc.size = 256; |
| 2426 | chip->ecc.bytes = 3; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2427 | break; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2428 | |
| 2429 | case NAND_ECC_NONE: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2430 | printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. " |
| 2431 | "This is not recommended !!\n"); |
Thomas Gleixner | 8593fbc | 2006-05-29 03:26:58 +0200 | [diff] [blame] | 2432 | chip->ecc.read_page = nand_read_page_raw; |
| 2433 | chip->ecc.write_page = nand_write_page_raw; |
Thomas Gleixner | 7bc3312 | 2006-06-20 20:05:05 +0200 | [diff] [blame] | 2434 | chip->ecc.read_oob = nand_read_oob_std; |
| 2435 | chip->ecc.write_oob = nand_write_oob_std; |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2436 | chip->ecc.size = mtd->writesize; |
| 2437 | chip->ecc.bytes = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2438 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2439 | default: |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2440 | printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n", |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2441 | chip->ecc.mode); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2442 | BUG(); |
| 2443 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2444 | |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2445 | /* |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2446 | * The number of bytes available for a client to place data into |
| 2447 | * the out of band area |
| 2448 | */ |
| 2449 | chip->ecc.layout->oobavail = 0; |
| 2450 | for (i = 0; chip->ecc.layout->oobfree[i].length; i++) |
| 2451 | chip->ecc.layout->oobavail += |
| 2452 | chip->ecc.layout->oobfree[i].length; |
| 2453 | |
| 2454 | /* |
Thomas Gleixner | 7aa65bf | 2006-05-23 11:54:38 +0200 | [diff] [blame] | 2455 | * Set the number of read / write steps for one page depending on ECC |
| 2456 | * mode |
| 2457 | */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2458 | chip->ecc.steps = mtd->writesize / chip->ecc.size; |
| 2459 | if(chip->ecc.steps * chip->ecc.size != mtd->writesize) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 2460 | printk(KERN_WARNING "Invalid ecc parameters\n"); |
| 2461 | BUG(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2462 | } |
Thomas Gleixner | f5bbdac | 2006-05-25 10:07:16 +0200 | [diff] [blame] | 2463 | chip->ecc.total = chip->ecc.steps * chip->ecc.bytes; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2464 | |
Thomas Gleixner | 04bbd0e | 2006-05-25 09:45:29 +0200 | [diff] [blame] | 2465 | /* Initialize state */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2466 | chip->state = FL_READY; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2467 | |
| 2468 | /* De-select the device */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2469 | chip->select_chip(mtd, -1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2470 | |
| 2471 | /* Invalidate the pagebuffer reference */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2472 | chip->pagebuf = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2473 | |
| 2474 | /* Fill in remaining MTD driver data */ |
| 2475 | mtd->type = MTD_NANDFLASH; |
Joern Engel | 5fa4339 | 2006-05-22 23:18:29 +0200 | [diff] [blame] | 2476 | mtd->flags = MTD_CAP_NANDFLASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2477 | mtd->ecctype = MTD_ECC_SW; |
| 2478 | mtd->erase = nand_erase; |
| 2479 | mtd->point = NULL; |
| 2480 | mtd->unpoint = NULL; |
| 2481 | mtd->read = nand_read; |
| 2482 | mtd->write = nand_write; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2483 | mtd->read_oob = nand_read_oob; |
| 2484 | mtd->write_oob = nand_write_oob; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2485 | mtd->sync = nand_sync; |
| 2486 | mtd->lock = NULL; |
| 2487 | mtd->unlock = NULL; |
Vitaly Wool | 962034f | 2005-09-15 14:58:53 +0100 | [diff] [blame] | 2488 | mtd->suspend = nand_suspend; |
| 2489 | mtd->resume = nand_resume; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2490 | mtd->block_isbad = nand_block_isbad; |
| 2491 | mtd->block_markbad = nand_block_markbad; |
| 2492 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 2493 | /* propagate ecc.layout to mtd_info */ |
| 2494 | mtd->ecclayout = chip->ecc.layout; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2495 | |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2496 | /* Check, if we should skip the bad block table scan */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2497 | if (chip->options & NAND_SKIP_BBTSCAN) |
Thomas Gleixner | 0040bf3 | 2005-02-09 12:20:00 +0000 | [diff] [blame] | 2498 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2499 | |
| 2500 | /* Build bad block table */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2501 | return chip->scan_bbt(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2502 | } |
| 2503 | |
| 2504 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 2505 | * nand_release - [NAND Interface] Free resources held by the NAND device |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2506 | * @mtd: MTD device structure |
| 2507 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2508 | void nand_release(struct mtd_info *mtd) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2509 | { |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2510 | struct nand_chip *chip = mtd->priv; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2511 | |
| 2512 | #ifdef CONFIG_MTD_PARTITIONS |
| 2513 | /* Deregister partitions */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2514 | del_mtd_partitions(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2515 | #endif |
| 2516 | /* Deregister the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2517 | del_mtd_device(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2518 | |
Jesper Juhl | fa67164 | 2005-11-07 01:01:27 -0800 | [diff] [blame] | 2519 | /* Free bad block table memory */ |
Thomas Gleixner | ace4dfe | 2006-05-24 12:07:37 +0200 | [diff] [blame] | 2520 | kfree(chip->bbt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2521 | } |
| 2522 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2523 | EXPORT_SYMBOL_GPL(nand_scan); |
| 2524 | EXPORT_SYMBOL_GPL(nand_release); |
Richard Purdie | 8fe833c | 2006-03-31 02:31:14 -0800 | [diff] [blame] | 2525 | |
| 2526 | static int __init nand_base_init(void) |
| 2527 | { |
| 2528 | led_trigger_register_simple("nand-disk", &nand_led_trigger); |
| 2529 | return 0; |
| 2530 | } |
| 2531 | |
| 2532 | static void __exit nand_base_exit(void) |
| 2533 | { |
| 2534 | led_trigger_unregister_simple(nand_led_trigger); |
| 2535 | } |
| 2536 | |
| 2537 | module_init(nand_base_init); |
| 2538 | module_exit(nand_base_exit); |
| 2539 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 2540 | MODULE_LICENSE("GPL"); |
| 2541 | MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>"); |
| 2542 | MODULE_DESCRIPTION("Generic NAND flash driver code"); |