Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Ralf Baechle | 7034228 | 2013-01-22 12:59:30 +0100 | [diff] [blame] | 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License as published by the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 4 | * Free Software Foundation; either version 2 of the License, or (at your |
| 5 | * option) any later version. |
| 6 | * |
Ralf Baechle | c539ef7 | 2012-01-11 15:37:16 +0100 | [diff] [blame] | 7 | * Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org) |
| 8 | * Copyright (C) 2011 Wind River Systems, |
| 9 | * written by Ralf Baechle (ralf@linux-mips.org) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 10 | */ |
Ralf Baechle | c539ef7 | 2012-01-11 15:37:16 +0100 | [diff] [blame] | 11 | #include <linux/bug.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/kernel.h> |
| 13 | #include <linux/mm.h> |
| 14 | #include <linux/bootmem.h> |
Paul Gortmaker | cae39d1 | 2011-07-28 18:46:31 -0400 | [diff] [blame] | 15 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/init.h> |
| 17 | #include <linux/types.h> |
| 18 | #include <linux/pci.h> |
John Crispin | a48cf37 | 2012-05-04 10:50:13 +0200 | [diff] [blame] | 19 | #include <linux/of_address.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
Ralf Baechle | c539ef7 | 2012-01-11 15:37:16 +0100 | [diff] [blame] | 21 | #include <asm/cpu-info.h> |
| 22 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | /* |
Bjorn Helgaas | 2909060 | 2012-02-23 20:18:57 -0700 | [diff] [blame] | 24 | * If PCI_PROBE_ONLY in pci_flags is set, we don't change any PCI resource |
| 25 | * assignments. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 26 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | /* |
| 29 | * The PCI controller list. |
| 30 | */ |
| 31 | |
Dmitri Vorobiev | d58eaab | 2008-06-18 10:18:20 +0300 | [diff] [blame] | 32 | static struct pci_controller *hose_head, **hose_tail = &hose_head; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | |
Ralf Baechle | 982f6ff | 2009-09-17 02:25:07 +0200 | [diff] [blame] | 34 | unsigned long PCIBIOS_MIN_IO; |
| 35 | unsigned long PCIBIOS_MIN_MEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 37 | static int pci_initialized; |
| 38 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 39 | /* |
| 40 | * We need to avoid collisions with `mirrored' VGA ports |
| 41 | * and other strange ISA hardware, so we always want the |
| 42 | * addresses to be allocated in the 0x000-0x0ff region |
| 43 | * modulo 0x400. |
| 44 | * |
| 45 | * Why? Because some silly external IO cards only decode |
| 46 | * the low 10 bits of the IO address. The 0x00-0xff region |
| 47 | * is reserved for motherboard devices that decode all 16 |
| 48 | * bits, so it's ok to allocate at, say, 0x2800-0x28ff, |
| 49 | * but we want to try to avoid allocating at 0x2900-0x2bff |
| 50 | * which might have be mirrored at 0x0100-0x03ff.. |
| 51 | */ |
Dominik Brodowski | b26b2d4 | 2010-01-01 17:40:49 +0100 | [diff] [blame] | 52 | resource_size_t |
Dominik Brodowski | 3b7a17f | 2010-01-01 17:40:50 +0100 | [diff] [blame] | 53 | pcibios_align_resource(void *data, const struct resource *res, |
Greg Kroah-Hartman | e31dd6e | 2006-06-12 17:06:02 -0700 | [diff] [blame] | 54 | resource_size_t size, resource_size_t align) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | { |
| 56 | struct pci_dev *dev = data; |
| 57 | struct pci_controller *hose = dev->sysdata; |
Greg Kroah-Hartman | e31dd6e | 2006-06-12 17:06:02 -0700 | [diff] [blame] | 58 | resource_size_t start = res->start; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 59 | |
| 60 | if (res->flags & IORESOURCE_IO) { |
| 61 | /* Make sure we start at our min on all hoses */ |
| 62 | if (start < PCIBIOS_MIN_IO + hose->io_resource->start) |
| 63 | start = PCIBIOS_MIN_IO + hose->io_resource->start; |
| 64 | |
| 65 | /* |
| 66 | * Put everything into 0x00-0xff region modulo 0x400 |
| 67 | */ |
| 68 | if (start & 0x300) |
| 69 | start = (start + 0x3ff) & ~0x3ff; |
| 70 | } else if (res->flags & IORESOURCE_MEM) { |
| 71 | /* Make sure we start at our min on all hoses */ |
| 72 | if (start < PCIBIOS_MIN_MEM + hose->mem_resource->start) |
| 73 | start = PCIBIOS_MIN_MEM + hose->mem_resource->start; |
| 74 | } |
| 75 | |
Dominik Brodowski | b26b2d4 | 2010-01-01 17:40:49 +0100 | [diff] [blame] | 76 | return start; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 77 | } |
| 78 | |
Greg Kroah-Hartman | 28eb0e4 | 2012-12-21 14:04:39 -0800 | [diff] [blame] | 79 | static void pcibios_scanbus(struct pci_controller *hose) |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 80 | { |
| 81 | static int next_busno; |
| 82 | static int need_domain_info; |
Bjorn Helgaas | 7c090e5 | 2011-10-28 16:26:57 -0600 | [diff] [blame] | 83 | LIST_HEAD(resources); |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 84 | struct pci_bus *bus; |
| 85 | |
| 86 | if (!hose->iommu) |
| 87 | PCI_DMA_BUS_IS_PHYS = 1; |
| 88 | |
Bjorn Helgaas | 2909060 | 2012-02-23 20:18:57 -0700 | [diff] [blame] | 89 | if (hose->get_busno && pci_has_flag(PCI_PROBE_ONLY)) |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 90 | next_busno = (*hose->get_busno)(); |
| 91 | |
Bjorn Helgaas | 96a6b9a | 2012-02-23 20:19:02 -0700 | [diff] [blame] | 92 | pci_add_resource_offset(&resources, |
| 93 | hose->mem_resource, hose->mem_offset); |
| 94 | pci_add_resource_offset(&resources, hose->io_resource, hose->io_offset); |
Bjorn Helgaas | 7c090e5 | 2011-10-28 16:26:57 -0600 | [diff] [blame] | 95 | bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose, |
| 96 | &resources); |
| 97 | if (!bus) |
| 98 | pci_free_resource_list(&resources); |
| 99 | |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 100 | hose->bus = bus; |
| 101 | |
| 102 | need_domain_info = need_domain_info || hose->index; |
| 103 | hose->need_domain_info = need_domain_info; |
| 104 | if (bus) { |
Yinghai Lu | b918c62 | 2012-05-17 18:51:11 -0700 | [diff] [blame] | 105 | next_busno = bus->busn_res.end + 1; |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 106 | /* Don't allow 8-bit bus number overflow inside the hose - |
| 107 | reserve some space for bridges. */ |
| 108 | if (next_busno > 224) { |
| 109 | next_busno = 0; |
| 110 | need_domain_info = 1; |
| 111 | } |
| 112 | |
Bjorn Helgaas | 2909060 | 2012-02-23 20:18:57 -0700 | [diff] [blame] | 113 | if (!pci_has_flag(PCI_PROBE_ONLY)) { |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 114 | pci_bus_size_bridges(bus); |
| 115 | pci_bus_assign_resources(bus); |
| 116 | pci_enable_bridges(bus); |
| 117 | } |
| 118 | } |
| 119 | } |
| 120 | |
John Crispin | a48cf37 | 2012-05-04 10:50:13 +0200 | [diff] [blame] | 121 | #ifdef CONFIG_OF |
Greg Kroah-Hartman | 28eb0e4 | 2012-12-21 14:04:39 -0800 | [diff] [blame] | 122 | void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node) |
John Crispin | a48cf37 | 2012-05-04 10:50:13 +0200 | [diff] [blame] | 123 | { |
| 124 | const __be32 *ranges; |
| 125 | int rlen; |
| 126 | int pna = of_n_addr_cells(node); |
| 127 | int np = pna + 5; |
| 128 | |
| 129 | pr_info("PCI host bridge %s ranges:\n", node->full_name); |
| 130 | ranges = of_get_property(node, "ranges", &rlen); |
| 131 | if (ranges == NULL) |
| 132 | return; |
| 133 | hose->of_node = node; |
| 134 | |
| 135 | while ((rlen -= np * 4) >= 0) { |
| 136 | u32 pci_space; |
| 137 | struct resource *res = NULL; |
| 138 | u64 addr, size; |
| 139 | |
| 140 | pci_space = be32_to_cpup(&ranges[0]); |
| 141 | addr = of_translate_address(node, ranges + 3); |
| 142 | size = of_read_number(ranges + pna + 3, 2); |
| 143 | ranges += np; |
| 144 | switch ((pci_space >> 24) & 0x3) { |
| 145 | case 1: /* PCI IO space */ |
| 146 | pr_info(" IO 0x%016llx..0x%016llx\n", |
| 147 | addr, addr + size - 1); |
| 148 | hose->io_map_base = |
| 149 | (unsigned long)ioremap(addr, size); |
| 150 | res = hose->io_resource; |
| 151 | res->flags = IORESOURCE_IO; |
| 152 | break; |
| 153 | case 2: /* PCI Memory space */ |
| 154 | case 3: /* PCI 64 bits Memory space */ |
| 155 | pr_info(" MEM 0x%016llx..0x%016llx\n", |
| 156 | addr, addr + size - 1); |
| 157 | res = hose->mem_resource; |
| 158 | res->flags = IORESOURCE_MEM; |
| 159 | break; |
| 160 | } |
| 161 | if (res != NULL) { |
| 162 | res->start = addr; |
| 163 | res->name = node->full_name; |
| 164 | res->end = res->start + size - 1; |
| 165 | res->parent = NULL; |
| 166 | res->sibling = NULL; |
| 167 | res->child = NULL; |
| 168 | } |
| 169 | } |
| 170 | } |
Gabor Juhos | 9a97cd4 | 2013-04-04 20:01:23 +0200 | [diff] [blame^] | 171 | |
| 172 | struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus) |
| 173 | { |
| 174 | struct pci_controller *hose = bus->sysdata; |
| 175 | |
| 176 | return of_node_get(hose->of_node); |
| 177 | } |
John Crispin | a48cf37 | 2012-05-04 10:50:13 +0200 | [diff] [blame] | 178 | #endif |
| 179 | |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 180 | static DEFINE_MUTEX(pci_scan_mutex); |
| 181 | |
Greg Kroah-Hartman | 28eb0e4 | 2012-12-21 14:04:39 -0800 | [diff] [blame] | 182 | void register_pci_controller(struct pci_controller *hose) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | { |
Gabor Juhos | 2228317 | 2013-02-02 13:18:54 +0000 | [diff] [blame] | 184 | struct resource *parent; |
| 185 | |
| 186 | parent = hose->mem_resource->parent; |
| 187 | if (!parent) |
| 188 | parent = &iomem_resource; |
| 189 | |
| 190 | if (request_resource(parent, hose->mem_resource) < 0) |
Thomas Bogendoerfer | 639702b | 2007-04-08 13:28:44 +0200 | [diff] [blame] | 191 | goto out; |
Gabor Juhos | 2228317 | 2013-02-02 13:18:54 +0000 | [diff] [blame] | 192 | |
| 193 | parent = hose->io_resource->parent; |
| 194 | if (!parent) |
| 195 | parent = &ioport_resource; |
| 196 | |
| 197 | if (request_resource(parent, hose->io_resource) < 0) { |
Thomas Bogendoerfer | 639702b | 2007-04-08 13:28:44 +0200 | [diff] [blame] | 198 | release_resource(hose->mem_resource); |
| 199 | goto out; |
| 200 | } |
| 201 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | *hose_tail = hose; |
| 203 | hose_tail = &hose->next; |
Ralf Baechle | 140c172 | 2006-12-07 15:35:43 +0100 | [diff] [blame] | 204 | |
| 205 | /* |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 206 | * Do not panic here but later - this might happen before console init. |
Ralf Baechle | 140c172 | 2006-12-07 15:35:43 +0100 | [diff] [blame] | 207 | */ |
| 208 | if (!hose->io_map_base) { |
| 209 | printk(KERN_WARNING |
| 210 | "registering PCI controller with io_map_base unset\n"); |
| 211 | } |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 212 | |
| 213 | /* |
| 214 | * Scan the bus if it is register after the PCI subsystem |
| 215 | * initialization. |
| 216 | */ |
| 217 | if (pci_initialized) { |
| 218 | mutex_lock(&pci_scan_mutex); |
| 219 | pcibios_scanbus(hose); |
| 220 | mutex_unlock(&pci_scan_mutex); |
| 221 | } |
| 222 | |
Thomas Bogendoerfer | 639702b | 2007-04-08 13:28:44 +0200 | [diff] [blame] | 223 | return; |
| 224 | |
| 225 | out: |
| 226 | printk(KERN_WARNING |
| 227 | "Skipping PCI bus scan due to resource conflict\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 228 | } |
| 229 | |
Ralf Baechle | c539ef7 | 2012-01-11 15:37:16 +0100 | [diff] [blame] | 230 | static void __init pcibios_set_cache_line_size(void) |
| 231 | { |
| 232 | struct cpuinfo_mips *c = ¤t_cpu_data; |
| 233 | unsigned int lsize; |
| 234 | |
| 235 | /* |
| 236 | * Set PCI cacheline size to that of the highest level in the |
| 237 | * cache hierarchy. |
| 238 | */ |
| 239 | lsize = c->dcache.linesz; |
| 240 | lsize = c->scache.linesz ? : lsize; |
| 241 | lsize = c->tcache.linesz ? : lsize; |
| 242 | |
| 243 | BUG_ON(!lsize); |
| 244 | |
| 245 | pci_dfl_cache_line_size = lsize >> 2; |
| 246 | |
| 247 | pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize); |
| 248 | } |
| 249 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | static int __init pcibios_init(void) |
| 251 | { |
| 252 | struct pci_controller *hose; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 253 | |
Ralf Baechle | c539ef7 | 2012-01-11 15:37:16 +0100 | [diff] [blame] | 254 | pcibios_set_cache_line_size(); |
| 255 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | /* Scan all of the recorded PCI controllers. */ |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 257 | for (hose = hose_head; hose; hose = hose->next) |
| 258 | pcibios_scanbus(hose); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | |
Bjorn Helgaas | 67eed58 | 2008-12-16 21:37:10 -0700 | [diff] [blame] | 260 | pci_fixup_irqs(pci_common_swizzle, pcibios_map_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 261 | |
Aurelien Jarno | 540799e | 2008-10-14 11:45:09 +0200 | [diff] [blame] | 262 | pci_initialized = 1; |
| 263 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 264 | return 0; |
| 265 | } |
| 266 | |
| 267 | subsys_initcall(pcibios_init); |
| 268 | |
| 269 | static int pcibios_enable_resources(struct pci_dev *dev, int mask) |
| 270 | { |
| 271 | u16 cmd, old_cmd; |
| 272 | int idx; |
| 273 | struct resource *r; |
| 274 | |
| 275 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
| 276 | old_cmd = cmd; |
Ralf Baechle | e5de3b4 | 2005-07-12 09:18:53 +0000 | [diff] [blame] | 277 | for (idx=0; idx < PCI_NUM_RESOURCES; idx++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 278 | /* Only set up the requested stuff */ |
| 279 | if (!(mask & (1<<idx))) |
| 280 | continue; |
| 281 | |
| 282 | r = &dev->resource[idx]; |
Ralf Baechle | 986c948 | 2008-02-19 15:59:33 +0000 | [diff] [blame] | 283 | if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) |
| 284 | continue; |
| 285 | if ((idx == PCI_ROM_RESOURCE) && |
| 286 | (!(r->flags & IORESOURCE_ROM_ENABLE))) |
| 287 | continue; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 288 | if (!r->start && r->end) { |
Ralf Baechle | 40d7c1a | 2008-02-19 16:01:20 +0000 | [diff] [blame] | 289 | printk(KERN_ERR "PCI: Device %s not available " |
| 290 | "because of resource collisions\n", |
| 291 | pci_name(dev)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | return -EINVAL; |
| 293 | } |
| 294 | if (r->flags & IORESOURCE_IO) |
| 295 | cmd |= PCI_COMMAND_IO; |
| 296 | if (r->flags & IORESOURCE_MEM) |
| 297 | cmd |= PCI_COMMAND_MEMORY; |
| 298 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | if (cmd != old_cmd) { |
Ralf Baechle | 40d7c1a | 2008-02-19 16:01:20 +0000 | [diff] [blame] | 300 | printk("PCI: Enabling device %s (%04x -> %04x)\n", |
| 301 | pci_name(dev), old_cmd, cmd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
| 303 | } |
| 304 | return 0; |
| 305 | } |
| 306 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 307 | unsigned int pcibios_assign_all_busses(void) |
| 308 | { |
Bjorn Helgaas | 14be538 | 2012-02-23 20:18:57 -0700 | [diff] [blame] | 309 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | } |
| 311 | |
| 312 | int pcibios_enable_device(struct pci_dev *dev, int mask) |
| 313 | { |
| 314 | int err; |
| 315 | |
| 316 | if ((err = pcibios_enable_resources(dev, mask)) < 0) |
| 317 | return err; |
| 318 | |
| 319 | return pcibios_plat_dev_init(dev); |
| 320 | } |
| 321 | |
Greg Kroah-Hartman | 28eb0e4 | 2012-12-21 14:04:39 -0800 | [diff] [blame] | 322 | void pcibios_fixup_bus(struct pci_bus *bus) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 324 | struct pci_dev *dev = bus->self; |
| 325 | |
Bjorn Helgaas | 2909060 | 2012-02-23 20:18:57 -0700 | [diff] [blame] | 326 | if (pci_has_flag(PCI_PROBE_ONLY) && dev && |
Bjorn Helgaas | 7c090e5 | 2011-10-28 16:26:57 -0600 | [diff] [blame] | 327 | (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 328 | pci_read_bridge_bases(bus); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | } |
| 330 | } |
| 331 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 332 | EXPORT_SYMBOL(PCIBIOS_MIN_IO); |
| 333 | EXPORT_SYMBOL(PCIBIOS_MIN_MEM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 334 | |
Ralf Baechle | 98873f5 | 2008-12-09 17:58:46 +0000 | [diff] [blame] | 335 | int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, |
| 336 | enum pci_mmap_state mmap_state, int write_combine) |
| 337 | { |
| 338 | unsigned long prot; |
| 339 | |
| 340 | /* |
| 341 | * I/O space can be accessed via normal processor loads and stores on |
| 342 | * this platform but for now we elect not to do this and portable |
| 343 | * drivers should not do this anyway. |
| 344 | */ |
| 345 | if (mmap_state == pci_mmap_io) |
| 346 | return -EINVAL; |
| 347 | |
| 348 | /* |
| 349 | * Ignore write-combine; for now only return uncached mappings. |
| 350 | */ |
| 351 | prot = pgprot_val(vma->vm_page_prot); |
| 352 | prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED; |
| 353 | vma->vm_page_prot = __pgprot(prot); |
| 354 | |
| 355 | return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff, |
| 356 | vma->vm_end - vma->vm_start, vma->vm_page_prot); |
| 357 | } |
| 358 | |
Myron Stowe | 938ca51 | 2012-06-25 21:31:37 -0600 | [diff] [blame] | 359 | char * (*pcibios_plat_setup)(char *str) __initdata; |
Atsushi Nemoto | 47a5c97 | 2008-07-24 00:25:14 +0900 | [diff] [blame] | 360 | |
Myron Stowe | 938ca51 | 2012-06-25 21:31:37 -0600 | [diff] [blame] | 361 | char *__init pcibios_setup(char *str) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | { |
Atsushi Nemoto | 47a5c97 | 2008-07-24 00:25:14 +0900 | [diff] [blame] | 363 | if (pcibios_plat_setup) |
| 364 | return pcibios_plat_setup(str); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | return str; |
| 366 | } |