blob: 81722fb51a367c4c3e16e6b69124c0a15ec85dfa [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * forcedeth: Ethernet driver for NVIDIA nForce media access controllers.
3 *
4 * Note: This driver is a cleanroom reimplementation based on reverse
5 * engineered documentation written by Carl-Daniel Hailfinger
Ayaz Abdulla87046e52006-12-19 23:33:32 -05006 * and Andrew de Quincey.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * NVIDIA, nForce and other NVIDIA marks are trademarks or registered
9 * trademarks of NVIDIA Corporation in the United States and other
10 * countries.
11 *
Manfred Spraul18360982005-12-24 14:19:24 +010012 * Copyright (C) 2003,4,5 Manfred Spraul
Linus Torvalds1da177e2005-04-16 15:20:36 -070013 * Copyright (C) 2004 Andrew de Quincey (wol support)
14 * Copyright (C) 2004 Carl-Daniel Hailfinger (invalid MAC handling, insane
15 * IRQ rate fixes, bigendian fixes, cleanups, verification)
Ayaz Abdullaf1405d322009-01-09 11:03:54 +000016 * Copyright (c) 2004,2005,2006,2007,2008,2009 NVIDIA Corporation
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070032 * Known bugs:
33 * We suspect that on some hardware no TX done interrupts are generated.
34 * This means recovery from netif_stop_queue only happens if the hw timer
35 * interrupt fires (100 times/second, configurable with NVREG_POLL_DEFAULT)
36 * and the timer is active in the IRQMask, or if a rx packet arrives by chance.
37 * If your hardware reliably generates tx done interrupts, then you can remove
38 * DEV_NEED_TIMERIRQ from the driver_data flags.
39 * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few
40 * superfluous timer interrupts from the nic.
41 */
Ayaz Abdulla3e1a3ce2009-03-05 08:02:38 +000042#define FORCEDETH_VERSION "0.64"
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#define DRV_NAME "forcedeth"
44
45#include <linux/module.h>
46#include <linux/types.h>
47#include <linux/pci.h>
48#include <linux/interrupt.h>
49#include <linux/netdevice.h>
50#include <linux/etherdevice.h>
51#include <linux/delay.h>
Alexey Dobriyand43c36d2009-10-07 17:09:06 +040052#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#include <linux/spinlock.h>
54#include <linux/ethtool.h>
55#include <linux/timer.h>
56#include <linux/skbuff.h>
57#include <linux/mii.h>
58#include <linux/random.h>
59#include <linux/init.h>
Manfred Spraul22c6d142005-04-19 21:17:09 +020060#include <linux/if_vlan.h>
Matthias Gehre910638a2006-03-28 01:56:48 -080061#include <linux/dma-mapping.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090062#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070063
64#include <asm/irq.h>
65#include <asm/io.h>
66#include <asm/uaccess.h>
67#include <asm/system.h>
68
69#if 0
70#define dprintk printk
71#else
72#define dprintk(x...) do { } while (0)
73#endif
74
Stephen Hemmingerbea33482007-10-03 16:41:36 -070075#define TX_WORK_PER_LOOP 64
76#define RX_WORK_PER_LOOP 64
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78/*
79 * Hardware access:
80 */
81
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +000082#define DEV_NEED_TIMERIRQ 0x0000001 /* set the timer irq flag in the irq mask */
83#define DEV_NEED_LINKTIMER 0x0000002 /* poll link settings. Relies on the timer irq */
84#define DEV_HAS_LARGEDESC 0x0000004 /* device supports jumbo frames and needs packet format 2 */
85#define DEV_HAS_HIGH_DMA 0x0000008 /* device supports 64bit dma */
86#define DEV_HAS_CHECKSUM 0x0000010 /* device supports tx and rx checksum offloads */
87#define DEV_HAS_VLAN 0x0000020 /* device supports vlan tagging and striping */
88#define DEV_HAS_MSI 0x0000040 /* device supports MSI */
89#define DEV_HAS_MSI_X 0x0000080 /* device supports MSI-X */
90#define DEV_HAS_POWER_CNTRL 0x0000100 /* device supports power savings */
91#define DEV_HAS_STATISTICS_V1 0x0000200 /* device supports hw statistics version 1 */
Mike Ditto7b5e0782010-07-25 21:54:28 -070092#define DEV_HAS_STATISTICS_V2 0x0000400 /* device supports hw statistics version 2 */
93#define DEV_HAS_STATISTICS_V3 0x0000800 /* device supports hw statistics version 3 */
94#define DEV_HAS_STATISTICS_V12 0x0000600 /* device supports hw statistics version 1 and 2 */
95#define DEV_HAS_STATISTICS_V123 0x0000e00 /* device supports hw statistics version 1, 2, and 3 */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +000096#define DEV_HAS_TEST_EXTENDED 0x0001000 /* device supports extended diagnostic test */
97#define DEV_HAS_MGMT_UNIT 0x0002000 /* device supports management unit */
98#define DEV_HAS_CORRECT_MACADDR 0x0004000 /* device supports correct mac address order */
99#define DEV_HAS_COLLISION_FIX 0x0008000 /* device supports tx collision fix */
100#define DEV_HAS_PAUSEFRAME_TX_V1 0x0010000 /* device supports tx pause frames version 1 */
101#define DEV_HAS_PAUSEFRAME_TX_V2 0x0020000 /* device supports tx pause frames version 2 */
102#define DEV_HAS_PAUSEFRAME_TX_V3 0x0040000 /* device supports tx pause frames version 3 */
103#define DEV_NEED_TX_LIMIT 0x0080000 /* device needs to limit tx */
104#define DEV_NEED_TX_LIMIT2 0x0180000 /* device needs to limit tx, expect for some revs */
105#define DEV_HAS_GEAR_MODE 0x0200000 /* device supports gear mode */
106#define DEV_NEED_PHY_INIT_FIX 0x0400000 /* device needs specific phy workaround */
107#define DEV_NEED_LOW_POWER_FIX 0x0800000 /* device needs special power up workaround */
108#define DEV_NEED_MSI_FIX 0x1000000 /* device needs msi workaround */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
110enum {
111 NvRegIrqStatus = 0x000,
112#define NVREG_IRQSTAT_MIIEVENT 0x040
Ayaz Abdulladaa91a92009-02-07 00:25:00 -0800113#define NVREG_IRQSTAT_MASK 0x83ff
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 NvRegIrqMask = 0x004,
115#define NVREG_IRQ_RX_ERROR 0x0001
116#define NVREG_IRQ_RX 0x0002
117#define NVREG_IRQ_RX_NOBUF 0x0004
118#define NVREG_IRQ_TX_ERR 0x0008
Manfred Spraulc2dba062005-07-31 18:29:47 +0200119#define NVREG_IRQ_TX_OK 0x0010
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120#define NVREG_IRQ_TIMER 0x0020
121#define NVREG_IRQ_LINK 0x0040
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500122#define NVREG_IRQ_RX_FORCED 0x0080
123#define NVREG_IRQ_TX_FORCED 0x0100
Ayaz Abdulladaa91a92009-02-07 00:25:00 -0800124#define NVREG_IRQ_RECOVER_ERROR 0x8200
Ayaz Abdullaa971c322005-11-11 08:30:38 -0500125#define NVREG_IRQMASK_THROUGHPUT 0x00df
Ayaz Abdulla096a4582007-05-21 20:23:11 -0400126#define NVREG_IRQMASK_CPU 0x0060
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500127#define NVREG_IRQ_TX_ALL (NVREG_IRQ_TX_ERR|NVREG_IRQ_TX_OK|NVREG_IRQ_TX_FORCED)
128#define NVREG_IRQ_RX_ALL (NVREG_IRQ_RX_ERROR|NVREG_IRQ_RX|NVREG_IRQ_RX_NOBUF|NVREG_IRQ_RX_FORCED)
Ayaz Abdullac5cf9102006-10-30 17:32:01 -0500129#define NVREG_IRQ_OTHER (NVREG_IRQ_TIMER|NVREG_IRQ_LINK|NVREG_IRQ_RECOVER_ERROR)
Manfred Spraulc2dba062005-07-31 18:29:47 +0200130
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 NvRegUnknownSetupReg6 = 0x008,
132#define NVREG_UNKSETUP6_VAL 3
133
134/*
135 * NVREG_POLL_DEFAULT is the interval length of the timer source on the nic
136 * NVREG_POLL_DEFAULT=97 would result in an interval length of 1 ms
137 */
138 NvRegPollingInterval = 0x00c,
Ayaz Abdulla6cef67a2009-03-05 08:02:30 +0000139#define NVREG_POLL_DEFAULT_THROUGHPUT 65535 /* backup tx cleanup if loop max reached */
Ayaz Abdullaa971c322005-11-11 08:30:38 -0500140#define NVREG_POLL_DEFAULT_CPU 13
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500141 NvRegMSIMap0 = 0x020,
142 NvRegMSIMap1 = 0x024,
143 NvRegMSIIrqMask = 0x030,
144#define NVREG_MSI_VECTOR_0_ENABLED 0x01
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 NvRegMisc1 = 0x080,
Ayaz Abdullaeb91f612006-05-24 18:13:19 -0400146#define NVREG_MISC1_PAUSE_TX 0x01
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147#define NVREG_MISC1_HD 0x02
148#define NVREG_MISC1_FORCE 0x3b0f3c
149
Ayaz Abdulla0a626772008-01-13 16:02:42 -0500150 NvRegMacReset = 0x34,
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400151#define NVREG_MAC_RESET_ASSERT 0x0F3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 NvRegTransmitterControl = 0x084,
153#define NVREG_XMITCTL_START 0x01
Ayaz Abdulla7e680c22006-10-30 17:31:51 -0500154#define NVREG_XMITCTL_MGMT_ST 0x40000000
155#define NVREG_XMITCTL_SYNC_MASK 0x000f0000
156#define NVREG_XMITCTL_SYNC_NOT_READY 0x0
157#define NVREG_XMITCTL_SYNC_PHY_INIT 0x00040000
158#define NVREG_XMITCTL_MGMT_SEMA_MASK 0x00000f00
159#define NVREG_XMITCTL_MGMT_SEMA_FREE 0x0
160#define NVREG_XMITCTL_HOST_SEMA_MASK 0x0000f000
161#define NVREG_XMITCTL_HOST_SEMA_ACQ 0x0000f000
162#define NVREG_XMITCTL_HOST_LOADED 0x00004000
Ayaz Abdullaf35723e2003-02-20 03:03:54 -0500163#define NVREG_XMITCTL_TX_PATH_EN 0x01000000
Ayaz Abdullacac1c522009-02-07 00:23:57 -0800164#define NVREG_XMITCTL_DATA_START 0x00100000
165#define NVREG_XMITCTL_DATA_READY 0x00010000
166#define NVREG_XMITCTL_DATA_ERROR 0x00020000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167 NvRegTransmitterStatus = 0x088,
168#define NVREG_XMITSTAT_BUSY 0x01
169
170 NvRegPacketFilterFlags = 0x8c,
Ayaz Abdullaeb91f612006-05-24 18:13:19 -0400171#define NVREG_PFF_PAUSE_RX 0x08
172#define NVREG_PFF_ALWAYS 0x7F0000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173#define NVREG_PFF_PROMISC 0x80
174#define NVREG_PFF_MYADDR 0x20
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400175#define NVREG_PFF_LOOPBACK 0x10
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176
177 NvRegOffloadConfig = 0x90,
178#define NVREG_OFFLOAD_HOMEPHY 0x601
179#define NVREG_OFFLOAD_NORMAL RX_NIC_BUFSIZE
180 NvRegReceiverControl = 0x094,
181#define NVREG_RCVCTL_START 0x01
Ayaz Abdullaf35723e2003-02-20 03:03:54 -0500182#define NVREG_RCVCTL_RX_PATH_EN 0x01000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 NvRegReceiverStatus = 0x98,
184#define NVREG_RCVSTAT_BUSY 0x01
185
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700186 NvRegSlotTime = 0x9c,
187#define NVREG_SLOTTIME_LEGBF_ENABLED 0x80000000
188#define NVREG_SLOTTIME_10_100_FULL 0x00007f00
Szymon Janc78aea4f2010-11-27 08:39:43 +0000189#define NVREG_SLOTTIME_1000_FULL 0x0003ff00
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700190#define NVREG_SLOTTIME_HALF 0x0000ff00
Szymon Janc78aea4f2010-11-27 08:39:43 +0000191#define NVREG_SLOTTIME_DEFAULT 0x00007f00
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700192#define NVREG_SLOTTIME_MASK 0x000000ff
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193
Ayaz Abdulla9744e212006-07-06 16:45:58 -0400194 NvRegTxDeferral = 0xA0,
Ayaz Abdullafd9b5582008-02-05 12:29:49 -0500195#define NVREG_TX_DEFERRAL_DEFAULT 0x15050f
196#define NVREG_TX_DEFERRAL_RGMII_10_100 0x16070f
197#define NVREG_TX_DEFERRAL_RGMII_1000 0x14050f
198#define NVREG_TX_DEFERRAL_RGMII_STRETCH_10 0x16190f
199#define NVREG_TX_DEFERRAL_RGMII_STRETCH_100 0x16300f
200#define NVREG_TX_DEFERRAL_MII_STRETCH 0x152000
Ayaz Abdulla9744e212006-07-06 16:45:58 -0400201 NvRegRxDeferral = 0xA4,
202#define NVREG_RX_DEFERRAL_DEFAULT 0x16
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 NvRegMacAddrA = 0xA8,
204 NvRegMacAddrB = 0xAC,
205 NvRegMulticastAddrA = 0xB0,
206#define NVREG_MCASTADDRA_FORCE 0x01
207 NvRegMulticastAddrB = 0xB4,
208 NvRegMulticastMaskA = 0xB8,
Ayaz Abdullabb9a4fd2008-01-13 16:03:04 -0500209#define NVREG_MCASTMASKA_NONE 0xffffffff
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 NvRegMulticastMaskB = 0xBC,
Ayaz Abdullabb9a4fd2008-01-13 16:03:04 -0500211#define NVREG_MCASTMASKB_NONE 0xffff
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
213 NvRegPhyInterface = 0xC0,
214#define PHY_RGMII 0x10000000
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700215 NvRegBackOffControl = 0xC4,
216#define NVREG_BKOFFCTRL_DEFAULT 0x70000000
217#define NVREG_BKOFFCTRL_SEED_MASK 0x000003ff
218#define NVREG_BKOFFCTRL_SELECT 24
219#define NVREG_BKOFFCTRL_GEAR 12
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
221 NvRegTxRingPhysAddr = 0x100,
222 NvRegRxRingPhysAddr = 0x104,
223 NvRegRingSizes = 0x108,
224#define NVREG_RINGSZ_TXSHIFT 0
225#define NVREG_RINGSZ_RXSHIFT 16
Ayaz Abdulla5070d342006-07-31 12:05:01 -0400226 NvRegTransmitPoll = 0x10c,
227#define NVREG_TRANSMITPOLL_MAC_ADDR_REV 0x00008000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700228 NvRegLinkSpeed = 0x110,
229#define NVREG_LINKSPEED_FORCE 0x10000
230#define NVREG_LINKSPEED_10 1000
231#define NVREG_LINKSPEED_100 100
232#define NVREG_LINKSPEED_1000 50
233#define NVREG_LINKSPEED_MASK (0xFFF)
234 NvRegUnknownSetupReg5 = 0x130,
235#define NVREG_UNKSETUP5_BIT31 (1<<31)
Ayaz Abdulla95d161c2006-07-06 16:46:25 -0400236 NvRegTxWatermark = 0x13c,
237#define NVREG_TX_WM_DESC1_DEFAULT 0x0200010
238#define NVREG_TX_WM_DESC2_3_DEFAULT 0x1e08000
239#define NVREG_TX_WM_DESC2_3_1000 0xfe08000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240 NvRegTxRxControl = 0x144,
241#define NVREG_TXRXCTL_KICK 0x0001
242#define NVREG_TXRXCTL_BIT1 0x0002
243#define NVREG_TXRXCTL_BIT2 0x0004
244#define NVREG_TXRXCTL_IDLE 0x0008
245#define NVREG_TXRXCTL_RESET 0x0010
246#define NVREG_TXRXCTL_RXCHECK 0x0400
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -0400247#define NVREG_TXRXCTL_DESC_1 0
Ayaz Abdullad2f78412007-01-09 13:30:02 -0500248#define NVREG_TXRXCTL_DESC_2 0x002100
249#define NVREG_TXRXCTL_DESC_3 0xc02200
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500250#define NVREG_TXRXCTL_VLANSTRIP 0x00040
251#define NVREG_TXRXCTL_VLANINS 0x00080
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500252 NvRegTxRingPhysAddrHigh = 0x148,
253 NvRegRxRingPhysAddrHigh = 0x14C,
Ayaz Abdullaeb91f612006-05-24 18:13:19 -0400254 NvRegTxPauseFrame = 0x170,
Ayaz Abdulla5289b4c2008-02-05 12:30:01 -0500255#define NVREG_TX_PAUSEFRAME_DISABLE 0x0fff0080
256#define NVREG_TX_PAUSEFRAME_ENABLE_V1 0x01800010
257#define NVREG_TX_PAUSEFRAME_ENABLE_V2 0x056003f0
258#define NVREG_TX_PAUSEFRAME_ENABLE_V3 0x09f00880
Ayaz Abdulla9a33e882008-08-06 12:12:34 -0400259 NvRegTxPauseFrameLimit = 0x174,
260#define NVREG_TX_PAUSEFRAMELIMIT_ENABLE 0x00010000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 NvRegMIIStatus = 0x180,
262#define NVREG_MIISTAT_ERROR 0x0001
263#define NVREG_MIISTAT_LINKCHANGE 0x0008
Ayaz Abdullaeb798422008-02-04 15:14:04 -0500264#define NVREG_MIISTAT_MASK_RW 0x0007
265#define NVREG_MIISTAT_MASK_ALL 0x000f
Ayaz Abdulla7e680c22006-10-30 17:31:51 -0500266 NvRegMIIMask = 0x184,
267#define NVREG_MII_LINKCHANGE 0x0008
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268
269 NvRegAdapterControl = 0x188,
270#define NVREG_ADAPTCTL_START 0x02
271#define NVREG_ADAPTCTL_LINKUP 0x04
272#define NVREG_ADAPTCTL_PHYVALID 0x40000
273#define NVREG_ADAPTCTL_RUNNING 0x100000
274#define NVREG_ADAPTCTL_PHYSHIFT 24
275 NvRegMIISpeed = 0x18c,
276#define NVREG_MIISPEED_BIT8 (1<<8)
277#define NVREG_MIIDELAY 5
278 NvRegMIIControl = 0x190,
279#define NVREG_MIICTL_INUSE 0x08000
280#define NVREG_MIICTL_WRITE 0x00400
281#define NVREG_MIICTL_ADDRSHIFT 5
282 NvRegMIIData = 0x194,
Ayaz Abdulla9c662432008-08-06 12:11:42 -0400283 NvRegTxUnicast = 0x1a0,
284 NvRegTxMulticast = 0x1a4,
285 NvRegTxBroadcast = 0x1a8,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286 NvRegWakeUpFlags = 0x200,
287#define NVREG_WAKEUPFLAGS_VAL 0x7770
288#define NVREG_WAKEUPFLAGS_BUSYSHIFT 24
289#define NVREG_WAKEUPFLAGS_ENABLESHIFT 16
290#define NVREG_WAKEUPFLAGS_D3SHIFT 12
291#define NVREG_WAKEUPFLAGS_D2SHIFT 8
292#define NVREG_WAKEUPFLAGS_D1SHIFT 4
293#define NVREG_WAKEUPFLAGS_D0SHIFT 0
294#define NVREG_WAKEUPFLAGS_ACCEPT_MAGPAT 0x01
295#define NVREG_WAKEUPFLAGS_ACCEPT_WAKEUPPAT 0x02
296#define NVREG_WAKEUPFLAGS_ACCEPT_LINKCHANGE 0x04
297#define NVREG_WAKEUPFLAGS_ENABLE 0x1111
298
Ayaz Abdullacac1c522009-02-07 00:23:57 -0800299 NvRegMgmtUnitGetVersion = 0x204,
Szymon Janc78aea4f2010-11-27 08:39:43 +0000300#define NVREG_MGMTUNITGETVERSION 0x01
Ayaz Abdullacac1c522009-02-07 00:23:57 -0800301 NvRegMgmtUnitVersion = 0x208,
302#define NVREG_MGMTUNITVERSION 0x08
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303 NvRegPowerCap = 0x268,
304#define NVREG_POWERCAP_D3SUPP (1<<30)
305#define NVREG_POWERCAP_D2SUPP (1<<26)
306#define NVREG_POWERCAP_D1SUPP (1<<25)
307 NvRegPowerState = 0x26c,
308#define NVREG_POWERSTATE_POWEREDUP 0x8000
309#define NVREG_POWERSTATE_VALID 0x0100
310#define NVREG_POWERSTATE_MASK 0x0003
311#define NVREG_POWERSTATE_D0 0x0000
312#define NVREG_POWERSTATE_D1 0x0001
313#define NVREG_POWERSTATE_D2 0x0002
314#define NVREG_POWERSTATE_D3 0x0003
Ayaz Abdullacac1c522009-02-07 00:23:57 -0800315 NvRegMgmtUnitControl = 0x278,
316#define NVREG_MGMTUNITCONTROL_INUSE 0x20000
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400317 NvRegTxCnt = 0x280,
318 NvRegTxZeroReXmt = 0x284,
319 NvRegTxOneReXmt = 0x288,
320 NvRegTxManyReXmt = 0x28c,
321 NvRegTxLateCol = 0x290,
322 NvRegTxUnderflow = 0x294,
323 NvRegTxLossCarrier = 0x298,
324 NvRegTxExcessDef = 0x29c,
325 NvRegTxRetryErr = 0x2a0,
326 NvRegRxFrameErr = 0x2a4,
327 NvRegRxExtraByte = 0x2a8,
328 NvRegRxLateCol = 0x2ac,
329 NvRegRxRunt = 0x2b0,
330 NvRegRxFrameTooLong = 0x2b4,
331 NvRegRxOverflow = 0x2b8,
332 NvRegRxFCSErr = 0x2bc,
333 NvRegRxFrameAlignErr = 0x2c0,
334 NvRegRxLenErr = 0x2c4,
335 NvRegRxUnicast = 0x2c8,
336 NvRegRxMulticast = 0x2cc,
337 NvRegRxBroadcast = 0x2d0,
338 NvRegTxDef = 0x2d4,
339 NvRegTxFrame = 0x2d8,
340 NvRegRxCnt = 0x2dc,
341 NvRegTxPause = 0x2e0,
342 NvRegRxPause = 0x2e4,
343 NvRegRxDropFrame = 0x2e8,
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500344 NvRegVlanControl = 0x300,
345#define NVREG_VLANCONTROL_ENABLE 0x2000
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500346 NvRegMSIXMap0 = 0x3e0,
347 NvRegMSIXMap1 = 0x3e4,
348 NvRegMSIXIrqStatus = 0x3f0,
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400349
350 NvRegPowerState2 = 0x600,
Ayaz Abdulla1545e202008-09-22 09:55:35 -0400351#define NVREG_POWERSTATE2_POWERUP_MASK 0x0F15
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400352#define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001
Ayaz Abdulla22ae03a2008-07-25 15:31:29 -0400353#define NVREG_POWERSTATE2_PHY_RESET 0x0004
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +0000354#define NVREG_POWERSTATE2_GATE_CLOCKS 0x0F00
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355};
356
357/* Big endian: should work, but is untested */
358struct ring_desc {
Stephen Hemmingera8bed492006-07-27 18:50:09 -0700359 __le32 buf;
360 __le32 flaglen;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361};
362
Manfred Spraulee733622005-07-31 18:32:26 +0200363struct ring_desc_ex {
Stephen Hemmingera8bed492006-07-27 18:50:09 -0700364 __le32 bufhigh;
365 __le32 buflow;
366 __le32 txvlan;
367 __le32 flaglen;
Manfred Spraulee733622005-07-31 18:32:26 +0200368};
369
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700370union ring_type {
Szymon Janc78aea4f2010-11-27 08:39:43 +0000371 struct ring_desc *orig;
372 struct ring_desc_ex *ex;
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700373};
Manfred Spraulee733622005-07-31 18:32:26 +0200374
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375#define FLAG_MASK_V1 0xffff0000
376#define FLAG_MASK_V2 0xffffc000
377#define LEN_MASK_V1 (0xffffffff ^ FLAG_MASK_V1)
378#define LEN_MASK_V2 (0xffffffff ^ FLAG_MASK_V2)
379
380#define NV_TX_LASTPACKET (1<<16)
381#define NV_TX_RETRYERROR (1<<19)
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700382#define NV_TX_RETRYCOUNT_MASK (0xF<<20)
Manfred Spraulc2dba062005-07-31 18:29:47 +0200383#define NV_TX_FORCED_INTERRUPT (1<<24)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384#define NV_TX_DEFERRED (1<<26)
385#define NV_TX_CARRIERLOST (1<<27)
386#define NV_TX_LATECOLLISION (1<<28)
387#define NV_TX_UNDERFLOW (1<<29)
388#define NV_TX_ERROR (1<<30)
389#define NV_TX_VALID (1<<31)
390
391#define NV_TX2_LASTPACKET (1<<29)
392#define NV_TX2_RETRYERROR (1<<18)
Ayaz Abdullaa4336862008-04-18 13:50:43 -0700393#define NV_TX2_RETRYCOUNT_MASK (0xF<<19)
Manfred Spraulc2dba062005-07-31 18:29:47 +0200394#define NV_TX2_FORCED_INTERRUPT (1<<30)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395#define NV_TX2_DEFERRED (1<<25)
396#define NV_TX2_CARRIERLOST (1<<26)
397#define NV_TX2_LATECOLLISION (1<<27)
398#define NV_TX2_UNDERFLOW (1<<28)
399/* error and valid are the same for both */
400#define NV_TX2_ERROR (1<<30)
401#define NV_TX2_VALID (1<<31)
Ayaz Abdullaac9c1892005-10-26 00:51:24 -0400402#define NV_TX2_TSO (1<<28)
403#define NV_TX2_TSO_SHIFT 14
Ayaz Abdullafa454592006-01-05 22:45:45 -0800404#define NV_TX2_TSO_MAX_SHIFT 14
405#define NV_TX2_TSO_MAX_SIZE (1<<NV_TX2_TSO_MAX_SHIFT)
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -0400406#define NV_TX2_CHECKSUM_L3 (1<<27)
407#define NV_TX2_CHECKSUM_L4 (1<<26)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500409#define NV_TX3_VLAN_TAG_PRESENT (1<<18)
410
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411#define NV_RX_DESCRIPTORVALID (1<<16)
412#define NV_RX_MISSEDFRAME (1<<17)
413#define NV_RX_SUBSTRACT1 (1<<18)
414#define NV_RX_ERROR1 (1<<23)
415#define NV_RX_ERROR2 (1<<24)
416#define NV_RX_ERROR3 (1<<25)
417#define NV_RX_ERROR4 (1<<26)
418#define NV_RX_CRCERR (1<<27)
419#define NV_RX_OVERFLOW (1<<28)
420#define NV_RX_FRAMINGERR (1<<29)
421#define NV_RX_ERROR (1<<30)
422#define NV_RX_AVAIL (1<<31)
Ayaz Abdulla1ef68412008-08-06 12:11:03 -0400423#define NV_RX_ERROR_MASK (NV_RX_ERROR1|NV_RX_ERROR2|NV_RX_ERROR3|NV_RX_ERROR4|NV_RX_CRCERR|NV_RX_OVERFLOW|NV_RX_FRAMINGERR)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424
425#define NV_RX2_CHECKSUMMASK (0x1C000000)
Ayaz Abdullabfaffe82008-01-13 16:02:55 -0500426#define NV_RX2_CHECKSUM_IP (0x10000000)
427#define NV_RX2_CHECKSUM_IP_TCP (0x14000000)
428#define NV_RX2_CHECKSUM_IP_UDP (0x18000000)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429#define NV_RX2_DESCRIPTORVALID (1<<29)
430#define NV_RX2_SUBSTRACT1 (1<<25)
431#define NV_RX2_ERROR1 (1<<18)
432#define NV_RX2_ERROR2 (1<<19)
433#define NV_RX2_ERROR3 (1<<20)
434#define NV_RX2_ERROR4 (1<<21)
435#define NV_RX2_CRCERR (1<<22)
436#define NV_RX2_OVERFLOW (1<<23)
437#define NV_RX2_FRAMINGERR (1<<24)
438/* error and avail are the same for both */
439#define NV_RX2_ERROR (1<<30)
440#define NV_RX2_AVAIL (1<<31)
Ayaz Abdulla1ef68412008-08-06 12:11:03 -0400441#define NV_RX2_ERROR_MASK (NV_RX2_ERROR1|NV_RX2_ERROR2|NV_RX2_ERROR3|NV_RX2_ERROR4|NV_RX2_CRCERR|NV_RX2_OVERFLOW|NV_RX2_FRAMINGERR)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500443#define NV_RX3_VLAN_TAG_PRESENT (1<<16)
444#define NV_RX3_VLAN_TAG_MASK (0x0000FFFF)
445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446/* Miscelaneous hardware related defines: */
Szymon Janc78aea4f2010-11-27 08:39:43 +0000447#define NV_PCI_REGSZ_VER1 0x270
448#define NV_PCI_REGSZ_VER2 0x2d4
449#define NV_PCI_REGSZ_VER3 0x604
450#define NV_PCI_REGSZ_MAX 0x604
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451
452/* various timeout delays: all in usec */
453#define NV_TXRX_RESET_DELAY 4
454#define NV_TXSTOP_DELAY1 10
455#define NV_TXSTOP_DELAY1MAX 500000
456#define NV_TXSTOP_DELAY2 100
457#define NV_RXSTOP_DELAY1 10
458#define NV_RXSTOP_DELAY1MAX 500000
459#define NV_RXSTOP_DELAY2 100
460#define NV_SETUP5_DELAY 5
461#define NV_SETUP5_DELAYMAX 50000
462#define NV_POWERUP_DELAY 5
463#define NV_POWERUP_DELAYMAX 5000
464#define NV_MIIBUSY_DELAY 50
465#define NV_MIIPHY_DELAY 10
466#define NV_MIIPHY_DELAYMAX 10000
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400467#define NV_MAC_RESET_DELAY 64
Linus Torvalds1da177e2005-04-16 15:20:36 -0700468
469#define NV_WAKEUPPATTERNS 5
470#define NV_WAKEUPMASKENTRIES 4
471
472/* General driver defaults */
473#define NV_WATCHDOG_TIMEO (5*HZ)
474
Ayaz Abdulla6cef67a2009-03-05 08:02:30 +0000475#define RX_RING_DEFAULT 512
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -0400476#define TX_RING_DEFAULT 256
477#define RX_RING_MIN 128
478#define TX_RING_MIN 64
479#define RING_MAX_DESC_VER_1 1024
480#define RING_MAX_DESC_VER_2_3 16384
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481
482/* rx/tx mac addr + type + vlan + align + slack*/
Manfred Sprauld81c0982005-07-31 18:20:30 +0200483#define NV_RX_HEADERS (64)
484/* even more slack. */
485#define NV_RX_ALLOC_PAD (64)
486
487/* maximum mtu size */
488#define NV_PKTLIMIT_1 ETH_DATA_LEN /* hard limit not known */
489#define NV_PKTLIMIT_2 9100 /* Actual limit according to NVidia: 9202 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490
491#define OOM_REFILL (1+HZ/20)
492#define POLL_WAIT (1+HZ/100)
493#define LINK_TIMEOUT (3*HZ)
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400494#define STATS_INTERVAL (10*HZ)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400496/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497 * desc_ver values:
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -0400498 * The nic supports three different descriptor types:
499 * - DESC_VER_1: Original
500 * - DESC_VER_2: support for jumbo frames.
501 * - DESC_VER_3: 64-bit format.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502 */
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -0400503#define DESC_VER_1 1
504#define DESC_VER_2 2
505#define DESC_VER_3 3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700506
507/* PHY defines */
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400508#define PHY_OUI_MARVELL 0x5043
509#define PHY_OUI_CICADA 0x03f1
510#define PHY_OUI_VITESSE 0x01c1
511#define PHY_OUI_REALTEK 0x0732
512#define PHY_OUI_REALTEK2 0x0020
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513#define PHYID1_OUI_MASK 0x03ff
514#define PHYID1_OUI_SHFT 6
515#define PHYID2_OUI_MASK 0xfc00
516#define PHYID2_OUI_SHFT 10
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -0400517#define PHYID2_MODEL_MASK 0x03f0
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400518#define PHY_MODEL_REALTEK_8211 0x0110
519#define PHY_REV_MASK 0x0001
520#define PHY_REV_REALTEK_8211B 0x0000
521#define PHY_REV_REALTEK_8211C 0x0001
522#define PHY_MODEL_REALTEK_8201 0x0200
523#define PHY_MODEL_MARVELL_E3016 0x0220
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -0400524#define PHY_MARVELL_E3016_INITMASK 0x0300
Ayaz Abdulla14a67f32007-07-15 06:50:28 -0400525#define PHY_CICADA_INIT1 0x0f000
526#define PHY_CICADA_INIT2 0x0e00
527#define PHY_CICADA_INIT3 0x01000
528#define PHY_CICADA_INIT4 0x0200
529#define PHY_CICADA_INIT5 0x0004
530#define PHY_CICADA_INIT6 0x02000
Ayaz Abdullad215d8a2007-07-15 06:50:53 -0400531#define PHY_VITESSE_INIT_REG1 0x1f
532#define PHY_VITESSE_INIT_REG2 0x10
533#define PHY_VITESSE_INIT_REG3 0x11
534#define PHY_VITESSE_INIT_REG4 0x12
535#define PHY_VITESSE_INIT_MSK1 0xc
536#define PHY_VITESSE_INIT_MSK2 0x0180
537#define PHY_VITESSE_INIT1 0x52b5
538#define PHY_VITESSE_INIT2 0xaf8a
539#define PHY_VITESSE_INIT3 0x8
540#define PHY_VITESSE_INIT4 0x8f8a
541#define PHY_VITESSE_INIT5 0xaf86
542#define PHY_VITESSE_INIT6 0x8f86
543#define PHY_VITESSE_INIT7 0xaf82
544#define PHY_VITESSE_INIT8 0x0100
545#define PHY_VITESSE_INIT9 0x8f82
546#define PHY_VITESSE_INIT10 0x0
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -0400547#define PHY_REALTEK_INIT_REG1 0x1f
548#define PHY_REALTEK_INIT_REG2 0x19
549#define PHY_REALTEK_INIT_REG3 0x13
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400550#define PHY_REALTEK_INIT_REG4 0x14
551#define PHY_REALTEK_INIT_REG5 0x18
552#define PHY_REALTEK_INIT_REG6 0x11
Ayaz Abdulla22ae03a2008-07-25 15:31:29 -0400553#define PHY_REALTEK_INIT_REG7 0x01
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -0400554#define PHY_REALTEK_INIT1 0x0000
555#define PHY_REALTEK_INIT2 0x8e00
556#define PHY_REALTEK_INIT3 0x0001
557#define PHY_REALTEK_INIT4 0xad17
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400558#define PHY_REALTEK_INIT5 0xfb54
559#define PHY_REALTEK_INIT6 0xf5c7
560#define PHY_REALTEK_INIT7 0x1000
561#define PHY_REALTEK_INIT8 0x0003
Ayaz Abdulla22ae03a2008-07-25 15:31:29 -0400562#define PHY_REALTEK_INIT9 0x0008
563#define PHY_REALTEK_INIT10 0x0005
564#define PHY_REALTEK_INIT11 0x0200
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400565#define PHY_REALTEK_INIT_MSK1 0x0003
Ayaz Abdullad215d8a2007-07-15 06:50:53 -0400566
Linus Torvalds1da177e2005-04-16 15:20:36 -0700567#define PHY_GIGABIT 0x0100
568
569#define PHY_TIMEOUT 0x1
570#define PHY_ERROR 0x2
571
572#define PHY_100 0x1
573#define PHY_1000 0x2
574#define PHY_HALF 0x100
575
Ayaz Abdullaeb91f612006-05-24 18:13:19 -0400576#define NV_PAUSEFRAME_RX_CAPABLE 0x0001
577#define NV_PAUSEFRAME_TX_CAPABLE 0x0002
578#define NV_PAUSEFRAME_RX_ENABLE 0x0004
579#define NV_PAUSEFRAME_TX_ENABLE 0x0008
Ayaz Abdullab6d07732006-06-10 22:47:42 -0400580#define NV_PAUSEFRAME_RX_REQ 0x0010
581#define NV_PAUSEFRAME_TX_REQ 0x0020
582#define NV_PAUSEFRAME_AUTONEG 0x0040
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500584/* MSI/MSI-X defines */
585#define NV_MSI_X_MAX_VECTORS 8
586#define NV_MSI_X_VECTORS_MASK 0x000f
587#define NV_MSI_CAPABLE 0x0010
588#define NV_MSI_X_CAPABLE 0x0020
589#define NV_MSI_ENABLED 0x0040
590#define NV_MSI_X_ENABLED 0x0080
591
592#define NV_MSI_X_VECTOR_ALL 0x0
593#define NV_MSI_X_VECTOR_RX 0x0
594#define NV_MSI_X_VECTOR_TX 0x1
595#define NV_MSI_X_VECTOR_OTHER 0x2
Linus Torvalds1da177e2005-04-16 15:20:36 -0700596
Ayaz Abdullab6e44052009-02-07 00:24:15 -0800597#define NV_MSI_PRIV_OFFSET 0x68
598#define NV_MSI_PRIV_VALUE 0xffffffff
599
Ayaz Abdullab2976d22008-02-04 15:13:59 -0500600#define NV_RESTART_TX 0x1
601#define NV_RESTART_RX 0x2
602
Ayaz Abdulla3b446c32008-03-10 14:58:21 -0500603#define NV_TX_LIMIT_COUNT 16
604
Ayaz Abdulla4145ade2009-03-05 08:02:26 +0000605#define NV_DYNAMIC_THRESHOLD 4
606#define NV_DYNAMIC_MAX_QUIET_COUNT 2048
607
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400608/* statistics */
609struct nv_ethtool_str {
610 char name[ETH_GSTRING_LEN];
611};
612
613static const struct nv_ethtool_str nv_estats_str[] = {
614 { "tx_bytes" },
615 { "tx_zero_rexmt" },
616 { "tx_one_rexmt" },
617 { "tx_many_rexmt" },
618 { "tx_late_collision" },
619 { "tx_fifo_errors" },
620 { "tx_carrier_errors" },
621 { "tx_excess_deferral" },
622 { "tx_retry_error" },
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400623 { "rx_frame_error" },
624 { "rx_extra_byte" },
625 { "rx_late_collision" },
626 { "rx_runt" },
627 { "rx_frame_too_long" },
628 { "rx_over_errors" },
629 { "rx_crc_errors" },
630 { "rx_frame_align_error" },
631 { "rx_length_error" },
632 { "rx_unicast" },
633 { "rx_multicast" },
634 { "rx_broadcast" },
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400635 { "rx_packets" },
Ayaz Abdulla57fff692007-01-23 12:27:00 -0500636 { "rx_errors_total" },
637 { "tx_errors_total" },
638
639 /* version 2 stats */
640 { "tx_deferral" },
641 { "tx_packets" },
642 { "rx_bytes" },
643 { "tx_pause" },
644 { "rx_pause" },
Ayaz Abdulla9c662432008-08-06 12:11:42 -0400645 { "rx_drop_frame" },
646
647 /* version 3 stats */
648 { "tx_unicast" },
649 { "tx_multicast" },
650 { "tx_broadcast" }
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400651};
652
653struct nv_ethtool_stats {
654 u64 tx_bytes;
655 u64 tx_zero_rexmt;
656 u64 tx_one_rexmt;
657 u64 tx_many_rexmt;
658 u64 tx_late_collision;
659 u64 tx_fifo_errors;
660 u64 tx_carrier_errors;
661 u64 tx_excess_deferral;
662 u64 tx_retry_error;
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400663 u64 rx_frame_error;
664 u64 rx_extra_byte;
665 u64 rx_late_collision;
666 u64 rx_runt;
667 u64 rx_frame_too_long;
668 u64 rx_over_errors;
669 u64 rx_crc_errors;
670 u64 rx_frame_align_error;
671 u64 rx_length_error;
672 u64 rx_unicast;
673 u64 rx_multicast;
674 u64 rx_broadcast;
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400675 u64 rx_packets;
676 u64 rx_errors_total;
Ayaz Abdulla57fff692007-01-23 12:27:00 -0500677 u64 tx_errors_total;
678
679 /* version 2 stats */
680 u64 tx_deferral;
681 u64 tx_packets;
682 u64 rx_bytes;
683 u64 tx_pause;
684 u64 rx_pause;
685 u64 rx_drop_frame;
Ayaz Abdulla9c662432008-08-06 12:11:42 -0400686
687 /* version 3 stats */
688 u64 tx_unicast;
689 u64 tx_multicast;
690 u64 tx_broadcast;
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400691};
692
Ayaz Abdulla9c662432008-08-06 12:11:42 -0400693#define NV_DEV_STATISTICS_V3_COUNT (sizeof(struct nv_ethtool_stats)/sizeof(u64))
694#define NV_DEV_STATISTICS_V2_COUNT (NV_DEV_STATISTICS_V3_COUNT - 3)
Ayaz Abdulla57fff692007-01-23 12:27:00 -0500695#define NV_DEV_STATISTICS_V1_COUNT (NV_DEV_STATISTICS_V2_COUNT - 6)
696
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400697/* diagnostics */
698#define NV_TEST_COUNT_BASE 3
699#define NV_TEST_COUNT_EXTENDED 4
700
701static const struct nv_ethtool_str nv_etests_str[] = {
702 { "link (online/offline)" },
703 { "register (offline) " },
704 { "interrupt (offline) " },
705 { "loopback (offline) " }
706};
707
708struct register_test {
Al Viro5bb7ea22007-12-09 16:06:41 +0000709 __u32 reg;
710 __u32 mask;
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400711};
712
713static const struct register_test nv_registers_test[] = {
714 { NvRegUnknownSetupReg6, 0x01 },
715 { NvRegMisc1, 0x03c },
716 { NvRegOffloadConfig, 0x03ff },
717 { NvRegMulticastAddrA, 0xffffffff },
Ayaz Abdulla95d161c2006-07-06 16:46:25 -0400718 { NvRegTxWatermark, 0x0ff },
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400719 { NvRegWakeUpFlags, 0x07777 },
Szymon Janc78aea4f2010-11-27 08:39:43 +0000720 { 0, 0 }
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400721};
722
Ayaz Abdulla761fcd92007-01-09 13:30:07 -0500723struct nv_skb_map {
724 struct sk_buff *skb;
725 dma_addr_t dma;
Eric Dumazet73a37072009-06-17 21:17:59 +0000726 unsigned int dma_len:31;
727 unsigned int dma_single:1;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -0500728 struct ring_desc_ex *first_tx_desc;
729 struct nv_skb_map *next_tx_ctx;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -0500730};
731
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732/*
733 * SMP locking:
Wang Chenb74ca3a2008-12-08 01:14:16 -0800734 * All hardware access under netdev_priv(dev)->lock, except the performance
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735 * critical parts:
736 * - rx is (pseudo-) lockless: it relies on the single-threading provided
737 * by the arch code for interrupts.
Herbert Xu932ff272006-06-09 12:20:56 -0700738 * - tx setup is lockless: it relies on netif_tx_lock. Actual submission
Wang Chenb74ca3a2008-12-08 01:14:16 -0800739 * needs netdev_priv(dev)->lock :-(
Herbert Xu932ff272006-06-09 12:20:56 -0700740 * - set_multicast_list: preparation lockless, relies on netif_tx_lock.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700741 */
742
743/* in dev: base, irq */
744struct fe_priv {
745 spinlock_t lock;
746
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700747 struct net_device *dev;
748 struct napi_struct napi;
749
Linus Torvalds1da177e2005-04-16 15:20:36 -0700750 /* General data:
751 * Locking: spin_lock(&np->lock); */
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400752 struct nv_ethtool_stats estats;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 int in_shutdown;
754 u32 linkspeed;
755 int duplex;
756 int autoneg;
757 int fixed_mode;
758 int phyaddr;
759 int wolenabled;
760 unsigned int phy_oui;
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -0400761 unsigned int phy_model;
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400762 unsigned int phy_rev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700763 u16 gigabit;
Ayaz Abdulla9589c772006-06-10 22:48:13 -0400764 int intr_test;
Ayaz Abdullac5cf9102006-10-30 17:32:01 -0500765 int recover_error;
Ayaz Abdulla4145ade2009-03-05 08:02:26 +0000766 int quiet_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700767
768 /* General data: RO fields */
769 dma_addr_t ring_addr;
770 struct pci_dev *pci_dev;
771 u32 orig_mac[2];
Ayaz Abdulla582806b2009-03-05 08:02:03 +0000772 u32 events;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700773 u32 irqmask;
774 u32 desc_ver;
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -0400775 u32 txrxctl_bits;
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500776 u32 vlanctl_bits;
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400777 u32 driver_data;
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400778 u32 device_id;
Ayaz Abdulla86a0f042006-04-24 18:41:31 -0400779 u32 register_size;
Ayaz Abdullaf2ad2d92006-08-24 17:35:41 -0400780 int rx_csum;
Ayaz Abdulla7e680c22006-10-30 17:31:51 -0500781 u32 mac_in_use;
Ayaz Abdullacac1c522009-02-07 00:23:57 -0800782 int mgmt_version;
783 int mgmt_sema;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700784
785 void __iomem *base;
786
787 /* rx specific fields.
788 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
789 */
Ayaz Abdulla761fcd92007-01-09 13:30:07 -0500790 union ring_type get_rx, put_rx, first_rx, last_rx;
791 struct nv_skb_map *get_rx_ctx, *put_rx_ctx;
792 struct nv_skb_map *first_rx_ctx, *last_rx_ctx;
793 struct nv_skb_map *rx_skb;
794
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700795 union ring_type rx_ring;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796 unsigned int rx_buf_sz;
Manfred Sprauld81c0982005-07-31 18:20:30 +0200797 unsigned int pkt_limit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700798 struct timer_list oom_kick;
799 struct timer_list nic_poll;
Ayaz Abdulla52da3572006-06-10 22:48:04 -0400800 struct timer_list stats_poll;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500801 u32 nic_poll_irq;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -0400802 int rx_ring_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803
804 /* media detection workaround.
805 * Locking: Within irq hander or disable_irq+spin_lock(&np->lock);
806 */
807 int need_linktimer;
808 unsigned long link_timeout;
809 /*
810 * tx specific fields.
811 */
Ayaz Abdulla761fcd92007-01-09 13:30:07 -0500812 union ring_type get_tx, put_tx, first_tx, last_tx;
813 struct nv_skb_map *get_tx_ctx, *put_tx_ctx;
814 struct nv_skb_map *first_tx_ctx, *last_tx_ctx;
815 struct nv_skb_map *tx_skb;
816
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700817 union ring_type tx_ring;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700818 u32 tx_flags;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -0400819 int tx_ring_size;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -0500820 int tx_limit;
821 u32 tx_pkts_in_progress;
822 struct nv_skb_map *tx_change_owner;
823 struct nv_skb_map *tx_end_flip;
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -0500824 int tx_stop;
Ayaz Abdullaee407b02006-02-04 13:13:17 -0500825
826 /* vlan fields */
827 struct vlan_group *vlangrp;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500828
829 /* msi/msi-x fields */
830 u32 msi_flags;
831 struct msix_entry msi_x_entry[NV_MSI_X_MAX_VECTORS];
Ayaz Abdullaeb91f612006-05-24 18:13:19 -0400832
833 /* flow control */
834 u32 pause_flags;
Tobias Diedrich1a1ca862008-05-18 15:03:44 +0200835
836 /* power saved state */
837 u32 saved_config_space[NV_PCI_REGSZ_MAX/4];
Yinghai Luddb213f2009-02-06 01:29:23 -0800838
839 /* for different msi-x irq type */
840 char name_rx[IFNAMSIZ + 3]; /* -rx */
841 char name_tx[IFNAMSIZ + 3]; /* -tx */
842 char name_other[IFNAMSIZ + 6]; /* -other */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843};
844
845/*
846 * Maximum number of loops until we assume that a bit in the irq mask
847 * is stuck. Overridable with module param.
848 */
Ayaz Abdulla4145ade2009-03-05 08:02:26 +0000849static int max_interrupt_work = 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700850
Ayaz Abdullaa971c322005-11-11 08:30:38 -0500851/*
852 * Optimization can be either throuput mode or cpu mode
Jeff Garzikf3b197a2006-05-26 21:39:03 -0400853 *
Ayaz Abdullaa971c322005-11-11 08:30:38 -0500854 * Throughput Mode: Every tx and rx packet will generate an interrupt.
855 * CPU Mode: Interrupts are controlled by a timer.
856 */
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400857enum {
858 NV_OPTIMIZATION_MODE_THROUGHPUT,
Ayaz Abdulla9e184762009-03-05 08:02:18 +0000859 NV_OPTIMIZATION_MODE_CPU,
860 NV_OPTIMIZATION_MODE_DYNAMIC
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400861};
Ayaz Abdulla9e184762009-03-05 08:02:18 +0000862static int optimization_mode = NV_OPTIMIZATION_MODE_DYNAMIC;
Ayaz Abdullaa971c322005-11-11 08:30:38 -0500863
864/*
865 * Poll interval for timer irq
866 *
867 * This interval determines how frequent an interrupt is generated.
868 * The is value is determined by [(time_in_micro_secs * 100) / (2^10)]
869 * Min = 0, and Max = 65535
870 */
871static int poll_interval = -1;
872
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500873/*
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400874 * MSI interrupts
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500875 */
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400876enum {
877 NV_MSI_INT_DISABLED,
878 NV_MSI_INT_ENABLED
879};
880static int msi = NV_MSI_INT_ENABLED;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500881
882/*
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400883 * MSIX interrupts
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500884 */
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400885enum {
886 NV_MSIX_INT_DISABLED,
887 NV_MSIX_INT_ENABLED
888};
Yinghai Lu39482792009-02-06 01:31:12 -0800889static int msix = NV_MSIX_INT_ENABLED;
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -0400890
891/*
892 * DMA 64bit
893 */
894enum {
895 NV_DMA_64BIT_DISABLED,
896 NV_DMA_64BIT_ENABLED
897};
898static int dma_64bit = NV_DMA_64BIT_ENABLED;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -0500899
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -0400900/*
901 * Crossover Detection
902 * Realtek 8201 phy + some OEM boards do not work properly.
903 */
904enum {
905 NV_CROSSOVER_DETECTION_DISABLED,
906 NV_CROSSOVER_DETECTION_ENABLED
907};
908static int phy_cross = NV_CROSSOVER_DETECTION_DISABLED;
909
Ed Swierk5a9a8e32009-06-02 00:19:52 -0700910/*
911 * Power down phy when interface is down (persists through reboot;
912 * older Linux and other OSes may not power it up again)
913 */
Szymon Janc78aea4f2010-11-27 08:39:43 +0000914static int phy_power_down;
Ed Swierk5a9a8e32009-06-02 00:19:52 -0700915
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916static inline struct fe_priv *get_nvpriv(struct net_device *dev)
917{
918 return netdev_priv(dev);
919}
920
921static inline u8 __iomem *get_hwbase(struct net_device *dev)
922{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -0400923 return ((struct fe_priv *)netdev_priv(dev))->base;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700924}
925
926static inline void pci_push(u8 __iomem *base)
927{
928 /* force out pending posted writes */
929 readl(base);
930}
931
932static inline u32 nv_descr_getlength(struct ring_desc *prd, u32 v)
933{
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700934 return le32_to_cpu(prd->flaglen)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935 & ((v == DESC_VER_1) ? LEN_MASK_V1 : LEN_MASK_V2);
936}
937
Manfred Spraulee733622005-07-31 18:32:26 +0200938static inline u32 nv_descr_getlength_ex(struct ring_desc_ex *prd, u32 v)
939{
Stephen Hemmingerf82a9352006-07-27 18:50:08 -0700940 return le32_to_cpu(prd->flaglen) & LEN_MASK_V2;
Manfred Spraulee733622005-07-31 18:32:26 +0200941}
942
Jeff Garzik36b30ea2007-10-16 01:40:30 -0400943static bool nv_optimized(struct fe_priv *np)
944{
945 if (np->desc_ver == DESC_VER_1 || np->desc_ver == DESC_VER_2)
946 return false;
947 return true;
948}
949
Linus Torvalds1da177e2005-04-16 15:20:36 -0700950static int reg_delay(struct net_device *dev, int offset, u32 mask, u32 target,
951 int delay, int delaymax, const char *msg)
952{
953 u8 __iomem *base = get_hwbase(dev);
954
955 pci_push(base);
956 do {
957 udelay(delay);
958 delaymax -= delay;
959 if (delaymax < 0) {
960 if (msg)
Stephen Hemminger6a64cd62009-02-26 10:19:35 +0000961 printk("%s", msg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962 return 1;
963 }
964 } while ((readl(base + offset) & mask) != target);
965 return 0;
966}
967
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500968#define NV_SETUP_RX_RING 0x01
969#define NV_SETUP_TX_RING 0x02
970
Al Viro5bb7ea22007-12-09 16:06:41 +0000971static inline u32 dma_low(dma_addr_t addr)
972{
973 return addr;
974}
975
976static inline u32 dma_high(dma_addr_t addr)
977{
978 return addr>>31>>1; /* 0 if 32bit, shift down by 32 if 64bit */
979}
980
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500981static void setup_hw_rings(struct net_device *dev, int rxtx_flags)
982{
983 struct fe_priv *np = get_nvpriv(dev);
984 u8 __iomem *base = get_hwbase(dev);
985
Jeff Garzik36b30ea2007-10-16 01:40:30 -0400986 if (!nv_optimized(np)) {
Szymon Janc78aea4f2010-11-27 08:39:43 +0000987 if (rxtx_flags & NV_SETUP_RX_RING)
Al Viro5bb7ea22007-12-09 16:06:41 +0000988 writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
Szymon Janc78aea4f2010-11-27 08:39:43 +0000989 if (rxtx_flags & NV_SETUP_TX_RING)
Al Viro5bb7ea22007-12-09 16:06:41 +0000990 writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc)), base + NvRegTxRingPhysAddr);
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500991 } else {
992 if (rxtx_flags & NV_SETUP_RX_RING) {
Al Viro5bb7ea22007-12-09 16:06:41 +0000993 writel(dma_low(np->ring_addr), base + NvRegRxRingPhysAddr);
994 writel(dma_high(np->ring_addr), base + NvRegRxRingPhysAddrHigh);
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500995 }
996 if (rxtx_flags & NV_SETUP_TX_RING) {
Al Viro5bb7ea22007-12-09 16:06:41 +0000997 writel(dma_low(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddr);
998 writel(dma_high(np->ring_addr + np->rx_ring_size*sizeof(struct ring_desc_ex)), base + NvRegTxRingPhysAddrHigh);
Ayaz Abdulla0832b252006-02-04 13:13:26 -0500999 }
1000 }
1001}
1002
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001003static void free_rings(struct net_device *dev)
1004{
1005 struct fe_priv *np = get_nvpriv(dev);
1006
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001007 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001008 if (np->rx_ring.orig)
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001009 pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
1010 np->rx_ring.orig, np->ring_addr);
1011 } else {
1012 if (np->rx_ring.ex)
1013 pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
1014 np->rx_ring.ex, np->ring_addr);
1015 }
Szymon Janc9b03b062010-11-27 08:39:44 +00001016 kfree(np->rx_skb);
1017 kfree(np->tx_skb);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001018}
1019
Ayaz Abdulla84b39322006-05-20 14:59:48 -07001020static int using_multi_irqs(struct net_device *dev)
1021{
1022 struct fe_priv *np = get_nvpriv(dev);
1023
1024 if (!(np->msi_flags & NV_MSI_X_ENABLED) ||
1025 ((np->msi_flags & NV_MSI_X_ENABLED) &&
1026 ((np->msi_flags & NV_MSI_X_VECTORS_MASK) == 0x1)))
1027 return 0;
1028 else
1029 return 1;
1030}
1031
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00001032static void nv_txrx_gate(struct net_device *dev, bool gate)
1033{
1034 struct fe_priv *np = get_nvpriv(dev);
1035 u8 __iomem *base = get_hwbase(dev);
1036 u32 powerstate;
1037
1038 if (!np->mac_in_use &&
1039 (np->driver_data & DEV_HAS_POWER_CNTRL)) {
1040 powerstate = readl(base + NvRegPowerState2);
1041 if (gate)
1042 powerstate |= NVREG_POWERSTATE2_GATE_CLOCKS;
1043 else
1044 powerstate &= ~NVREG_POWERSTATE2_GATE_CLOCKS;
1045 writel(powerstate, base + NvRegPowerState2);
1046 }
1047}
1048
Ayaz Abdulla84b39322006-05-20 14:59:48 -07001049static void nv_enable_irq(struct net_device *dev)
1050{
1051 struct fe_priv *np = get_nvpriv(dev);
1052
1053 if (!using_multi_irqs(dev)) {
1054 if (np->msi_flags & NV_MSI_X_ENABLED)
1055 enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
1056 else
Manfred Spraula7475902007-10-17 21:52:33 +02001057 enable_irq(np->pci_dev->irq);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07001058 } else {
1059 enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
1060 enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
1061 enable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
1062 }
1063}
1064
1065static void nv_disable_irq(struct net_device *dev)
1066{
1067 struct fe_priv *np = get_nvpriv(dev);
1068
1069 if (!using_multi_irqs(dev)) {
1070 if (np->msi_flags & NV_MSI_X_ENABLED)
1071 disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
1072 else
Manfred Spraula7475902007-10-17 21:52:33 +02001073 disable_irq(np->pci_dev->irq);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07001074 } else {
1075 disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
1076 disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
1077 disable_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
1078 }
1079}
1080
1081/* In MSIX mode, a write to irqmask behaves as XOR */
1082static void nv_enable_hw_interrupts(struct net_device *dev, u32 mask)
1083{
1084 u8 __iomem *base = get_hwbase(dev);
1085
1086 writel(mask, base + NvRegIrqMask);
1087}
1088
1089static void nv_disable_hw_interrupts(struct net_device *dev, u32 mask)
1090{
1091 struct fe_priv *np = get_nvpriv(dev);
1092 u8 __iomem *base = get_hwbase(dev);
1093
1094 if (np->msi_flags & NV_MSI_X_ENABLED) {
1095 writel(mask, base + NvRegIrqMask);
1096 } else {
1097 if (np->msi_flags & NV_MSI_ENABLED)
1098 writel(0, base + NvRegMSIIrqMask);
1099 writel(0, base + NvRegIrqMask);
1100 }
1101}
1102
Ayaz Abdulla08d93572009-03-05 08:01:55 +00001103static void nv_napi_enable(struct net_device *dev)
1104{
Ayaz Abdulla08d93572009-03-05 08:01:55 +00001105 struct fe_priv *np = get_nvpriv(dev);
1106
1107 napi_enable(&np->napi);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00001108}
1109
1110static void nv_napi_disable(struct net_device *dev)
1111{
Ayaz Abdulla08d93572009-03-05 08:01:55 +00001112 struct fe_priv *np = get_nvpriv(dev);
1113
1114 napi_disable(&np->napi);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00001115}
1116
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117#define MII_READ (-1)
1118/* mii_rw: read/write a register on the PHY.
1119 *
1120 * Caller must guarantee serialization
1121 */
1122static int mii_rw(struct net_device *dev, int addr, int miireg, int value)
1123{
1124 u8 __iomem *base = get_hwbase(dev);
1125 u32 reg;
1126 int retval;
1127
Ayaz Abdullaeb798422008-02-04 15:14:04 -05001128 writel(NVREG_MIISTAT_MASK_RW, base + NvRegMIIStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129
1130 reg = readl(base + NvRegMIIControl);
1131 if (reg & NVREG_MIICTL_INUSE) {
1132 writel(NVREG_MIICTL_INUSE, base + NvRegMIIControl);
1133 udelay(NV_MIIBUSY_DELAY);
1134 }
1135
1136 reg = (addr << NVREG_MIICTL_ADDRSHIFT) | miireg;
1137 if (value != MII_READ) {
1138 writel(value, base + NvRegMIIData);
1139 reg |= NVREG_MIICTL_WRITE;
1140 }
1141 writel(reg, base + NvRegMIIControl);
1142
1143 if (reg_delay(dev, NvRegMIIControl, NVREG_MIICTL_INUSE, 0,
1144 NV_MIIPHY_DELAY, NV_MIIPHY_DELAYMAX, NULL)) {
1145 dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d timed out.\n",
1146 dev->name, miireg, addr);
1147 retval = -1;
1148 } else if (value != MII_READ) {
1149 /* it was a write operation - fewer failures are detectable */
1150 dprintk(KERN_DEBUG "%s: mii_rw wrote 0x%x to reg %d at PHY %d\n",
1151 dev->name, value, miireg, addr);
1152 retval = 0;
1153 } else if (readl(base + NvRegMIIStatus) & NVREG_MIISTAT_ERROR) {
1154 dprintk(KERN_DEBUG "%s: mii_rw of reg %d at PHY %d failed.\n",
1155 dev->name, miireg, addr);
1156 retval = -1;
1157 } else {
1158 retval = readl(base + NvRegMIIData);
1159 dprintk(KERN_DEBUG "%s: mii_rw read from reg %d at PHY %d: 0x%x.\n",
1160 dev->name, miireg, addr, retval);
1161 }
1162
1163 return retval;
1164}
1165
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04001166static int phy_reset(struct net_device *dev, u32 bmcr_setup)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001168 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 u32 miicontrol;
1170 unsigned int tries = 0;
1171
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04001172 miicontrol = BMCR_RESET | bmcr_setup;
Szymon Janc78aea4f2010-11-27 08:39:43 +00001173 if (mii_rw(dev, np->phyaddr, MII_BMCR, miicontrol))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174 return -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001175
1176 /* wait for 500ms */
1177 msleep(500);
1178
1179 /* must wait till reset is deasserted */
1180 while (miicontrol & BMCR_RESET) {
1181 msleep(10);
1182 miicontrol = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1183 /* FIXME: 100 tries seem excessive */
1184 if (tries++ > 100)
1185 return -1;
1186 }
1187 return 0;
1188}
1189
1190static int phy_init(struct net_device *dev)
1191{
1192 struct fe_priv *np = get_nvpriv(dev);
1193 u8 __iomem *base = get_hwbase(dev);
Szymon Janc78aea4f2010-11-27 08:39:43 +00001194 u32 phyinterface, phy_reserved, mii_status, mii_control, mii_control_1000, reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001195
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04001196 /* phy errata for E3016 phy */
1197 if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
1198 reg = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
1199 reg &= ~PHY_MARVELL_E3016_INITMASK;
1200 if (mii_rw(dev, np->phyaddr, MII_NCONFIG, reg)) {
1201 printk(KERN_INFO "%s: phy write to errata reg failed.\n", pci_name(np->pci_dev));
1202 return PHY_ERROR;
1203 }
1204 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001205 if (np->phy_oui == PHY_OUI_REALTEK) {
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001206 if (np->phy_model == PHY_MODEL_REALTEK_8211 &&
1207 np->phy_rev == PHY_REV_REALTEK_8211B) {
1208 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1209 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1210 return PHY_ERROR;
1211 }
1212 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) {
1213 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1214 return PHY_ERROR;
1215 }
1216 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1217 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1218 return PHY_ERROR;
1219 }
1220 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) {
1221 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1222 return PHY_ERROR;
1223 }
1224 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) {
1225 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1226 return PHY_ERROR;
1227 }
1228 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) {
1229 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1230 return PHY_ERROR;
1231 }
1232 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1233 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1234 return PHY_ERROR;
1235 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001236 }
Ayaz Abdulla22ae03a2008-07-25 15:31:29 -04001237 if (np->phy_model == PHY_MODEL_REALTEK_8211 &&
1238 np->phy_rev == PHY_REV_REALTEK_8211C) {
1239 u32 powerstate = readl(base + NvRegPowerState2);
1240
1241 /* need to perform hw phy reset */
1242 powerstate |= NVREG_POWERSTATE2_PHY_RESET;
1243 writel(powerstate, base + NvRegPowerState2);
1244 msleep(25);
1245
1246 powerstate &= ~NVREG_POWERSTATE2_PHY_RESET;
1247 writel(powerstate, base + NvRegPowerState2);
1248 msleep(25);
1249
1250 reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1251 reg |= PHY_REALTEK_INIT9;
1252 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, reg)) {
1253 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1254 return PHY_ERROR;
1255 }
1256 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT10)) {
1257 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1258 return PHY_ERROR;
1259 }
1260 reg = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, MII_READ);
1261 if (!(reg & PHY_REALTEK_INIT11)) {
1262 reg |= PHY_REALTEK_INIT11;
1263 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG7, reg)) {
1264 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1265 return PHY_ERROR;
1266 }
1267 }
1268 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1269 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1270 return PHY_ERROR;
1271 }
1272 }
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001273 if (np->phy_model == PHY_MODEL_REALTEK_8201) {
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00001274 if (np->driver_data & DEV_NEED_PHY_INIT_FIX) {
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001275 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1276 phy_reserved |= PHY_REALTEK_INIT7;
1277 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) {
1278 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1279 return PHY_ERROR;
1280 }
1281 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001282 }
1283 }
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04001284
Linus Torvalds1da177e2005-04-16 15:20:36 -07001285 /* set advertise register */
1286 reg = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04001287 reg |= (ADVERTISE_10HALF|ADVERTISE_10FULL|ADVERTISE_100HALF|ADVERTISE_100FULL|ADVERTISE_PAUSE_ASYM|ADVERTISE_PAUSE_CAP);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001288 if (mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg)) {
1289 printk(KERN_INFO "%s: phy write to advertise failed.\n", pci_name(np->pci_dev));
1290 return PHY_ERROR;
1291 }
1292
1293 /* get phy interface type */
1294 phyinterface = readl(base + NvRegPhyInterface);
1295
1296 /* see if gigabit phy */
1297 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
1298 if (mii_status & PHY_GIGABIT) {
1299 np->gigabit = PHY_GIGABIT;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04001300 mii_control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001301 mii_control_1000 &= ~ADVERTISE_1000HALF;
1302 if (phyinterface & PHY_RGMII)
1303 mii_control_1000 |= ADVERTISE_1000FULL;
1304 else
1305 mii_control_1000 &= ~ADVERTISE_1000FULL;
1306
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04001307 if (mii_rw(dev, np->phyaddr, MII_CTRL1000, mii_control_1000)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001308 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1309 return PHY_ERROR;
1310 }
Szymon Janc78aea4f2010-11-27 08:39:43 +00001311 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001312 np->gigabit = 0;
1313
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04001314 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
1315 mii_control |= BMCR_ANENABLE;
1316
Ayaz Abdulla22ae03a2008-07-25 15:31:29 -04001317 if (np->phy_oui == PHY_OUI_REALTEK &&
1318 np->phy_model == PHY_MODEL_REALTEK_8211 &&
1319 np->phy_rev == PHY_REV_REALTEK_8211C) {
1320 /* start autoneg since we already performed hw reset above */
1321 mii_control |= BMCR_ANRESTART;
1322 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control)) {
1323 printk(KERN_INFO "%s: phy init failed\n", pci_name(np->pci_dev));
1324 return PHY_ERROR;
1325 }
1326 } else {
1327 /* reset the phy
1328 * (certain phys need bmcr to be setup with reset)
1329 */
1330 if (phy_reset(dev, mii_control)) {
1331 printk(KERN_INFO "%s: phy reset failed\n", pci_name(np->pci_dev));
1332 return PHY_ERROR;
1333 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001334 }
1335
1336 /* phy vendor specific configuration */
Szymon Janc78aea4f2010-11-27 08:39:43 +00001337 if ((np->phy_oui == PHY_OUI_CICADA) && (phyinterface & PHY_RGMII)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001338 phy_reserved = mii_rw(dev, np->phyaddr, MII_RESV1, MII_READ);
Ayaz Abdulla14a67f32007-07-15 06:50:28 -04001339 phy_reserved &= ~(PHY_CICADA_INIT1 | PHY_CICADA_INIT2);
1340 phy_reserved |= (PHY_CICADA_INIT3 | PHY_CICADA_INIT4);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001341 if (mii_rw(dev, np->phyaddr, MII_RESV1, phy_reserved)) {
1342 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1343 return PHY_ERROR;
1344 }
1345 phy_reserved = mii_rw(dev, np->phyaddr, MII_NCONFIG, MII_READ);
Ayaz Abdulla14a67f32007-07-15 06:50:28 -04001346 phy_reserved |= PHY_CICADA_INIT5;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001347 if (mii_rw(dev, np->phyaddr, MII_NCONFIG, phy_reserved)) {
1348 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1349 return PHY_ERROR;
1350 }
1351 }
1352 if (np->phy_oui == PHY_OUI_CICADA) {
1353 phy_reserved = mii_rw(dev, np->phyaddr, MII_SREVISION, MII_READ);
Ayaz Abdulla14a67f32007-07-15 06:50:28 -04001354 phy_reserved |= PHY_CICADA_INIT6;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355 if (mii_rw(dev, np->phyaddr, MII_SREVISION, phy_reserved)) {
1356 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1357 return PHY_ERROR;
1358 }
1359 }
Ayaz Abdullad215d8a2007-07-15 06:50:53 -04001360 if (np->phy_oui == PHY_OUI_VITESSE) {
1361 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT1)) {
1362 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1363 return PHY_ERROR;
1364 }
1365 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT2)) {
1366 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1367 return PHY_ERROR;
1368 }
1369 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ);
1370 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) {
1371 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1372 return PHY_ERROR;
1373 }
1374 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ);
1375 phy_reserved &= ~PHY_VITESSE_INIT_MSK1;
1376 phy_reserved |= PHY_VITESSE_INIT3;
1377 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) {
1378 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1379 return PHY_ERROR;
1380 }
1381 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT4)) {
1382 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1383 return PHY_ERROR;
1384 }
1385 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT5)) {
1386 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1387 return PHY_ERROR;
1388 }
1389 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ);
1390 phy_reserved &= ~PHY_VITESSE_INIT_MSK1;
1391 phy_reserved |= PHY_VITESSE_INIT3;
1392 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) {
1393 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1394 return PHY_ERROR;
1395 }
1396 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ);
1397 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) {
1398 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1399 return PHY_ERROR;
1400 }
1401 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT6)) {
1402 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1403 return PHY_ERROR;
1404 }
1405 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT7)) {
1406 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1407 return PHY_ERROR;
1408 }
1409 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, MII_READ);
1410 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG4, phy_reserved)) {
1411 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1412 return PHY_ERROR;
1413 }
1414 phy_reserved = mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, MII_READ);
1415 phy_reserved &= ~PHY_VITESSE_INIT_MSK2;
1416 phy_reserved |= PHY_VITESSE_INIT8;
1417 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG3, phy_reserved)) {
1418 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1419 return PHY_ERROR;
1420 }
1421 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG2, PHY_VITESSE_INIT9)) {
1422 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1423 return PHY_ERROR;
1424 }
1425 if (mii_rw(dev, np->phyaddr, PHY_VITESSE_INIT_REG1, PHY_VITESSE_INIT10)) {
1426 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1427 return PHY_ERROR;
1428 }
1429 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001430 if (np->phy_oui == PHY_OUI_REALTEK) {
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001431 if (np->phy_model == PHY_MODEL_REALTEK_8211 &&
1432 np->phy_rev == PHY_REV_REALTEK_8211B) {
1433 /* reset could have cleared these out, set them back */
1434 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1435 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1436 return PHY_ERROR;
1437 }
1438 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, PHY_REALTEK_INIT2)) {
1439 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1440 return PHY_ERROR;
1441 }
1442 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1443 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1444 return PHY_ERROR;
1445 }
1446 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG3, PHY_REALTEK_INIT4)) {
1447 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1448 return PHY_ERROR;
1449 }
1450 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG4, PHY_REALTEK_INIT5)) {
1451 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1452 return PHY_ERROR;
1453 }
1454 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG5, PHY_REALTEK_INIT6)) {
1455 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1456 return PHY_ERROR;
1457 }
1458 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1459 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1460 return PHY_ERROR;
1461 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001462 }
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001463 if (np->phy_model == PHY_MODEL_REALTEK_8201) {
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00001464 if (np->driver_data & DEV_NEED_PHY_INIT_FIX) {
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04001465 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, MII_READ);
1466 phy_reserved |= PHY_REALTEK_INIT7;
1467 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG6, phy_reserved)) {
1468 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1469 return PHY_ERROR;
1470 }
1471 }
1472 if (phy_cross == NV_CROSSOVER_DETECTION_DISABLED) {
1473 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3)) {
1474 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1475 return PHY_ERROR;
1476 }
1477 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ);
1478 phy_reserved &= ~PHY_REALTEK_INIT_MSK1;
1479 phy_reserved |= PHY_REALTEK_INIT3;
1480 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved)) {
1481 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1482 return PHY_ERROR;
1483 }
1484 if (mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1)) {
1485 printk(KERN_INFO "%s: phy init failed.\n", pci_name(np->pci_dev));
1486 return PHY_ERROR;
1487 }
1488 }
Ayaz Abdullac5e3ae82007-07-15 06:51:03 -04001489 }
1490 }
1491
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04001492 /* some phys clear out pause advertisment on reset, set it back */
1493 mii_rw(dev, np->phyaddr, MII_ADVERTISE, reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001494
Ed Swierkcb52deb2008-12-01 12:24:43 +00001495 /* restart auto negotiation, power down phy */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001496 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
Ed Swierk5a9a8e32009-06-02 00:19:52 -07001497 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
Szymon Janc78aea4f2010-11-27 08:39:43 +00001498 if (phy_power_down)
Ed Swierk5a9a8e32009-06-02 00:19:52 -07001499 mii_control |= BMCR_PDOWN;
Szymon Janc78aea4f2010-11-27 08:39:43 +00001500 if (mii_rw(dev, np->phyaddr, MII_BMCR, mii_control))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001501 return PHY_ERROR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001502
1503 return 0;
1504}
1505
1506static void nv_start_rx(struct net_device *dev)
1507{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001508 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001509 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001510 u32 rx_ctrl = readl(base + NvRegReceiverControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001511
1512 dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
1513 /* Already running? Stop it. */
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001514 if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) {
1515 rx_ctrl &= ~NVREG_RCVCTL_START;
1516 writel(rx_ctrl, base + NvRegReceiverControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001517 pci_push(base);
1518 }
1519 writel(np->linkspeed, base + NvRegLinkSpeed);
1520 pci_push(base);
Szymon Janc78aea4f2010-11-27 08:39:43 +00001521 rx_ctrl |= NVREG_RCVCTL_START;
1522 if (np->mac_in_use)
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001523 rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN;
1524 writel(rx_ctrl, base + NvRegReceiverControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001525 dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
1526 dev->name, np->duplex, np->linkspeed);
1527 pci_push(base);
1528}
1529
1530static void nv_stop_rx(struct net_device *dev)
1531{
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001532 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001533 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001534 u32 rx_ctrl = readl(base + NvRegReceiverControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001535
1536 dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001537 if (!np->mac_in_use)
1538 rx_ctrl &= ~NVREG_RCVCTL_START;
1539 else
1540 rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN;
1541 writel(rx_ctrl, base + NvRegReceiverControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001542 reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
1543 NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
1544 KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
1545
1546 udelay(NV_RXSTOP_DELAY2);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001547 if (!np->mac_in_use)
1548 writel(0, base + NvRegLinkSpeed);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001549}
1550
1551static void nv_start_tx(struct net_device *dev)
1552{
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001553 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001554 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001555 u32 tx_ctrl = readl(base + NvRegTransmitterControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001556
1557 dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001558 tx_ctrl |= NVREG_XMITCTL_START;
1559 if (np->mac_in_use)
1560 tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN;
1561 writel(tx_ctrl, base + NvRegTransmitterControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001562 pci_push(base);
1563}
1564
1565static void nv_stop_tx(struct net_device *dev)
1566{
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001567 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001568 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001569 u32 tx_ctrl = readl(base + NvRegTransmitterControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001570
1571 dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001572 if (!np->mac_in_use)
1573 tx_ctrl &= ~NVREG_XMITCTL_START;
1574 else
1575 tx_ctrl |= NVREG_XMITCTL_TX_PATH_EN;
1576 writel(tx_ctrl, base + NvRegTransmitterControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001577 reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
1578 NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
1579 KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
1580
1581 udelay(NV_TXSTOP_DELAY2);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05001582 if (!np->mac_in_use)
1583 writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV,
1584 base + NvRegTransmitPoll);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001585}
1586
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001587static void nv_start_rxtx(struct net_device *dev)
1588{
1589 nv_start_rx(dev);
1590 nv_start_tx(dev);
1591}
1592
1593static void nv_stop_rxtx(struct net_device *dev)
1594{
1595 nv_stop_rx(dev);
1596 nv_stop_tx(dev);
1597}
1598
Linus Torvalds1da177e2005-04-16 15:20:36 -07001599static void nv_txrx_reset(struct net_device *dev)
1600{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001601 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001602 u8 __iomem *base = get_hwbase(dev);
1603
1604 dprintk(KERN_DEBUG "%s: nv_txrx_reset\n", dev->name);
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04001605 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001606 pci_push(base);
1607 udelay(NV_TXRX_RESET_DELAY);
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04001608 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001609 pci_push(base);
1610}
1611
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04001612static void nv_mac_reset(struct net_device *dev)
1613{
1614 struct fe_priv *np = netdev_priv(dev);
1615 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdulla4e84f9b2008-02-04 15:14:09 -05001616 u32 temp1, temp2, temp3;
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04001617
1618 dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name);
Ayaz Abdulla4e84f9b2008-02-04 15:14:09 -05001619
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04001620 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl);
1621 pci_push(base);
Ayaz Abdulla4e84f9b2008-02-04 15:14:09 -05001622
1623 /* save registers since they will be cleared on reset */
1624 temp1 = readl(base + NvRegMacAddrA);
1625 temp2 = readl(base + NvRegMacAddrB);
1626 temp3 = readl(base + NvRegTransmitPoll);
1627
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04001628 writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset);
1629 pci_push(base);
1630 udelay(NV_MAC_RESET_DELAY);
1631 writel(0, base + NvRegMacReset);
1632 pci_push(base);
1633 udelay(NV_MAC_RESET_DELAY);
Ayaz Abdulla4e84f9b2008-02-04 15:14:09 -05001634
1635 /* restore saved registers */
1636 writel(temp1, base + NvRegMacAddrA);
1637 writel(temp2, base + NvRegMacAddrB);
1638 writel(temp3, base + NvRegTransmitPoll);
1639
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04001640 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl);
1641 pci_push(base);
1642}
1643
Ayaz Abdulla57fff692007-01-23 12:27:00 -05001644static void nv_get_hw_stats(struct net_device *dev)
1645{
1646 struct fe_priv *np = netdev_priv(dev);
1647 u8 __iomem *base = get_hwbase(dev);
1648
1649 np->estats.tx_bytes += readl(base + NvRegTxCnt);
1650 np->estats.tx_zero_rexmt += readl(base + NvRegTxZeroReXmt);
1651 np->estats.tx_one_rexmt += readl(base + NvRegTxOneReXmt);
1652 np->estats.tx_many_rexmt += readl(base + NvRegTxManyReXmt);
1653 np->estats.tx_late_collision += readl(base + NvRegTxLateCol);
1654 np->estats.tx_fifo_errors += readl(base + NvRegTxUnderflow);
1655 np->estats.tx_carrier_errors += readl(base + NvRegTxLossCarrier);
1656 np->estats.tx_excess_deferral += readl(base + NvRegTxExcessDef);
1657 np->estats.tx_retry_error += readl(base + NvRegTxRetryErr);
1658 np->estats.rx_frame_error += readl(base + NvRegRxFrameErr);
1659 np->estats.rx_extra_byte += readl(base + NvRegRxExtraByte);
1660 np->estats.rx_late_collision += readl(base + NvRegRxLateCol);
1661 np->estats.rx_runt += readl(base + NvRegRxRunt);
1662 np->estats.rx_frame_too_long += readl(base + NvRegRxFrameTooLong);
1663 np->estats.rx_over_errors += readl(base + NvRegRxOverflow);
1664 np->estats.rx_crc_errors += readl(base + NvRegRxFCSErr);
1665 np->estats.rx_frame_align_error += readl(base + NvRegRxFrameAlignErr);
1666 np->estats.rx_length_error += readl(base + NvRegRxLenErr);
1667 np->estats.rx_unicast += readl(base + NvRegRxUnicast);
1668 np->estats.rx_multicast += readl(base + NvRegRxMulticast);
1669 np->estats.rx_broadcast += readl(base + NvRegRxBroadcast);
1670 np->estats.rx_packets =
1671 np->estats.rx_unicast +
1672 np->estats.rx_multicast +
1673 np->estats.rx_broadcast;
1674 np->estats.rx_errors_total =
1675 np->estats.rx_crc_errors +
1676 np->estats.rx_over_errors +
1677 np->estats.rx_frame_error +
1678 (np->estats.rx_frame_align_error - np->estats.rx_extra_byte) +
1679 np->estats.rx_late_collision +
1680 np->estats.rx_runt +
1681 np->estats.rx_frame_too_long;
1682 np->estats.tx_errors_total =
1683 np->estats.tx_late_collision +
1684 np->estats.tx_fifo_errors +
1685 np->estats.tx_carrier_errors +
1686 np->estats.tx_excess_deferral +
1687 np->estats.tx_retry_error;
1688
1689 if (np->driver_data & DEV_HAS_STATISTICS_V2) {
1690 np->estats.tx_deferral += readl(base + NvRegTxDef);
1691 np->estats.tx_packets += readl(base + NvRegTxFrame);
1692 np->estats.rx_bytes += readl(base + NvRegRxCnt);
1693 np->estats.tx_pause += readl(base + NvRegTxPause);
1694 np->estats.rx_pause += readl(base + NvRegRxPause);
1695 np->estats.rx_drop_frame += readl(base + NvRegRxDropFrame);
1696 }
Ayaz Abdulla9c662432008-08-06 12:11:42 -04001697
1698 if (np->driver_data & DEV_HAS_STATISTICS_V3) {
1699 np->estats.tx_unicast += readl(base + NvRegTxUnicast);
1700 np->estats.tx_multicast += readl(base + NvRegTxMulticast);
1701 np->estats.tx_broadcast += readl(base + NvRegTxBroadcast);
1702 }
Ayaz Abdulla57fff692007-01-23 12:27:00 -05001703}
1704
Linus Torvalds1da177e2005-04-16 15:20:36 -07001705/*
1706 * nv_get_stats: dev->get_stats function
1707 * Get latest stats value from the nic.
1708 * Called with read_lock(&dev_base_lock) held for read -
1709 * only synchronized against unregister_netdevice.
1710 */
1711static struct net_device_stats *nv_get_stats(struct net_device *dev)
1712{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001713 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001714
Ayaz Abdulla21828162007-01-23 12:27:21 -05001715 /* If the nic supports hw counters then retrieve latest values */
Ayaz Abdulla9c662432008-08-06 12:11:42 -04001716 if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3)) {
Ayaz Abdulla21828162007-01-23 12:27:21 -05001717 nv_get_hw_stats(dev);
1718
1719 /* copy to net_device stats */
Jeff Garzik8148ff42007-10-16 20:56:09 -04001720 dev->stats.tx_bytes = np->estats.tx_bytes;
1721 dev->stats.tx_fifo_errors = np->estats.tx_fifo_errors;
1722 dev->stats.tx_carrier_errors = np->estats.tx_carrier_errors;
1723 dev->stats.rx_crc_errors = np->estats.rx_crc_errors;
1724 dev->stats.rx_over_errors = np->estats.rx_over_errors;
1725 dev->stats.rx_errors = np->estats.rx_errors_total;
1726 dev->stats.tx_errors = np->estats.tx_errors_total;
Ayaz Abdulla21828162007-01-23 12:27:21 -05001727 }
Jeff Garzik8148ff42007-10-16 20:56:09 -04001728
1729 return &dev->stats;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001730}
1731
1732/*
1733 * nv_alloc_rx: fill rx ring entries.
1734 * Return 1 if the allocations for the skbs failed and the
1735 * rx engine is without Available descriptors
1736 */
1737static int nv_alloc_rx(struct net_device *dev)
1738{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001739 struct fe_priv *np = netdev_priv(dev);
Szymon Janc78aea4f2010-11-27 08:39:43 +00001740 struct ring_desc *less_rx;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001741
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001742 less_rx = np->get_rx.orig;
1743 if (less_rx-- == np->first_rx.orig)
1744 less_rx = np->last_rx.orig;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001745
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001746 while (np->put_rx.orig != less_rx) {
1747 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05001748 if (skb) {
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001749 np->put_rx_ctx->skb = skb;
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07001750 np->put_rx_ctx->dma = pci_map_single(np->pci_dev,
1751 skb->data,
Arnaldo Carvalho de Melo8b5be262007-03-20 12:08:20 -03001752 skb_tailroom(skb),
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07001753 PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melo8b5be262007-03-20 12:08:20 -03001754 np->put_rx_ctx->dma_len = skb_tailroom(skb);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001755 np->put_rx.orig->buf = cpu_to_le32(np->put_rx_ctx->dma);
1756 wmb();
1757 np->put_rx.orig->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX_AVAIL);
Ayaz Abdullab01867c2007-01-21 18:10:52 -05001758 if (unlikely(np->put_rx.orig++ == np->last_rx.orig))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001759 np->put_rx.orig = np->first_rx.orig;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05001760 if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001761 np->put_rx_ctx = np->first_rx_ctx;
Szymon Janc78aea4f2010-11-27 08:39:43 +00001762 } else
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001763 return 1;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001764 }
1765 return 0;
1766}
1767
1768static int nv_alloc_rx_optimized(struct net_device *dev)
1769{
1770 struct fe_priv *np = netdev_priv(dev);
Szymon Janc78aea4f2010-11-27 08:39:43 +00001771 struct ring_desc_ex *less_rx;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001772
1773 less_rx = np->get_rx.ex;
1774 if (less_rx-- == np->first_rx.ex)
1775 less_rx = np->last_rx.ex;
1776
1777 while (np->put_rx.ex != less_rx) {
1778 struct sk_buff *skb = dev_alloc_skb(np->rx_buf_sz + NV_RX_ALLOC_PAD);
1779 if (skb) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001780 np->put_rx_ctx->skb = skb;
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07001781 np->put_rx_ctx->dma = pci_map_single(np->pci_dev,
1782 skb->data,
Arnaldo Carvalho de Melo8b5be262007-03-20 12:08:20 -03001783 skb_tailroom(skb),
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07001784 PCI_DMA_FROMDEVICE);
Arnaldo Carvalho de Melo8b5be262007-03-20 12:08:20 -03001785 np->put_rx_ctx->dma_len = skb_tailroom(skb);
Al Viro5bb7ea22007-12-09 16:06:41 +00001786 np->put_rx.ex->bufhigh = cpu_to_le32(dma_high(np->put_rx_ctx->dma));
1787 np->put_rx.ex->buflow = cpu_to_le32(dma_low(np->put_rx_ctx->dma));
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001788 wmb();
1789 np->put_rx.ex->flaglen = cpu_to_le32(np->rx_buf_sz | NV_RX2_AVAIL);
Ayaz Abdullab01867c2007-01-21 18:10:52 -05001790 if (unlikely(np->put_rx.ex++ == np->last_rx.ex))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001791 np->put_rx.ex = np->first_rx.ex;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05001792 if (unlikely(np->put_rx_ctx++ == np->last_rx_ctx))
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05001793 np->put_rx_ctx = np->first_rx_ctx;
Szymon Janc78aea4f2010-11-27 08:39:43 +00001794 } else
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05001795 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001796 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001797 return 0;
1798}
1799
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07001800/* If rx bufs are exhausted called after 50ms to attempt to refresh */
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07001801static void nv_do_rx_refill(unsigned long data)
1802{
1803 struct net_device *dev = (struct net_device *) data;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001804 struct fe_priv *np = netdev_priv(dev);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07001805
1806 /* Just reschedule NAPI rx processing */
Ben Hutchings288379f2009-01-19 16:43:59 -08001807 napi_schedule(&np->napi);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07001808}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001809
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001810static void nv_init_rx(struct net_device *dev)
Manfred Sprauld81c0982005-07-31 18:20:30 +02001811{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001812 struct fe_priv *np = netdev_priv(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02001813 int i;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001814
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001815 np->get_rx = np->put_rx = np->first_rx = np->rx_ring;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001816
1817 if (!nv_optimized(np))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001818 np->last_rx.orig = &np->rx_ring.orig[np->rx_ring_size-1];
1819 else
1820 np->last_rx.ex = &np->rx_ring.ex[np->rx_ring_size-1];
1821 np->get_rx_ctx = np->put_rx_ctx = np->first_rx_ctx = np->rx_skb;
1822 np->last_rx_ctx = &np->rx_skb[np->rx_ring_size-1];
Manfred Sprauld81c0982005-07-31 18:20:30 +02001823
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001824 for (i = 0; i < np->rx_ring_size; i++) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001825 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001826 np->rx_ring.orig[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001827 np->rx_ring.orig[i].buf = 0;
1828 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001829 np->rx_ring.ex[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001830 np->rx_ring.ex[i].txvlan = 0;
1831 np->rx_ring.ex[i].bufhigh = 0;
1832 np->rx_ring.ex[i].buflow = 0;
1833 }
1834 np->rx_skb[i].skb = NULL;
1835 np->rx_skb[i].dma = 0;
1836 }
Manfred Sprauld81c0982005-07-31 18:20:30 +02001837}
1838
1839static void nv_init_tx(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001840{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001841 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001842 int i;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001843
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001844 np->get_tx = np->put_tx = np->first_tx = np->tx_ring;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001845
1846 if (!nv_optimized(np))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001847 np->last_tx.orig = &np->tx_ring.orig[np->tx_ring_size-1];
1848 else
1849 np->last_tx.ex = &np->tx_ring.ex[np->tx_ring_size-1];
1850 np->get_tx_ctx = np->put_tx_ctx = np->first_tx_ctx = np->tx_skb;
1851 np->last_tx_ctx = &np->tx_skb[np->tx_ring_size-1];
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001852 np->tx_pkts_in_progress = 0;
1853 np->tx_change_owner = NULL;
1854 np->tx_end_flip = NULL;
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00001855 np->tx_stop = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001856
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001857 for (i = 0; i < np->tx_ring_size; i++) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001858 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001859 np->tx_ring.orig[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001860 np->tx_ring.orig[i].buf = 0;
1861 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001862 np->tx_ring.ex[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001863 np->tx_ring.ex[i].txvlan = 0;
1864 np->tx_ring.ex[i].bufhigh = 0;
1865 np->tx_ring.ex[i].buflow = 0;
1866 }
1867 np->tx_skb[i].skb = NULL;
1868 np->tx_skb[i].dma = 0;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001869 np->tx_skb[i].dma_len = 0;
Eric Dumazet73a37072009-06-17 21:17:59 +00001870 np->tx_skb[i].dma_single = 0;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001871 np->tx_skb[i].first_tx_desc = NULL;
1872 np->tx_skb[i].next_tx_ctx = NULL;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001873 }
Manfred Sprauld81c0982005-07-31 18:20:30 +02001874}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001875
Manfred Sprauld81c0982005-07-31 18:20:30 +02001876static int nv_init_ring(struct net_device *dev)
1877{
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001878 struct fe_priv *np = netdev_priv(dev);
1879
Manfred Sprauld81c0982005-07-31 18:20:30 +02001880 nv_init_tx(dev);
1881 nv_init_rx(dev);
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001882
1883 if (!nv_optimized(np))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05001884 return nv_alloc_rx(dev);
1885 else
1886 return nv_alloc_rx_optimized(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001887}
1888
Eric Dumazet73a37072009-06-17 21:17:59 +00001889static void nv_unmap_txskb(struct fe_priv *np, struct nv_skb_map *tx_skb)
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001890{
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001891 if (tx_skb->dma) {
Eric Dumazet73a37072009-06-17 21:17:59 +00001892 if (tx_skb->dma_single)
1893 pci_unmap_single(np->pci_dev, tx_skb->dma,
1894 tx_skb->dma_len,
1895 PCI_DMA_TODEVICE);
1896 else
1897 pci_unmap_page(np->pci_dev, tx_skb->dma,
1898 tx_skb->dma_len,
1899 PCI_DMA_TODEVICE);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001900 tx_skb->dma = 0;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001901 }
Eric Dumazet73a37072009-06-17 21:17:59 +00001902}
1903
1904static int nv_release_txskb(struct fe_priv *np, struct nv_skb_map *tx_skb)
1905{
1906 nv_unmap_txskb(np, tx_skb);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001907 if (tx_skb->skb) {
1908 dev_kfree_skb_any(tx_skb->skb);
1909 tx_skb->skb = NULL;
Ayaz Abdullafa454592006-01-05 22:45:45 -08001910 return 1;
Ayaz Abdullafa454592006-01-05 22:45:45 -08001911 }
Eric Dumazet73a37072009-06-17 21:17:59 +00001912 return 0;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001913}
1914
Linus Torvalds1da177e2005-04-16 15:20:36 -07001915static void nv_drain_tx(struct net_device *dev)
1916{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001917 struct fe_priv *np = netdev_priv(dev);
1918 unsigned int i;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04001919
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001920 for (i = 0; i < np->tx_ring_size; i++) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001921 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001922 np->tx_ring.orig[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001923 np->tx_ring.orig[i].buf = 0;
1924 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001925 np->tx_ring.ex[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001926 np->tx_ring.ex[i].txvlan = 0;
1927 np->tx_ring.ex[i].bufhigh = 0;
1928 np->tx_ring.ex[i].buflow = 0;
1929 }
Eric Dumazet73a37072009-06-17 21:17:59 +00001930 if (nv_release_txskb(np, &np->tx_skb[i]))
Jeff Garzik8148ff42007-10-16 20:56:09 -04001931 dev->stats.tx_dropped++;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001932 np->tx_skb[i].dma = 0;
1933 np->tx_skb[i].dma_len = 0;
Eric Dumazet73a37072009-06-17 21:17:59 +00001934 np->tx_skb[i].dma_single = 0;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001935 np->tx_skb[i].first_tx_desc = NULL;
1936 np->tx_skb[i].next_tx_ctx = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001937 }
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05001938 np->tx_pkts_in_progress = 0;
1939 np->tx_change_owner = NULL;
1940 np->tx_end_flip = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001941}
1942
1943static void nv_drain_rx(struct net_device *dev)
1944{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04001945 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001946 int i;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001947
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04001948 for (i = 0; i < np->rx_ring_size; i++) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001949 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001950 np->rx_ring.orig[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001951 np->rx_ring.orig[i].buf = 0;
1952 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07001953 np->rx_ring.ex[i].flaglen = 0;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001954 np->rx_ring.ex[i].txvlan = 0;
1955 np->rx_ring.ex[i].bufhigh = 0;
1956 np->rx_ring.ex[i].buflow = 0;
1957 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001958 wmb();
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001959 if (np->rx_skb[i].skb) {
1960 pci_unmap_single(np->pci_dev, np->rx_skb[i].dma,
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07001961 (skb_end_pointer(np->rx_skb[i].skb) -
1962 np->rx_skb[i].skb->data),
1963 PCI_DMA_FROMDEVICE);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001964 dev_kfree_skb(np->rx_skb[i].skb);
1965 np->rx_skb[i].skb = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001966 }
1967 }
1968}
1969
Jeff Garzik36b30ea2007-10-16 01:40:30 -04001970static void nv_drain_rxtx(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001971{
1972 nv_drain_tx(dev);
1973 nv_drain_rx(dev);
1974}
1975
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05001976static inline u32 nv_get_empty_tx_slots(struct fe_priv *np)
1977{
1978 return (u32)(np->tx_ring_size - ((np->tx_ring_size + (np->put_tx_ctx - np->get_tx_ctx)) % np->tx_ring_size));
1979}
1980
Ayaz Abdullaa4336862008-04-18 13:50:43 -07001981static void nv_legacybackoff_reseed(struct net_device *dev)
1982{
1983 u8 __iomem *base = get_hwbase(dev);
1984 u32 reg;
1985 u32 low;
1986 int tx_status = 0;
1987
1988 reg = readl(base + NvRegSlotTime) & ~NVREG_SLOTTIME_MASK;
1989 get_random_bytes(&low, sizeof(low));
1990 reg |= low & NVREG_SLOTTIME_MASK;
1991
1992 /* Need to stop tx before change takes effect.
1993 * Caller has already gained np->lock.
1994 */
1995 tx_status = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START;
1996 if (tx_status)
1997 nv_stop_tx(dev);
1998 nv_stop_rx(dev);
1999 writel(reg, base + NvRegSlotTime);
2000 if (tx_status)
2001 nv_start_tx(dev);
2002 nv_start_rx(dev);
2003}
2004
2005/* Gear Backoff Seeds */
2006#define BACKOFF_SEEDSET_ROWS 8
2007#define BACKOFF_SEEDSET_LFSRS 15
2008
2009/* Known Good seed sets */
2010static const u32 main_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002011 {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
2012 {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 385, 761, 790, 974},
2013 {145, 155, 165, 175, 185, 196, 235, 245, 255, 265, 275, 285, 660, 690, 874},
2014 {245, 255, 265, 575, 385, 298, 335, 345, 355, 366, 375, 386, 761, 790, 974},
2015 {266, 265, 276, 585, 397, 208, 345, 355, 365, 376, 385, 396, 771, 700, 984},
2016 {266, 265, 276, 586, 397, 208, 346, 355, 365, 376, 285, 396, 771, 700, 984},
2017 {366, 365, 376, 686, 497, 308, 447, 455, 466, 476, 485, 496, 871, 800, 84},
2018 {466, 465, 476, 786, 597, 408, 547, 555, 566, 576, 585, 597, 971, 900, 184} };
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002019
2020static const u32 gear_seedset[BACKOFF_SEEDSET_ROWS][BACKOFF_SEEDSET_LFSRS] = {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002021 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
2022 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
2023 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 397},
2024 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
2025 {251, 262, 273, 324, 319, 508, 375, 364, 341, 371, 398, 193, 375, 30, 295},
2026 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
2027 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395},
2028 {351, 375, 373, 469, 551, 639, 477, 464, 441, 472, 498, 293, 476, 130, 395} };
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002029
2030static void nv_gear_backoff_reseed(struct net_device *dev)
2031{
2032 u8 __iomem *base = get_hwbase(dev);
2033 u32 miniseed1, miniseed2, miniseed2_reversed, miniseed3, miniseed3_reversed;
2034 u32 temp, seedset, combinedSeed;
2035 int i;
2036
2037 /* Setup seed for free running LFSR */
2038 /* We are going to read the time stamp counter 3 times
2039 and swizzle bits around to increase randomness */
2040 get_random_bytes(&miniseed1, sizeof(miniseed1));
2041 miniseed1 &= 0x0fff;
2042 if (miniseed1 == 0)
2043 miniseed1 = 0xabc;
2044
2045 get_random_bytes(&miniseed2, sizeof(miniseed2));
2046 miniseed2 &= 0x0fff;
2047 if (miniseed2 == 0)
2048 miniseed2 = 0xabc;
2049 miniseed2_reversed =
2050 ((miniseed2 & 0xF00) >> 8) |
2051 (miniseed2 & 0x0F0) |
2052 ((miniseed2 & 0x00F) << 8);
2053
2054 get_random_bytes(&miniseed3, sizeof(miniseed3));
2055 miniseed3 &= 0x0fff;
2056 if (miniseed3 == 0)
2057 miniseed3 = 0xabc;
2058 miniseed3_reversed =
2059 ((miniseed3 & 0xF00) >> 8) |
2060 (miniseed3 & 0x0F0) |
2061 ((miniseed3 & 0x00F) << 8);
2062
2063 combinedSeed = ((miniseed1 ^ miniseed2_reversed) << 12) |
2064 (miniseed2 ^ miniseed3_reversed);
2065
2066 /* Seeds can not be zero */
2067 if ((combinedSeed & NVREG_BKOFFCTRL_SEED_MASK) == 0)
2068 combinedSeed |= 0x08;
2069 if ((combinedSeed & (NVREG_BKOFFCTRL_SEED_MASK << NVREG_BKOFFCTRL_GEAR)) == 0)
2070 combinedSeed |= 0x8000;
2071
2072 /* No need to disable tx here */
2073 temp = NVREG_BKOFFCTRL_DEFAULT | (0 << NVREG_BKOFFCTRL_SELECT);
2074 temp |= combinedSeed & NVREG_BKOFFCTRL_SEED_MASK;
2075 temp |= combinedSeed >> NVREG_BKOFFCTRL_GEAR;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002076 writel(temp, base + NvRegBackOffControl);
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002077
Szymon Janc78aea4f2010-11-27 08:39:43 +00002078 /* Setup seeds for all gear LFSRs. */
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002079 get_random_bytes(&seedset, sizeof(seedset));
2080 seedset = seedset % BACKOFF_SEEDSET_ROWS;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002081 for (i = 1; i <= BACKOFF_SEEDSET_LFSRS; i++) {
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002082 temp = NVREG_BKOFFCTRL_DEFAULT | (i << NVREG_BKOFFCTRL_SELECT);
2083 temp |= main_seedset[seedset][i-1] & 0x3ff;
2084 temp |= ((gear_seedset[seedset][i-1] & 0x3ff) << NVREG_BKOFFCTRL_GEAR);
2085 writel(temp, base + NvRegBackOffControl);
2086 }
2087}
2088
Linus Torvalds1da177e2005-04-16 15:20:36 -07002089/*
2090 * nv_start_xmit: dev->hard_start_xmit function
Herbert Xu932ff272006-06-09 12:20:56 -07002091 * Called with netif_tx_lock held.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002092 */
Stephen Hemminger613573252009-08-31 19:50:58 +00002093static netdev_tx_t nv_start_xmit(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002094{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002095 struct fe_priv *np = netdev_priv(dev);
Ayaz Abdullafa454592006-01-05 22:45:45 -08002096 u32 tx_flags = 0;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002097 u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
2098 unsigned int fragments = skb_shinfo(skb)->nr_frags;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002099 unsigned int i;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002100 u32 offset = 0;
2101 u32 bcnt;
Eric Dumazete743d312010-04-14 15:59:40 -07002102 u32 size = skb_headlen(skb);
Ayaz Abdullafa454592006-01-05 22:45:45 -08002103 u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002104 u32 empty_slots;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002105 struct ring_desc *put_tx;
2106 struct ring_desc *start_tx;
2107 struct ring_desc *prev_tx;
2108 struct nv_skb_map *prev_tx_ctx;
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002109 unsigned long flags;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002110
2111 /* add fragments to entries count */
2112 for (i = 0; i < fragments; i++) {
2113 entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
2114 ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
2115 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002116
Ayaz Abdulla001eb842009-01-09 11:03:44 +00002117 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002118 empty_slots = nv_get_empty_tx_slots(np);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002119 if (unlikely(empty_slots <= entries)) {
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002120 netif_stop_queue(dev);
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002121 np->tx_stop = 1;
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002122 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002123 return NETDEV_TX_BUSY;
2124 }
Ayaz Abdulla001eb842009-01-09 11:03:44 +00002125 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002126
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002127 start_tx = put_tx = np->put_tx.orig;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002128
Ayaz Abdullafa454592006-01-05 22:45:45 -08002129 /* setup the header buffer */
2130 do {
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002131 prev_tx = put_tx;
2132 prev_tx_ctx = np->put_tx_ctx;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002133 bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002134 np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
Ayaz Abdullafa454592006-01-05 22:45:45 -08002135 PCI_DMA_TODEVICE);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002136 np->put_tx_ctx->dma_len = bcnt;
Eric Dumazet73a37072009-06-17 21:17:59 +00002137 np->put_tx_ctx->dma_single = 1;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002138 put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma);
2139 put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002140
Ayaz Abdullafa454592006-01-05 22:45:45 -08002141 tx_flags = np->tx_flags;
2142 offset += bcnt;
2143 size -= bcnt;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002144 if (unlikely(put_tx++ == np->last_tx.orig))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002145 put_tx = np->first_tx.orig;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002146 if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002147 np->put_tx_ctx = np->first_tx_ctx;
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002148 } while (size);
Ayaz Abdullafa454592006-01-05 22:45:45 -08002149
2150 /* setup the fragments */
2151 for (i = 0; i < fragments; i++) {
2152 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2153 u32 size = frag->size;
2154 offset = 0;
2155
2156 do {
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002157 prev_tx = put_tx;
2158 prev_tx_ctx = np->put_tx_ctx;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002159 bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002160 np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
2161 PCI_DMA_TODEVICE);
2162 np->put_tx_ctx->dma_len = bcnt;
Eric Dumazet73a37072009-06-17 21:17:59 +00002163 np->put_tx_ctx->dma_single = 0;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002164 put_tx->buf = cpu_to_le32(np->put_tx_ctx->dma);
2165 put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002166
Ayaz Abdullafa454592006-01-05 22:45:45 -08002167 offset += bcnt;
2168 size -= bcnt;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002169 if (unlikely(put_tx++ == np->last_tx.orig))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002170 put_tx = np->first_tx.orig;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002171 if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002172 np->put_tx_ctx = np->first_tx_ctx;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002173 } while (size);
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002174 }
2175
Ayaz Abdullafa454592006-01-05 22:45:45 -08002176 /* set last fragment flag */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002177 prev_tx->flaglen |= cpu_to_le32(tx_flags_extra);
Ayaz Abdullafa454592006-01-05 22:45:45 -08002178
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002179 /* save skb in this slot's context area */
2180 prev_tx_ctx->skb = skb;
Ayaz Abdullafa454592006-01-05 22:45:45 -08002181
Herbert Xu89114af2006-07-08 13:34:32 -07002182 if (skb_is_gso(skb))
Herbert Xu79671682006-06-22 02:40:14 -07002183 tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT);
Manfred Spraulee733622005-07-31 18:32:26 +02002184 else
Arjan van de Ven1d39ed52006-12-12 14:06:23 +01002185 tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ?
Patrick McHardy84fa7932006-08-29 16:44:56 -07002186 NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002187
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002188 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdulla164a86e2007-01-09 13:30:10 -05002189
Ayaz Abdullafa454592006-01-05 22:45:45 -08002190 /* set tx flags */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002191 start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
2192 np->put_tx.orig = put_tx;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002193
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002194 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002195
2196 dprintk(KERN_DEBUG "%s: nv_start_xmit: entries %d queued for transmission. tx_flags_extra: %x\n",
2197 dev->name, entries, tx_flags_extra);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002198 {
2199 int j;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002200 for (j = 0; j < 64; j++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002201 if ((j%16) == 0)
2202 dprintk("\n%03x:", j);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002203 dprintk(" %02x", ((unsigned char *)skb->data)[j]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002204 }
2205 dprintk("\n");
2206 }
2207
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04002208 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002209 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002210}
2211
Stephen Hemminger613573252009-08-31 19:50:58 +00002212static netdev_tx_t nv_start_xmit_optimized(struct sk_buff *skb,
2213 struct net_device *dev)
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002214{
2215 struct fe_priv *np = netdev_priv(dev);
2216 u32 tx_flags = 0;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002217 u32 tx_flags_extra;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002218 unsigned int fragments = skb_shinfo(skb)->nr_frags;
2219 unsigned int i;
2220 u32 offset = 0;
2221 u32 bcnt;
Eric Dumazete743d312010-04-14 15:59:40 -07002222 u32 size = skb_headlen(skb);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002223 u32 entries = (size >> NV_TX2_TSO_MAX_SHIFT) + ((size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
2224 u32 empty_slots;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002225 struct ring_desc_ex *put_tx;
2226 struct ring_desc_ex *start_tx;
2227 struct ring_desc_ex *prev_tx;
2228 struct nv_skb_map *prev_tx_ctx;
2229 struct nv_skb_map *start_tx_ctx;
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002230 unsigned long flags;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002231
2232 /* add fragments to entries count */
2233 for (i = 0; i < fragments; i++) {
2234 entries += (skb_shinfo(skb)->frags[i].size >> NV_TX2_TSO_MAX_SHIFT) +
2235 ((skb_shinfo(skb)->frags[i].size & (NV_TX2_TSO_MAX_SIZE-1)) ? 1 : 0);
2236 }
2237
Ayaz Abdulla001eb842009-01-09 11:03:44 +00002238 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002239 empty_slots = nv_get_empty_tx_slots(np);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002240 if (unlikely(empty_slots <= entries)) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002241 netif_stop_queue(dev);
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002242 np->tx_stop = 1;
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002243 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002244 return NETDEV_TX_BUSY;
2245 }
Ayaz Abdulla001eb842009-01-09 11:03:44 +00002246 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002247
2248 start_tx = put_tx = np->put_tx.ex;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002249 start_tx_ctx = np->put_tx_ctx;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002250
2251 /* setup the header buffer */
2252 do {
2253 prev_tx = put_tx;
2254 prev_tx_ctx = np->put_tx_ctx;
2255 bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
2256 np->put_tx_ctx->dma = pci_map_single(np->pci_dev, skb->data + offset, bcnt,
2257 PCI_DMA_TODEVICE);
2258 np->put_tx_ctx->dma_len = bcnt;
Eric Dumazet73a37072009-06-17 21:17:59 +00002259 np->put_tx_ctx->dma_single = 1;
Al Viro5bb7ea22007-12-09 16:06:41 +00002260 put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma));
2261 put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma));
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002262 put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002263
2264 tx_flags = NV_TX2_VALID;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002265 offset += bcnt;
2266 size -= bcnt;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002267 if (unlikely(put_tx++ == np->last_tx.ex))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002268 put_tx = np->first_tx.ex;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002269 if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002270 np->put_tx_ctx = np->first_tx_ctx;
2271 } while (size);
2272
2273 /* setup the fragments */
2274 for (i = 0; i < fragments; i++) {
2275 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2276 u32 size = frag->size;
2277 offset = 0;
2278
2279 do {
2280 prev_tx = put_tx;
2281 prev_tx_ctx = np->put_tx_ctx;
2282 bcnt = (size > NV_TX2_TSO_MAX_SIZE) ? NV_TX2_TSO_MAX_SIZE : size;
2283 np->put_tx_ctx->dma = pci_map_page(np->pci_dev, frag->page, frag->page_offset+offset, bcnt,
2284 PCI_DMA_TODEVICE);
2285 np->put_tx_ctx->dma_len = bcnt;
Eric Dumazet73a37072009-06-17 21:17:59 +00002286 np->put_tx_ctx->dma_single = 0;
Al Viro5bb7ea22007-12-09 16:06:41 +00002287 put_tx->bufhigh = cpu_to_le32(dma_high(np->put_tx_ctx->dma));
2288 put_tx->buflow = cpu_to_le32(dma_low(np->put_tx_ctx->dma));
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002289 put_tx->flaglen = cpu_to_le32((bcnt-1) | tx_flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002290
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002291 offset += bcnt;
2292 size -= bcnt;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002293 if (unlikely(put_tx++ == np->last_tx.ex))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002294 put_tx = np->first_tx.ex;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002295 if (unlikely(np->put_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002296 np->put_tx_ctx = np->first_tx_ctx;
2297 } while (size);
2298 }
2299
2300 /* set last fragment flag */
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002301 prev_tx->flaglen |= cpu_to_le32(NV_TX2_LASTPACKET);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002302
2303 /* save skb in this slot's context area */
2304 prev_tx_ctx->skb = skb;
2305
2306 if (skb_is_gso(skb))
2307 tx_flags_extra = NV_TX2_TSO | (skb_shinfo(skb)->gso_size << NV_TX2_TSO_SHIFT);
2308 else
2309 tx_flags_extra = skb->ip_summed == CHECKSUM_PARTIAL ?
2310 NV_TX2_CHECKSUM_L3 | NV_TX2_CHECKSUM_L4 : 0;
2311
2312 /* vlan tag */
Jesse Grosseab6d182010-10-20 13:56:03 +00002313 if (vlan_tx_tag_present(skb))
2314 start_tx->txvlan = cpu_to_le32(NV_TX3_VLAN_TAG_PRESENT |
2315 vlan_tx_tag_get(skb));
2316 else
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002317 start_tx->txvlan = 0;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002318
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002319 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002320
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002321 if (np->tx_limit) {
2322 /* Limit the number of outstanding tx. Setup all fragments, but
2323 * do not set the VALID bit on the first descriptor. Save a pointer
2324 * to that descriptor and also for next skb_map element.
2325 */
2326
2327 if (np->tx_pkts_in_progress == NV_TX_LIMIT_COUNT) {
2328 if (!np->tx_change_owner)
2329 np->tx_change_owner = start_tx_ctx;
2330
2331 /* remove VALID bit */
2332 tx_flags &= ~NV_TX2_VALID;
2333 start_tx_ctx->first_tx_desc = start_tx;
2334 start_tx_ctx->next_tx_ctx = np->put_tx_ctx;
2335 np->tx_end_flip = np->put_tx_ctx;
2336 } else {
2337 np->tx_pkts_in_progress++;
2338 }
2339 }
2340
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002341 /* set tx flags */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002342 start_tx->flaglen |= cpu_to_le32(tx_flags | tx_flags_extra);
2343 np->put_tx.ex = put_tx;
2344
Ingo Molnarbd6ca632008-03-28 14:41:30 -07002345 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002346
2347 dprintk(KERN_DEBUG "%s: nv_start_xmit_optimized: entries %d queued for transmission. tx_flags_extra: %x\n",
2348 dev->name, entries, tx_flags_extra);
2349 {
2350 int j;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002351 for (j = 0; j < 64; j++) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002352 if ((j%16) == 0)
2353 dprintk("\n%03x:", j);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002354 dprintk(" %02x", ((unsigned char *)skb->data)[j]);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002355 }
2356 dprintk("\n");
2357 }
2358
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002359 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002360 return NETDEV_TX_OK;
2361}
2362
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002363static inline void nv_tx_flip_ownership(struct net_device *dev)
2364{
2365 struct fe_priv *np = netdev_priv(dev);
2366
2367 np->tx_pkts_in_progress--;
2368 if (np->tx_change_owner) {
Al Viro30ecce92008-03-26 05:57:12 +00002369 np->tx_change_owner->first_tx_desc->flaglen |=
2370 cpu_to_le32(NV_TX2_VALID);
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002371 np->tx_pkts_in_progress++;
2372
2373 np->tx_change_owner = np->tx_change_owner->next_tx_ctx;
2374 if (np->tx_change_owner == np->tx_end_flip)
2375 np->tx_change_owner = NULL;
2376
2377 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
2378 }
2379}
2380
Linus Torvalds1da177e2005-04-16 15:20:36 -07002381/*
2382 * nv_tx_done: check for completed packets, release the skbs.
2383 *
2384 * Caller must own np->lock.
2385 */
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002386static int nv_tx_done(struct net_device *dev, int limit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002387{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002388 struct fe_priv *np = netdev_priv(dev);
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002389 u32 flags;
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002390 int tx_work = 0;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002391 struct ring_desc *orig_get_tx = np->get_tx.orig;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002392
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002393 while ((np->get_tx.orig != np->put_tx.orig) &&
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002394 !((flags = le32_to_cpu(np->get_tx.orig->flaglen)) & NV_TX_VALID) &&
2395 (tx_work < limit)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002396
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002397 dprintk(KERN_DEBUG "%s: nv_tx_done: flags 0x%x.\n",
2398 dev->name, flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002399
Eric Dumazet73a37072009-06-17 21:17:59 +00002400 nv_unmap_txskb(np, np->get_tx_ctx);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002401
Linus Torvalds1da177e2005-04-16 15:20:36 -07002402 if (np->desc_ver == DESC_VER_1) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002403 if (flags & NV_TX_LASTPACKET) {
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002404 if (flags & NV_TX_ERROR) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002405 if (flags & NV_TX_UNDERFLOW)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002406 dev->stats.tx_fifo_errors++;
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002407 if (flags & NV_TX_CARRIERLOST)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002408 dev->stats.tx_carrier_errors++;
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002409 if ((flags & NV_TX_RETRYERROR) && !(flags & NV_TX_RETRYCOUNT_MASK))
2410 nv_legacybackoff_reseed(dev);
Jeff Garzik8148ff42007-10-16 20:56:09 -04002411 dev->stats.tx_errors++;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002412 } else {
Jeff Garzik8148ff42007-10-16 20:56:09 -04002413 dev->stats.tx_packets++;
2414 dev->stats.tx_bytes += np->get_tx_ctx->skb->len;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002415 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002416 dev_kfree_skb_any(np->get_tx_ctx->skb);
2417 np->get_tx_ctx->skb = NULL;
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002418 tx_work++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002419 }
2420 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002421 if (flags & NV_TX2_LASTPACKET) {
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002422 if (flags & NV_TX2_ERROR) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002423 if (flags & NV_TX2_UNDERFLOW)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002424 dev->stats.tx_fifo_errors++;
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002425 if (flags & NV_TX2_CARRIERLOST)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002426 dev->stats.tx_carrier_errors++;
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002427 if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK))
2428 nv_legacybackoff_reseed(dev);
Jeff Garzik8148ff42007-10-16 20:56:09 -04002429 dev->stats.tx_errors++;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002430 } else {
Jeff Garzik8148ff42007-10-16 20:56:09 -04002431 dev->stats.tx_packets++;
2432 dev->stats.tx_bytes += np->get_tx_ctx->skb->len;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04002433 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002434 dev_kfree_skb_any(np->get_tx_ctx->skb);
2435 np->get_tx_ctx->skb = NULL;
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002436 tx_work++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002437 }
2438 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002439 if (unlikely(np->get_tx.orig++ == np->last_tx.orig))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002440 np->get_tx.orig = np->first_tx.orig;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002441 if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002442 np->get_tx_ctx = np->first_tx_ctx;
2443 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002444 if (unlikely((np->tx_stop == 1) && (np->get_tx.orig != orig_get_tx))) {
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002445 np->tx_stop = 0;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002446 netif_wake_queue(dev);
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002447 }
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002448 return tx_work;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002449}
2450
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002451static int nv_tx_done_optimized(struct net_device *dev, int limit)
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002452{
2453 struct fe_priv *np = netdev_priv(dev);
2454 u32 flags;
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002455 int tx_work = 0;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002456 struct ring_desc_ex *orig_get_tx = np->get_tx.ex;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002457
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002458 while ((np->get_tx.ex != np->put_tx.ex) &&
Julia Lawall217d32d2010-07-05 22:15:47 -07002459 !((flags = le32_to_cpu(np->get_tx.ex->flaglen)) & NV_TX2_VALID) &&
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002460 (tx_work < limit)) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002461
2462 dprintk(KERN_DEBUG "%s: nv_tx_done_optimized: flags 0x%x.\n",
2463 dev->name, flags);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002464
Eric Dumazet73a37072009-06-17 21:17:59 +00002465 nv_unmap_txskb(np, np->get_tx_ctx);
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002466
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002467 if (flags & NV_TX2_LASTPACKET) {
Ayaz Abdulla21828162007-01-23 12:27:21 -05002468 if (!(flags & NV_TX2_ERROR))
Jeff Garzik8148ff42007-10-16 20:56:09 -04002469 dev->stats.tx_packets++;
Ayaz Abdullaa4336862008-04-18 13:50:43 -07002470 else {
2471 if ((flags & NV_TX2_RETRYERROR) && !(flags & NV_TX2_RETRYCOUNT_MASK)) {
2472 if (np->driver_data & DEV_HAS_GEAR_MODE)
2473 nv_gear_backoff_reseed(dev);
2474 else
2475 nv_legacybackoff_reseed(dev);
2476 }
2477 }
2478
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002479 dev_kfree_skb_any(np->get_tx_ctx->skb);
2480 np->get_tx_ctx->skb = NULL;
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002481 tx_work++;
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002482
Szymon Janc78aea4f2010-11-27 08:39:43 +00002483 if (np->tx_limit)
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05002484 nv_tx_flip_ownership(dev);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002485 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002486 if (unlikely(np->get_tx.ex++ == np->last_tx.ex))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002487 np->get_tx.ex = np->first_tx.ex;
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002488 if (unlikely(np->get_tx_ctx++ == np->last_tx_ctx))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002489 np->get_tx_ctx = np->first_tx_ctx;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002490 }
Ayaz Abdulla445583b2007-01-21 18:10:47 -05002491 if (unlikely((np->tx_stop == 1) && (np->get_tx.ex != orig_get_tx))) {
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002492 np->tx_stop = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002493 netif_wake_queue(dev);
Ayaz Abdullaaaa37d22007-01-21 18:10:42 -05002494 }
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002495 return tx_work;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002496}
2497
2498/*
2499 * nv_tx_timeout: dev->tx_timeout function
Herbert Xu932ff272006-06-09 12:20:56 -07002500 * Called with netif_tx_lock held.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002501 */
2502static void nv_tx_timeout(struct net_device *dev)
2503{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002504 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002505 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05002506 u32 status;
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002507 union ring_type put_tx;
2508 int saved_tx_limit;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002509
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05002510 if (np->msi_flags & NV_MSI_X_ENABLED)
2511 status = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
2512 else
2513 status = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
2514
2515 printk(KERN_INFO "%s: Got tx_timeout. irq: %08x\n", dev->name, status);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002516
Manfred Spraulc2dba062005-07-31 18:29:47 +02002517 {
2518 int i;
2519
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002520 printk(KERN_INFO "%s: Ring at %lx\n",
2521 dev->name, (unsigned long)np->ring_addr);
Manfred Spraulc2dba062005-07-31 18:29:47 +02002522 printk(KERN_INFO "%s: Dumping tx registers\n", dev->name);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002523 for (i = 0; i <= np->register_size; i += 32) {
Manfred Spraulc2dba062005-07-31 18:29:47 +02002524 printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
2525 i,
2526 readl(base + i + 0), readl(base + i + 4),
2527 readl(base + i + 8), readl(base + i + 12),
2528 readl(base + i + 16), readl(base + i + 20),
2529 readl(base + i + 24), readl(base + i + 28));
2530 }
2531 printk(KERN_INFO "%s: Dumping tx ring\n", dev->name);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002532 for (i = 0; i < np->tx_ring_size; i += 4) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04002533 if (!nv_optimized(np)) {
Manfred Spraulee733622005-07-31 18:32:26 +02002534 printk(KERN_INFO "%03x: %08x %08x // %08x %08x // %08x %08x // %08x %08x\n",
Jeff Garzikf3b197a2006-05-26 21:39:03 -04002535 i,
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002536 le32_to_cpu(np->tx_ring.orig[i].buf),
2537 le32_to_cpu(np->tx_ring.orig[i].flaglen),
2538 le32_to_cpu(np->tx_ring.orig[i+1].buf),
2539 le32_to_cpu(np->tx_ring.orig[i+1].flaglen),
2540 le32_to_cpu(np->tx_ring.orig[i+2].buf),
2541 le32_to_cpu(np->tx_ring.orig[i+2].flaglen),
2542 le32_to_cpu(np->tx_ring.orig[i+3].buf),
2543 le32_to_cpu(np->tx_ring.orig[i+3].flaglen));
Manfred Spraulee733622005-07-31 18:32:26 +02002544 } else {
2545 printk(KERN_INFO "%03x: %08x %08x %08x // %08x %08x %08x // %08x %08x %08x // %08x %08x %08x\n",
Jeff Garzikf3b197a2006-05-26 21:39:03 -04002546 i,
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002547 le32_to_cpu(np->tx_ring.ex[i].bufhigh),
2548 le32_to_cpu(np->tx_ring.ex[i].buflow),
2549 le32_to_cpu(np->tx_ring.ex[i].flaglen),
2550 le32_to_cpu(np->tx_ring.ex[i+1].bufhigh),
2551 le32_to_cpu(np->tx_ring.ex[i+1].buflow),
2552 le32_to_cpu(np->tx_ring.ex[i+1].flaglen),
2553 le32_to_cpu(np->tx_ring.ex[i+2].bufhigh),
2554 le32_to_cpu(np->tx_ring.ex[i+2].buflow),
2555 le32_to_cpu(np->tx_ring.ex[i+2].flaglen),
2556 le32_to_cpu(np->tx_ring.ex[i+3].bufhigh),
2557 le32_to_cpu(np->tx_ring.ex[i+3].buflow),
2558 le32_to_cpu(np->tx_ring.ex[i+3].flaglen));
Manfred Spraulee733622005-07-31 18:32:26 +02002559 }
Manfred Spraulc2dba062005-07-31 18:29:47 +02002560 }
2561 }
2562
Linus Torvalds1da177e2005-04-16 15:20:36 -07002563 spin_lock_irq(&np->lock);
2564
2565 /* 1) stop tx engine */
2566 nv_stop_tx(dev);
2567
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002568 /* 2) complete any outstanding tx and do not give HW any limited tx pkts */
2569 saved_tx_limit = np->tx_limit;
2570 np->tx_limit = 0; /* prevent giving HW any limited pkts */
2571 np->tx_stop = 0; /* prevent waking tx queue */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04002572 if (!nv_optimized(np))
Ayaz Abdulla33912e72009-03-05 08:02:10 +00002573 nv_tx_done(dev, np->tx_ring_size);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002574 else
Ayaz Abdulla4e16ed12007-01-23 12:00:56 -05002575 nv_tx_done_optimized(dev, np->tx_ring_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002576
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002577 /* save current HW postion */
2578 if (np->tx_change_owner)
2579 put_tx.ex = np->tx_change_owner->first_tx_desc;
2580 else
2581 put_tx = np->put_tx;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002582
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002583 /* 3) clear all tx state */
2584 nv_drain_tx(dev);
2585 nv_init_tx(dev);
Ayaz Abdulla3ba4d092007-03-23 05:50:02 -05002586
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002587 /* 4) restore state to current HW position */
2588 np->get_tx = np->put_tx = put_tx;
2589 np->tx_limit = saved_tx_limit;
2590
2591 /* 5) restart tx engine */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002592 nv_start_tx(dev);
Ayaz Abdulla8f955d72009-04-25 09:17:56 +00002593 netif_wake_queue(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002594 spin_unlock_irq(&np->lock);
2595}
2596
Manfred Spraul22c6d142005-04-19 21:17:09 +02002597/*
2598 * Called when the nic notices a mismatch between the actual data len on the
2599 * wire and the len indicated in the 802 header
2600 */
2601static int nv_getlen(struct net_device *dev, void *packet, int datalen)
2602{
2603 int hdrlen; /* length of the 802 header */
2604 int protolen; /* length as stored in the proto field */
2605
2606 /* 1) calculate len according to header */
Szymon Janc78aea4f2010-11-27 08:39:43 +00002607 if (((struct vlan_ethhdr *)packet)->h_vlan_proto == htons(ETH_P_8021Q)) {
2608 protolen = ntohs(((struct vlan_ethhdr *)packet)->h_vlan_encapsulated_proto);
Manfred Spraul22c6d142005-04-19 21:17:09 +02002609 hdrlen = VLAN_HLEN;
2610 } else {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002611 protolen = ntohs(((struct ethhdr *)packet)->h_proto);
Manfred Spraul22c6d142005-04-19 21:17:09 +02002612 hdrlen = ETH_HLEN;
2613 }
2614 dprintk(KERN_DEBUG "%s: nv_getlen: datalen %d, protolen %d, hdrlen %d\n",
2615 dev->name, datalen, protolen, hdrlen);
2616 if (protolen > ETH_DATA_LEN)
2617 return datalen; /* Value in proto field not a len, no checks possible */
2618
2619 protolen += hdrlen;
2620 /* consistency checks: */
2621 if (datalen > ETH_ZLEN) {
2622 if (datalen >= protolen) {
2623 /* more data on wire than in 802 header, trim of
2624 * additional data.
2625 */
2626 dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
2627 dev->name, protolen);
2628 return protolen;
2629 } else {
2630 /* less data on wire than mentioned in header.
2631 * Discard the packet.
2632 */
2633 dprintk(KERN_DEBUG "%s: nv_getlen: discarding long packet.\n",
2634 dev->name);
2635 return -1;
2636 }
2637 } else {
2638 /* short packet. Accept only if 802 values are also short */
2639 if (protolen > ETH_ZLEN) {
2640 dprintk(KERN_DEBUG "%s: nv_getlen: discarding short packet.\n",
2641 dev->name);
2642 return -1;
2643 }
2644 dprintk(KERN_DEBUG "%s: nv_getlen: accepting %d bytes.\n",
2645 dev->name, datalen);
2646 return datalen;
2647 }
2648}
2649
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07002650static int nv_rx_process(struct net_device *dev, int limit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002651{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002652 struct fe_priv *np = netdev_priv(dev);
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002653 u32 flags;
Ingo Molnarbcb5feb2007-10-16 20:44:59 -04002654 int rx_work = 0;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002655 struct sk_buff *skb;
2656 int len;
Ayaz Abdullaee407b02006-02-04 13:13:17 -05002657
Szymon Janc78aea4f2010-11-27 08:39:43 +00002658 while ((np->get_rx.orig != np->put_rx.orig) &&
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002659 !((flags = le32_to_cpu(np->get_rx.orig->flaglen)) & NV_RX_AVAIL) &&
Ingo Molnarbcb5feb2007-10-16 20:44:59 -04002660 (rx_work < limit)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002661
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002662 dprintk(KERN_DEBUG "%s: nv_rx_process: flags 0x%x.\n",
2663 dev->name, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002664
Linus Torvalds1da177e2005-04-16 15:20:36 -07002665 /*
2666 * the packet is for us - immediately tear down the pci mapping.
2667 * TODO: check if a prefetch of the first cacheline improves
2668 * the performance.
2669 */
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002670 pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma,
2671 np->get_rx_ctx->dma_len,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002672 PCI_DMA_FROMDEVICE);
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05002673 skb = np->get_rx_ctx->skb;
2674 np->get_rx_ctx->skb = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002675
2676 {
2677 int j;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002678 dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).", flags);
2679 for (j = 0; j < 64; j++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002680 if ((j%16) == 0)
2681 dprintk("\n%03x:", j);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002682 dprintk(" %02x", ((unsigned char *)skb->data)[j]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002683 }
2684 dprintk("\n");
2685 }
2686 /* look at what we actually got: */
2687 if (np->desc_ver == DESC_VER_1) {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002688 if (likely(flags & NV_RX_DESCRIPTORVALID)) {
2689 len = flags & LEN_MASK_V1;
2690 if (unlikely(flags & NV_RX_ERROR)) {
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002691 if ((flags & NV_RX_ERROR_MASK) == NV_RX_ERROR4) {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002692 len = nv_getlen(dev, skb->data, len);
2693 if (len < 0) {
Jeff Garzik8148ff42007-10-16 20:56:09 -04002694 dev->stats.rx_errors++;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002695 dev_kfree_skb(skb);
2696 goto next_pkt;
2697 }
2698 }
2699 /* framing errors are soft errors */
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002700 else if ((flags & NV_RX_ERROR_MASK) == NV_RX_FRAMINGERR) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002701 if (flags & NV_RX_SUBSTRACT1)
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002702 len--;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002703 }
2704 /* the rest are hard errors */
2705 else {
2706 if (flags & NV_RX_MISSEDFRAME)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002707 dev->stats.rx_missed_errors++;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002708 if (flags & NV_RX_CRCERR)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002709 dev->stats.rx_crc_errors++;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002710 if (flags & NV_RX_OVERFLOW)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002711 dev->stats.rx_over_errors++;
2712 dev->stats.rx_errors++;
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05002713 dev_kfree_skb(skb);
Ayaz Abdullaa971c322005-11-11 08:30:38 -05002714 goto next_pkt;
2715 }
2716 }
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002717 } else {
2718 dev_kfree_skb(skb);
2719 goto next_pkt;
Manfred Spraul22c6d142005-04-19 21:17:09 +02002720 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002721 } else {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002722 if (likely(flags & NV_RX2_DESCRIPTORVALID)) {
2723 len = flags & LEN_MASK_V2;
2724 if (unlikely(flags & NV_RX2_ERROR)) {
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002725 if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002726 len = nv_getlen(dev, skb->data, len);
2727 if (len < 0) {
Jeff Garzik8148ff42007-10-16 20:56:09 -04002728 dev->stats.rx_errors++;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002729 dev_kfree_skb(skb);
2730 goto next_pkt;
2731 }
2732 }
2733 /* framing errors are soft errors */
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002734 else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002735 if (flags & NV_RX2_SUBSTRACT1)
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002736 len--;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002737 }
2738 /* the rest are hard errors */
2739 else {
2740 if (flags & NV_RX2_CRCERR)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002741 dev->stats.rx_crc_errors++;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002742 if (flags & NV_RX2_OVERFLOW)
Jeff Garzik8148ff42007-10-16 20:56:09 -04002743 dev->stats.rx_over_errors++;
2744 dev->stats.rx_errors++;
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05002745 dev_kfree_skb(skb);
Ayaz Abdullaa971c322005-11-11 08:30:38 -05002746 goto next_pkt;
2747 }
2748 }
Ayaz Abdullabfaffe82008-01-13 16:02:55 -05002749 if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */
2750 ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */
Ayaz Abdulla0d63fb32007-01-09 13:30:13 -05002751 skb->ip_summed = CHECKSUM_UNNECESSARY;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002752 } else {
2753 dev_kfree_skb(skb);
2754 goto next_pkt;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002755 }
2756 }
2757 /* got a valid packet - forward it to the network core */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002758 skb_put(skb, len);
2759 skb->protocol = eth_type_trans(skb, dev);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002760 dprintk(KERN_DEBUG "%s: nv_rx_process: %d bytes, proto %d accepted.\n",
2761 dev->name, len, skb->protocol);
Tom Herbert53f224c2010-05-03 19:08:45 +00002762 napi_gro_receive(&np->napi, skb);
Jeff Garzik8148ff42007-10-16 20:56:09 -04002763 dev->stats.rx_packets++;
2764 dev->stats.rx_bytes += len;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002765next_pkt:
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002766 if (unlikely(np->get_rx.orig++ == np->last_rx.orig))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002767 np->get_rx.orig = np->first_rx.orig;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002768 if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002769 np->get_rx_ctx = np->first_rx_ctx;
Ingo Molnarbcb5feb2007-10-16 20:44:59 -04002770
2771 rx_work++;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002772 }
2773
Ingo Molnarbcb5feb2007-10-16 20:44:59 -04002774 return rx_work;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002775}
2776
2777static int nv_rx_process_optimized(struct net_device *dev, int limit)
2778{
2779 struct fe_priv *np = netdev_priv(dev);
2780 u32 flags;
2781 u32 vlanflags = 0;
Ingo Molnarc1b71512007-10-17 12:18:23 +02002782 int rx_work = 0;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002783 struct sk_buff *skb;
2784 int len;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002785
Szymon Janc78aea4f2010-11-27 08:39:43 +00002786 while ((np->get_rx.ex != np->put_rx.ex) &&
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002787 !((flags = le32_to_cpu(np->get_rx.ex->flaglen)) & NV_RX2_AVAIL) &&
Ingo Molnarc1b71512007-10-17 12:18:23 +02002788 (rx_work < limit)) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002789
2790 dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: flags 0x%x.\n",
2791 dev->name, flags);
2792
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002793 /*
2794 * the packet is for us - immediately tear down the pci mapping.
2795 * TODO: check if a prefetch of the first cacheline improves
2796 * the performance.
2797 */
2798 pci_unmap_single(np->pci_dev, np->get_rx_ctx->dma,
2799 np->get_rx_ctx->dma_len,
2800 PCI_DMA_FROMDEVICE);
2801 skb = np->get_rx_ctx->skb;
2802 np->get_rx_ctx->skb = NULL;
2803
2804 {
2805 int j;
Szymon Janc78aea4f2010-11-27 08:39:43 +00002806 dprintk(KERN_DEBUG "Dumping packet (flags 0x%x).", flags);
2807 for (j = 0; j < 64; j++) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002808 if ((j%16) == 0)
2809 dprintk("\n%03x:", j);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002810 dprintk(" %02x", ((unsigned char *)skb->data)[j]);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002811 }
2812 dprintk("\n");
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002813 }
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002814 /* look at what we actually got: */
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002815 if (likely(flags & NV_RX2_DESCRIPTORVALID)) {
2816 len = flags & LEN_MASK_V2;
2817 if (unlikely(flags & NV_RX2_ERROR)) {
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002818 if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_ERROR4) {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002819 len = nv_getlen(dev, skb->data, len);
2820 if (len < 0) {
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002821 dev_kfree_skb(skb);
2822 goto next_pkt;
2823 }
2824 }
2825 /* framing errors are soft errors */
Ayaz Abdulla1ef68412008-08-06 12:11:03 -04002826 else if ((flags & NV_RX2_ERROR_MASK) == NV_RX2_FRAMINGERR) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00002827 if (flags & NV_RX2_SUBSTRACT1)
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002828 len--;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002829 }
2830 /* the rest are hard errors */
2831 else {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002832 dev_kfree_skb(skb);
2833 goto next_pkt;
2834 }
2835 }
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002836
Ayaz Abdullabfaffe82008-01-13 16:02:55 -05002837 if (((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_TCP) || /*ip and tcp */
2838 ((flags & NV_RX2_CHECKSUMMASK) == NV_RX2_CHECKSUM_IP_UDP)) /*ip and udp */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002839 skb->ip_summed = CHECKSUM_UNNECESSARY;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002840
2841 /* got a valid packet - forward it to the network core */
2842 skb_put(skb, len);
2843 skb->protocol = eth_type_trans(skb, dev);
2844 prefetch(skb->data);
2845
2846 dprintk(KERN_DEBUG "%s: nv_rx_process_optimized: %d bytes, proto %d accepted.\n",
2847 dev->name, len, skb->protocol);
2848
2849 if (likely(!np->vlangrp)) {
Tom Herbert53f224c2010-05-03 19:08:45 +00002850 napi_gro_receive(&np->napi, skb);
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002851 } else {
2852 vlanflags = le32_to_cpu(np->get_rx.ex->buflow);
2853 if (vlanflags & NV_RX3_VLAN_TAG_PRESENT) {
Tom Herbert53f224c2010-05-03 19:08:45 +00002854 vlan_gro_receive(&np->napi, np->vlangrp,
2855 vlanflags & NV_RX3_VLAN_TAG_MASK, skb);
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002856 } else {
Tom Herbert53f224c2010-05-03 19:08:45 +00002857 napi_gro_receive(&np->napi, skb);
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002858 }
2859 }
2860
Jeff Garzik8148ff42007-10-16 20:56:09 -04002861 dev->stats.rx_packets++;
2862 dev->stats.rx_bytes += len;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002863 } else {
2864 dev_kfree_skb(skb);
2865 }
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002866next_pkt:
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002867 if (unlikely(np->get_rx.ex++ == np->last_rx.ex))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05002868 np->get_rx.ex = np->first_rx.ex;
Ayaz Abdullab01867c2007-01-21 18:10:52 -05002869 if (unlikely(np->get_rx_ctx++ == np->last_rx_ctx))
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05002870 np->get_rx_ctx = np->first_rx_ctx;
Ingo Molnarc1b71512007-10-17 12:18:23 +02002871
2872 rx_work++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002873 }
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07002874
Ingo Molnarc1b71512007-10-17 12:18:23 +02002875 return rx_work;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002876}
2877
Manfred Sprauld81c0982005-07-31 18:20:30 +02002878static void set_bufsize(struct net_device *dev)
2879{
2880 struct fe_priv *np = netdev_priv(dev);
2881
2882 if (dev->mtu <= ETH_DATA_LEN)
2883 np->rx_buf_sz = ETH_DATA_LEN + NV_RX_HEADERS;
2884 else
2885 np->rx_buf_sz = dev->mtu + NV_RX_HEADERS;
2886}
2887
Linus Torvalds1da177e2005-04-16 15:20:36 -07002888/*
2889 * nv_change_mtu: dev->change_mtu function
2890 * Called with dev_base_lock held for read.
2891 */
2892static int nv_change_mtu(struct net_device *dev, int new_mtu)
2893{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002894 struct fe_priv *np = netdev_priv(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002895 int old_mtu;
2896
2897 if (new_mtu < 64 || new_mtu > np->pkt_limit)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002898 return -EINVAL;
Manfred Sprauld81c0982005-07-31 18:20:30 +02002899
2900 old_mtu = dev->mtu;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002901 dev->mtu = new_mtu;
Manfred Sprauld81c0982005-07-31 18:20:30 +02002902
2903 /* return early if the buffer sizes will not change */
2904 if (old_mtu <= ETH_DATA_LEN && new_mtu <= ETH_DATA_LEN)
2905 return 0;
2906 if (old_mtu == new_mtu)
2907 return 0;
2908
2909 /* synchronized against open : rtnl_lock() held by caller */
2910 if (netif_running(dev)) {
viro@ftp.linux.org.uk25097d42005-09-06 01:36:58 +01002911 u8 __iomem *base = get_hwbase(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002912 /*
2913 * It seems that the nic preloads valid ring entries into an
2914 * internal buffer. The procedure for flushing everything is
2915 * guessed, there is probably a simpler approach.
2916 * Changing the MTU is a rare event, it shouldn't matter.
2917 */
Ayaz Abdulla84b39322006-05-20 14:59:48 -07002918 nv_disable_irq(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00002919 nv_napi_disable(dev);
Herbert Xu932ff272006-06-09 12:20:56 -07002920 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07002921 netif_addr_lock(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002922 spin_lock(&np->lock);
2923 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04002924 nv_stop_rxtx(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002925 nv_txrx_reset(dev);
2926 /* drain rx queue */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04002927 nv_drain_rxtx(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002928 /* reinit driver view of the rx queue */
Manfred Sprauld81c0982005-07-31 18:20:30 +02002929 set_bufsize(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04002930 if (nv_init_ring(dev)) {
Manfred Sprauld81c0982005-07-31 18:20:30 +02002931 if (!np->in_shutdown)
2932 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
2933 }
2934 /* reinit nic view of the rx queue */
2935 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
Ayaz Abdulla0832b252006-02-04 13:13:26 -05002936 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002937 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Manfred Sprauld81c0982005-07-31 18:20:30 +02002938 base + NvRegRingSizes);
2939 pci_push(base);
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04002940 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002941 pci_push(base);
2942
2943 /* restart rx engine */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04002944 nv_start_rxtx(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002945 spin_unlock(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07002946 netif_addr_unlock(dev);
Herbert Xu932ff272006-06-09 12:20:56 -07002947 netif_tx_unlock_bh(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00002948 nv_napi_enable(dev);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07002949 nv_enable_irq(dev);
Manfred Sprauld81c0982005-07-31 18:20:30 +02002950 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002951 return 0;
2952}
2953
Manfred Spraul72b31782005-07-31 18:33:34 +02002954static void nv_copy_mac_to_hw(struct net_device *dev)
2955{
viro@ftp.linux.org.uk25097d42005-09-06 01:36:58 +01002956 u8 __iomem *base = get_hwbase(dev);
Manfred Spraul72b31782005-07-31 18:33:34 +02002957 u32 mac[2];
2958
2959 mac[0] = (dev->dev_addr[0] << 0) + (dev->dev_addr[1] << 8) +
2960 (dev->dev_addr[2] << 16) + (dev->dev_addr[3] << 24);
2961 mac[1] = (dev->dev_addr[4] << 0) + (dev->dev_addr[5] << 8);
2962
2963 writel(mac[0], base + NvRegMacAddrA);
2964 writel(mac[1], base + NvRegMacAddrB);
2965}
2966
2967/*
2968 * nv_set_mac_address: dev->set_mac_address function
2969 * Called with rtnl_lock() held.
2970 */
2971static int nv_set_mac_address(struct net_device *dev, void *addr)
2972{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04002973 struct fe_priv *np = netdev_priv(dev);
Szymon Janc78aea4f2010-11-27 08:39:43 +00002974 struct sockaddr *macaddr = (struct sockaddr *)addr;
Manfred Spraul72b31782005-07-31 18:33:34 +02002975
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07002976 if (!is_valid_ether_addr(macaddr->sa_data))
Manfred Spraul72b31782005-07-31 18:33:34 +02002977 return -EADDRNOTAVAIL;
2978
2979 /* synchronized against open : rtnl_lock() held by caller */
2980 memcpy(dev->dev_addr, macaddr->sa_data, ETH_ALEN);
2981
2982 if (netif_running(dev)) {
Herbert Xu932ff272006-06-09 12:20:56 -07002983 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07002984 netif_addr_lock(dev);
Manfred Spraul72b31782005-07-31 18:33:34 +02002985 spin_lock_irq(&np->lock);
2986
2987 /* stop rx engine */
2988 nv_stop_rx(dev);
2989
2990 /* set mac address */
2991 nv_copy_mac_to_hw(dev);
2992
2993 /* restart rx engine */
2994 nv_start_rx(dev);
2995 spin_unlock_irq(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07002996 netif_addr_unlock(dev);
Herbert Xu932ff272006-06-09 12:20:56 -07002997 netif_tx_unlock_bh(dev);
Manfred Spraul72b31782005-07-31 18:33:34 +02002998 } else {
2999 nv_copy_mac_to_hw(dev);
3000 }
3001 return 0;
3002}
3003
Linus Torvalds1da177e2005-04-16 15:20:36 -07003004/*
3005 * nv_set_multicast: dev->set_multicast function
Herbert Xu932ff272006-06-09 12:20:56 -07003006 * Called with netif_tx_lock held.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003007 */
3008static void nv_set_multicast(struct net_device *dev)
3009{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04003010 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003011 u8 __iomem *base = get_hwbase(dev);
3012 u32 addr[2];
3013 u32 mask[2];
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003014 u32 pff = readl(base + NvRegPacketFilterFlags) & NVREG_PFF_PAUSE_RX;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003015
3016 memset(addr, 0, sizeof(addr));
3017 memset(mask, 0, sizeof(mask));
3018
3019 if (dev->flags & IFF_PROMISC) {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003020 pff |= NVREG_PFF_PROMISC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003021 } else {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003022 pff |= NVREG_PFF_MYADDR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003023
Jiri Pirko48e2f182010-02-22 09:22:26 +00003024 if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003025 u32 alwaysOff[2];
3026 u32 alwaysOn[2];
3027
3028 alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0xffffffff;
3029 if (dev->flags & IFF_ALLMULTI) {
3030 alwaysOn[0] = alwaysOn[1] = alwaysOff[0] = alwaysOff[1] = 0;
3031 } else {
Jiri Pirko22bedad32010-04-01 21:22:57 +00003032 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003033
Jiri Pirko22bedad32010-04-01 21:22:57 +00003034 netdev_for_each_mc_addr(ha, dev) {
3035 unsigned char *addr = ha->addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003036 u32 a, b;
Jiri Pirko22bedad32010-04-01 21:22:57 +00003037
3038 a = le32_to_cpu(*(__le32 *) addr);
3039 b = le16_to_cpu(*(__le16 *) (&addr[4]));
Linus Torvalds1da177e2005-04-16 15:20:36 -07003040 alwaysOn[0] &= a;
3041 alwaysOff[0] &= ~a;
3042 alwaysOn[1] &= b;
3043 alwaysOff[1] &= ~b;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003044 }
3045 }
3046 addr[0] = alwaysOn[0];
3047 addr[1] = alwaysOn[1];
3048 mask[0] = alwaysOn[0] | alwaysOff[0];
3049 mask[1] = alwaysOn[1] | alwaysOff[1];
Ayaz Abdullabb9a4fd2008-01-13 16:03:04 -05003050 } else {
3051 mask[0] = NVREG_MCASTMASKA_NONE;
3052 mask[1] = NVREG_MCASTMASKB_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003053 }
3054 }
3055 addr[0] |= NVREG_MCASTADDRA_FORCE;
3056 pff |= NVREG_PFF_ALWAYS;
3057 spin_lock_irq(&np->lock);
3058 nv_stop_rx(dev);
3059 writel(addr[0], base + NvRegMulticastAddrA);
3060 writel(addr[1], base + NvRegMulticastAddrB);
3061 writel(mask[0], base + NvRegMulticastMaskA);
3062 writel(mask[1], base + NvRegMulticastMaskB);
3063 writel(pff, base + NvRegPacketFilterFlags);
3064 dprintk(KERN_INFO "%s: reconfiguration for multicast lists.\n",
3065 dev->name);
3066 nv_start_rx(dev);
3067 spin_unlock_irq(&np->lock);
3068}
3069
Adrian Bunkc7985052006-06-22 12:03:29 +02003070static void nv_update_pause(struct net_device *dev, u32 pause_flags)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003071{
3072 struct fe_priv *np = netdev_priv(dev);
3073 u8 __iomem *base = get_hwbase(dev);
3074
3075 np->pause_flags &= ~(NV_PAUSEFRAME_TX_ENABLE | NV_PAUSEFRAME_RX_ENABLE);
3076
3077 if (np->pause_flags & NV_PAUSEFRAME_RX_CAPABLE) {
3078 u32 pff = readl(base + NvRegPacketFilterFlags) & ~NVREG_PFF_PAUSE_RX;
3079 if (pause_flags & NV_PAUSEFRAME_RX_ENABLE) {
3080 writel(pff|NVREG_PFF_PAUSE_RX, base + NvRegPacketFilterFlags);
3081 np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
3082 } else {
3083 writel(pff, base + NvRegPacketFilterFlags);
3084 }
3085 }
3086 if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE) {
3087 u32 regmisc = readl(base + NvRegMisc1) & ~NVREG_MISC1_PAUSE_TX;
3088 if (pause_flags & NV_PAUSEFRAME_TX_ENABLE) {
Ayaz Abdulla5289b4c2008-02-05 12:30:01 -05003089 u32 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V1;
3090 if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V2)
3091 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V2;
Ayaz Abdulla9a33e882008-08-06 12:12:34 -04003092 if (np->driver_data & DEV_HAS_PAUSEFRAME_TX_V3) {
Ayaz Abdulla5289b4c2008-02-05 12:30:01 -05003093 pause_enable = NVREG_TX_PAUSEFRAME_ENABLE_V3;
Ayaz Abdulla9a33e882008-08-06 12:12:34 -04003094 /* limit the number of tx pause frames to a default of 8 */
3095 writel(readl(base + NvRegTxPauseFrameLimit)|NVREG_TX_PAUSEFRAMELIMIT_ENABLE, base + NvRegTxPauseFrameLimit);
3096 }
Ayaz Abdulla5289b4c2008-02-05 12:30:01 -05003097 writel(pause_enable, base + NvRegTxPauseFrame);
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003098 writel(regmisc|NVREG_MISC1_PAUSE_TX, base + NvRegMisc1);
3099 np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
3100 } else {
3101 writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame);
3102 writel(regmisc, base + NvRegMisc1);
3103 }
3104 }
3105}
3106
Ayaz Abdulla4ea7f292005-11-11 08:29:59 -05003107/**
3108 * nv_update_linkspeed: Setup the MAC according to the link partner
3109 * @dev: Network device to be configured
3110 *
3111 * The function queries the PHY and checks if there is a link partner.
3112 * If yes, then it sets up the MAC accordingly. Otherwise, the MAC is
3113 * set to 10 MBit HD.
3114 *
3115 * The function returns 0 if there is no link partner and 1 if there is
3116 * a good link partner.
3117 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07003118static int nv_update_linkspeed(struct net_device *dev)
3119{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04003120 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003121 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003122 int adv = 0;
3123 int lpa = 0;
3124 int adv_lpa, adv_pause, lpa_pause;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003125 int newls = np->linkspeed;
3126 int newdup = np->duplex;
3127 int mii_status;
3128 int retval = 0;
Ayaz Abdulla9744e212006-07-06 16:45:58 -04003129 u32 control_1000, status_1000, phyreg, pause_flags, txreg;
Ayaz Abdullab2976d22008-02-04 15:13:59 -05003130 u32 txrxFlags = 0;
Ayaz Abdullafd9b5582008-02-05 12:29:49 -05003131 u32 phy_exp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003132
3133 /* BMSR_LSTATUS is latched, read it twice:
3134 * we want the current value.
3135 */
3136 mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
3137 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
3138
3139 if (!(mii_status & BMSR_LSTATUS)) {
3140 dprintk(KERN_DEBUG "%s: no link detected by phy - falling back to 10HD.\n",
3141 dev->name);
3142 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3143 newdup = 0;
3144 retval = 0;
3145 goto set_speed;
3146 }
3147
3148 if (np->autoneg == 0) {
3149 dprintk(KERN_DEBUG "%s: nv_update_linkspeed: autoneg off, PHY set to 0x%04x.\n",
3150 dev->name, np->fixed_mode);
3151 if (np->fixed_mode & LPA_100FULL) {
3152 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
3153 newdup = 1;
3154 } else if (np->fixed_mode & LPA_100HALF) {
3155 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
3156 newdup = 0;
3157 } else if (np->fixed_mode & LPA_10FULL) {
3158 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3159 newdup = 1;
3160 } else {
3161 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3162 newdup = 0;
3163 }
3164 retval = 1;
3165 goto set_speed;
3166 }
3167 /* check auto negotiation is complete */
3168 if (!(mii_status & BMSR_ANEGCOMPLETE)) {
3169 /* still in autonegotiation - configure nic for 10 MBit HD and wait. */
3170 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3171 newdup = 0;
3172 retval = 0;
3173 dprintk(KERN_DEBUG "%s: autoneg not completed - falling back to 10HD.\n", dev->name);
3174 goto set_speed;
3175 }
3176
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003177 adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
3178 lpa = mii_rw(dev, np->phyaddr, MII_LPA, MII_READ);
3179 dprintk(KERN_DEBUG "%s: nv_update_linkspeed: PHY advertises 0x%04x, lpa 0x%04x.\n",
3180 dev->name, adv, lpa);
3181
Linus Torvalds1da177e2005-04-16 15:20:36 -07003182 retval = 1;
3183 if (np->gigabit == PHY_GIGABIT) {
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003184 control_1000 = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
3185 status_1000 = mii_rw(dev, np->phyaddr, MII_STAT1000, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003186
3187 if ((control_1000 & ADVERTISE_1000FULL) &&
3188 (status_1000 & LPA_1000FULL)) {
3189 dprintk(KERN_DEBUG "%s: nv_update_linkspeed: GBit ethernet detected.\n",
3190 dev->name);
3191 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_1000;
3192 newdup = 1;
3193 goto set_speed;
3194 }
3195 }
3196
Linus Torvalds1da177e2005-04-16 15:20:36 -07003197 /* FIXME: handle parallel detection properly */
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003198 adv_lpa = lpa & adv;
3199 if (adv_lpa & LPA_100FULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003200 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
3201 newdup = 1;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003202 } else if (adv_lpa & LPA_100HALF) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003203 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_100;
3204 newdup = 0;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003205 } else if (adv_lpa & LPA_10FULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003206 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3207 newdup = 1;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003208 } else if (adv_lpa & LPA_10HALF) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003209 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3210 newdup = 0;
3211 } else {
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003212 dprintk(KERN_DEBUG "%s: bad ability %04x - falling back to 10HD.\n", dev->name, adv_lpa);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003213 newls = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
3214 newdup = 0;
3215 }
3216
3217set_speed:
3218 if (np->duplex == newdup && np->linkspeed == newls)
3219 return retval;
3220
3221 dprintk(KERN_INFO "%s: changing link setting from %d/%d to %d/%d.\n",
3222 dev->name, np->linkspeed, np->duplex, newls, newdup);
3223
3224 np->duplex = newdup;
3225 np->linkspeed = newls;
3226
Ayaz Abdullab2976d22008-02-04 15:13:59 -05003227 /* The transmitter and receiver must be restarted for safe update */
3228 if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_START) {
3229 txrxFlags |= NV_RESTART_TX;
3230 nv_stop_tx(dev);
3231 }
3232 if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
3233 txrxFlags |= NV_RESTART_RX;
3234 nv_stop_rx(dev);
3235 }
3236
Linus Torvalds1da177e2005-04-16 15:20:36 -07003237 if (np->gigabit == PHY_GIGABIT) {
Ayaz Abdullaa4336862008-04-18 13:50:43 -07003238 phyreg = readl(base + NvRegSlotTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003239 phyreg &= ~(0x3FF00);
Ayaz Abdullaa4336862008-04-18 13:50:43 -07003240 if (((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_10) ||
3241 ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_100))
3242 phyreg |= NVREG_SLOTTIME_10_100_FULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003243 else if ((np->linkspeed & 0xFFF) == NVREG_LINKSPEED_1000)
Ayaz Abdullaa4336862008-04-18 13:50:43 -07003244 phyreg |= NVREG_SLOTTIME_1000_FULL;
3245 writel(phyreg, base + NvRegSlotTime);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003246 }
3247
3248 phyreg = readl(base + NvRegPhyInterface);
3249 phyreg &= ~(PHY_HALF|PHY_100|PHY_1000);
3250 if (np->duplex == 0)
3251 phyreg |= PHY_HALF;
3252 if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_100)
3253 phyreg |= PHY_100;
3254 else if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
3255 phyreg |= PHY_1000;
3256 writel(phyreg, base + NvRegPhyInterface);
3257
Ayaz Abdullafd9b5582008-02-05 12:29:49 -05003258 phy_exp = mii_rw(dev, np->phyaddr, MII_EXPANSION, MII_READ) & EXPANSION_NWAY; /* autoneg capable */
Ayaz Abdulla9744e212006-07-06 16:45:58 -04003259 if (phyreg & PHY_RGMII) {
Ayaz Abdullafd9b5582008-02-05 12:29:49 -05003260 if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000) {
Ayaz Abdulla9744e212006-07-06 16:45:58 -04003261 txreg = NVREG_TX_DEFERRAL_RGMII_1000;
Ayaz Abdullafd9b5582008-02-05 12:29:49 -05003262 } else {
3263 if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX)) {
3264 if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_10)
3265 txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_10;
3266 else
3267 txreg = NVREG_TX_DEFERRAL_RGMII_STRETCH_100;
3268 } else {
3269 txreg = NVREG_TX_DEFERRAL_RGMII_10_100;
3270 }
3271 }
Ayaz Abdulla9744e212006-07-06 16:45:58 -04003272 } else {
Ayaz Abdullafd9b5582008-02-05 12:29:49 -05003273 if (!phy_exp && !np->duplex && (np->driver_data & DEV_HAS_COLLISION_FIX))
3274 txreg = NVREG_TX_DEFERRAL_MII_STRETCH;
3275 else
3276 txreg = NVREG_TX_DEFERRAL_DEFAULT;
Ayaz Abdulla9744e212006-07-06 16:45:58 -04003277 }
3278 writel(txreg, base + NvRegTxDeferral);
3279
Ayaz Abdulla95d161c2006-07-06 16:46:25 -04003280 if (np->desc_ver == DESC_VER_1) {
3281 txreg = NVREG_TX_WM_DESC1_DEFAULT;
3282 } else {
3283 if ((np->linkspeed & NVREG_LINKSPEED_MASK) == NVREG_LINKSPEED_1000)
3284 txreg = NVREG_TX_WM_DESC2_3_1000;
3285 else
3286 txreg = NVREG_TX_WM_DESC2_3_DEFAULT;
3287 }
3288 writel(txreg, base + NvRegTxWatermark);
3289
Szymon Janc78aea4f2010-11-27 08:39:43 +00003290 writel(NVREG_MISC1_FORCE | (np->duplex ? 0 : NVREG_MISC1_HD),
Linus Torvalds1da177e2005-04-16 15:20:36 -07003291 base + NvRegMisc1);
3292 pci_push(base);
3293 writel(np->linkspeed, base + NvRegLinkSpeed);
3294 pci_push(base);
3295
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003296 pause_flags = 0;
3297 /* setup pause frame */
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003298 if (np->duplex != 0) {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003299 if (np->autoneg && np->pause_flags & NV_PAUSEFRAME_AUTONEG) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00003300 adv_pause = adv & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
3301 lpa_pause = lpa & (LPA_PAUSE_CAP | LPA_PAUSE_ASYM);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003302
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003303 switch (adv_pause) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07003304 case ADVERTISE_PAUSE_CAP:
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003305 if (lpa_pause & LPA_PAUSE_CAP) {
3306 pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
3307 if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
3308 pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
3309 }
3310 break;
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07003311 case ADVERTISE_PAUSE_ASYM:
Szymon Janc78aea4f2010-11-27 08:39:43 +00003312 if (lpa_pause == (LPA_PAUSE_CAP | LPA_PAUSE_ASYM))
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003313 pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003314 break;
Szymon Janc78aea4f2010-11-27 08:39:43 +00003315 case ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM:
3316 if (lpa_pause & LPA_PAUSE_CAP) {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003317 pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
3318 if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
3319 pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
3320 }
3321 if (lpa_pause == LPA_PAUSE_ASYM)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003322 pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003323 break;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003324 }
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003325 } else {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003326 pause_flags = np->pause_flags;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003327 }
3328 }
Ayaz Abdullab6d07732006-06-10 22:47:42 -04003329 nv_update_pause(dev, pause_flags);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04003330
Ayaz Abdullab2976d22008-02-04 15:13:59 -05003331 if (txrxFlags & NV_RESTART_TX)
3332 nv_start_tx(dev);
3333 if (txrxFlags & NV_RESTART_RX)
3334 nv_start_rx(dev);
3335
Linus Torvalds1da177e2005-04-16 15:20:36 -07003336 return retval;
3337}
3338
3339static void nv_linkchange(struct net_device *dev)
3340{
3341 if (nv_update_linkspeed(dev)) {
Ayaz Abdulla4ea7f292005-11-11 08:29:59 -05003342 if (!netif_carrier_ok(dev)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003343 netif_carrier_on(dev);
3344 printk(KERN_INFO "%s: link up.\n", dev->name);
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00003345 nv_txrx_gate(dev, false);
Ayaz Abdulla4ea7f292005-11-11 08:29:59 -05003346 nv_start_rx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003347 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003348 } else {
3349 if (netif_carrier_ok(dev)) {
3350 netif_carrier_off(dev);
3351 printk(KERN_INFO "%s: link down.\n", dev->name);
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00003352 nv_txrx_gate(dev, true);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003353 nv_stop_rx(dev);
3354 }
3355 }
3356}
3357
3358static void nv_link_irq(struct net_device *dev)
3359{
3360 u8 __iomem *base = get_hwbase(dev);
3361 u32 miistat;
3362
3363 miistat = readl(base + NvRegMIIStatus);
Ayaz Abdullaeb798422008-02-04 15:14:04 -05003364 writel(NVREG_MIISTAT_LINKCHANGE, base + NvRegMIIStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003365 dprintk(KERN_INFO "%s: link change irq, status 0x%x.\n", dev->name, miistat);
3366
3367 if (miistat & (NVREG_MIISTAT_LINKCHANGE))
3368 nv_linkchange(dev);
3369 dprintk(KERN_DEBUG "%s: link change notification done.\n", dev->name);
3370}
3371
Ayaz Abdulla4db0ee172008-06-09 16:51:06 -07003372static void nv_msi_workaround(struct fe_priv *np)
3373{
3374
3375 /* Need to toggle the msi irq mask within the ethernet device,
3376 * otherwise, future interrupts will not be detected.
3377 */
3378 if (np->msi_flags & NV_MSI_ENABLED) {
3379 u8 __iomem *base = np->base;
3380
3381 writel(0, base + NvRegMSIIrqMask);
3382 writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
3383 }
3384}
3385
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003386static inline int nv_change_interrupt_mode(struct net_device *dev, int total_work)
3387{
3388 struct fe_priv *np = netdev_priv(dev);
3389
3390 if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC) {
3391 if (total_work > NV_DYNAMIC_THRESHOLD) {
3392 /* transition to poll based interrupts */
3393 np->quiet_count = 0;
3394 if (np->irqmask != NVREG_IRQMASK_CPU) {
3395 np->irqmask = NVREG_IRQMASK_CPU;
3396 return 1;
3397 }
3398 } else {
3399 if (np->quiet_count < NV_DYNAMIC_MAX_QUIET_COUNT) {
3400 np->quiet_count++;
3401 } else {
3402 /* reached a period of low activity, switch
3403 to per tx/rx packet interrupts */
3404 if (np->irqmask != NVREG_IRQMASK_THROUGHPUT) {
3405 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
3406 return 1;
3407 }
3408 }
3409 }
3410 }
3411 return 0;
3412}
3413
David Howells7d12e782006-10-05 14:55:46 +01003414static irqreturn_t nv_nic_irq(int foo, void *data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003415{
3416 struct net_device *dev = (struct net_device *) data;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04003417 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003418 u8 __iomem *base = get_hwbase(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003419
3420 dprintk(KERN_DEBUG "%s: nv_nic_irq\n", dev->name);
3421
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003422 if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
3423 np->events = readl(base + NvRegIrqStatus);
Ayaz Abdulla1b2bb762009-03-05 08:02:34 +00003424 writel(np->events, base + NvRegIrqStatus);
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003425 } else {
3426 np->events = readl(base + NvRegMSIXIrqStatus);
Ayaz Abdulla1b2bb762009-03-05 08:02:34 +00003427 writel(np->events, base + NvRegMSIXIrqStatus);
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003428 }
3429 dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events);
3430 if (!(np->events & np->irqmask))
3431 return IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003432
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003433 nv_msi_workaround(np);
Ayaz Abdulla4db0ee172008-06-09 16:51:06 -07003434
Eric Dumazet78c29bd2009-07-02 04:04:45 +00003435 if (napi_schedule_prep(&np->napi)) {
3436 /*
3437 * Disable further irq's (msix not enabled with napi)
3438 */
3439 writel(0, base + NvRegIrqMask);
3440 __napi_schedule(&np->napi);
3441 }
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003442
Linus Torvalds1da177e2005-04-16 15:20:36 -07003443 dprintk(KERN_DEBUG "%s: nv_nic_irq completed\n", dev->name);
3444
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003445 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003446}
3447
Ayaz Abdullaf0734ab2007-01-21 18:10:57 -05003448/**
3449 * All _optimized functions are used to help increase performance
3450 * (reduce CPU and increase throughput). They use descripter version 3,
3451 * compiler directives, and reduce memory accesses.
3452 */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003453static irqreturn_t nv_nic_irq_optimized(int foo, void *data)
3454{
3455 struct net_device *dev = (struct net_device *) data;
3456 struct fe_priv *np = netdev_priv(dev);
3457 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003458
3459 dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized\n", dev->name);
3460
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003461 if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
3462 np->events = readl(base + NvRegIrqStatus);
Ayaz Abdulla1b2bb762009-03-05 08:02:34 +00003463 writel(np->events, base + NvRegIrqStatus);
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003464 } else {
3465 np->events = readl(base + NvRegMSIXIrqStatus);
Ayaz Abdulla1b2bb762009-03-05 08:02:34 +00003466 writel(np->events, base + NvRegMSIXIrqStatus);
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003467 }
3468 dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, np->events);
3469 if (!(np->events & np->irqmask))
3470 return IRQ_NONE;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003471
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003472 nv_msi_workaround(np);
Ayaz Abdulla4db0ee172008-06-09 16:51:06 -07003473
Eric Dumazet78c29bd2009-07-02 04:04:45 +00003474 if (napi_schedule_prep(&np->napi)) {
3475 /*
3476 * Disable further irq's (msix not enabled with napi)
3477 */
3478 writel(0, base + NvRegIrqMask);
3479 __napi_schedule(&np->napi);
3480 }
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003481 dprintk(KERN_DEBUG "%s: nv_nic_irq_optimized completed\n", dev->name);
3482
Ayaz Abdullab67874a2009-03-05 08:02:22 +00003483 return IRQ_HANDLED;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003484}
3485
David Howells7d12e782006-10-05 14:55:46 +01003486static irqreturn_t nv_nic_irq_tx(int foo, void *data)
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003487{
3488 struct net_device *dev = (struct net_device *) data;
3489 struct fe_priv *np = netdev_priv(dev);
3490 u8 __iomem *base = get_hwbase(dev);
3491 u32 events;
3492 int i;
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003493 unsigned long flags;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003494
3495 dprintk(KERN_DEBUG "%s: nv_nic_irq_tx\n", dev->name);
3496
Szymon Janc78aea4f2010-11-27 08:39:43 +00003497 for (i = 0;; i++) {
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003498 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_TX_ALL;
3499 writel(NVREG_IRQ_TX_ALL, base + NvRegMSIXIrqStatus);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003500 dprintk(KERN_DEBUG "%s: tx irq: %08x\n", dev->name, events);
3501 if (!(events & np->irqmask))
3502 break;
3503
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003504 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdulla4e16ed12007-01-23 12:00:56 -05003505 nv_tx_done_optimized(dev, TX_WORK_PER_LOOP);
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003506 spin_unlock_irqrestore(&np->lock, flags);
Jeff Garzikf3b197a2006-05-26 21:39:03 -04003507
Ayaz Abdullaf0734ab2007-01-21 18:10:57 -05003508 if (unlikely(i > max_interrupt_work)) {
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003509 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003510 /* disable interrupts on the nic */
3511 writel(NVREG_IRQ_TX_ALL, base + NvRegIrqMask);
3512 pci_push(base);
3513
3514 if (!np->in_shutdown) {
3515 np->nic_poll_irq |= NVREG_IRQ_TX_ALL;
3516 mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
3517 }
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003518 spin_unlock_irqrestore(&np->lock, flags);
Timo Jantunen1a2b7332007-08-14 21:56:57 +03003519 printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_tx.\n", dev->name, i);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003520 break;
3521 }
3522
3523 }
3524 dprintk(KERN_DEBUG "%s: nv_nic_irq_tx completed\n", dev->name);
3525
3526 return IRQ_RETVAL(i);
3527}
3528
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003529static int nv_napi_poll(struct napi_struct *napi, int budget)
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003530{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003531 struct fe_priv *np = container_of(napi, struct fe_priv, napi);
3532 struct net_device *dev = np->dev;
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003533 u8 __iomem *base = get_hwbase(dev);
Francois Romieud15e9c42006-12-17 23:03:15 +01003534 unsigned long flags;
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003535 int retcode;
Szymon Janc78aea4f2010-11-27 08:39:43 +00003536 int rx_count, tx_work = 0, rx_work = 0;
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003537
stephen hemminger81a2e362010-04-28 08:25:28 +00003538 do {
3539 if (!nv_optimized(np)) {
3540 spin_lock_irqsave(&np->lock, flags);
3541 tx_work += nv_tx_done(dev, np->tx_ring_size);
3542 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003543
Tom Herbertd951f722010-05-05 18:15:21 +00003544 rx_count = nv_rx_process(dev, budget - rx_work);
stephen hemminger81a2e362010-04-28 08:25:28 +00003545 retcode = nv_alloc_rx(dev);
3546 } else {
3547 spin_lock_irqsave(&np->lock, flags);
3548 tx_work += nv_tx_done_optimized(dev, np->tx_ring_size);
3549 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003550
Tom Herbertd951f722010-05-05 18:15:21 +00003551 rx_count = nv_rx_process_optimized(dev,
3552 budget - rx_work);
stephen hemminger81a2e362010-04-28 08:25:28 +00003553 retcode = nv_alloc_rx_optimized(dev);
3554 }
3555 } while (retcode == 0 &&
3556 rx_count > 0 && (rx_work += rx_count) < budget);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003557
Ayaz Abdullae0379a12007-02-20 03:34:30 -05003558 if (retcode) {
Francois Romieud15e9c42006-12-17 23:03:15 +01003559 spin_lock_irqsave(&np->lock, flags);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003560 if (!np->in_shutdown)
3561 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
Francois Romieud15e9c42006-12-17 23:03:15 +01003562 spin_unlock_irqrestore(&np->lock, flags);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003563 }
3564
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003565 nv_change_interrupt_mode(dev, tx_work + rx_work);
3566
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003567 if (unlikely(np->events & NVREG_IRQ_LINK)) {
3568 spin_lock_irqsave(&np->lock, flags);
3569 nv_link_irq(dev);
3570 spin_unlock_irqrestore(&np->lock, flags);
3571 }
3572 if (unlikely(np->need_linktimer && time_after(jiffies, np->link_timeout))) {
3573 spin_lock_irqsave(&np->lock, flags);
3574 nv_linkchange(dev);
3575 spin_unlock_irqrestore(&np->lock, flags);
3576 np->link_timeout = jiffies + LINK_TIMEOUT;
3577 }
3578 if (unlikely(np->events & NVREG_IRQ_RECOVER_ERROR)) {
3579 spin_lock_irqsave(&np->lock, flags);
3580 if (!np->in_shutdown) {
3581 np->nic_poll_irq = np->irqmask;
3582 np->recover_error = 1;
3583 mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
3584 }
3585 spin_unlock_irqrestore(&np->lock, flags);
David S. Miller6c2da9c2009-04-09 01:09:33 -07003586 napi_complete(napi);
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003587 return rx_work;
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003588 }
3589
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003590 if (rx_work < budget) {
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003591 /* re-enable interrupts
3592 (msix not enabled in napi) */
David S. Miller6c2da9c2009-04-09 01:09:33 -07003593 napi_complete(napi);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003594
Ayaz Abdullaf27e6f32009-03-05 08:02:14 +00003595 writel(np->irqmask, base + NvRegIrqMask);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003596 }
Ayaz Abdulla4145ade2009-03-05 08:02:26 +00003597 return rx_work;
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003598}
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07003599
David Howells7d12e782006-10-05 14:55:46 +01003600static irqreturn_t nv_nic_irq_rx(int foo, void *data)
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003601{
3602 struct net_device *dev = (struct net_device *) data;
3603 struct fe_priv *np = netdev_priv(dev);
3604 u8 __iomem *base = get_hwbase(dev);
3605 u32 events;
3606 int i;
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003607 unsigned long flags;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003608
3609 dprintk(KERN_DEBUG "%s: nv_nic_irq_rx\n", dev->name);
3610
Szymon Janc78aea4f2010-11-27 08:39:43 +00003611 for (i = 0;; i++) {
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003612 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_RX_ALL;
3613 writel(NVREG_IRQ_RX_ALL, base + NvRegMSIXIrqStatus);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003614 dprintk(KERN_DEBUG "%s: rx irq: %08x\n", dev->name, events);
3615 if (!(events & np->irqmask))
3616 break;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04003617
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003618 if (nv_rx_process_optimized(dev, RX_WORK_PER_LOOP)) {
Ayaz Abdullaf0734ab2007-01-21 18:10:57 -05003619 if (unlikely(nv_alloc_rx_optimized(dev))) {
3620 spin_lock_irqsave(&np->lock, flags);
3621 if (!np->in_shutdown)
3622 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
3623 spin_unlock_irqrestore(&np->lock, flags);
3624 }
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003625 }
Jeff Garzikf3b197a2006-05-26 21:39:03 -04003626
Ayaz Abdullaf0734ab2007-01-21 18:10:57 -05003627 if (unlikely(i > max_interrupt_work)) {
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003628 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003629 /* disable interrupts on the nic */
3630 writel(NVREG_IRQ_RX_ALL, base + NvRegIrqMask);
3631 pci_push(base);
3632
3633 if (!np->in_shutdown) {
3634 np->nic_poll_irq |= NVREG_IRQ_RX_ALL;
3635 mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
3636 }
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003637 spin_unlock_irqrestore(&np->lock, flags);
Timo Jantunen1a2b7332007-08-14 21:56:57 +03003638 printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_rx.\n", dev->name, i);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003639 break;
3640 }
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003641 }
3642 dprintk(KERN_DEBUG "%s: nv_nic_irq_rx completed\n", dev->name);
3643
3644 return IRQ_RETVAL(i);
3645}
3646
David Howells7d12e782006-10-05 14:55:46 +01003647static irqreturn_t nv_nic_irq_other(int foo, void *data)
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003648{
3649 struct net_device *dev = (struct net_device *) data;
3650 struct fe_priv *np = netdev_priv(dev);
3651 u8 __iomem *base = get_hwbase(dev);
3652 u32 events;
3653 int i;
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003654 unsigned long flags;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003655
3656 dprintk(KERN_DEBUG "%s: nv_nic_irq_other\n", dev->name);
3657
Szymon Janc78aea4f2010-11-27 08:39:43 +00003658 for (i = 0;; i++) {
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003659 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQ_OTHER;
3660 writel(NVREG_IRQ_OTHER, base + NvRegMSIXIrqStatus);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003661 dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
3662 if (!(events & np->irqmask))
3663 break;
Jeff Garzikf3b197a2006-05-26 21:39:03 -04003664
Ayaz Abdulla4e16ed12007-01-23 12:00:56 -05003665 /* check tx in case we reached max loop limit in tx isr */
3666 spin_lock_irqsave(&np->lock, flags);
3667 nv_tx_done_optimized(dev, TX_WORK_PER_LOOP);
3668 spin_unlock_irqrestore(&np->lock, flags);
3669
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003670 if (events & NVREG_IRQ_LINK) {
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003671 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003672 nv_link_irq(dev);
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003673 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003674 }
3675 if (np->need_linktimer && time_after(jiffies, np->link_timeout)) {
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003676 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003677 nv_linkchange(dev);
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003678 spin_unlock_irqrestore(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003679 np->link_timeout = jiffies + LINK_TIMEOUT;
3680 }
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003681 if (events & NVREG_IRQ_RECOVER_ERROR) {
3682 spin_lock_irq(&np->lock);
3683 /* disable interrupts on the nic */
3684 writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
3685 pci_push(base);
3686
3687 if (!np->in_shutdown) {
3688 np->nic_poll_irq |= NVREG_IRQ_OTHER;
3689 np->recover_error = 1;
3690 mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
3691 }
3692 spin_unlock_irq(&np->lock);
3693 break;
3694 }
Ayaz Abdullaf0734ab2007-01-21 18:10:57 -05003695 if (unlikely(i > max_interrupt_work)) {
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003696 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003697 /* disable interrupts on the nic */
3698 writel(NVREG_IRQ_OTHER, base + NvRegIrqMask);
3699 pci_push(base);
3700
3701 if (!np->in_shutdown) {
3702 np->nic_poll_irq |= NVREG_IRQ_OTHER;
3703 mod_timer(&np->nic_poll, jiffies + POLL_WAIT);
3704 }
Peter Zijlstra0a07bc62006-09-19 14:55:22 +02003705 spin_unlock_irqrestore(&np->lock, flags);
Timo Jantunen1a2b7332007-08-14 21:56:57 +03003706 printk(KERN_DEBUG "%s: too many iterations (%d) in nv_nic_irq_other.\n", dev->name, i);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003707 break;
3708 }
3709
3710 }
3711 dprintk(KERN_DEBUG "%s: nv_nic_irq_other completed\n", dev->name);
3712
3713 return IRQ_RETVAL(i);
3714}
3715
David Howells7d12e782006-10-05 14:55:46 +01003716static irqreturn_t nv_nic_irq_test(int foo, void *data)
Ayaz Abdulla9589c772006-06-10 22:48:13 -04003717{
3718 struct net_device *dev = (struct net_device *) data;
3719 struct fe_priv *np = netdev_priv(dev);
3720 u8 __iomem *base = get_hwbase(dev);
3721 u32 events;
3722
3723 dprintk(KERN_DEBUG "%s: nv_nic_irq_test\n", dev->name);
3724
3725 if (!(np->msi_flags & NV_MSI_X_ENABLED)) {
3726 events = readl(base + NvRegIrqStatus) & NVREG_IRQSTAT_MASK;
3727 writel(NVREG_IRQ_TIMER, base + NvRegIrqStatus);
3728 } else {
3729 events = readl(base + NvRegMSIXIrqStatus) & NVREG_IRQSTAT_MASK;
3730 writel(NVREG_IRQ_TIMER, base + NvRegMSIXIrqStatus);
3731 }
3732 pci_push(base);
3733 dprintk(KERN_DEBUG "%s: irq: %08x\n", dev->name, events);
3734 if (!(events & NVREG_IRQ_TIMER))
3735 return IRQ_RETVAL(0);
3736
Ayaz Abdulla4db0ee172008-06-09 16:51:06 -07003737 nv_msi_workaround(np);
3738
Ayaz Abdulla9589c772006-06-10 22:48:13 -04003739 spin_lock(&np->lock);
3740 np->intr_test = 1;
3741 spin_unlock(&np->lock);
3742
3743 dprintk(KERN_DEBUG "%s: nv_nic_irq_test completed\n", dev->name);
3744
3745 return IRQ_RETVAL(1);
3746}
3747
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003748static void set_msix_vector_map(struct net_device *dev, u32 vector, u32 irqmask)
3749{
3750 u8 __iomem *base = get_hwbase(dev);
3751 int i;
3752 u32 msixmap = 0;
3753
3754 /* Each interrupt bit can be mapped to a MSIX vector (4 bits).
3755 * MSIXMap0 represents the first 8 interrupts and MSIXMap1 represents
3756 * the remaining 8 interrupts.
3757 */
3758 for (i = 0; i < 8; i++) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00003759 if ((irqmask >> i) & 0x1)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003760 msixmap |= vector << (i << 2);
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003761 }
3762 writel(readl(base + NvRegMSIXMap0) | msixmap, base + NvRegMSIXMap0);
3763
3764 msixmap = 0;
3765 for (i = 0; i < 8; i++) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00003766 if ((irqmask >> (i + 8)) & 0x1)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003767 msixmap |= vector << (i << 2);
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003768 }
3769 writel(readl(base + NvRegMSIXMap1) | msixmap, base + NvRegMSIXMap1);
3770}
3771
Ayaz Abdulla9589c772006-06-10 22:48:13 -04003772static int nv_request_irq(struct net_device *dev, int intr_test)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003773{
3774 struct fe_priv *np = get_nvpriv(dev);
3775 u8 __iomem *base = get_hwbase(dev);
3776 int ret = 1;
3777 int i;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003778 irqreturn_t (*handler)(int foo, void *data);
3779
3780 if (intr_test) {
3781 handler = nv_nic_irq_test;
3782 } else {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04003783 if (nv_optimized(np))
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003784 handler = nv_nic_irq_optimized;
3785 else
3786 handler = nv_nic_irq;
3787 }
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003788
3789 if (np->msi_flags & NV_MSI_X_CAPABLE) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00003790 for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003791 np->msi_x_entry[i].entry = i;
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003792 if ((ret = pci_enable_msix(np->pci_dev, np->msi_x_entry, (np->msi_flags & NV_MSI_X_VECTORS_MASK))) == 0) {
3793 np->msi_flags |= NV_MSI_X_ENABLED;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04003794 if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT && !intr_test) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003795 /* Request irq for rx handling */
Yinghai Luddb213f2009-02-06 01:29:23 -08003796 sprintf(np->name_rx, "%s-rx", dev->name);
3797 if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -08003798 nv_nic_irq_rx, IRQF_SHARED, np->name_rx, dev) != 0) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003799 printk(KERN_INFO "forcedeth: request_irq failed for rx %d\n", ret);
3800 pci_disable_msix(np->pci_dev);
3801 np->msi_flags &= ~NV_MSI_X_ENABLED;
3802 goto out_err;
3803 }
3804 /* Request irq for tx handling */
Yinghai Luddb213f2009-02-06 01:29:23 -08003805 sprintf(np->name_tx, "%s-tx", dev->name);
3806 if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -08003807 nv_nic_irq_tx, IRQF_SHARED, np->name_tx, dev) != 0) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003808 printk(KERN_INFO "forcedeth: request_irq failed for tx %d\n", ret);
3809 pci_disable_msix(np->pci_dev);
3810 np->msi_flags &= ~NV_MSI_X_ENABLED;
3811 goto out_free_rx;
3812 }
3813 /* Request irq for link and timer handling */
Yinghai Luddb213f2009-02-06 01:29:23 -08003814 sprintf(np->name_other, "%s-other", dev->name);
3815 if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector,
Joe Perchesa0607fd2009-11-18 23:29:17 -08003816 nv_nic_irq_other, IRQF_SHARED, np->name_other, dev) != 0) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003817 printk(KERN_INFO "forcedeth: request_irq failed for link %d\n", ret);
3818 pci_disable_msix(np->pci_dev);
3819 np->msi_flags &= ~NV_MSI_X_ENABLED;
3820 goto out_free_tx;
3821 }
3822 /* map interrupts to their respective vector */
3823 writel(0, base + NvRegMSIXMap0);
3824 writel(0, base + NvRegMSIXMap1);
3825 set_msix_vector_map(dev, NV_MSI_X_VECTOR_RX, NVREG_IRQ_RX_ALL);
3826 set_msix_vector_map(dev, NV_MSI_X_VECTOR_TX, NVREG_IRQ_TX_ALL);
3827 set_msix_vector_map(dev, NV_MSI_X_VECTOR_OTHER, NVREG_IRQ_OTHER);
3828 } else {
3829 /* Request irq for all interrupts */
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003830 if (request_irq(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector, handler, IRQF_SHARED, dev->name, dev) != 0) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003831 printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
3832 pci_disable_msix(np->pci_dev);
3833 np->msi_flags &= ~NV_MSI_X_ENABLED;
3834 goto out_err;
3835 }
3836
3837 /* map interrupts to vector 0 */
3838 writel(0, base + NvRegMSIXMap0);
3839 writel(0, base + NvRegMSIXMap1);
3840 }
3841 }
3842 }
3843 if (ret != 0 && np->msi_flags & NV_MSI_CAPABLE) {
3844 if ((ret = pci_enable_msi(np->pci_dev)) == 0) {
3845 np->msi_flags |= NV_MSI_ENABLED;
Manfred Spraula7475902007-10-17 21:52:33 +02003846 dev->irq = np->pci_dev->irq;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003847 if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0) {
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003848 printk(KERN_INFO "forcedeth: request_irq failed %d\n", ret);
3849 pci_disable_msi(np->pci_dev);
3850 np->msi_flags &= ~NV_MSI_ENABLED;
Manfred Spraula7475902007-10-17 21:52:33 +02003851 dev->irq = np->pci_dev->irq;
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003852 goto out_err;
3853 }
3854
3855 /* map interrupts to vector 0 */
3856 writel(0, base + NvRegMSIMap0);
3857 writel(0, base + NvRegMSIMap1);
3858 /* enable msi vector 0 */
3859 writel(NVREG_MSI_VECTOR_0_ENABLED, base + NvRegMSIIrqMask);
3860 }
3861 }
3862 if (ret != 0) {
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05003863 if (request_irq(np->pci_dev->irq, handler, IRQF_SHARED, dev->name, dev) != 0)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003864 goto out_err;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04003865
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003866 }
3867
3868 return 0;
3869out_free_tx:
3870 free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector, dev);
3871out_free_rx:
3872 free_irq(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector, dev);
3873out_err:
3874 return 1;
3875}
3876
3877static void nv_free_irq(struct net_device *dev)
3878{
3879 struct fe_priv *np = get_nvpriv(dev);
3880 int i;
3881
3882 if (np->msi_flags & NV_MSI_X_ENABLED) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00003883 for (i = 0; i < (np->msi_flags & NV_MSI_X_VECTORS_MASK); i++)
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003884 free_irq(np->msi_x_entry[i].vector, dev);
Ayaz Abdulla7a1854b2006-06-10 22:48:08 -04003885 pci_disable_msix(np->pci_dev);
3886 np->msi_flags &= ~NV_MSI_X_ENABLED;
3887 } else {
3888 free_irq(np->pci_dev->irq, dev);
3889 if (np->msi_flags & NV_MSI_ENABLED) {
3890 pci_disable_msi(np->pci_dev);
3891 np->msi_flags &= ~NV_MSI_ENABLED;
3892 }
3893 }
3894}
3895
Linus Torvalds1da177e2005-04-16 15:20:36 -07003896static void nv_do_nic_poll(unsigned long data)
3897{
3898 struct net_device *dev = (struct net_device *) data;
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04003899 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003900 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003901 u32 mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003902
Linus Torvalds1da177e2005-04-16 15:20:36 -07003903 /*
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003904 * First disable irq(s) and then
Linus Torvalds1da177e2005-04-16 15:20:36 -07003905 * reenable interrupts on the nic, we have to do this before calling
3906 * nv_nic_irq because that may decide to do otherwise
3907 */
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003908
Ayaz Abdulla84b39322006-05-20 14:59:48 -07003909 if (!using_multi_irqs(dev)) {
3910 if (np->msi_flags & NV_MSI_X_ENABLED)
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003911 disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07003912 else
Manfred Spraula7475902007-10-17 21:52:33 +02003913 disable_irq_lockdep(np->pci_dev->irq);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003914 mask = np->irqmask;
3915 } else {
3916 if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003917 disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003918 mask |= NVREG_IRQ_RX_ALL;
3919 }
3920 if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003921 disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003922 mask |= NVREG_IRQ_TX_ALL;
3923 }
3924 if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003925 disable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003926 mask |= NVREG_IRQ_OTHER;
3927 }
3928 }
Manfred Spraula7475902007-10-17 21:52:33 +02003929 /* disable_irq() contains synchronize_irq, thus no irq handler can run now */
3930
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003931 if (np->recover_error) {
3932 np->recover_error = 0;
Ayaz Abdulladaa91a92009-02-07 00:25:00 -08003933 printk(KERN_INFO "%s: MAC in recoverable error state\n", dev->name);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003934 if (netif_running(dev)) {
3935 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07003936 netif_addr_lock(dev);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003937 spin_lock(&np->lock);
3938 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04003939 nv_stop_rxtx(dev);
Ayaz Abdulladaa91a92009-02-07 00:25:00 -08003940 if (np->driver_data & DEV_HAS_POWER_CNTRL)
3941 nv_mac_reset(dev);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003942 nv_txrx_reset(dev);
3943 /* drain rx queue */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04003944 nv_drain_rxtx(dev);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003945 /* reinit driver view of the rx queue */
3946 set_bufsize(dev);
3947 if (nv_init_ring(dev)) {
3948 if (!np->in_shutdown)
3949 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
3950 }
3951 /* reinit nic view of the rx queue */
3952 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
3953 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00003954 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003955 base + NvRegRingSizes);
3956 pci_push(base);
3957 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
3958 pci_push(base);
Ayaz Abdulladaa91a92009-02-07 00:25:00 -08003959 /* clear interrupts */
3960 if (!(np->msi_flags & NV_MSI_X_ENABLED))
3961 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
3962 else
3963 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003964
3965 /* restart rx engine */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04003966 nv_start_rxtx(dev);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003967 spin_unlock(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07003968 netif_addr_unlock(dev);
Ayaz Abdullac5cf9102006-10-30 17:32:01 -05003969 netif_tx_unlock_bh(dev);
3970 }
3971 }
3972
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003973 writel(mask, base + NvRegIrqMask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003974 pci_push(base);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003975
Ayaz Abdulla84b39322006-05-20 14:59:48 -07003976 if (!using_multi_irqs(dev)) {
Yinghai Lu79d30a52009-02-06 01:30:01 -08003977 np->nic_poll_irq = 0;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04003978 if (nv_optimized(np))
Ayaz Abdullafcc5f262007-03-23 05:49:37 -05003979 nv_nic_irq_optimized(0, dev);
3980 else
3981 nv_nic_irq(0, dev);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07003982 if (np->msi_flags & NV_MSI_X_ENABLED)
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003983 enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07003984 else
Manfred Spraula7475902007-10-17 21:52:33 +02003985 enable_irq_lockdep(np->pci_dev->irq);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003986 } else {
3987 if (np->nic_poll_irq & NVREG_IRQ_RX_ALL) {
Yinghai Lu79d30a52009-02-06 01:30:01 -08003988 np->nic_poll_irq &= ~NVREG_IRQ_RX_ALL;
David Howells7d12e782006-10-05 14:55:46 +01003989 nv_nic_irq_rx(0, dev);
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003990 enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_RX].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003991 }
3992 if (np->nic_poll_irq & NVREG_IRQ_TX_ALL) {
Yinghai Lu79d30a52009-02-06 01:30:01 -08003993 np->nic_poll_irq &= ~NVREG_IRQ_TX_ALL;
David Howells7d12e782006-10-05 14:55:46 +01003994 nv_nic_irq_tx(0, dev);
Ingo Molnar8688cfc2006-07-03 00:25:39 -07003995 enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_TX].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05003996 }
3997 if (np->nic_poll_irq & NVREG_IRQ_OTHER) {
Yinghai Lu79d30a52009-02-06 01:30:01 -08003998 np->nic_poll_irq &= ~NVREG_IRQ_OTHER;
David Howells7d12e782006-10-05 14:55:46 +01003999 nv_nic_irq_other(0, dev);
Ingo Molnar8688cfc2006-07-03 00:25:39 -07004000 enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_OTHER].vector);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05004001 }
4002 }
Yinghai Lu79d30a52009-02-06 01:30:01 -08004003
Linus Torvalds1da177e2005-04-16 15:20:36 -07004004}
4005
Michal Schmidt2918c352005-05-12 19:42:06 -04004006#ifdef CONFIG_NET_POLL_CONTROLLER
4007static void nv_poll_controller(struct net_device *dev)
4008{
4009 nv_do_nic_poll((unsigned long) dev);
4010}
4011#endif
4012
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004013static void nv_do_stats_poll(unsigned long data)
4014{
4015 struct net_device *dev = (struct net_device *) data;
4016 struct fe_priv *np = netdev_priv(dev);
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004017
Ayaz Abdulla57fff692007-01-23 12:27:00 -05004018 nv_get_hw_stats(dev);
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004019
4020 if (!np->in_shutdown)
Daniel Drakebfebbb82008-03-18 11:07:18 +00004021 mod_timer(&np->stats_poll,
4022 round_jiffies(jiffies + STATS_INTERVAL));
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004023}
4024
Linus Torvalds1da177e2005-04-16 15:20:36 -07004025static void nv_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
4026{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04004027 struct fe_priv *np = netdev_priv(dev);
Jeff Garzik3f88ce42007-10-16 04:09:09 -04004028 strcpy(info->driver, DRV_NAME);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004029 strcpy(info->version, FORCEDETH_VERSION);
4030 strcpy(info->bus_info, pci_name(np->pci_dev));
4031}
4032
4033static void nv_get_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
4034{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04004035 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004036 wolinfo->supported = WAKE_MAGIC;
4037
4038 spin_lock_irq(&np->lock);
4039 if (np->wolenabled)
4040 wolinfo->wolopts = WAKE_MAGIC;
4041 spin_unlock_irq(&np->lock);
4042}
4043
4044static int nv_set_wol(struct net_device *dev, struct ethtool_wolinfo *wolinfo)
4045{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04004046 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004047 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullac42d9df2006-06-10 22:47:52 -04004048 u32 flags = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004049
Linus Torvalds1da177e2005-04-16 15:20:36 -07004050 if (wolinfo->wolopts == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004051 np->wolenabled = 0;
Ayaz Abdullac42d9df2006-06-10 22:47:52 -04004052 } else if (wolinfo->wolopts & WAKE_MAGIC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004053 np->wolenabled = 1;
Ayaz Abdullac42d9df2006-06-10 22:47:52 -04004054 flags = NVREG_WAKEUPFLAGS_ENABLE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004055 }
Ayaz Abdullac42d9df2006-06-10 22:47:52 -04004056 if (netif_running(dev)) {
4057 spin_lock_irq(&np->lock);
4058 writel(flags, base + NvRegWakeUpFlags);
4059 spin_unlock_irq(&np->lock);
4060 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004061 return 0;
4062}
4063
4064static int nv_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
4065{
4066 struct fe_priv *np = netdev_priv(dev);
4067 int adv;
4068
4069 spin_lock_irq(&np->lock);
4070 ecmd->port = PORT_MII;
4071 if (!netif_running(dev)) {
4072 /* We do not track link speed / duplex setting if the
4073 * interface is disabled. Force a link check */
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004074 if (nv_update_linkspeed(dev)) {
4075 if (!netif_carrier_ok(dev))
4076 netif_carrier_on(dev);
4077 } else {
4078 if (netif_carrier_ok(dev))
4079 netif_carrier_off(dev);
4080 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004081 }
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004082
4083 if (netif_carrier_ok(dev)) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00004084 switch (np->linkspeed & (NVREG_LINKSPEED_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004085 case NVREG_LINKSPEED_10:
4086 ecmd->speed = SPEED_10;
4087 break;
4088 case NVREG_LINKSPEED_100:
4089 ecmd->speed = SPEED_100;
4090 break;
4091 case NVREG_LINKSPEED_1000:
4092 ecmd->speed = SPEED_1000;
4093 break;
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004094 }
4095 ecmd->duplex = DUPLEX_HALF;
4096 if (np->duplex)
4097 ecmd->duplex = DUPLEX_FULL;
4098 } else {
4099 ecmd->speed = -1;
4100 ecmd->duplex = -1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004101 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004102
4103 ecmd->autoneg = np->autoneg;
4104
4105 ecmd->advertising = ADVERTISED_MII;
4106 if (np->autoneg) {
4107 ecmd->advertising |= ADVERTISED_Autoneg;
4108 adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004109 if (adv & ADVERTISE_10HALF)
4110 ecmd->advertising |= ADVERTISED_10baseT_Half;
4111 if (adv & ADVERTISE_10FULL)
4112 ecmd->advertising |= ADVERTISED_10baseT_Full;
4113 if (adv & ADVERTISE_100HALF)
4114 ecmd->advertising |= ADVERTISED_100baseT_Half;
4115 if (adv & ADVERTISE_100FULL)
4116 ecmd->advertising |= ADVERTISED_100baseT_Full;
4117 if (np->gigabit == PHY_GIGABIT) {
4118 adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
4119 if (adv & ADVERTISE_1000FULL)
4120 ecmd->advertising |= ADVERTISED_1000baseT_Full;
4121 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004122 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004123 ecmd->supported = (SUPPORTED_Autoneg |
4124 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
4125 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
4126 SUPPORTED_MII);
4127 if (np->gigabit == PHY_GIGABIT)
4128 ecmd->supported |= SUPPORTED_1000baseT_Full;
4129
4130 ecmd->phy_address = np->phyaddr;
4131 ecmd->transceiver = XCVR_EXTERNAL;
4132
4133 /* ignore maxtxpkt, maxrxpkt for now */
4134 spin_unlock_irq(&np->lock);
4135 return 0;
4136}
4137
4138static int nv_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
4139{
4140 struct fe_priv *np = netdev_priv(dev);
4141
4142 if (ecmd->port != PORT_MII)
4143 return -EINVAL;
4144 if (ecmd->transceiver != XCVR_EXTERNAL)
4145 return -EINVAL;
4146 if (ecmd->phy_address != np->phyaddr) {
4147 /* TODO: support switching between multiple phys. Should be
4148 * trivial, but not enabled due to lack of test hardware. */
4149 return -EINVAL;
4150 }
4151 if (ecmd->autoneg == AUTONEG_ENABLE) {
4152 u32 mask;
4153
4154 mask = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
4155 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
4156 if (np->gigabit == PHY_GIGABIT)
4157 mask |= ADVERTISED_1000baseT_Full;
4158
4159 if ((ecmd->advertising & mask) == 0)
4160 return -EINVAL;
4161
4162 } else if (ecmd->autoneg == AUTONEG_DISABLE) {
4163 /* Note: autonegotiation disable, speed 1000 intentionally
4164 * forbidden - noone should need that. */
4165
4166 if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
4167 return -EINVAL;
4168 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
4169 return -EINVAL;
4170 } else {
4171 return -EINVAL;
4172 }
4173
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004174 netif_carrier_off(dev);
4175 if (netif_running(dev)) {
Tobias Diedrich97bff092008-07-03 23:54:56 -07004176 unsigned long flags;
4177
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004178 nv_disable_irq(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004179 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07004180 netif_addr_lock(dev);
Tobias Diedrich97bff092008-07-03 23:54:56 -07004181 /* with plain spinlock lockdep complains */
4182 spin_lock_irqsave(&np->lock, flags);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004183 /* stop engines */
Tobias Diedrich97bff092008-07-03 23:54:56 -07004184 /* FIXME:
4185 * this can take some time, and interrupts are disabled
4186 * due to spin_lock_irqsave, but let's hope no daemon
4187 * is going to change the settings very often...
4188 * Worst case:
4189 * NV_RXSTOP_DELAY1MAX + NV_TXSTOP_DELAY1MAX
4190 * + some minor delays, which is up to a second approximately
4191 */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004192 nv_stop_rxtx(dev);
Tobias Diedrich97bff092008-07-03 23:54:56 -07004193 spin_unlock_irqrestore(&np->lock, flags);
David S. Millere308a5d2008-07-15 00:13:44 -07004194 netif_addr_unlock(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004195 netif_tx_unlock_bh(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004196 }
4197
Linus Torvalds1da177e2005-04-16 15:20:36 -07004198 if (ecmd->autoneg == AUTONEG_ENABLE) {
4199 int adv, bmcr;
4200
4201 np->autoneg = 1;
4202
4203 /* advertise only what has been requested */
4204 adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004205 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004206 if (ecmd->advertising & ADVERTISED_10baseT_Half)
4207 adv |= ADVERTISE_10HALF;
4208 if (ecmd->advertising & ADVERTISED_10baseT_Full)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004209 adv |= ADVERTISE_10FULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004210 if (ecmd->advertising & ADVERTISED_100baseT_Half)
4211 adv |= ADVERTISE_100HALF;
4212 if (ecmd->advertising & ADVERTISED_100baseT_Full)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004213 adv |= ADVERTISE_100FULL;
4214 if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */
4215 adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
4216 if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
4217 adv |= ADVERTISE_PAUSE_ASYM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004218 mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
4219
4220 if (np->gigabit == PHY_GIGABIT) {
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004221 adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004222 adv &= ~ADVERTISE_1000FULL;
4223 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
4224 adv |= ADVERTISE_1000FULL;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004225 mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004226 }
4227
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004228 if (netif_running(dev))
4229 printk(KERN_INFO "%s: link down.\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004230 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04004231 if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
4232 bmcr |= BMCR_ANENABLE;
4233 /* reset the phy in order for settings to stick,
4234 * and cause autoneg to start */
4235 if (phy_reset(dev, bmcr)) {
4236 printk(KERN_INFO "%s: phy reset failed\n", dev->name);
4237 return -EINVAL;
4238 }
4239 } else {
4240 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
4241 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
4242 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004243 } else {
4244 int adv, bmcr;
4245
4246 np->autoneg = 0;
4247
4248 adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004249 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004250 if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_HALF)
4251 adv |= ADVERTISE_10HALF;
4252 if (ecmd->speed == SPEED_10 && ecmd->duplex == DUPLEX_FULL)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004253 adv |= ADVERTISE_10FULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004254 if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_HALF)
4255 adv |= ADVERTISE_100HALF;
4256 if (ecmd->speed == SPEED_100 && ecmd->duplex == DUPLEX_FULL)
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004257 adv |= ADVERTISE_100FULL;
4258 np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
4259 if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) {/* for rx we set both advertisments but disable tx pause */
4260 adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
4261 np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
4262 }
4263 if (np->pause_flags & NV_PAUSEFRAME_TX_REQ) {
4264 adv |= ADVERTISE_PAUSE_ASYM;
4265 np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
4266 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004267 mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
4268 np->fixed_mode = adv;
4269
4270 if (np->gigabit == PHY_GIGABIT) {
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004271 adv = mii_rw(dev, np->phyaddr, MII_CTRL1000, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004272 adv &= ~ADVERTISE_1000FULL;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04004273 mii_rw(dev, np->phyaddr, MII_CTRL1000, adv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004274 }
4275
4276 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004277 bmcr &= ~(BMCR_ANENABLE|BMCR_SPEED100|BMCR_SPEED1000|BMCR_FULLDPLX);
4278 if (np->fixed_mode & (ADVERTISE_10FULL|ADVERTISE_100FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07004279 bmcr |= BMCR_FULLDPLX;
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004280 if (np->fixed_mode & (ADVERTISE_100HALF|ADVERTISE_100FULL))
Linus Torvalds1da177e2005-04-16 15:20:36 -07004281 bmcr |= BMCR_SPEED100;
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004282 if (np->phy_oui == PHY_OUI_MARVELL) {
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04004283 /* reset the phy in order for forced mode settings to stick */
4284 if (phy_reset(dev, bmcr)) {
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004285 printk(KERN_INFO "%s: phy reset failed\n", dev->name);
4286 return -EINVAL;
4287 }
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04004288 } else {
4289 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
4290 if (netif_running(dev)) {
4291 /* Wait a bit and then reconfigure the nic. */
4292 udelay(10);
4293 nv_linkchange(dev);
4294 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004295 }
4296 }
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004297
4298 if (netif_running(dev)) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004299 nv_start_rxtx(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004300 nv_enable_irq(dev);
4301 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004302
4303 return 0;
4304}
4305
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004306#define FORCEDETH_REGS_VER 1
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004307
4308static int nv_get_regs_len(struct net_device *dev)
4309{
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04004310 struct fe_priv *np = netdev_priv(dev);
4311 return np->register_size;
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004312}
4313
4314static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
4315{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04004316 struct fe_priv *np = netdev_priv(dev);
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004317 u8 __iomem *base = get_hwbase(dev);
4318 u32 *rbuf = buf;
4319 int i;
4320
4321 regs->version = FORCEDETH_REGS_VER;
4322 spin_lock_irq(&np->lock);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004323 for (i = 0; i <= np->register_size/sizeof(u32); i++)
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004324 rbuf[i] = readl(base + i*sizeof(u32));
4325 spin_unlock_irq(&np->lock);
4326}
4327
4328static int nv_nway_reset(struct net_device *dev)
4329{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04004330 struct fe_priv *np = netdev_priv(dev);
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004331 int ret;
4332
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004333 if (np->autoneg) {
4334 int bmcr;
4335
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004336 netif_carrier_off(dev);
4337 if (netif_running(dev)) {
4338 nv_disable_irq(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004339 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07004340 netif_addr_lock(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004341 spin_lock(&np->lock);
4342 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004343 nv_stop_rxtx(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004344 spin_unlock(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07004345 netif_addr_unlock(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004346 netif_tx_unlock_bh(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004347 printk(KERN_INFO "%s: link down.\n", dev->name);
4348 }
4349
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004350 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04004351 if (np->phy_model == PHY_MODEL_MARVELL_E3016) {
4352 bmcr |= BMCR_ANENABLE;
4353 /* reset the phy in order for settings to stick*/
4354 if (phy_reset(dev, bmcr)) {
4355 printk(KERN_INFO "%s: phy reset failed\n", dev->name);
4356 return -EINVAL;
4357 }
4358 } else {
4359 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
4360 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
4361 }
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004362
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004363 if (netif_running(dev)) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004364 nv_start_rxtx(dev);
Ayaz Abdullaf9430a02006-06-10 22:47:47 -04004365 nv_enable_irq(dev);
4366 }
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004367 ret = 0;
4368 } else {
4369 ret = -EINVAL;
4370 }
Manfred Sprauldc8216c2005-07-31 18:26:05 +02004371
4372 return ret;
4373}
4374
Zachary Amsden0674d592006-06-04 02:51:38 -07004375static int nv_set_tso(struct net_device *dev, u32 value)
4376{
4377 struct fe_priv *np = netdev_priv(dev);
4378
4379 if ((np->driver_data & DEV_HAS_CHECKSUM))
4380 return ethtool_op_set_tso(dev, value);
4381 else
Ayaz Abdulla6a788142006-06-10 22:47:26 -04004382 return -EOPNOTSUPP;
Zachary Amsden0674d592006-06-04 02:51:38 -07004383}
Zachary Amsden0674d592006-06-04 02:51:38 -07004384
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004385static void nv_get_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
4386{
4387 struct fe_priv *np = netdev_priv(dev);
4388
4389 ring->rx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
4390 ring->rx_mini_max_pending = 0;
4391 ring->rx_jumbo_max_pending = 0;
4392 ring->tx_max_pending = (np->desc_ver == DESC_VER_1) ? RING_MAX_DESC_VER_1 : RING_MAX_DESC_VER_2_3;
4393
4394 ring->rx_pending = np->rx_ring_size;
4395 ring->rx_mini_pending = 0;
4396 ring->rx_jumbo_pending = 0;
4397 ring->tx_pending = np->tx_ring_size;
4398}
4399
4400static int nv_set_ringparam(struct net_device *dev, struct ethtool_ringparam* ring)
4401{
4402 struct fe_priv *np = netdev_priv(dev);
4403 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05004404 u8 *rxtx_ring, *rx_skbuff, *tx_skbuff;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004405 dma_addr_t ring_addr;
4406
4407 if (ring->rx_pending < RX_RING_MIN ||
4408 ring->tx_pending < TX_RING_MIN ||
4409 ring->rx_mini_pending != 0 ||
4410 ring->rx_jumbo_pending != 0 ||
4411 (np->desc_ver == DESC_VER_1 &&
4412 (ring->rx_pending > RING_MAX_DESC_VER_1 ||
4413 ring->tx_pending > RING_MAX_DESC_VER_1)) ||
4414 (np->desc_ver != DESC_VER_1 &&
4415 (ring->rx_pending > RING_MAX_DESC_VER_2_3 ||
4416 ring->tx_pending > RING_MAX_DESC_VER_2_3))) {
4417 return -EINVAL;
4418 }
4419
4420 /* allocate new rings */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004421 if (!nv_optimized(np)) {
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004422 rxtx_ring = pci_alloc_consistent(np->pci_dev,
4423 sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
4424 &ring_addr);
4425 } else {
4426 rxtx_ring = pci_alloc_consistent(np->pci_dev,
4427 sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
4428 &ring_addr);
4429 }
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05004430 rx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->rx_pending, GFP_KERNEL);
4431 tx_skbuff = kmalloc(sizeof(struct nv_skb_map) * ring->tx_pending, GFP_KERNEL);
4432 if (!rxtx_ring || !rx_skbuff || !tx_skbuff) {
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004433 /* fall back to old rings */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004434 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004435 if (rxtx_ring)
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004436 pci_free_consistent(np->pci_dev, sizeof(struct ring_desc) * (ring->rx_pending + ring->tx_pending),
4437 rxtx_ring, ring_addr);
4438 } else {
4439 if (rxtx_ring)
4440 pci_free_consistent(np->pci_dev, sizeof(struct ring_desc_ex) * (ring->rx_pending + ring->tx_pending),
4441 rxtx_ring, ring_addr);
4442 }
Szymon Janc9b03b062010-11-27 08:39:44 +00004443
4444 kfree(rx_skbuff);
4445 kfree(tx_skbuff);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004446 goto exit;
4447 }
4448
4449 if (netif_running(dev)) {
4450 nv_disable_irq(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00004451 nv_napi_disable(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004452 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07004453 netif_addr_lock(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004454 spin_lock(&np->lock);
4455 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004456 nv_stop_rxtx(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004457 nv_txrx_reset(dev);
4458 /* drain queues */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004459 nv_drain_rxtx(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004460 /* delete queues */
4461 free_rings(dev);
4462 }
4463
4464 /* set new values */
4465 np->rx_ring_size = ring->rx_pending;
4466 np->tx_ring_size = ring->tx_pending;
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004467
4468 if (!nv_optimized(np)) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00004469 np->rx_ring.orig = (struct ring_desc *)rxtx_ring;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004470 np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
4471 } else {
Szymon Janc78aea4f2010-11-27 08:39:43 +00004472 np->rx_ring.ex = (struct ring_desc_ex *)rxtx_ring;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004473 np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
4474 }
Szymon Janc78aea4f2010-11-27 08:39:43 +00004475 np->rx_skb = (struct nv_skb_map *)rx_skbuff;
4476 np->tx_skb = (struct nv_skb_map *)tx_skbuff;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004477 np->ring_addr = ring_addr;
4478
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05004479 memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size);
4480 memset(np->tx_skb, 0, sizeof(struct nv_skb_map) * np->tx_ring_size);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004481
4482 if (netif_running(dev)) {
4483 /* reinit driver view of the queues */
4484 set_bufsize(dev);
4485 if (nv_init_ring(dev)) {
4486 if (!np->in_shutdown)
4487 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
4488 }
4489
4490 /* reinit nic view of the queues */
4491 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
4492 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004493 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004494 base + NvRegRingSizes);
4495 pci_push(base);
4496 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
4497 pci_push(base);
4498
4499 /* restart engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004500 nv_start_rxtx(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004501 spin_unlock(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07004502 netif_addr_unlock(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004503 netif_tx_unlock_bh(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00004504 nv_napi_enable(dev);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04004505 nv_enable_irq(dev);
4506 }
4507 return 0;
4508exit:
4509 return -ENOMEM;
4510}
4511
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004512static void nv_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
4513{
4514 struct fe_priv *np = netdev_priv(dev);
4515
4516 pause->autoneg = (np->pause_flags & NV_PAUSEFRAME_AUTONEG) != 0;
4517 pause->rx_pause = (np->pause_flags & NV_PAUSEFRAME_RX_ENABLE) != 0;
4518 pause->tx_pause = (np->pause_flags & NV_PAUSEFRAME_TX_ENABLE) != 0;
4519}
4520
4521static int nv_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam* pause)
4522{
4523 struct fe_priv *np = netdev_priv(dev);
4524 int adv, bmcr;
4525
4526 if ((!np->autoneg && np->duplex == 0) ||
4527 (np->autoneg && !pause->autoneg && np->duplex == 0)) {
4528 printk(KERN_INFO "%s: can not set pause settings when forced link is in half duplex.\n",
4529 dev->name);
4530 return -EINVAL;
4531 }
4532 if (pause->tx_pause && !(np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)) {
4533 printk(KERN_INFO "%s: hardware does not support tx pause frames.\n", dev->name);
4534 return -EINVAL;
4535 }
4536
4537 netif_carrier_off(dev);
4538 if (netif_running(dev)) {
4539 nv_disable_irq(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004540 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07004541 netif_addr_lock(dev);
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004542 spin_lock(&np->lock);
4543 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004544 nv_stop_rxtx(dev);
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004545 spin_unlock(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07004546 netif_addr_unlock(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004547 netif_tx_unlock_bh(dev);
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004548 }
4549
4550 np->pause_flags &= ~(NV_PAUSEFRAME_RX_REQ|NV_PAUSEFRAME_TX_REQ);
4551 if (pause->rx_pause)
4552 np->pause_flags |= NV_PAUSEFRAME_RX_REQ;
4553 if (pause->tx_pause)
4554 np->pause_flags |= NV_PAUSEFRAME_TX_REQ;
4555
4556 if (np->autoneg && pause->autoneg) {
4557 np->pause_flags |= NV_PAUSEFRAME_AUTONEG;
4558
4559 adv = mii_rw(dev, np->phyaddr, MII_ADVERTISE, MII_READ);
4560 adv &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
4561 if (np->pause_flags & NV_PAUSEFRAME_RX_REQ) /* for rx we set both advertisments but disable tx pause */
4562 adv |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
4563 if (np->pause_flags & NV_PAUSEFRAME_TX_REQ)
4564 adv |= ADVERTISE_PAUSE_ASYM;
4565 mii_rw(dev, np->phyaddr, MII_ADVERTISE, adv);
4566
4567 if (netif_running(dev))
4568 printk(KERN_INFO "%s: link down.\n", dev->name);
4569 bmcr = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
4570 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
4571 mii_rw(dev, np->phyaddr, MII_BMCR, bmcr);
4572 } else {
4573 np->pause_flags &= ~(NV_PAUSEFRAME_AUTONEG|NV_PAUSEFRAME_RX_ENABLE|NV_PAUSEFRAME_TX_ENABLE);
4574 if (pause->rx_pause)
4575 np->pause_flags |= NV_PAUSEFRAME_RX_ENABLE;
4576 if (pause->tx_pause)
4577 np->pause_flags |= NV_PAUSEFRAME_TX_ENABLE;
4578
4579 if (!netif_running(dev))
4580 nv_update_linkspeed(dev);
4581 else
4582 nv_update_pause(dev, np->pause_flags);
4583 }
4584
4585 if (netif_running(dev)) {
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004586 nv_start_rxtx(dev);
Ayaz Abdullab6d07732006-06-10 22:47:42 -04004587 nv_enable_irq(dev);
4588 }
4589 return 0;
4590}
4591
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004592static u32 nv_get_rx_csum(struct net_device *dev)
4593{
4594 struct fe_priv *np = netdev_priv(dev);
Eric Dumazet807540b2010-09-23 05:40:09 +00004595 return np->rx_csum != 0;
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004596}
4597
4598static int nv_set_rx_csum(struct net_device *dev, u32 data)
4599{
4600 struct fe_priv *np = netdev_priv(dev);
4601 u8 __iomem *base = get_hwbase(dev);
4602 int retcode = 0;
4603
4604 if (np->driver_data & DEV_HAS_CHECKSUM) {
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004605 if (data) {
Ayaz Abdullaf2ad2d92006-08-24 17:35:41 -04004606 np->rx_csum = 1;
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004607 np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004608 } else {
Ayaz Abdullaf2ad2d92006-08-24 17:35:41 -04004609 np->rx_csum = 0;
4610 /* vlan is dependent on rx checksum offload */
4611 if (!(np->vlanctl_bits & NVREG_VLANCONTROL_ENABLE))
4612 np->txrxctl_bits &= ~NVREG_TXRXCTL_RXCHECK;
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004613 }
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004614 if (netif_running(dev)) {
4615 spin_lock_irq(&np->lock);
4616 writel(np->txrxctl_bits, base + NvRegTxRxControl);
4617 spin_unlock_irq(&np->lock);
4618 }
4619 } else {
4620 return -EINVAL;
4621 }
4622
4623 return retcode;
4624}
4625
4626static int nv_set_tx_csum(struct net_device *dev, u32 data)
4627{
4628 struct fe_priv *np = netdev_priv(dev);
4629
4630 if (np->driver_data & DEV_HAS_CHECKSUM)
Ayaz Abdullac1086cd2009-02-07 00:24:39 -08004631 return ethtool_op_set_tx_csum(dev, data);
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04004632 else
4633 return -EOPNOTSUPP;
4634}
4635
4636static int nv_set_sg(struct net_device *dev, u32 data)
4637{
4638 struct fe_priv *np = netdev_priv(dev);
4639
4640 if (np->driver_data & DEV_HAS_CHECKSUM)
4641 return ethtool_op_set_sg(dev, data);
4642 else
4643 return -EOPNOTSUPP;
4644}
4645
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004646static int nv_get_sset_count(struct net_device *dev, int sset)
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004647{
4648 struct fe_priv *np = netdev_priv(dev);
4649
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004650 switch (sset) {
4651 case ETH_SS_TEST:
4652 if (np->driver_data & DEV_HAS_TEST_EXTENDED)
4653 return NV_TEST_COUNT_EXTENDED;
4654 else
4655 return NV_TEST_COUNT_BASE;
4656 case ETH_SS_STATS:
Ayaz Abdulla8ed14542009-03-05 08:01:49 +00004657 if (np->driver_data & DEV_HAS_STATISTICS_V3)
4658 return NV_DEV_STATISTICS_V3_COUNT;
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004659 else if (np->driver_data & DEV_HAS_STATISTICS_V2)
4660 return NV_DEV_STATISTICS_V2_COUNT;
Ayaz Abdulla8ed14542009-03-05 08:01:49 +00004661 else if (np->driver_data & DEV_HAS_STATISTICS_V1)
4662 return NV_DEV_STATISTICS_V1_COUNT;
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004663 else
4664 return 0;
4665 default:
4666 return -EOPNOTSUPP;
4667 }
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004668}
4669
4670static void nv_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *estats, u64 *buffer)
4671{
4672 struct fe_priv *np = netdev_priv(dev);
4673
4674 /* update stats */
4675 nv_do_stats_poll((unsigned long)dev);
4676
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004677 memcpy(buffer, &np->estats, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(u64));
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004678}
4679
4680static int nv_link_test(struct net_device *dev)
4681{
4682 struct fe_priv *np = netdev_priv(dev);
4683 int mii_status;
4684
4685 mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
4686 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
4687
4688 /* check phy link status */
4689 if (!(mii_status & BMSR_LSTATUS))
4690 return 0;
4691 else
4692 return 1;
4693}
4694
4695static int nv_register_test(struct net_device *dev)
4696{
4697 u8 __iomem *base = get_hwbase(dev);
4698 int i = 0;
4699 u32 orig_read, new_read;
4700
4701 do {
4702 orig_read = readl(base + nv_registers_test[i].reg);
4703
4704 /* xor with mask to toggle bits */
4705 orig_read ^= nv_registers_test[i].mask;
4706
4707 writel(orig_read, base + nv_registers_test[i].reg);
4708
4709 new_read = readl(base + nv_registers_test[i].reg);
4710
4711 if ((new_read & nv_registers_test[i].mask) != (orig_read & nv_registers_test[i].mask))
4712 return 0;
4713
4714 /* restore original value */
4715 orig_read ^= nv_registers_test[i].mask;
4716 writel(orig_read, base + nv_registers_test[i].reg);
4717
4718 } while (nv_registers_test[++i].reg != 0);
4719
4720 return 1;
4721}
4722
4723static int nv_interrupt_test(struct net_device *dev)
4724{
4725 struct fe_priv *np = netdev_priv(dev);
4726 u8 __iomem *base = get_hwbase(dev);
4727 int ret = 1;
4728 int testcnt;
4729 u32 save_msi_flags, save_poll_interval = 0;
4730
4731 if (netif_running(dev)) {
4732 /* free current irq */
4733 nv_free_irq(dev);
4734 save_poll_interval = readl(base+NvRegPollingInterval);
4735 }
4736
4737 /* flag to test interrupt handler */
4738 np->intr_test = 0;
4739
4740 /* setup test irq */
4741 save_msi_flags = np->msi_flags;
4742 np->msi_flags &= ~NV_MSI_X_VECTORS_MASK;
4743 np->msi_flags |= 0x001; /* setup 1 vector */
4744 if (nv_request_irq(dev, 1))
4745 return 0;
4746
4747 /* setup timer interrupt */
4748 writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
4749 writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
4750
4751 nv_enable_hw_interrupts(dev, NVREG_IRQ_TIMER);
4752
4753 /* wait for at least one interrupt */
4754 msleep(100);
4755
4756 spin_lock_irq(&np->lock);
4757
4758 /* flag should be set within ISR */
4759 testcnt = np->intr_test;
4760 if (!testcnt)
4761 ret = 2;
4762
4763 nv_disable_hw_interrupts(dev, NVREG_IRQ_TIMER);
4764 if (!(np->msi_flags & NV_MSI_X_ENABLED))
4765 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
4766 else
4767 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
4768
4769 spin_unlock_irq(&np->lock);
4770
4771 nv_free_irq(dev);
4772
4773 np->msi_flags = save_msi_flags;
4774
4775 if (netif_running(dev)) {
4776 writel(save_poll_interval, base + NvRegPollingInterval);
4777 writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
4778 /* restore original irq */
4779 if (nv_request_irq(dev, 0))
4780 return 0;
4781 }
4782
4783 return ret;
4784}
4785
4786static int nv_loopback_test(struct net_device *dev)
4787{
4788 struct fe_priv *np = netdev_priv(dev);
4789 u8 __iomem *base = get_hwbase(dev);
4790 struct sk_buff *tx_skb, *rx_skb;
4791 dma_addr_t test_dma_addr;
4792 u32 tx_flags_extra = (np->desc_ver == DESC_VER_1 ? NV_TX_LASTPACKET : NV_TX2_LASTPACKET);
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004793 u32 flags;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004794 int len, i, pkt_len;
4795 u8 *pkt_data;
4796 u32 filter_flags = 0;
4797 u32 misc1_flags = 0;
4798 int ret = 1;
4799
4800 if (netif_running(dev)) {
4801 nv_disable_irq(dev);
4802 filter_flags = readl(base + NvRegPacketFilterFlags);
4803 misc1_flags = readl(base + NvRegMisc1);
4804 } else {
4805 nv_txrx_reset(dev);
4806 }
4807
4808 /* reinit driver view of the rx queue */
4809 set_bufsize(dev);
4810 nv_init_ring(dev);
4811
4812 /* setup hardware for loopback */
4813 writel(NVREG_MISC1_FORCE, base + NvRegMisc1);
4814 writel(NVREG_PFF_ALWAYS | NVREG_PFF_LOOPBACK, base + NvRegPacketFilterFlags);
4815
4816 /* reinit nic view of the rx queue */
4817 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
4818 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004819 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004820 base + NvRegRingSizes);
4821 pci_push(base);
4822
4823 /* restart rx engine */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004824 nv_start_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004825
4826 /* setup packet for tx */
4827 pkt_len = ETH_DATA_LEN;
4828 tx_skb = dev_alloc_skb(pkt_len);
Jesper Juhl46798c82006-09-25 16:39:24 -07004829 if (!tx_skb) {
4830 printk(KERN_ERR "dev_alloc_skb() failed during loopback test"
4831 " of %s\n", dev->name);
4832 ret = 0;
4833 goto out;
4834 }
Arnaldo Carvalho de Melo8b5be262007-03-20 12:08:20 -03004835 test_dma_addr = pci_map_single(np->pci_dev, tx_skb->data,
4836 skb_tailroom(tx_skb),
4837 PCI_DMA_FROMDEVICE);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004838 pkt_data = skb_put(tx_skb, pkt_len);
4839 for (i = 0; i < pkt_len; i++)
4840 pkt_data[i] = (u8)(i & 0xff);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004841
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004842 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004843 np->tx_ring.orig[0].buf = cpu_to_le32(test_dma_addr);
4844 np->tx_ring.orig[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004845 } else {
Al Viro5bb7ea22007-12-09 16:06:41 +00004846 np->tx_ring.ex[0].bufhigh = cpu_to_le32(dma_high(test_dma_addr));
4847 np->tx_ring.ex[0].buflow = cpu_to_le32(dma_low(test_dma_addr));
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004848 np->tx_ring.ex[0].flaglen = cpu_to_le32((pkt_len-1) | np->tx_flags | tx_flags_extra);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004849 }
4850 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
4851 pci_push(get_hwbase(dev));
4852
4853 msleep(500);
4854
4855 /* check for rx of the packet */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004856 if (!nv_optimized(np)) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004857 flags = le32_to_cpu(np->rx_ring.orig[0].flaglen);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004858 len = nv_descr_getlength(&np->rx_ring.orig[0], np->desc_ver);
4859
4860 } else {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004861 flags = le32_to_cpu(np->rx_ring.ex[0].flaglen);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004862 len = nv_descr_getlength_ex(&np->rx_ring.ex[0], np->desc_ver);
4863 }
4864
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004865 if (flags & NV_RX_AVAIL) {
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004866 ret = 0;
4867 } else if (np->desc_ver == DESC_VER_1) {
Stephen Hemmingerf82a9352006-07-27 18:50:08 -07004868 if (flags & NV_RX_ERROR)
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004869 ret = 0;
4870 } else {
Szymon Janc78aea4f2010-11-27 08:39:43 +00004871 if (flags & NV_RX2_ERROR)
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004872 ret = 0;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004873 }
4874
4875 if (ret) {
4876 if (len != pkt_len) {
4877 ret = 0;
4878 dprintk(KERN_DEBUG "%s: loopback len mismatch %d vs %d\n",
4879 dev->name, len, pkt_len);
4880 } else {
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05004881 rx_skb = np->rx_skb[0].skb;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004882 for (i = 0; i < pkt_len; i++) {
4883 if (rx_skb->data[i] != (u8)(i & 0xff)) {
4884 ret = 0;
4885 dprintk(KERN_DEBUG "%s: loopback pattern check failed on byte %d\n",
4886 dev->name, i);
4887 break;
4888 }
4889 }
4890 }
4891 } else {
4892 dprintk(KERN_DEBUG "%s: loopback - did not receive test packet\n", dev->name);
4893 }
4894
Eric Dumazet73a37072009-06-17 21:17:59 +00004895 pci_unmap_single(np->pci_dev, test_dma_addr,
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -07004896 (skb_end_pointer(tx_skb) - tx_skb->data),
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004897 PCI_DMA_TODEVICE);
4898 dev_kfree_skb_any(tx_skb);
Jesper Juhl46798c82006-09-25 16:39:24 -07004899 out:
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004900 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004901 nv_stop_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004902 nv_txrx_reset(dev);
4903 /* drain rx queue */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004904 nv_drain_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004905
4906 if (netif_running(dev)) {
4907 writel(misc1_flags, base + NvRegMisc1);
4908 writel(filter_flags, base + NvRegPacketFilterFlags);
4909 nv_enable_irq(dev);
4910 }
4911
4912 return ret;
4913}
4914
4915static void nv_self_test(struct net_device *dev, struct ethtool_test *test, u64 *buffer)
4916{
4917 struct fe_priv *np = netdev_priv(dev);
4918 u8 __iomem *base = get_hwbase(dev);
4919 int result;
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004920 memset(buffer, 0, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(u64));
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004921
4922 if (!nv_link_test(dev)) {
4923 test->flags |= ETH_TEST_FL_FAILED;
4924 buffer[0] = 1;
4925 }
4926
4927 if (test->flags & ETH_TEST_FL_OFFLINE) {
4928 if (netif_running(dev)) {
4929 netif_stop_queue(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00004930 nv_napi_disable(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004931 netif_tx_lock_bh(dev);
David S. Millere308a5d2008-07-15 00:13:44 -07004932 netif_addr_lock(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004933 spin_lock_irq(&np->lock);
4934 nv_disable_hw_interrupts(dev, np->irqmask);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004935 if (!(np->msi_flags & NV_MSI_X_ENABLED))
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004936 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004937 else
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004938 writel(NVREG_IRQSTAT_MASK, base + NvRegMSIXIrqStatus);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004939 /* stop engines */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004940 nv_stop_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004941 nv_txrx_reset(dev);
4942 /* drain rx queue */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004943 nv_drain_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004944 spin_unlock_irq(&np->lock);
David S. Millere308a5d2008-07-15 00:13:44 -07004945 netif_addr_unlock(dev);
Herbert Xu58dfd9c2006-06-21 10:53:54 +10004946 netif_tx_unlock_bh(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004947 }
4948
4949 if (!nv_register_test(dev)) {
4950 test->flags |= ETH_TEST_FL_FAILED;
4951 buffer[1] = 1;
4952 }
4953
4954 result = nv_interrupt_test(dev);
4955 if (result != 1) {
4956 test->flags |= ETH_TEST_FL_FAILED;
4957 buffer[2] = 1;
4958 }
4959 if (result == 0) {
4960 /* bail out */
4961 return;
4962 }
4963
4964 if (!nv_loopback_test(dev)) {
4965 test->flags |= ETH_TEST_FL_FAILED;
4966 buffer[3] = 1;
4967 }
4968
4969 if (netif_running(dev)) {
4970 /* reinit driver view of the rx queue */
4971 set_bufsize(dev);
4972 if (nv_init_ring(dev)) {
4973 if (!np->in_shutdown)
4974 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
4975 }
4976 /* reinit nic view of the rx queue */
4977 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
4978 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00004979 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004980 base + NvRegRingSizes);
4981 pci_push(base);
4982 writel(NVREG_TXRXCTL_KICK|np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
4983 pci_push(base);
4984 /* restart rx engine */
Jeff Garzik36b30ea2007-10-16 01:40:30 -04004985 nv_start_rxtx(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004986 netif_start_queue(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00004987 nv_napi_enable(dev);
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004988 nv_enable_hw_interrupts(dev, np->irqmask);
4989 }
4990 }
4991}
4992
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004993static void nv_get_strings(struct net_device *dev, u32 stringset, u8 *buffer)
4994{
4995 switch (stringset) {
4996 case ETH_SS_STATS:
Jeff Garzikb9f2c042007-10-03 18:07:32 -07004997 memcpy(buffer, &nv_estats_str, nv_get_sset_count(dev, ETH_SS_STATS)*sizeof(struct nv_ethtool_str));
Ayaz Abdulla52da3572006-06-10 22:48:04 -04004998 break;
Ayaz Abdulla9589c772006-06-10 22:48:13 -04004999 case ETH_SS_TEST:
Jeff Garzikb9f2c042007-10-03 18:07:32 -07005000 memcpy(buffer, &nv_etests_str, nv_get_sset_count(dev, ETH_SS_TEST)*sizeof(struct nv_ethtool_str));
Ayaz Abdulla9589c772006-06-10 22:48:13 -04005001 break;
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005002 }
5003}
5004
Jeff Garzik7282d492006-09-13 14:30:00 -04005005static const struct ethtool_ops ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005006 .get_drvinfo = nv_get_drvinfo,
5007 .get_link = ethtool_op_get_link,
5008 .get_wol = nv_get_wol,
5009 .set_wol = nv_set_wol,
5010 .get_settings = nv_get_settings,
5011 .set_settings = nv_set_settings,
Manfred Sprauldc8216c2005-07-31 18:26:05 +02005012 .get_regs_len = nv_get_regs_len,
5013 .get_regs = nv_get_regs,
5014 .nway_reset = nv_nway_reset,
Ayaz Abdulla6a788142006-06-10 22:47:26 -04005015 .set_tso = nv_set_tso,
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005016 .get_ringparam = nv_get_ringparam,
5017 .set_ringparam = nv_set_ringparam,
Ayaz Abdullab6d07732006-06-10 22:47:42 -04005018 .get_pauseparam = nv_get_pauseparam,
5019 .set_pauseparam = nv_set_pauseparam,
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04005020 .get_rx_csum = nv_get_rx_csum,
5021 .set_rx_csum = nv_set_rx_csum,
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04005022 .set_tx_csum = nv_set_tx_csum,
Ayaz Abdulla5ed26162006-06-10 22:47:59 -04005023 .set_sg = nv_set_sg,
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005024 .get_strings = nv_get_strings,
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005025 .get_ethtool_stats = nv_get_ethtool_stats,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07005026 .get_sset_count = nv_get_sset_count,
Ayaz Abdulla9589c772006-06-10 22:48:13 -04005027 .self_test = nv_self_test,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005028};
5029
Ayaz Abdullaee407b02006-02-04 13:13:17 -05005030static void nv_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
5031{
5032 struct fe_priv *np = get_nvpriv(dev);
5033
5034 spin_lock_irq(&np->lock);
5035
5036 /* save vlan group */
5037 np->vlangrp = grp;
5038
5039 if (grp) {
5040 /* enable vlan on MAC */
5041 np->txrxctl_bits |= NVREG_TXRXCTL_VLANSTRIP | NVREG_TXRXCTL_VLANINS;
5042 } else {
5043 /* disable vlan on MAC */
5044 np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANSTRIP;
5045 np->txrxctl_bits &= ~NVREG_TXRXCTL_VLANINS;
5046 }
5047
5048 writel(np->txrxctl_bits, get_hwbase(dev) + NvRegTxRxControl);
5049
5050 spin_unlock_irq(&np->lock);
Stephen Hemminger25805dc2007-06-01 09:44:01 -07005051}
Ayaz Abdullaee407b02006-02-04 13:13:17 -05005052
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005053/* The mgmt unit and driver use a semaphore to access the phy during init */
5054static int nv_mgmt_acquire_sema(struct net_device *dev)
5055{
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005056 struct fe_priv *np = netdev_priv(dev);
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005057 u8 __iomem *base = get_hwbase(dev);
5058 int i;
5059 u32 tx_ctrl, mgmt_sema;
5060
5061 for (i = 0; i < 10; i++) {
5062 mgmt_sema = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_SEMA_MASK;
5063 if (mgmt_sema == NVREG_XMITCTL_MGMT_SEMA_FREE)
5064 break;
5065 msleep(500);
5066 }
5067
5068 if (mgmt_sema != NVREG_XMITCTL_MGMT_SEMA_FREE)
5069 return 0;
5070
5071 for (i = 0; i < 2; i++) {
5072 tx_ctrl = readl(base + NvRegTransmitterControl);
5073 tx_ctrl |= NVREG_XMITCTL_HOST_SEMA_ACQ;
5074 writel(tx_ctrl, base + NvRegTransmitterControl);
5075
5076 /* verify that semaphore was acquired */
5077 tx_ctrl = readl(base + NvRegTransmitterControl);
5078 if (((tx_ctrl & NVREG_XMITCTL_HOST_SEMA_MASK) == NVREG_XMITCTL_HOST_SEMA_ACQ) &&
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005079 ((tx_ctrl & NVREG_XMITCTL_MGMT_SEMA_MASK) == NVREG_XMITCTL_MGMT_SEMA_FREE)) {
5080 np->mgmt_sema = 1;
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005081 return 1;
Szymon Janc78aea4f2010-11-27 08:39:43 +00005082 } else
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005083 udelay(50);
5084 }
5085
5086 return 0;
5087}
5088
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005089static void nv_mgmt_release_sema(struct net_device *dev)
5090{
5091 struct fe_priv *np = netdev_priv(dev);
5092 u8 __iomem *base = get_hwbase(dev);
5093 u32 tx_ctrl;
5094
5095 if (np->driver_data & DEV_HAS_MGMT_UNIT) {
5096 if (np->mgmt_sema) {
5097 tx_ctrl = readl(base + NvRegTransmitterControl);
5098 tx_ctrl &= ~NVREG_XMITCTL_HOST_SEMA_ACQ;
5099 writel(tx_ctrl, base + NvRegTransmitterControl);
5100 }
5101 }
5102}
5103
5104
5105static int nv_mgmt_get_version(struct net_device *dev)
5106{
5107 struct fe_priv *np = netdev_priv(dev);
5108 u8 __iomem *base = get_hwbase(dev);
5109 u32 data_ready = readl(base + NvRegTransmitterControl);
5110 u32 data_ready2 = 0;
5111 unsigned long start;
5112 int ready = 0;
5113
5114 writel(NVREG_MGMTUNITGETVERSION, base + NvRegMgmtUnitGetVersion);
5115 writel(data_ready ^ NVREG_XMITCTL_DATA_START, base + NvRegTransmitterControl);
5116 start = jiffies;
5117 while (time_before(jiffies, start + 5*HZ)) {
5118 data_ready2 = readl(base + NvRegTransmitterControl);
5119 if ((data_ready & NVREG_XMITCTL_DATA_READY) != (data_ready2 & NVREG_XMITCTL_DATA_READY)) {
5120 ready = 1;
5121 break;
5122 }
5123 schedule_timeout_uninterruptible(1);
5124 }
5125
5126 if (!ready || (data_ready2 & NVREG_XMITCTL_DATA_ERROR))
5127 return 0;
5128
5129 np->mgmt_version = readl(base + NvRegMgmtUnitVersion) & NVREG_MGMTUNITVERSION;
5130
5131 return 1;
5132}
5133
Linus Torvalds1da177e2005-04-16 15:20:36 -07005134static int nv_open(struct net_device *dev)
5135{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04005136 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005137 u8 __iomem *base = get_hwbase(dev);
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05005138 int ret = 1;
5139 int oom, i;
Ayaz Abdullaa4336862008-04-18 13:50:43 -07005140 u32 low;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005141
5142 dprintk(KERN_DEBUG "nv_open: begin\n");
5143
Ed Swierkcb52deb2008-12-01 12:24:43 +00005144 /* power up phy */
5145 mii_rw(dev, np->phyaddr, MII_BMCR,
5146 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ) & ~BMCR_PDOWN);
5147
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00005148 nv_txrx_gate(dev, false);
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005149 /* erase previous misconfiguration */
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005150 if (np->driver_data & DEV_HAS_POWER_CNTRL)
5151 nv_mac_reset(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005152 writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
5153 writel(0, base + NvRegMulticastAddrB);
Ayaz Abdullabb9a4fd2008-01-13 16:03:04 -05005154 writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA);
5155 writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005156 writel(0, base + NvRegPacketFilterFlags);
5157
5158 writel(0, base + NvRegTransmitterControl);
5159 writel(0, base + NvRegReceiverControl);
5160
5161 writel(0, base + NvRegAdapterControl);
5162
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04005163 if (np->pause_flags & NV_PAUSEFRAME_TX_CAPABLE)
5164 writel(NVREG_TX_PAUSEFRAME_DISABLE, base + NvRegTxPauseFrame);
5165
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005166 /* initialize descriptor rings */
Manfred Sprauld81c0982005-07-31 18:20:30 +02005167 set_bufsize(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005168 oom = nv_init_ring(dev);
5169
5170 writel(0, base + NvRegLinkSpeed);
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005171 writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005172 nv_txrx_reset(dev);
5173 writel(0, base + NvRegUnknownSetupReg6);
5174
5175 np->in_shutdown = 0;
5176
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005177 /* give hw rings */
Ayaz Abdulla0832b252006-02-04 13:13:26 -05005178 setup_hw_rings(dev, NV_SETUP_RX_RING | NV_SETUP_TX_RING);
Szymon Janc78aea4f2010-11-27 08:39:43 +00005179 writel(((np->rx_ring_size-1) << NVREG_RINGSZ_RXSHIFT) + ((np->tx_ring_size-1) << NVREG_RINGSZ_TXSHIFT),
Linus Torvalds1da177e2005-04-16 15:20:36 -07005180 base + NvRegRingSizes);
5181
Linus Torvalds1da177e2005-04-16 15:20:36 -07005182 writel(np->linkspeed, base + NvRegLinkSpeed);
Ayaz Abdulla95d161c2006-07-06 16:46:25 -04005183 if (np->desc_ver == DESC_VER_1)
5184 writel(NVREG_TX_WM_DESC1_DEFAULT, base + NvRegTxWatermark);
5185 else
5186 writel(NVREG_TX_WM_DESC2_3_DEFAULT, base + NvRegTxWatermark);
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005187 writel(np->txrxctl_bits, base + NvRegTxRxControl);
Ayaz Abdullaee407b02006-02-04 13:13:17 -05005188 writel(np->vlanctl_bits, base + NvRegVlanControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005189 pci_push(base);
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005190 writel(NVREG_TXRXCTL_BIT1|np->txrxctl_bits, base + NvRegTxRxControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005191 reg_delay(dev, NvRegUnknownSetupReg5, NVREG_UNKSETUP5_BIT31, NVREG_UNKSETUP5_BIT31,
5192 NV_SETUP5_DELAY, NV_SETUP5_DELAYMAX,
5193 KERN_INFO "open: SetupReg5, Bit 31 remained off\n");
5194
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005195 writel(0, base + NvRegMIIMask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005196 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
Ayaz Abdullaeb798422008-02-04 15:14:04 -05005197 writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005198
Linus Torvalds1da177e2005-04-16 15:20:36 -07005199 writel(NVREG_MISC1_FORCE | NVREG_MISC1_HD, base + NvRegMisc1);
5200 writel(readl(base + NvRegTransmitterStatus), base + NvRegTransmitterStatus);
5201 writel(NVREG_PFF_ALWAYS, base + NvRegPacketFilterFlags);
Manfred Sprauld81c0982005-07-31 18:20:30 +02005202 writel(np->rx_buf_sz, base + NvRegOffloadConfig);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005203
5204 writel(readl(base + NvRegReceiverStatus), base + NvRegReceiverStatus);
Ayaz Abdullaa4336862008-04-18 13:50:43 -07005205
5206 get_random_bytes(&low, sizeof(low));
5207 low &= NVREG_SLOTTIME_MASK;
5208 if (np->desc_ver == DESC_VER_1) {
5209 writel(low|NVREG_SLOTTIME_DEFAULT, base + NvRegSlotTime);
5210 } else {
5211 if (!(np->driver_data & DEV_HAS_GEAR_MODE)) {
5212 /* setup legacy backoff */
5213 writel(NVREG_SLOTTIME_LEGBF_ENABLED|NVREG_SLOTTIME_10_100_FULL|low, base + NvRegSlotTime);
5214 } else {
5215 writel(NVREG_SLOTTIME_10_100_FULL, base + NvRegSlotTime);
5216 nv_gear_backoff_reseed(dev);
5217 }
5218 }
Ayaz Abdulla9744e212006-07-06 16:45:58 -04005219 writel(NVREG_TX_DEFERRAL_DEFAULT, base + NvRegTxDeferral);
5220 writel(NVREG_RX_DEFERRAL_DEFAULT, base + NvRegRxDeferral);
Ayaz Abdullaa971c322005-11-11 08:30:38 -05005221 if (poll_interval == -1) {
5222 if (optimization_mode == NV_OPTIMIZATION_MODE_THROUGHPUT)
5223 writel(NVREG_POLL_DEFAULT_THROUGHPUT, base + NvRegPollingInterval);
5224 else
5225 writel(NVREG_POLL_DEFAULT_CPU, base + NvRegPollingInterval);
Szymon Janc78aea4f2010-11-27 08:39:43 +00005226 } else
Ayaz Abdullaa971c322005-11-11 08:30:38 -05005227 writel(poll_interval & 0xFFFF, base + NvRegPollingInterval);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005228 writel(NVREG_UNKSETUP6_VAL, base + NvRegUnknownSetupReg6);
5229 writel((np->phyaddr << NVREG_ADAPTCTL_PHYSHIFT)|NVREG_ADAPTCTL_PHYVALID|NVREG_ADAPTCTL_RUNNING,
5230 base + NvRegAdapterControl);
5231 writel(NVREG_MIISPEED_BIT8|NVREG_MIIDELAY, base + NvRegMIISpeed);
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005232 writel(NVREG_MII_LINKCHANGE, base + NvRegMIIMask);
Ayaz Abdullac42d9df2006-06-10 22:47:52 -04005233 if (np->wolenabled)
5234 writel(NVREG_WAKEUPFLAGS_ENABLE , base + NvRegWakeUpFlags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005235
5236 i = readl(base + NvRegPowerState);
Szymon Janc78aea4f2010-11-27 08:39:43 +00005237 if ((i & NVREG_POWERSTATE_POWEREDUP) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005238 writel(NVREG_POWERSTATE_POWEREDUP|i, base + NvRegPowerState);
5239
5240 pci_push(base);
5241 udelay(10);
5242 writel(readl(base + NvRegPowerState) | NVREG_POWERSTATE_VALID, base + NvRegPowerState);
5243
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005244 nv_disable_hw_interrupts(dev, np->irqmask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005245 pci_push(base);
Ayaz Abdullaeb798422008-02-04 15:14:04 -05005246 writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005247 writel(NVREG_IRQSTAT_MASK, base + NvRegIrqStatus);
5248 pci_push(base);
5249
Szymon Janc78aea4f2010-11-27 08:39:43 +00005250 if (nv_request_irq(dev, 0))
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005251 goto out_drain;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005252
5253 /* ask for interrupts */
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005254 nv_enable_hw_interrupts(dev, np->irqmask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005255
5256 spin_lock_irq(&np->lock);
5257 writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA);
5258 writel(0, base + NvRegMulticastAddrB);
Ayaz Abdullabb9a4fd2008-01-13 16:03:04 -05005259 writel(NVREG_MCASTMASKA_NONE, base + NvRegMulticastMaskA);
5260 writel(NVREG_MCASTMASKB_NONE, base + NvRegMulticastMaskB);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005261 writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
5262 /* One manual link speed update: Interrupts are enabled, future link
5263 * speed changes cause interrupts and are handled by nv_link_irq().
5264 */
5265 {
5266 u32 miistat;
5267 miistat = readl(base + NvRegMIIStatus);
Ayaz Abdullaeb798422008-02-04 15:14:04 -05005268 writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005269 dprintk(KERN_INFO "startup: got 0x%08x.\n", miistat);
5270 }
Manfred Spraul1b1b3c92005-08-06 23:47:55 +02005271 /* set linkspeed to invalid value, thus force nv_update_linkspeed
5272 * to init hw */
5273 np->linkspeed = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005274 ret = nv_update_linkspeed(dev);
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005275 nv_start_rxtx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005276 netif_start_queue(dev);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00005277 nv_napi_enable(dev);
Stephen Hemmingere27cdba2006-07-31 20:37:19 -07005278
Linus Torvalds1da177e2005-04-16 15:20:36 -07005279 if (ret) {
5280 netif_carrier_on(dev);
5281 } else {
Ed Swierkf7ab6972007-09-28 22:42:13 -07005282 printk(KERN_INFO "%s: no link during initialization.\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005283 netif_carrier_off(dev);
5284 }
5285 if (oom)
5286 mod_timer(&np->oom_kick, jiffies + OOM_REFILL);
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005287
5288 /* start statistics timer */
Ayaz Abdulla9c662432008-08-06 12:11:42 -04005289 if (np->driver_data & (DEV_HAS_STATISTICS_V1|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3))
Daniel Drakebfebbb82008-03-18 11:07:18 +00005290 mod_timer(&np->stats_poll,
5291 round_jiffies(jiffies + STATS_INTERVAL));
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005292
Linus Torvalds1da177e2005-04-16 15:20:36 -07005293 spin_unlock_irq(&np->lock);
5294
5295 return 0;
5296out_drain:
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005297 nv_drain_rxtx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005298 return ret;
5299}
5300
5301static int nv_close(struct net_device *dev)
5302{
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04005303 struct fe_priv *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005304 u8 __iomem *base;
5305
5306 spin_lock_irq(&np->lock);
5307 np->in_shutdown = 1;
5308 spin_unlock_irq(&np->lock);
Ayaz Abdulla08d93572009-03-05 08:01:55 +00005309 nv_napi_disable(dev);
Manfred Spraula7475902007-10-17 21:52:33 +02005310 synchronize_irq(np->pci_dev->irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005311
5312 del_timer_sync(&np->oom_kick);
5313 del_timer_sync(&np->nic_poll);
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005314 del_timer_sync(&np->stats_poll);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005315
5316 netif_stop_queue(dev);
5317 spin_lock_irq(&np->lock);
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005318 nv_stop_rxtx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005319 nv_txrx_reset(dev);
5320
5321 /* disable interrupts on the nic or we will lock up */
5322 base = get_hwbase(dev);
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005323 nv_disable_hw_interrupts(dev, np->irqmask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005324 pci_push(base);
5325 dprintk(KERN_INFO "%s: Irqmask is zero again\n", dev->name);
5326
5327 spin_unlock_irq(&np->lock);
5328
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005329 nv_free_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005330
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005331 nv_drain_rxtx(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005332
Ed Swierk5a9a8e32009-06-02 00:19:52 -07005333 if (np->wolenabled || !phy_power_down) {
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00005334 nv_txrx_gate(dev, false);
Tim Mann2cc49a52007-06-14 13:16:38 -07005335 writel(NVREG_PFF_ALWAYS|NVREG_PFF_MYADDR, base + NvRegPacketFilterFlags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005336 nv_start_rx(dev);
Ed Swierkcb52deb2008-12-01 12:24:43 +00005337 } else {
5338 /* power down phy */
5339 mii_rw(dev, np->phyaddr, MII_BMCR,
5340 mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ)|BMCR_PDOWN);
Ayaz Abdulla88d7d8b2009-05-01 01:41:50 +00005341 nv_txrx_gate(dev, true);
Tim Mann2cc49a52007-06-14 13:16:38 -07005342 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005343
5344 /* FIXME: power down nic */
5345
5346 return 0;
5347}
5348
Stephen Hemmingerb94426b2008-11-19 22:26:51 -08005349static const struct net_device_ops nv_netdev_ops = {
5350 .ndo_open = nv_open,
5351 .ndo_stop = nv_close,
5352 .ndo_get_stats = nv_get_stats,
Stephen Hemminger00829822008-11-20 20:14:53 -08005353 .ndo_start_xmit = nv_start_xmit,
5354 .ndo_tx_timeout = nv_tx_timeout,
5355 .ndo_change_mtu = nv_change_mtu,
5356 .ndo_validate_addr = eth_validate_addr,
5357 .ndo_set_mac_address = nv_set_mac_address,
5358 .ndo_set_multicast_list = nv_set_multicast,
5359 .ndo_vlan_rx_register = nv_vlan_rx_register,
5360#ifdef CONFIG_NET_POLL_CONTROLLER
5361 .ndo_poll_controller = nv_poll_controller,
5362#endif
5363};
5364
5365static const struct net_device_ops nv_netdev_ops_optimized = {
5366 .ndo_open = nv_open,
5367 .ndo_stop = nv_close,
5368 .ndo_get_stats = nv_get_stats,
5369 .ndo_start_xmit = nv_start_xmit_optimized,
Stephen Hemmingerb94426b2008-11-19 22:26:51 -08005370 .ndo_tx_timeout = nv_tx_timeout,
5371 .ndo_change_mtu = nv_change_mtu,
5372 .ndo_validate_addr = eth_validate_addr,
5373 .ndo_set_mac_address = nv_set_mac_address,
5374 .ndo_set_multicast_list = nv_set_multicast,
5375 .ndo_vlan_rx_register = nv_vlan_rx_register,
5376#ifdef CONFIG_NET_POLL_CONTROLLER
5377 .ndo_poll_controller = nv_poll_controller,
5378#endif
5379};
5380
Linus Torvalds1da177e2005-04-16 15:20:36 -07005381static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
5382{
5383 struct net_device *dev;
5384 struct fe_priv *np;
5385 unsigned long addr;
5386 u8 __iomem *base;
5387 int err, i;
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005388 u32 powerstate, txreg;
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005389 u32 phystate_orig = 0, phystate;
5390 int phyinitialized = 0;
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005391 static int printed_version;
5392
5393 if (!printed_version++)
5394 printk(KERN_INFO "%s: Reverse Engineered nForce ethernet"
5395 " driver. Version %s.\n", DRV_NAME, FORCEDETH_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005396
5397 dev = alloc_etherdev(sizeof(struct fe_priv));
5398 err = -ENOMEM;
5399 if (!dev)
5400 goto out;
5401
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04005402 np = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07005403 np->dev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005404 np->pci_dev = pci_dev;
5405 spin_lock_init(&np->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005406 SET_NETDEV_DEV(dev, &pci_dev->dev);
5407
5408 init_timer(&np->oom_kick);
5409 np->oom_kick.data = (unsigned long) dev;
Joe Perchesc061b182010-08-23 18:20:03 +00005410 np->oom_kick.function = nv_do_rx_refill; /* timer handler */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005411 init_timer(&np->nic_poll);
5412 np->nic_poll.data = (unsigned long) dev;
Joe Perchesc061b182010-08-23 18:20:03 +00005413 np->nic_poll.function = nv_do_nic_poll; /* timer handler */
Ayaz Abdulla52da3572006-06-10 22:48:04 -04005414 init_timer(&np->stats_poll);
5415 np->stats_poll.data = (unsigned long) dev;
Joe Perchesc061b182010-08-23 18:20:03 +00005416 np->stats_poll.function = nv_do_stats_poll; /* timer handler */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005417
5418 err = pci_enable_device(pci_dev);
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005419 if (err)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005420 goto out_free;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005421
5422 pci_set_master(pci_dev);
5423
5424 err = pci_request_regions(pci_dev, DRV_NAME);
5425 if (err < 0)
5426 goto out_disable;
5427
Ayaz Abdulla9c662432008-08-06 12:11:42 -04005428 if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V2|DEV_HAS_STATISTICS_V3))
Ayaz Abdulla57fff692007-01-23 12:27:00 -05005429 np->register_size = NV_PCI_REGSZ_VER3;
5430 else if (id->driver_data & DEV_HAS_STATISTICS_V1)
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005431 np->register_size = NV_PCI_REGSZ_VER2;
5432 else
5433 np->register_size = NV_PCI_REGSZ_VER1;
5434
Linus Torvalds1da177e2005-04-16 15:20:36 -07005435 err = -EINVAL;
5436 addr = 0;
5437 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
5438 dprintk(KERN_DEBUG "%s: resource %d start %p len %ld flags 0x%08lx.\n",
Szymon Janc78aea4f2010-11-27 08:39:43 +00005439 pci_name(pci_dev), i, (void *)pci_resource_start(pci_dev, i),
Linus Torvalds1da177e2005-04-16 15:20:36 -07005440 pci_resource_len(pci_dev, i),
5441 pci_resource_flags(pci_dev, i));
5442 if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM &&
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005443 pci_resource_len(pci_dev, i) >= np->register_size) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005444 addr = pci_resource_start(pci_dev, i);
5445 break;
5446 }
5447 }
5448 if (i == DEVICE_COUNT_RESOURCE) {
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005449 dev_printk(KERN_INFO, &pci_dev->dev,
5450 "Couldn't find register window\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -07005451 goto out_relreg;
5452 }
5453
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005454 /* copy of driver data */
5455 np->driver_data = id->driver_data;
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04005456 /* copy of device id */
5457 np->device_id = id->device;
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005458
Linus Torvalds1da177e2005-04-16 15:20:36 -07005459 /* handle different descriptor versions */
Manfred Spraulee733622005-07-31 18:32:26 +02005460 if (id->driver_data & DEV_HAS_HIGH_DMA) {
5461 /* packet format 3: supports 40-bit addressing */
5462 np->desc_ver = DESC_VER_3;
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005463 np->txrxctl_bits = NVREG_TXRXCTL_DESC_3;
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -04005464 if (dma_64bit) {
Yang Hongyang6afd1422009-04-06 19:01:15 -07005465 if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(39)))
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005466 dev_printk(KERN_INFO, &pci_dev->dev,
5467 "64-bit DMA failed, using 32-bit addressing\n");
5468 else
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -04005469 dev->features |= NETIF_F_HIGHDMA;
Yang Hongyang6afd1422009-04-06 19:01:15 -07005470 if (pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(39))) {
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005471 dev_printk(KERN_INFO, &pci_dev->dev,
5472 "64-bit DMA (consistent) failed, using 32-bit ring buffers\n");
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -04005473 }
Ayaz Abdulla84b39322006-05-20 14:59:48 -07005474 }
Manfred Spraulee733622005-07-31 18:32:26 +02005475 } else if (id->driver_data & DEV_HAS_LARGEDESC) {
5476 /* packet format 2: supports jumbo frames */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005477 np->desc_ver = DESC_VER_2;
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005478 np->txrxctl_bits = NVREG_TXRXCTL_DESC_2;
Manfred Spraulee733622005-07-31 18:32:26 +02005479 } else {
5480 /* original packet format */
5481 np->desc_ver = DESC_VER_1;
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005482 np->txrxctl_bits = NVREG_TXRXCTL_DESC_1;
Manfred Sprauld81c0982005-07-31 18:20:30 +02005483 }
Manfred Spraulee733622005-07-31 18:32:26 +02005484
5485 np->pkt_limit = NV_PKTLIMIT_1;
5486 if (id->driver_data & DEV_HAS_LARGEDESC)
5487 np->pkt_limit = NV_PKTLIMIT_2;
5488
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005489 if (id->driver_data & DEV_HAS_CHECKSUM) {
Ayaz Abdullaf2ad2d92006-08-24 17:35:41 -04005490 np->rx_csum = 1;
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005491 np->txrxctl_bits |= NVREG_TXRXCTL_RXCHECK;
Ayaz Abdullaedcfe5f2008-08-20 16:34:37 -07005492 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
Ayaz Abdullafa454592006-01-05 22:45:45 -08005493 dev->features |= NETIF_F_TSO;
Tom Herbert53f224c2010-05-03 19:08:45 +00005494 dev->features |= NETIF_F_GRO;
Ayaz Abdulla21828162007-01-23 12:27:21 -05005495 }
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005496
Ayaz Abdullaee407b02006-02-04 13:13:17 -05005497 np->vlanctl_bits = 0;
5498 if (id->driver_data & DEV_HAS_VLAN) {
5499 np->vlanctl_bits = NVREG_VLANCONTROL_ENABLE;
5500 dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX;
Ayaz Abdullaee407b02006-02-04 13:13:17 -05005501 }
5502
Ayaz Abdullab6d07732006-06-10 22:47:42 -04005503 np->pause_flags = NV_PAUSEFRAME_RX_CAPABLE | NV_PAUSEFRAME_RX_REQ | NV_PAUSEFRAME_AUTONEG;
Ayaz Abdulla5289b4c2008-02-05 12:30:01 -05005504 if ((id->driver_data & DEV_HAS_PAUSEFRAME_TX_V1) ||
5505 (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V2) ||
5506 (id->driver_data & DEV_HAS_PAUSEFRAME_TX_V3)) {
Ayaz Abdullab6d07732006-06-10 22:47:42 -04005507 np->pause_flags |= NV_PAUSEFRAME_TX_CAPABLE | NV_PAUSEFRAME_TX_REQ;
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04005508 }
Jeff Garzikf3b197a2006-05-26 21:39:03 -04005509
Ayaz Abdullaeb91f612006-05-24 18:13:19 -04005510
Linus Torvalds1da177e2005-04-16 15:20:36 -07005511 err = -ENOMEM;
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005512 np->base = ioremap(addr, np->register_size);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005513 if (!np->base)
5514 goto out_relreg;
5515 dev->base_addr = (unsigned long)np->base;
Manfred Spraulee733622005-07-31 18:32:26 +02005516
Linus Torvalds1da177e2005-04-16 15:20:36 -07005517 dev->irq = pci_dev->irq;
Manfred Spraulee733622005-07-31 18:32:26 +02005518
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005519 np->rx_ring_size = RX_RING_DEFAULT;
5520 np->tx_ring_size = TX_RING_DEFAULT;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005521
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005522 if (!nv_optimized(np)) {
Manfred Spraulee733622005-07-31 18:32:26 +02005523 np->rx_ring.orig = pci_alloc_consistent(pci_dev,
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005524 sizeof(struct ring_desc) * (np->rx_ring_size + np->tx_ring_size),
Manfred Spraulee733622005-07-31 18:32:26 +02005525 &np->ring_addr);
5526 if (!np->rx_ring.orig)
5527 goto out_unmap;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005528 np->tx_ring.orig = &np->rx_ring.orig[np->rx_ring_size];
Manfred Spraulee733622005-07-31 18:32:26 +02005529 } else {
5530 np->rx_ring.ex = pci_alloc_consistent(pci_dev,
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005531 sizeof(struct ring_desc_ex) * (np->rx_ring_size + np->tx_ring_size),
Manfred Spraulee733622005-07-31 18:32:26 +02005532 &np->ring_addr);
5533 if (!np->rx_ring.ex)
5534 goto out_unmap;
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005535 np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
Manfred Spraulee733622005-07-31 18:32:26 +02005536 }
Yoann Padioleaudd00cc42007-07-19 01:49:03 -07005537 np->rx_skb = kcalloc(np->rx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL);
5538 np->tx_skb = kcalloc(np->tx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL);
Ayaz Abdulla761fcd92007-01-09 13:30:07 -05005539 if (!np->rx_skb || !np->tx_skb)
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005540 goto out_freering;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005541
Jeff Garzik36b30ea2007-10-16 01:40:30 -04005542 if (!nv_optimized(np))
Stephen Hemminger00829822008-11-20 20:14:53 -08005543 dev->netdev_ops = &nv_netdev_ops;
Ayaz Abdulla86b22b02007-01-21 18:10:37 -05005544 else
Stephen Hemminger00829822008-11-20 20:14:53 -08005545 dev->netdev_ops = &nv_netdev_ops_optimized;
Stephen Hemmingerb94426b2008-11-19 22:26:51 -08005546
Stephen Hemmingerbea33482007-10-03 16:41:36 -07005547 netif_napi_add(dev, &np->napi, nv_napi_poll, RX_WORK_PER_LOOP);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005548 SET_ETHTOOL_OPS(dev, &ops);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005549 dev->watchdog_timeo = NV_WATCHDOG_TIMEO;
5550
5551 pci_set_drvdata(pci_dev, dev);
5552
5553 /* read the mac address */
5554 base = get_hwbase(dev);
5555 np->orig_mac[0] = readl(base + NvRegMacAddrA);
5556 np->orig_mac[1] = readl(base + NvRegMacAddrB);
5557
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005558 /* check the workaround bit for correct mac address order */
5559 txreg = readl(base + NvRegTransmitPoll);
Ayaz Abdullaa376e792008-04-10 21:30:35 -07005560 if (id->driver_data & DEV_HAS_CORRECT_MACADDR) {
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005561 /* mac address is already in correct order */
5562 dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff;
5563 dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff;
5564 dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff;
5565 dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff;
5566 dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff;
5567 dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff;
Ayaz Abdullaa376e792008-04-10 21:30:35 -07005568 } else if (txreg & NVREG_TRANSMITPOLL_MAC_ADDR_REV) {
5569 /* mac address is already in correct order */
5570 dev->dev_addr[0] = (np->orig_mac[0] >> 0) & 0xff;
5571 dev->dev_addr[1] = (np->orig_mac[0] >> 8) & 0xff;
5572 dev->dev_addr[2] = (np->orig_mac[0] >> 16) & 0xff;
5573 dev->dev_addr[3] = (np->orig_mac[0] >> 24) & 0xff;
5574 dev->dev_addr[4] = (np->orig_mac[1] >> 0) & 0xff;
5575 dev->dev_addr[5] = (np->orig_mac[1] >> 8) & 0xff;
5576 /*
5577 * Set orig mac address back to the reversed version.
5578 * This flag will be cleared during low power transition.
5579 * Therefore, we should always put back the reversed address.
5580 */
5581 np->orig_mac[0] = (dev->dev_addr[5] << 0) + (dev->dev_addr[4] << 8) +
5582 (dev->dev_addr[3] << 16) + (dev->dev_addr[2] << 24);
5583 np->orig_mac[1] = (dev->dev_addr[1] << 0) + (dev->dev_addr[0] << 8);
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005584 } else {
5585 /* need to reverse mac address to correct order */
5586 dev->dev_addr[0] = (np->orig_mac[1] >> 8) & 0xff;
5587 dev->dev_addr[1] = (np->orig_mac[1] >> 0) & 0xff;
5588 dev->dev_addr[2] = (np->orig_mac[0] >> 24) & 0xff;
5589 dev->dev_addr[3] = (np->orig_mac[0] >> 16) & 0xff;
5590 dev->dev_addr[4] = (np->orig_mac[0] >> 8) & 0xff;
5591 dev->dev_addr[5] = (np->orig_mac[0] >> 0) & 0xff;
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005592 writel(txreg|NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
Yinghai Luf55c21f2008-09-13 13:10:31 -07005593 printk(KERN_DEBUG "nv_probe: set workaround bit for reversed mac addr\n");
Ayaz Abdulla5070d342006-07-31 12:05:01 -04005594 }
John W. Linvillec704b852005-09-12 10:48:56 -04005595 memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005596
John W. Linvillec704b852005-09-12 10:48:56 -04005597 if (!is_valid_ether_addr(dev->perm_addr)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005598 /*
5599 * Bad mac address. At least one bios sets the mac address
5600 * to 01:23:45:67:89:ab
5601 */
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005602 dev_printk(KERN_ERR, &pci_dev->dev,
Johannes Berge1749612008-10-27 15:59:26 -07005603 "Invalid Mac address detected: %pM\n",
Szymon Janc78aea4f2010-11-27 08:39:43 +00005604 dev->dev_addr);
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005605 dev_printk(KERN_ERR, &pci_dev->dev,
5606 "Please complain to your hardware vendor. Switching to a random MAC.\n");
Stanislav O. Bezzubtsev655a6592009-11-15 21:17:02 -08005607 random_ether_addr(dev->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005608 }
5609
Johannes Berge1749612008-10-27 15:59:26 -07005610 dprintk(KERN_DEBUG "%s: MAC Address %pM\n",
5611 pci_name(pci_dev), dev->dev_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005612
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005613 /* set mac address */
5614 nv_copy_mac_to_hw(dev);
5615
Tobias Diedrich9a60a822008-06-01 00:54:42 +02005616 /* Workaround current PCI init glitch: wakeup bits aren't
5617 * being set from PCI PM capability.
5618 */
5619 device_init_wakeup(&pci_dev->dev, 1);
5620
Linus Torvalds1da177e2005-04-16 15:20:36 -07005621 /* disable WOL */
5622 writel(0, base + NvRegWakeUpFlags);
5623 np->wolenabled = 0;
5624
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005625 if (id->driver_data & DEV_HAS_POWER_CNTRL) {
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005626
5627 /* take phy and nic out of low power mode */
5628 powerstate = readl(base + NvRegPowerState2);
5629 powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK;
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005630 if ((id->driver_data & DEV_NEED_LOW_POWER_FIX) &&
Auke Kok44c10132007-06-08 15:46:36 -07005631 pci_dev->revision >= 0xA3)
Ayaz Abdulla86a0f042006-04-24 18:41:31 -04005632 powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3;
5633 writel(powerstate, base + NvRegPowerState2);
5634 }
5635
Szymon Janc78aea4f2010-11-27 08:39:43 +00005636 if (np->desc_ver == DESC_VER_1)
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04005637 np->tx_flags = NV_TX_VALID;
Szymon Janc78aea4f2010-11-27 08:39:43 +00005638 else
Ayaz Abdullaac9c1892005-10-26 00:51:24 -04005639 np->tx_flags = NV_TX2_VALID;
Ayaz Abdulla9e184762009-03-05 08:02:18 +00005640
5641 np->msi_flags = 0;
Szymon Janc78aea4f2010-11-27 08:39:43 +00005642 if ((id->driver_data & DEV_HAS_MSI) && msi)
Ayaz Abdulla9e184762009-03-05 08:02:18 +00005643 np->msi_flags |= NV_MSI_CAPABLE;
Szymon Janc78aea4f2010-11-27 08:39:43 +00005644
Ayaz Abdulla9e184762009-03-05 08:02:18 +00005645 if ((id->driver_data & DEV_HAS_MSI_X) && msix) {
5646 /* msix has had reported issues when modifying irqmask
5647 as in the case of napi, therefore, disable for now
5648 */
David S. Miller0a127612010-05-03 23:33:05 -07005649#if 0
Ayaz Abdulla9e184762009-03-05 08:02:18 +00005650 np->msi_flags |= NV_MSI_X_CAPABLE;
5651#endif
5652 }
5653
5654 if (optimization_mode == NV_OPTIMIZATION_MODE_CPU) {
Ayaz Abdullaa971c322005-11-11 08:30:38 -05005655 np->irqmask = NVREG_IRQMASK_CPU;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05005656 if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
5657 np->msi_flags |= 0x0001;
Ayaz Abdulla9e184762009-03-05 08:02:18 +00005658 } else if (optimization_mode == NV_OPTIMIZATION_MODE_DYNAMIC &&
5659 !(id->driver_data & DEV_NEED_TIMERIRQ)) {
5660 /* start off in throughput mode */
5661 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
5662 /* remove support for msix mode */
5663 np->msi_flags &= ~NV_MSI_X_CAPABLE;
5664 } else {
5665 optimization_mode = NV_OPTIMIZATION_MODE_THROUGHPUT;
5666 np->irqmask = NVREG_IRQMASK_THROUGHPUT;
5667 if (np->msi_flags & NV_MSI_X_CAPABLE) /* set number of vectors */
5668 np->msi_flags |= 0x0003;
Ayaz Abdullad33a73c82006-02-04 13:13:31 -05005669 }
Ayaz Abdullaa971c322005-11-11 08:30:38 -05005670
Linus Torvalds1da177e2005-04-16 15:20:36 -07005671 if (id->driver_data & DEV_NEED_TIMERIRQ)
5672 np->irqmask |= NVREG_IRQ_TIMER;
5673 if (id->driver_data & DEV_NEED_LINKTIMER) {
5674 dprintk(KERN_INFO "%s: link timer on.\n", pci_name(pci_dev));
5675 np->need_linktimer = 1;
5676 np->link_timeout = jiffies + LINK_TIMEOUT;
5677 } else {
5678 dprintk(KERN_INFO "%s: link timer off.\n", pci_name(pci_dev));
5679 np->need_linktimer = 0;
5680 }
5681
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05005682 /* Limit the number of tx's outstanding for hw bug */
5683 if (id->driver_data & DEV_NEED_TX_LIMIT) {
5684 np->tx_limit = 1;
Ayaz Abdulla5c659322010-04-13 18:49:51 -07005685 if (((id->driver_data & DEV_NEED_TX_LIMIT2) == DEV_NEED_TX_LIMIT2) &&
Ayaz Abdulla3b446c32008-03-10 14:58:21 -05005686 pci_dev->revision >= 0xA2)
5687 np->tx_limit = 0;
5688 }
5689
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005690 /* clear phy state and temporarily halt phy interrupts */
5691 writel(0, base + NvRegMIIMask);
5692 phystate = readl(base + NvRegAdapterControl);
5693 if (phystate & NVREG_ADAPTCTL_RUNNING) {
5694 phystate_orig = 1;
5695 phystate &= ~NVREG_ADAPTCTL_RUNNING;
5696 writel(phystate, base + NvRegAdapterControl);
5697 }
Ayaz Abdullaeb798422008-02-04 15:14:04 -05005698 writel(NVREG_MIISTAT_MASK_ALL, base + NvRegMIIStatus);
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005699
5700 if (id->driver_data & DEV_HAS_MGMT_UNIT) {
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005701 /* management unit running on the mac? */
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005702 if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST) &&
5703 (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) &&
5704 nv_mgmt_acquire_sema(dev) &&
5705 nv_mgmt_get_version(dev)) {
5706 np->mac_in_use = 1;
Szymon Janc78aea4f2010-11-27 08:39:43 +00005707 if (np->mgmt_version > 0)
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005708 np->mac_in_use = readl(base + NvRegMgmtUnitControl) & NVREG_MGMTUNITCONTROL_INUSE;
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005709 dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n",
5710 pci_name(pci_dev), np->mac_in_use);
5711 /* management unit setup the phy already? */
5712 if (np->mac_in_use &&
5713 ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==
5714 NVREG_XMITCTL_SYNC_PHY_INIT)) {
5715 /* phy is inited by mgmt unit */
5716 phyinitialized = 1;
5717 dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n",
5718 pci_name(pci_dev));
5719 } else {
5720 /* we need to init the phy */
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005721 }
5722 }
5723 }
5724
Linus Torvalds1da177e2005-04-16 15:20:36 -07005725 /* find a suitable phy */
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005726 for (i = 1; i <= 32; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005727 int id1, id2;
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005728 int phyaddr = i & 0x1F;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005729
5730 spin_lock_irq(&np->lock);
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005731 id1 = mii_rw(dev, phyaddr, MII_PHYSID1, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005732 spin_unlock_irq(&np->lock);
5733 if (id1 < 0 || id1 == 0xffff)
5734 continue;
5735 spin_lock_irq(&np->lock);
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005736 id2 = mii_rw(dev, phyaddr, MII_PHYSID2, MII_READ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005737 spin_unlock_irq(&np->lock);
5738 if (id2 < 0 || id2 == 0xffff)
5739 continue;
5740
Ayaz Abdullaedf7e5e2006-08-24 15:43:42 -04005741 np->phy_model = id2 & PHYID2_MODEL_MASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005742 id1 = (id1 & PHYID1_OUI_MASK) << PHYID1_OUI_SHFT;
5743 id2 = (id2 & PHYID2_OUI_MASK) >> PHYID2_OUI_SHFT;
5744 dprintk(KERN_DEBUG "%s: open: Found PHY %04x:%04x at address %d.\n",
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005745 pci_name(pci_dev), id1, id2, phyaddr);
5746 np->phyaddr = phyaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005747 np->phy_oui = id1 | id2;
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04005748
5749 /* Realtek hardcoded phy id1 to all zero's on certain phys */
5750 if (np->phy_oui == PHY_OUI_REALTEK2)
5751 np->phy_oui = PHY_OUI_REALTEK;
5752 /* Setup phy revision for Realtek */
5753 if (np->phy_oui == PHY_OUI_REALTEK && np->phy_model == PHY_MODEL_REALTEK_8211)
5754 np->phy_rev = mii_rw(dev, phyaddr, MII_RESV1, MII_READ) & PHY_REV_MASK;
5755
Linus Torvalds1da177e2005-04-16 15:20:36 -07005756 break;
5757 }
Ayaz Abdulla7a33e452005-11-11 08:31:11 -05005758 if (i == 33) {
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005759 dev_printk(KERN_INFO, &pci_dev->dev,
5760 "open: Could not find a valid PHY.\n");
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005761 goto out_error;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005762 }
Jeff Garzikf3b197a2006-05-26 21:39:03 -04005763
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005764 if (!phyinitialized) {
5765 /* reset it */
5766 phy_init(dev);
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05005767 } else {
5768 /* see if it is a gigabit phy */
5769 u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
Szymon Janc78aea4f2010-11-27 08:39:43 +00005770 if (mii_status & PHY_GIGABIT)
Ayaz Abdullaf35723e2003-02-20 03:03:54 -05005771 np->gigabit = PHY_GIGABIT;
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005772 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005773
5774 /* set default link speed settings */
5775 np->linkspeed = NVREG_LINKSPEED_FORCE|NVREG_LINKSPEED_10;
5776 np->duplex = 0;
5777 np->autoneg = 1;
5778
5779 err = register_netdev(dev);
5780 if (err) {
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005781 dev_printk(KERN_INFO, &pci_dev->dev,
5782 "unable to register netdev: %d\n", err);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005783 goto out_error;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005784 }
Jeff Garzik3f88ce42007-10-16 04:09:09 -04005785
5786 dev_printk(KERN_INFO, &pci_dev->dev, "ifname %s, PHY OUI 0x%x @ %d, "
5787 "addr %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
5788 dev->name,
5789 np->phy_oui,
5790 np->phyaddr,
5791 dev->dev_addr[0],
5792 dev->dev_addr[1],
5793 dev->dev_addr[2],
5794 dev->dev_addr[3],
5795 dev->dev_addr[4],
5796 dev->dev_addr[5]);
5797
5798 dev_printk(KERN_INFO, &pci_dev->dev, "%s%s%s%s%s%s%s%s%s%sdesc-v%u\n",
Szymon Janc78aea4f2010-11-27 08:39:43 +00005799 dev->features & NETIF_F_HIGHDMA ? "highdma " : "",
5800 dev->features & (NETIF_F_IP_CSUM | NETIF_F_SG) ?
5801 "csum " : "",
5802 dev->features & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX) ?
5803 "vlan " : "",
5804 id->driver_data & DEV_HAS_POWER_CNTRL ? "pwrctl " : "",
5805 id->driver_data & DEV_HAS_MGMT_UNIT ? "mgmt " : "",
5806 id->driver_data & DEV_NEED_TIMERIRQ ? "timirq " : "",
5807 np->gigabit == PHY_GIGABIT ? "gbit " : "",
5808 np->need_linktimer ? "lnktim " : "",
5809 np->msi_flags & NV_MSI_CAPABLE ? "msi " : "",
5810 np->msi_flags & NV_MSI_X_CAPABLE ? "msi-x " : "",
5811 np->desc_ver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005812
5813 return 0;
5814
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005815out_error:
Ayaz Abdulla7e680c22006-10-30 17:31:51 -05005816 if (phystate_orig)
5817 writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005818 pci_set_drvdata(pci_dev, NULL);
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005819out_freering:
5820 free_rings(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005821out_unmap:
5822 iounmap(get_hwbase(dev));
5823out_relreg:
5824 pci_release_regions(pci_dev);
5825out_disable:
5826 pci_disable_device(pci_dev);
5827out_free:
5828 free_netdev(dev);
5829out:
5830 return err;
5831}
5832
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04005833static void nv_restore_phy(struct net_device *dev)
5834{
5835 struct fe_priv *np = netdev_priv(dev);
5836 u16 phy_reserved, mii_control;
5837
5838 if (np->phy_oui == PHY_OUI_REALTEK &&
5839 np->phy_model == PHY_MODEL_REALTEK_8201 &&
5840 phy_cross == NV_CROSSOVER_DETECTION_DISABLED) {
5841 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT3);
5842 phy_reserved = mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, MII_READ);
5843 phy_reserved &= ~PHY_REALTEK_INIT_MSK1;
5844 phy_reserved |= PHY_REALTEK_INIT8;
5845 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG2, phy_reserved);
5846 mii_rw(dev, np->phyaddr, PHY_REALTEK_INIT_REG1, PHY_REALTEK_INIT1);
5847
5848 /* restart auto negotiation */
5849 mii_control = mii_rw(dev, np->phyaddr, MII_BMCR, MII_READ);
5850 mii_control |= (BMCR_ANRESTART | BMCR_ANENABLE);
5851 mii_rw(dev, np->phyaddr, MII_BMCR, mii_control);
5852 }
5853}
5854
Yinghai Luf55c21f2008-09-13 13:10:31 -07005855static void nv_restore_mac_addr(struct pci_dev *pci_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005856{
5857 struct net_device *dev = pci_get_drvdata(pci_dev);
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005858 struct fe_priv *np = netdev_priv(dev);
5859 u8 __iomem *base = get_hwbase(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005860
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005861 /* special op: write back the misordered MAC address - otherwise
5862 * the next nv_probe would see a wrong address.
5863 */
5864 writel(np->orig_mac[0], base + NvRegMacAddrA);
5865 writel(np->orig_mac[1], base + NvRegMacAddrB);
Björn Steinbrink2e3884b2008-01-07 23:22:53 -08005866 writel(readl(base + NvRegTransmitPoll) & ~NVREG_TRANSMITPOLL_MAC_ADDR_REV,
5867 base + NvRegTransmitPoll);
Yinghai Luf55c21f2008-09-13 13:10:31 -07005868}
5869
5870static void __devexit nv_remove(struct pci_dev *pci_dev)
5871{
5872 struct net_device *dev = pci_get_drvdata(pci_dev);
5873
5874 unregister_netdev(dev);
5875
5876 nv_restore_mac_addr(pci_dev);
Ayaz Abdullaf1489652006-07-31 12:04:45 -04005877
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04005878 /* restore any phy related changes */
5879 nv_restore_phy(dev);
5880
Ayaz Abdullacac1c522009-02-07 00:23:57 -08005881 nv_mgmt_release_sema(dev);
5882
Linus Torvalds1da177e2005-04-16 15:20:36 -07005883 /* free all structures */
Ayaz Abdullaeafa59f2006-06-10 22:47:34 -04005884 free_rings(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005885 iounmap(get_hwbase(dev));
5886 pci_release_regions(pci_dev);
5887 pci_disable_device(pci_dev);
5888 free_netdev(dev);
5889 pci_set_drvdata(pci_dev, NULL);
5890}
5891
Francois Romieua1893172006-10-10 14:33:27 -07005892#ifdef CONFIG_PM
5893static int nv_suspend(struct pci_dev *pdev, pm_message_t state)
5894{
5895 struct net_device *dev = pci_get_drvdata(pdev);
5896 struct fe_priv *np = netdev_priv(dev);
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005897 u8 __iomem *base = get_hwbase(dev);
5898 int i;
Francois Romieua1893172006-10-10 14:33:27 -07005899
Tobias Diedrich25d90812008-05-18 15:04:29 +02005900 if (netif_running(dev)) {
Szymon Janc78aea4f2010-11-27 08:39:43 +00005901 /* Gross. */
Tobias Diedrich25d90812008-05-18 15:04:29 +02005902 nv_close(dev);
5903 }
Francois Romieua1893172006-10-10 14:33:27 -07005904 netif_device_detach(dev);
5905
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005906 /* save non-pci configuration space */
Szymon Janc78aea4f2010-11-27 08:39:43 +00005907 for (i = 0; i <= np->register_size/sizeof(u32); i++)
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005908 np->saved_config_space[i] = readl(base + i*sizeof(u32));
5909
Francois Romieua1893172006-10-10 14:33:27 -07005910 pci_save_state(pdev);
5911 pci_enable_wake(pdev, pci_choose_state(pdev, state), np->wolenabled);
Tobias Diedrich25d90812008-05-18 15:04:29 +02005912 pci_disable_device(pdev);
Francois Romieua1893172006-10-10 14:33:27 -07005913 pci_set_power_state(pdev, pci_choose_state(pdev, state));
Francois Romieua1893172006-10-10 14:33:27 -07005914 return 0;
5915}
5916
5917static int nv_resume(struct pci_dev *pdev)
5918{
5919 struct net_device *dev = pci_get_drvdata(pdev);
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005920 struct fe_priv *np = netdev_priv(dev);
Ayaz Abdullaa376e792008-04-10 21:30:35 -07005921 u8 __iomem *base = get_hwbase(dev);
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005922 int i, rc = 0;
Francois Romieua1893172006-10-10 14:33:27 -07005923
Francois Romieua1893172006-10-10 14:33:27 -07005924 pci_set_power_state(pdev, PCI_D0);
5925 pci_restore_state(pdev);
Tobias Diedrich25d90812008-05-18 15:04:29 +02005926 /* ack any pending wake events, disable PME */
Francois Romieua1893172006-10-10 14:33:27 -07005927 pci_enable_wake(pdev, PCI_D0, 0);
5928
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005929 /* restore non-pci configuration space */
Szymon Janc78aea4f2010-11-27 08:39:43 +00005930 for (i = 0; i <= np->register_size/sizeof(u32); i++)
Tobias Diedrich1a1ca862008-05-18 15:03:44 +02005931 writel(np->saved_config_space[i], base+i*sizeof(u32));
Ayaz Abdullaa376e792008-04-10 21:30:35 -07005932
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005933 if (np->driver_data & DEV_NEED_MSI_FIX)
5934 pci_write_config_dword(pdev, NV_MSI_PRIV_OFFSET, NV_MSI_PRIV_VALUE);
Ayaz Abdullab6e44052009-02-07 00:24:15 -08005935
Ed Swierk35a74332009-04-06 17:49:12 -07005936 /* restore phy state, including autoneg */
5937 phy_init(dev);
5938
Tobias Diedrich25d90812008-05-18 15:04:29 +02005939 netif_device_attach(dev);
5940 if (netif_running(dev)) {
5941 rc = nv_open(dev);
5942 nv_set_multicast(dev);
5943 }
Francois Romieua1893172006-10-10 14:33:27 -07005944 return rc;
5945}
Tobias Diedrichf735a2a2008-05-18 15:02:37 +02005946
5947static void nv_shutdown(struct pci_dev *pdev)
5948{
5949 struct net_device *dev = pci_get_drvdata(pdev);
5950 struct fe_priv *np = netdev_priv(dev);
5951
5952 if (netif_running(dev))
5953 nv_close(dev);
5954
Tobias Diedrich34edaa82009-02-16 00:13:20 -08005955 /*
5956 * Restore the MAC so a kernel started by kexec won't get confused.
5957 * If we really go for poweroff, we must not restore the MAC,
5958 * otherwise the MAC for WOL will be reversed at least on some boards.
5959 */
Szymon Janc78aea4f2010-11-27 08:39:43 +00005960 if (system_state != SYSTEM_POWER_OFF)
Tobias Diedrich34edaa82009-02-16 00:13:20 -08005961 nv_restore_mac_addr(pdev);
Yinghai Luf55c21f2008-09-13 13:10:31 -07005962
Tobias Diedrichf735a2a2008-05-18 15:02:37 +02005963 pci_disable_device(pdev);
Tobias Diedrich34edaa82009-02-16 00:13:20 -08005964 /*
5965 * Apparently it is not possible to reinitialise from D3 hot,
5966 * only put the device into D3 if we really go for poweroff.
5967 */
Rafael J. Wysocki3cb55992008-09-05 14:00:19 -07005968 if (system_state == SYSTEM_POWER_OFF) {
5969 if (pci_enable_wake(pdev, PCI_D3cold, np->wolenabled))
5970 pci_enable_wake(pdev, PCI_D3hot, np->wolenabled);
5971 pci_set_power_state(pdev, PCI_D3hot);
5972 }
Tobias Diedrichf735a2a2008-05-18 15:02:37 +02005973}
Francois Romieua1893172006-10-10 14:33:27 -07005974#else
5975#define nv_suspend NULL
Tobias Diedrichf735a2a2008-05-18 15:02:37 +02005976#define nv_shutdown NULL
Francois Romieua1893172006-10-10 14:33:27 -07005977#define nv_resume NULL
5978#endif /* CONFIG_PM */
5979
Alexey Dobriyana3aa1882010-01-07 11:58:11 +00005980static DEFINE_PCI_DEVICE_TABLE(pci_tbl) = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005981 { /* nForce Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005982 PCI_DEVICE(0x10DE, 0x01C3),
Manfred Spraulc2dba062005-07-31 18:29:47 +02005983 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005984 },
5985 { /* nForce2 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005986 PCI_DEVICE(0x10DE, 0x0066),
Manfred Spraulc2dba062005-07-31 18:29:47 +02005987 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005988 },
5989 { /* nForce3 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005990 PCI_DEVICE(0x10DE, 0x00D6),
Manfred Spraulc2dba062005-07-31 18:29:47 +02005991 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005992 },
5993 { /* nForce3 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005994 PCI_DEVICE(0x10DE, 0x0086),
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005995 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005996 },
5997 { /* nForce3 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00005998 PCI_DEVICE(0x10DE, 0x008C),
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04005999 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006000 },
6001 { /* nForce3 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006002 PCI_DEVICE(0x10DE, 0x00E6),
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04006003 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006004 },
6005 { /* nForce3 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006006 PCI_DEVICE(0x10DE, 0x00DF),
Manfred Spraul8a4ae7f2005-09-21 23:22:10 -04006007 .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006008 },
6009 { /* CK804 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006010 PCI_DEVICE(0x10DE, 0x0056),
Yinghai Lu033e97b2009-02-06 01:30:56 -08006011 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006012 },
6013 { /* CK804 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006014 PCI_DEVICE(0x10DE, 0x0057),
Yinghai Lu033e97b2009-02-06 01:30:56 -08006015 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006016 },
6017 { /* MCP04 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006018 PCI_DEVICE(0x10DE, 0x0037),
Ayaz Abdulla9e184762009-03-05 08:02:18 +00006019 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006020 },
6021 { /* MCP04 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006022 PCI_DEVICE(0x10DE, 0x0038),
Ayaz Abdulla9e184762009-03-05 08:02:18 +00006023 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_STATISTICS_V1|DEV_NEED_TX_LIMIT,
Manfred Sprauldc8216c2005-07-31 18:26:05 +02006024 },
6025 { /* MCP51 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006026 PCI_DEVICE(0x10DE, 0x0268),
6027 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1|DEV_NEED_LOW_POWER_FIX,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006028 },
Manfred Spraul9992d4a2005-06-05 17:36:11 +02006029 { /* MCP51 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006030 PCI_DEVICE(0x10DE, 0x0269),
6031 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_STATISTICS_V1|DEV_NEED_LOW_POWER_FIX,
Manfred Spraul9992d4a2005-06-05 17:36:11 +02006032 },
Manfred Spraulf49d16e2005-06-26 11:36:52 +02006033 { /* MCP55 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006034 PCI_DEVICE(0x10DE, 0x0372),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006035 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT|DEV_NEED_MSI_FIX,
Manfred Spraulf49d16e2005-06-26 11:36:52 +02006036 },
6037 { /* MCP55 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006038 PCI_DEVICE(0x10DE, 0x0373),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006039 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_NEED_TX_LIMIT|DEV_NEED_MSI_FIX,
Manfred Spraulf49d16e2005-06-26 11:36:52 +02006040 },
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006041 { /* MCP61 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006042 PCI_DEVICE(0x10DE, 0x03E5),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006043 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006044 },
6045 { /* MCP61 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006046 PCI_DEVICE(0x10DE, 0x03E6),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006047 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006048 },
6049 { /* MCP61 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006050 PCI_DEVICE(0x10DE, 0x03EE),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006051 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006052 },
6053 { /* MCP61 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006054 PCI_DEVICE(0x10DE, 0x03EF),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006055 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006056 },
6057 { /* MCP65 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006058 PCI_DEVICE(0x10DE, 0x0450),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006059 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006060 },
6061 { /* MCP65 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006062 PCI_DEVICE(0x10DE, 0x0451),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006063 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006064 },
6065 { /* MCP65 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006066 PCI_DEVICE(0x10DE, 0x0452),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006067 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006068 },
6069 { /* MCP65 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006070 PCI_DEVICE(0x10DE, 0x0453),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006071 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_NEED_TX_LIMIT|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullac99ce7e2006-06-10 22:48:28 -04006072 },
Ayaz Abdullaf4344842006-11-06 00:43:40 -08006073 { /* MCP67 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006074 PCI_DEVICE(0x10DE, 0x054C),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006075 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullaf4344842006-11-06 00:43:40 -08006076 },
6077 { /* MCP67 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006078 PCI_DEVICE(0x10DE, 0x054D),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006079 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullaf4344842006-11-06 00:43:40 -08006080 },
6081 { /* MCP67 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006082 PCI_DEVICE(0x10DE, 0x054E),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006083 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullaf4344842006-11-06 00:43:40 -08006084 },
6085 { /* MCP67 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006086 PCI_DEVICE(0x10DE, 0x054F),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006087 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdullaf4344842006-11-06 00:43:40 -08006088 },
Ayaz Abdulla13986612007-07-22 20:43:26 -04006089 { /* MCP73 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006090 PCI_DEVICE(0x10DE, 0x07DC),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006091 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdulla13986612007-07-22 20:43:26 -04006092 },
6093 { /* MCP73 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006094 PCI_DEVICE(0x10DE, 0x07DD),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006095 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdulla13986612007-07-22 20:43:26 -04006096 },
6097 { /* MCP73 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006098 PCI_DEVICE(0x10DE, 0x07DE),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006099 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdulla13986612007-07-22 20:43:26 -04006100 },
6101 { /* MCP73 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006102 PCI_DEVICE(0x10DE, 0x07DF),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006103 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL|DEV_HAS_MSI|DEV_HAS_PAUSEFRAME_TX_V1|DEV_HAS_STATISTICS_V12|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_MSI_FIX,
Ayaz Abdulla13986612007-07-22 20:43:26 -04006104 },
Ayaz Abdulla96fd4cd2007-10-25 03:36:42 -04006105 { /* MCP77 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006106 PCI_DEVICE(0x10DE, 0x0760),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006107 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla96fd4cd2007-10-25 03:36:42 -04006108 },
6109 { /* MCP77 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006110 PCI_DEVICE(0x10DE, 0x0761),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006111 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla96fd4cd2007-10-25 03:36:42 -04006112 },
6113 { /* MCP77 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006114 PCI_DEVICE(0x10DE, 0x0762),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006115 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla96fd4cd2007-10-25 03:36:42 -04006116 },
6117 { /* MCP77 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006118 PCI_DEVICE(0x10DE, 0x0763),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006119 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V2|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_MGMT_UNIT|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla96fd4cd2007-10-25 03:36:42 -04006120 },
Ayaz Abdulla490dde82007-11-23 20:54:01 -05006121 { /* MCP79 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006122 PCI_DEVICE(0x10DE, 0x0AB0),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006123 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla490dde82007-11-23 20:54:01 -05006124 },
6125 { /* MCP79 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006126 PCI_DEVICE(0x10DE, 0x0AB1),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006127 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla490dde82007-11-23 20:54:01 -05006128 },
6129 { /* MCP79 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006130 PCI_DEVICE(0x10DE, 0x0AB2),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006131 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla490dde82007-11-23 20:54:01 -05006132 },
6133 { /* MCP79 Ethernet Controller */
Ayaz Abdulla3c2e1c12009-06-03 15:05:17 +00006134 PCI_DEVICE(0x10DE, 0x0AB3),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006135 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_NEED_TX_LIMIT2|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX|DEV_NEED_MSI_FIX,
Ayaz Abdulla490dde82007-11-23 20:54:01 -05006136 },
Ayaz Abdulla3df81c42009-06-03 15:05:35 +00006137 { /* MCP89 Ethernet Controller */
6138 PCI_DEVICE(0x10DE, 0x0D7D),
Mike Ditto7b5e0782010-07-25 21:54:28 -07006139 .driver_data = DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_MSI|DEV_HAS_POWER_CNTRL|DEV_HAS_PAUSEFRAME_TX_V3|DEV_HAS_STATISTICS_V123|DEV_HAS_TEST_EXTENDED|DEV_HAS_CORRECT_MACADDR|DEV_HAS_COLLISION_FIX|DEV_HAS_GEAR_MODE|DEV_NEED_PHY_INIT_FIX,
Ayaz Abdulla3df81c42009-06-03 15:05:35 +00006140 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07006141 {0,},
6142};
6143
6144static struct pci_driver driver = {
Jeff Garzik3f88ce42007-10-16 04:09:09 -04006145 .name = DRV_NAME,
6146 .id_table = pci_tbl,
6147 .probe = nv_probe,
6148 .remove = __devexit_p(nv_remove),
6149 .suspend = nv_suspend,
6150 .resume = nv_resume,
Tobias Diedrichf735a2a2008-05-18 15:02:37 +02006151 .shutdown = nv_shutdown,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006152};
6153
Linus Torvalds1da177e2005-04-16 15:20:36 -07006154static int __init init_nic(void)
6155{
Jeff Garzik29917622006-08-19 17:48:59 -04006156 return pci_register_driver(&driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006157}
6158
6159static void __exit exit_nic(void)
6160{
6161 pci_unregister_driver(&driver);
6162}
6163
6164module_param(max_interrupt_work, int, 0);
6165MODULE_PARM_DESC(max_interrupt_work, "forcedeth maximum events handled per interrupt");
Ayaz Abdullaa971c322005-11-11 08:30:38 -05006166module_param(optimization_mode, int, 0);
Ayaz Abdulla9e184762009-03-05 08:02:18 +00006167MODULE_PARM_DESC(optimization_mode, "In throughput mode (0), every tx & rx packet will generate an interrupt. In CPU mode (1), interrupts are controlled by a timer. In dynamic mode (2), the mode toggles between throughput and CPU mode based on network load.");
Ayaz Abdullaa971c322005-11-11 08:30:38 -05006168module_param(poll_interval, int, 0);
6169MODULE_PARM_DESC(poll_interval, "Interval determines how frequent timer interrupt is generated by [(time_in_micro_secs * 100) / (2^10)]. Min is 0 and Max is 65535.");
Ayaz Abdulla69fe3fd2006-06-10 22:48:18 -04006170module_param(msi, int, 0);
6171MODULE_PARM_DESC(msi, "MSI interrupts are enabled by setting to 1 and disabled by setting to 0.");
6172module_param(msix, int, 0);
6173MODULE_PARM_DESC(msix, "MSIX interrupts are enabled by setting to 1 and disabled by setting to 0.");
6174module_param(dma_64bit, int, 0);
6175MODULE_PARM_DESC(dma_64bit, "High DMA is enabled by setting to 1 and disabled by setting to 0.");
Ayaz Abdulla9f3f7912008-04-23 14:37:30 -04006176module_param(phy_cross, int, 0);
6177MODULE_PARM_DESC(phy_cross, "Phy crossover detection for Realtek 8201 phy is enabled by setting to 1 and disabled by setting to 0.");
Ed Swierk5a9a8e32009-06-02 00:19:52 -07006178module_param(phy_power_down, int, 0);
6179MODULE_PARM_DESC(phy_power_down, "Power down phy and disable link when interface is down (1), or leave phy powered up (0).");
Linus Torvalds1da177e2005-04-16 15:20:36 -07006180
6181MODULE_AUTHOR("Manfred Spraul <manfred@colorfullife.com>");
6182MODULE_DESCRIPTION("Reverse Engineered nForce ethernet driver");
6183MODULE_LICENSE("GPL");
6184
6185MODULE_DEVICE_TABLE(pci, pci_tbl);
6186
6187module_init(init_nic);
6188module_exit(exit_nic);