Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/mtd/nand/au1550nd.c |
| 3 | * |
| 4 | * Copyright (C) 2004 Embedded Edge, LLC |
| 5 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | */ |
| 11 | |
| 12 | #include <linux/slab.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/module.h> |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 15 | #include <linux/interrupt.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/mtd/mtd.h> |
| 17 | #include <linux/mtd/nand.h> |
| 18 | #include <linux/mtd/partitions.h> |
| 19 | #include <asm/io.h> |
| 20 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 21 | #include <asm/mach-au1x00/au1xxx.h> |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame^] | 22 | #include <asm/mach-db1x00/bcsr.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | |
| 24 | /* |
| 25 | * MTD structure for NAND controller |
| 26 | */ |
| 27 | static struct mtd_info *au1550_mtd = NULL; |
| 28 | static void __iomem *p_nand; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 29 | static int nand_width = 1; /* default x8 */ |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 30 | static void (*au1550_write_byte)(struct mtd_info *, u_char); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | /* |
| 33 | * Define partitions for flash device |
| 34 | */ |
Jesper Juhl | 3c6bee1 | 2006-01-09 20:54:01 -0800 | [diff] [blame] | 35 | static const struct mtd_partition partition_info[] = { |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 36 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 37 | .name = "NAND FS 0", |
| 38 | .offset = 0, |
| 39 | .size = 8 * 1024 * 1024}, |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 40 | { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 41 | .name = "NAND FS 1", |
| 42 | .offset = MTDPART_OFS_APPEND, |
| 43 | .size = MTDPART_SIZ_FULL} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | }; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | |
| 46 | /** |
| 47 | * au_read_byte - read one byte from the chip |
| 48 | * @mtd: MTD device structure |
| 49 | * |
| 50 | * read function for 8bit buswith |
| 51 | */ |
| 52 | static u_char au_read_byte(struct mtd_info *mtd) |
| 53 | { |
| 54 | struct nand_chip *this = mtd->priv; |
| 55 | u_char ret = readb(this->IO_ADDR_R); |
| 56 | au_sync(); |
| 57 | return ret; |
| 58 | } |
| 59 | |
| 60 | /** |
| 61 | * au_write_byte - write one byte to the chip |
| 62 | * @mtd: MTD device structure |
| 63 | * @byte: pointer to data byte to write |
| 64 | * |
| 65 | * write function for 8it buswith |
| 66 | */ |
| 67 | static void au_write_byte(struct mtd_info *mtd, u_char byte) |
| 68 | { |
| 69 | struct nand_chip *this = mtd->priv; |
| 70 | writeb(byte, this->IO_ADDR_W); |
| 71 | au_sync(); |
| 72 | } |
| 73 | |
| 74 | /** |
| 75 | * au_read_byte16 - read one byte endianess aware from the chip |
| 76 | * @mtd: MTD device structure |
| 77 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 78 | * read function for 16bit buswith with |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | * endianess conversion |
| 80 | */ |
| 81 | static u_char au_read_byte16(struct mtd_info *mtd) |
| 82 | { |
| 83 | struct nand_chip *this = mtd->priv; |
| 84 | u_char ret = (u_char) cpu_to_le16(readw(this->IO_ADDR_R)); |
| 85 | au_sync(); |
| 86 | return ret; |
| 87 | } |
| 88 | |
| 89 | /** |
| 90 | * au_write_byte16 - write one byte endianess aware to the chip |
| 91 | * @mtd: MTD device structure |
| 92 | * @byte: pointer to data byte to write |
| 93 | * |
| 94 | * write function for 16bit buswith with |
| 95 | * endianess conversion |
| 96 | */ |
| 97 | static void au_write_byte16(struct mtd_info *mtd, u_char byte) |
| 98 | { |
| 99 | struct nand_chip *this = mtd->priv; |
| 100 | writew(le16_to_cpu((u16) byte), this->IO_ADDR_W); |
| 101 | au_sync(); |
| 102 | } |
| 103 | |
| 104 | /** |
| 105 | * au_read_word - read one word from the chip |
| 106 | * @mtd: MTD device structure |
| 107 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 108 | * read function for 16bit buswith without |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 109 | * endianess conversion |
| 110 | */ |
| 111 | static u16 au_read_word(struct mtd_info *mtd) |
| 112 | { |
| 113 | struct nand_chip *this = mtd->priv; |
| 114 | u16 ret = readw(this->IO_ADDR_R); |
| 115 | au_sync(); |
| 116 | return ret; |
| 117 | } |
| 118 | |
| 119 | /** |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | * au_write_buf - write buffer to chip |
| 121 | * @mtd: MTD device structure |
| 122 | * @buf: data buffer |
| 123 | * @len: number of bytes to write |
| 124 | * |
| 125 | * write function for 8bit buswith |
| 126 | */ |
| 127 | static void au_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 128 | { |
| 129 | int i; |
| 130 | struct nand_chip *this = mtd->priv; |
| 131 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 132 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 133 | writeb(buf[i], this->IO_ADDR_W); |
| 134 | au_sync(); |
| 135 | } |
| 136 | } |
| 137 | |
| 138 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 139 | * au_read_buf - read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | * @mtd: MTD device structure |
| 141 | * @buf: buffer to store date |
| 142 | * @len: number of bytes to read |
| 143 | * |
| 144 | * read function for 8bit buswith |
| 145 | */ |
| 146 | static void au_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 147 | { |
| 148 | int i; |
| 149 | struct nand_chip *this = mtd->priv; |
| 150 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 151 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 152 | buf[i] = readb(this->IO_ADDR_R); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 153 | au_sync(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | } |
| 155 | } |
| 156 | |
| 157 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 158 | * au_verify_buf - Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 159 | * @mtd: MTD device structure |
| 160 | * @buf: buffer containing the data to compare |
| 161 | * @len: number of bytes to compare |
| 162 | * |
| 163 | * verify function for 8bit buswith |
| 164 | */ |
| 165 | static int au_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) |
| 166 | { |
| 167 | int i; |
| 168 | struct nand_chip *this = mtd->priv; |
| 169 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 170 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | if (buf[i] != readb(this->IO_ADDR_R)) |
| 172 | return -EFAULT; |
| 173 | au_sync(); |
| 174 | } |
| 175 | |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | /** |
| 180 | * au_write_buf16 - write buffer to chip |
| 181 | * @mtd: MTD device structure |
| 182 | * @buf: data buffer |
| 183 | * @len: number of bytes to write |
| 184 | * |
| 185 | * write function for 16bit buswith |
| 186 | */ |
| 187 | static void au_write_buf16(struct mtd_info *mtd, const u_char *buf, int len) |
| 188 | { |
| 189 | int i; |
| 190 | struct nand_chip *this = mtd->priv; |
| 191 | u16 *p = (u16 *) buf; |
| 192 | len >>= 1; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 193 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 194 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 195 | writew(p[i], this->IO_ADDR_W); |
| 196 | au_sync(); |
| 197 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 198 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 199 | } |
| 200 | |
| 201 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 202 | * au_read_buf16 - read chip data into buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | * @mtd: MTD device structure |
| 204 | * @buf: buffer to store date |
| 205 | * @len: number of bytes to read |
| 206 | * |
| 207 | * read function for 16bit buswith |
| 208 | */ |
| 209 | static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len) |
| 210 | { |
| 211 | int i; |
| 212 | struct nand_chip *this = mtd->priv; |
| 213 | u16 *p = (u16 *) buf; |
| 214 | len >>= 1; |
| 215 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 216 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | p[i] = readw(this->IO_ADDR_R); |
| 218 | au_sync(); |
| 219 | } |
| 220 | } |
| 221 | |
| 222 | /** |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 223 | * au_verify_buf16 - Verify chip data against buffer |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | * @mtd: MTD device structure |
| 225 | * @buf: buffer containing the data to compare |
| 226 | * @len: number of bytes to compare |
| 227 | * |
| 228 | * verify function for 16bit buswith |
| 229 | */ |
| 230 | static int au_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len) |
| 231 | { |
| 232 | int i; |
| 233 | struct nand_chip *this = mtd->priv; |
| 234 | u16 *p = (u16 *) buf; |
| 235 | len >>= 1; |
| 236 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 237 | for (i = 0; i < len; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 238 | if (p[i] != readw(this->IO_ADDR_R)) |
| 239 | return -EFAULT; |
| 240 | au_sync(); |
| 241 | } |
| 242 | return 0; |
| 243 | } |
| 244 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 245 | /* Select the chip by setting nCE to low */ |
| 246 | #define NAND_CTL_SETNCE 1 |
| 247 | /* Deselect the chip by setting nCE to high */ |
| 248 | #define NAND_CTL_CLRNCE 2 |
| 249 | /* Select the command latch by setting CLE to high */ |
| 250 | #define NAND_CTL_SETCLE 3 |
| 251 | /* Deselect the command latch by setting CLE to low */ |
| 252 | #define NAND_CTL_CLRCLE 4 |
| 253 | /* Select the address latch by setting ALE to high */ |
| 254 | #define NAND_CTL_SETALE 5 |
| 255 | /* Deselect the address latch by setting ALE to low */ |
| 256 | #define NAND_CTL_CLRALE 6 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | |
| 258 | static void au1550_hwcontrol(struct mtd_info *mtd, int cmd) |
| 259 | { |
| 260 | register struct nand_chip *this = mtd->priv; |
| 261 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 262 | switch (cmd) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 264 | case NAND_CTL_SETCLE: |
| 265 | this->IO_ADDR_W = p_nand + MEM_STNAND_CMD; |
| 266 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 268 | case NAND_CTL_CLRCLE: |
| 269 | this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; |
| 270 | break; |
| 271 | |
| 272 | case NAND_CTL_SETALE: |
| 273 | this->IO_ADDR_W = p_nand + MEM_STNAND_ADDR; |
| 274 | break; |
| 275 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 276 | case NAND_CTL_CLRALE: |
| 277 | this->IO_ADDR_W = p_nand + MEM_STNAND_DATA; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 278 | /* FIXME: Nobody knows why this is necessary, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 279 | * but it works only that way */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 280 | udelay(1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | break; |
| 282 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 283 | case NAND_CTL_SETNCE: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | /* assert (force assert) chip enable */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 285 | au_writel((1 << (4 + NAND_CS)), MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 286 | break; |
| 287 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 288 | case NAND_CTL_CLRNCE: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 289 | /* deassert chip enable */ |
| 290 | au_writel(0, MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 291 | break; |
| 292 | } |
| 293 | |
| 294 | this->IO_ADDR_R = this->IO_ADDR_W; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 295 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | /* Drain the writebuffer */ |
| 297 | au_sync(); |
| 298 | } |
| 299 | |
| 300 | int au1550_device_ready(struct mtd_info *mtd) |
| 301 | { |
| 302 | int ret = (au_readl(MEM_STSTAT) & 0x1) ? 1 : 0; |
| 303 | au_sync(); |
| 304 | return ret; |
| 305 | } |
| 306 | |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 307 | /** |
| 308 | * au1550_select_chip - control -CE line |
| 309 | * Forbid driving -CE manually permitting the NAND controller to do this. |
| 310 | * Keeping -CE asserted during the whole sector reads interferes with the |
| 311 | * NOR flash and PCMCIA drivers as it causes contention on the static bus. |
| 312 | * We only have to hold -CE low for the NAND read commands since the flash |
| 313 | * chip needs it to be asserted during chip not ready time but the NAND |
| 314 | * controller keeps it released. |
| 315 | * |
| 316 | * @mtd: MTD device structure |
| 317 | * @chip: chipnumber to select, -1 for deselect |
| 318 | */ |
| 319 | static void au1550_select_chip(struct mtd_info *mtd, int chip) |
| 320 | { |
| 321 | } |
| 322 | |
| 323 | /** |
| 324 | * au1550_command - Send command to NAND device |
| 325 | * @mtd: MTD device structure |
| 326 | * @command: the command to be sent |
| 327 | * @column: the column address for this command, -1 if none |
| 328 | * @page_addr: the page address for this command, -1 if none |
| 329 | */ |
| 330 | static void au1550_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) |
| 331 | { |
| 332 | register struct nand_chip *this = mtd->priv; |
| 333 | int ce_override = 0, i; |
| 334 | ulong flags; |
| 335 | |
| 336 | /* Begin command latch cycle */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 337 | au1550_hwcontrol(mtd, NAND_CTL_SETCLE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 338 | /* |
| 339 | * Write out the command to the device. |
| 340 | */ |
| 341 | if (command == NAND_CMD_SEQIN) { |
| 342 | int readcmd; |
| 343 | |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 344 | if (column >= mtd->writesize) { |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 345 | /* OOB area */ |
Joern Engel | 2831877 | 2006-05-22 23:18:05 +0200 | [diff] [blame] | 346 | column -= mtd->writesize; |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 347 | readcmd = NAND_CMD_READOOB; |
| 348 | } else if (column < 256) { |
| 349 | /* First 256 bytes --> READ0 */ |
| 350 | readcmd = NAND_CMD_READ0; |
| 351 | } else { |
| 352 | column -= 256; |
| 353 | readcmd = NAND_CMD_READ1; |
| 354 | } |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 355 | au1550_write_byte(mtd, readcmd); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 356 | } |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 357 | au1550_write_byte(mtd, command); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 358 | |
| 359 | /* Set ALE and clear CLE to start address cycle */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 360 | au1550_hwcontrol(mtd, NAND_CTL_CLRCLE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 361 | |
| 362 | if (column != -1 || page_addr != -1) { |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 363 | au1550_hwcontrol(mtd, NAND_CTL_SETALE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 364 | |
| 365 | /* Serially input address */ |
| 366 | if (column != -1) { |
| 367 | /* Adjust columns for 16 bit buswidth */ |
| 368 | if (this->options & NAND_BUSWIDTH_16) |
| 369 | column >>= 1; |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 370 | au1550_write_byte(mtd, column); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 371 | } |
| 372 | if (page_addr != -1) { |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 373 | au1550_write_byte(mtd, (u8)(page_addr & 0xff)); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 374 | |
| 375 | if (command == NAND_CMD_READ0 || |
| 376 | command == NAND_CMD_READ1 || |
| 377 | command == NAND_CMD_READOOB) { |
| 378 | /* |
| 379 | * NAND controller will release -CE after |
| 380 | * the last address byte is written, so we'll |
| 381 | * have to forcibly assert it. No interrupts |
| 382 | * are allowed while we do this as we don't |
| 383 | * want the NOR flash or PCMCIA drivers to |
| 384 | * steal our precious bytes of data... |
| 385 | */ |
| 386 | ce_override = 1; |
| 387 | local_irq_save(flags); |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 388 | au1550_hwcontrol(mtd, NAND_CTL_SETNCE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 389 | } |
| 390 | |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 391 | au1550_write_byte(mtd, (u8)(page_addr >> 8)); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 392 | |
| 393 | /* One more address cycle for devices > 32MiB */ |
| 394 | if (this->chipsize > (32 << 20)) |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 395 | au1550_write_byte(mtd, (u8)((page_addr >> 16) & 0x0f)); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 396 | } |
| 397 | /* Latch in address */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 398 | au1550_hwcontrol(mtd, NAND_CTL_CLRALE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 399 | } |
| 400 | |
| 401 | /* |
| 402 | * Program and erase have their own busy handlers. |
| 403 | * Status and sequential in need no delay. |
| 404 | */ |
| 405 | switch (command) { |
| 406 | |
| 407 | case NAND_CMD_PAGEPROG: |
| 408 | case NAND_CMD_ERASE1: |
| 409 | case NAND_CMD_ERASE2: |
| 410 | case NAND_CMD_SEQIN: |
| 411 | case NAND_CMD_STATUS: |
| 412 | return; |
| 413 | |
| 414 | case NAND_CMD_RESET: |
| 415 | break; |
| 416 | |
| 417 | case NAND_CMD_READ0: |
| 418 | case NAND_CMD_READ1: |
| 419 | case NAND_CMD_READOOB: |
| 420 | /* Check if we're really driving -CE low (just in case) */ |
| 421 | if (unlikely(!ce_override)) |
| 422 | break; |
| 423 | |
| 424 | /* Apply a short delay always to ensure that we do wait tWB. */ |
| 425 | ndelay(100); |
| 426 | /* Wait for a chip to become ready... */ |
| 427 | for (i = this->chip_delay; !this->dev_ready(mtd) && i > 0; --i) |
| 428 | udelay(1); |
| 429 | |
| 430 | /* Release -CE and re-enable interrupts. */ |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 431 | au1550_hwcontrol(mtd, NAND_CTL_CLRNCE); |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 432 | local_irq_restore(flags); |
| 433 | return; |
| 434 | } |
| 435 | /* Apply this short delay always to ensure that we do wait tWB. */ |
| 436 | ndelay(100); |
| 437 | |
| 438 | while(!this->dev_ready(mtd)); |
| 439 | } |
| 440 | |
| 441 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | /* |
| 443 | * Main initialization routine |
| 444 | */ |
David Woodhouse | cead4db | 2006-05-16 13:54:50 +0100 | [diff] [blame] | 445 | static int __init au1xxx_nand_init(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | { |
| 447 | struct nand_chip *this; |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 448 | u16 boot_swapboot = 0; /* default value */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | int retval; |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 450 | u32 mem_staddr; |
| 451 | u32 nand_phys; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | |
| 453 | /* Allocate memory for MTD device structure and private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 454 | au1550_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | if (!au1550_mtd) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 456 | printk("Unable to allocate NAND MTD dev structure.\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | return -ENOMEM; |
| 458 | } |
| 459 | |
| 460 | /* Get pointer to private data */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 461 | this = (struct nand_chip *)(&au1550_mtd[1]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 462 | |
| 463 | /* Initialize structures */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 464 | memset(au1550_mtd, 0, sizeof(struct mtd_info)); |
| 465 | memset(this, 0, sizeof(struct nand_chip)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 466 | |
| 467 | /* Link the private data with the MTD structure */ |
| 468 | au1550_mtd->priv = this; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 469 | au1550_mtd->owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 471 | |
Sergei Shtylyov | 155285c | 2006-05-16 20:16:41 +0400 | [diff] [blame] | 472 | /* MEM_STNDCTL: disable ints, disable nand boot */ |
| 473 | au_writel(0, MEM_STNDCTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 474 | |
| 475 | #ifdef CONFIG_MIPS_PB1550 |
| 476 | /* set gpio206 high */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 477 | au_writel(au_readl(GPIO2_DIR) & ~(1 << 6), GPIO2_DIR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | |
Manuel Lauss | 9bdcf33 | 2009-10-04 14:55:24 +0200 | [diff] [blame^] | 479 | boot_swapboot = (au_readl(MEM_STSTAT) & (0x7 << 1)) | ((bcsr_read(BCSR_STATUS) >> 6) & 0x1); |
| 480 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | switch (boot_swapboot) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 482 | case 0: |
| 483 | case 2: |
| 484 | case 8: |
| 485 | case 0xC: |
| 486 | case 0xD: |
| 487 | /* x16 NAND Flash */ |
| 488 | nand_width = 0; |
| 489 | break; |
| 490 | case 1: |
| 491 | case 9: |
| 492 | case 3: |
| 493 | case 0xE: |
| 494 | case 0xF: |
| 495 | /* x8 NAND Flash */ |
| 496 | nand_width = 1; |
| 497 | break; |
| 498 | default: |
| 499 | printk("Pb1550 NAND: bad boot:swap\n"); |
| 500 | retval = -EINVAL; |
| 501 | goto outmem; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | } |
| 503 | #endif |
| 504 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 505 | /* Configure chip-select; normally done by boot code, e.g. YAMON */ |
| 506 | #ifdef NAND_STCFG |
| 507 | if (NAND_CS == 0) { |
| 508 | au_writel(NAND_STCFG, MEM_STCFG0); |
| 509 | au_writel(NAND_STTIME, MEM_STTIME0); |
| 510 | au_writel(NAND_STADDR, MEM_STADDR0); |
| 511 | } |
| 512 | if (NAND_CS == 1) { |
| 513 | au_writel(NAND_STCFG, MEM_STCFG1); |
| 514 | au_writel(NAND_STTIME, MEM_STTIME1); |
| 515 | au_writel(NAND_STADDR, MEM_STADDR1); |
| 516 | } |
| 517 | if (NAND_CS == 2) { |
| 518 | au_writel(NAND_STCFG, MEM_STCFG2); |
| 519 | au_writel(NAND_STTIME, MEM_STTIME2); |
| 520 | au_writel(NAND_STADDR, MEM_STADDR2); |
| 521 | } |
| 522 | if (NAND_CS == 3) { |
| 523 | au_writel(NAND_STCFG, MEM_STCFG3); |
| 524 | au_writel(NAND_STTIME, MEM_STTIME3); |
| 525 | au_writel(NAND_STADDR, MEM_STADDR3); |
| 526 | } |
| 527 | #endif |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 528 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 529 | /* Locate NAND chip-select in order to determine NAND phys address */ |
| 530 | mem_staddr = 0x00000000; |
| 531 | if (((au_readl(MEM_STCFG0) & 0x7) == 0x5) && (NAND_CS == 0)) |
| 532 | mem_staddr = au_readl(MEM_STADDR0); |
| 533 | else if (((au_readl(MEM_STCFG1) & 0x7) == 0x5) && (NAND_CS == 1)) |
| 534 | mem_staddr = au_readl(MEM_STADDR1); |
| 535 | else if (((au_readl(MEM_STCFG2) & 0x7) == 0x5) && (NAND_CS == 2)) |
| 536 | mem_staddr = au_readl(MEM_STADDR2); |
| 537 | else if (((au_readl(MEM_STCFG3) & 0x7) == 0x5) && (NAND_CS == 3)) |
| 538 | mem_staddr = au_readl(MEM_STADDR3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 539 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 540 | if (mem_staddr == 0x00000000) { |
| 541 | printk("Au1xxx NAND: ERROR WITH NAND CHIP-SELECT\n"); |
| 542 | kfree(au1550_mtd); |
| 543 | return 1; |
| 544 | } |
| 545 | nand_phys = (mem_staddr << 4) & 0xFFFC0000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 546 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 547 | p_nand = (void __iomem *)ioremap(nand_phys, 0x1000); |
| 548 | |
| 549 | /* make controller and MTD agree */ |
| 550 | if (NAND_CS == 0) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 551 | nand_width = au_readl(MEM_STCFG0) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 552 | if (NAND_CS == 1) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 553 | nand_width = au_readl(MEM_STCFG1) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 554 | if (NAND_CS == 2) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 555 | nand_width = au_readl(MEM_STCFG2) & (1 << 22); |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 556 | if (NAND_CS == 3) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 557 | nand_width = au_readl(MEM_STCFG3) & (1 << 22); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 558 | |
| 559 | /* Set address of hardware control function */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | this->dev_ready = au1550_device_ready; |
Sergei Shtylyov | 35af68b | 2006-05-16 20:52:06 +0400 | [diff] [blame] | 561 | this->select_chip = au1550_select_chip; |
| 562 | this->cmdfunc = au1550_command; |
| 563 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 564 | /* 30 us command delay time */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 565 | this->chip_delay = 30; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 566 | this->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | |
| 568 | this->options = NAND_NO_AUTOINCR; |
| 569 | |
| 570 | if (!nand_width) |
| 571 | this->options |= NAND_BUSWIDTH_16; |
| 572 | |
| 573 | this->read_byte = (!nand_width) ? au_read_byte16 : au_read_byte; |
Thomas Gleixner | cad74f2 | 2006-05-23 23:28:48 +0200 | [diff] [blame] | 574 | au1550_write_byte = (!nand_width) ? au_write_byte16 : au_write_byte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | this->read_word = au_read_word; |
| 576 | this->write_buf = (!nand_width) ? au_write_buf16 : au_write_buf; |
| 577 | this->read_buf = (!nand_width) ? au_read_buf16 : au_read_buf; |
| 578 | this->verify_buf = (!nand_width) ? au_verify_buf16 : au_verify_buf; |
| 579 | |
| 580 | /* Scan to find existence of the device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 581 | if (nand_scan(au1550_mtd, 1)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | retval = -ENXIO; |
| 583 | goto outio; |
| 584 | } |
| 585 | |
| 586 | /* Register the partitions */ |
Tobias Klauser | 87d10f3 | 2006-03-31 02:29:45 -0800 | [diff] [blame] | 587 | add_mtd_partitions(au1550_mtd, partition_info, ARRAY_SIZE(partition_info)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 588 | |
| 589 | return 0; |
| 590 | |
| 591 | outio: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 592 | iounmap((void *)p_nand); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 593 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | outmem: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 595 | kfree(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 596 | return retval; |
| 597 | } |
| 598 | |
Pete Popov | ef6f0d1 | 2005-09-23 02:44:58 +0100 | [diff] [blame] | 599 | module_init(au1xxx_nand_init); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 600 | |
| 601 | /* |
| 602 | * Clean up routine |
| 603 | */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 604 | static void __exit au1550_cleanup(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 606 | /* Release resources, unregister device */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 607 | nand_release(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 608 | |
| 609 | /* Free the MTD device structure */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 610 | kfree(au1550_mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | |
| 612 | /* Unmap */ |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 613 | iounmap((void *)p_nand); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 614 | } |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 615 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 616 | module_exit(au1550_cleanup); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 617 | |
| 618 | MODULE_LICENSE("GPL"); |
| 619 | MODULE_AUTHOR("Embedded Edge, LLC"); |
| 620 | MODULE_DESCRIPTION("Board-specific glue layer for NAND flash on Pb1550 board"); |