Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * drivers/net/gianfar.c |
| 3 | * |
| 4 | * Gianfar Ethernet Driver |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 5 | * This driver is designed for the non-CPM ethernet controllers |
| 6 | * on the 85xx and 83xx family of integrated processors |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 7 | * Based on 8260_io/fcc_enet.c |
| 8 | * |
| 9 | * Author: Andy Fleming |
Kumar Gala | 4c8d3d9 | 2005-11-13 16:06:30 -0800 | [diff] [blame] | 10 | * Maintainer: Kumar Gala |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * |
| 12 | * Copyright (c) 2002-2004 Freescale Semiconductor, Inc. |
| 13 | * |
| 14 | * This program is free software; you can redistribute it and/or modify it |
| 15 | * under the terms of the GNU General Public License as published by the |
| 16 | * Free Software Foundation; either version 2 of the License, or (at your |
| 17 | * option) any later version. |
| 18 | * |
| 19 | * Gianfar: AKA Lambda Draconis, "Dragon" |
| 20 | * RA 11 31 24.2 |
| 21 | * Dec +69 19 52 |
| 22 | * V 3.84 |
| 23 | * B-V +1.62 |
| 24 | * |
| 25 | * Theory of operation |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 26 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | * The driver is initialized through platform_device. Structures which |
| 28 | * define the configuration needed by the board are defined in a |
| 29 | * board structure in arch/ppc/platforms (though I do not |
| 30 | * discount the possibility that other architectures could one |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 31 | * day be supported. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | * |
| 33 | * The Gianfar Ethernet Controller uses a ring of buffer |
| 34 | * descriptors. The beginning is indicated by a register |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 35 | * pointing to the physical address of the start of the ring. |
| 36 | * The end is determined by a "wrap" bit being set in the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | * last descriptor of the ring. |
| 38 | * |
| 39 | * When a packet is received, the RXF bit in the |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 40 | * IEVENT register is set, triggering an interrupt when the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | * corresponding bit in the IMASK register is also set (if |
| 42 | * interrupt coalescing is active, then the interrupt may not |
| 43 | * happen immediately, but will wait until either a set number |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 44 | * of frames or amount of time have passed). In NAPI, the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | * interrupt handler will signal there is work to be done, and |
| 46 | * exit. Without NAPI, the packet(s) will be handled |
| 47 | * immediately. Both methods will start at the last known empty |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 48 | * descriptor, and process every subsequent descriptor until there |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 | * are none left with data (NAPI will stop after a set number of |
| 50 | * packets to give time to other tasks, but will eventually |
| 51 | * process all the packets). The data arrives inside a |
| 52 | * pre-allocated skb, and so after the skb is passed up to the |
| 53 | * stack, a new skb must be allocated, and the address field in |
| 54 | * the buffer descriptor must be updated to indicate this new |
| 55 | * skb. |
| 56 | * |
| 57 | * When the kernel requests that a packet be transmitted, the |
| 58 | * driver starts where it left off last time, and points the |
| 59 | * descriptor at the buffer which was passed in. The driver |
| 60 | * then informs the DMA engine that there are packets ready to |
| 61 | * be transmitted. Once the controller is finished transmitting |
| 62 | * the packet, an interrupt may be triggered (under the same |
| 63 | * conditions as for reception, but depending on the TXF bit). |
| 64 | * The driver then cleans up the buffer. |
| 65 | */ |
| 66 | |
| 67 | #include <linux/config.h> |
| 68 | #include <linux/kernel.h> |
| 69 | #include <linux/sched.h> |
| 70 | #include <linux/string.h> |
| 71 | #include <linux/errno.h> |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 72 | #include <linux/unistd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 73 | #include <linux/slab.h> |
| 74 | #include <linux/interrupt.h> |
| 75 | #include <linux/init.h> |
| 76 | #include <linux/delay.h> |
| 77 | #include <linux/netdevice.h> |
| 78 | #include <linux/etherdevice.h> |
| 79 | #include <linux/skbuff.h> |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 80 | #include <linux/if_vlan.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 | #include <linux/spinlock.h> |
| 82 | #include <linux/mm.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 83 | #include <linux/platform_device.h> |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 84 | #include <linux/ip.h> |
| 85 | #include <linux/tcp.h> |
| 86 | #include <linux/udp.h> |
Kumar Gala | 9c07b884 | 2006-01-11 11:26:25 -0800 | [diff] [blame^] | 87 | #include <linux/in.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 88 | |
| 89 | #include <asm/io.h> |
| 90 | #include <asm/irq.h> |
| 91 | #include <asm/uaccess.h> |
| 92 | #include <linux/module.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | #include <linux/dma-mapping.h> |
| 94 | #include <linux/crc32.h> |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 95 | #include <linux/mii.h> |
| 96 | #include <linux/phy.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | |
| 98 | #include "gianfar.h" |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 99 | #include "gianfar_mii.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 100 | |
| 101 | #define TX_TIMEOUT (1*HZ) |
| 102 | #define SKB_ALLOC_TIMEOUT 1000000 |
| 103 | #undef BRIEF_GFAR_ERRORS |
| 104 | #undef VERBOSE_GFAR_ERRORS |
| 105 | |
| 106 | #ifdef CONFIG_GFAR_NAPI |
| 107 | #define RECEIVE(x) netif_receive_skb(x) |
| 108 | #else |
| 109 | #define RECEIVE(x) netif_rx(x) |
| 110 | #endif |
| 111 | |
| 112 | const char gfar_driver_name[] = "Gianfar Ethernet"; |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 113 | const char gfar_driver_version[] = "1.3"; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | static int gfar_enet_open(struct net_device *dev); |
| 116 | static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev); |
| 117 | static void gfar_timeout(struct net_device *dev); |
| 118 | static int gfar_close(struct net_device *dev); |
| 119 | struct sk_buff *gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp); |
| 120 | static struct net_device_stats *gfar_get_stats(struct net_device *dev); |
| 121 | static int gfar_set_mac_address(struct net_device *dev); |
| 122 | static int gfar_change_mtu(struct net_device *dev, int new_mtu); |
| 123 | static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs); |
| 124 | static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 126 | static void adjust_link(struct net_device *dev); |
| 127 | static void init_registers(struct net_device *dev); |
| 128 | static int init_phy(struct net_device *dev); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 129 | static int gfar_probe(struct platform_device *pdev); |
| 130 | static int gfar_remove(struct platform_device *pdev); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 131 | static void free_skb_resources(struct gfar_private *priv); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | static void gfar_set_multi(struct net_device *dev); |
| 133 | static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr); |
| 134 | #ifdef CONFIG_GFAR_NAPI |
| 135 | static int gfar_poll(struct net_device *dev, int *budget); |
| 136 | #endif |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 137 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 138 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 139 | static void gfar_vlan_rx_register(struct net_device *netdev, |
| 140 | struct vlan_group *grp); |
| 141 | static void gfar_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 142 | void gfar_halt(struct net_device *dev); |
| 143 | void gfar_start(struct net_device *dev); |
| 144 | static void gfar_clear_exact_match(struct net_device *dev); |
| 145 | static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | |
| 147 | extern struct ethtool_ops gfar_ethtool_ops; |
| 148 | |
| 149 | MODULE_AUTHOR("Freescale Semiconductor, Inc"); |
| 150 | MODULE_DESCRIPTION("Gianfar Ethernet Driver"); |
| 151 | MODULE_LICENSE("GPL"); |
| 152 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 153 | /* Returns 1 if incoming frames use an FCB */ |
| 154 | static inline int gfar_uses_fcb(struct gfar_private *priv) |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 155 | { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 156 | return (priv->vlan_enable || priv->rx_csum_enable); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 157 | } |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 158 | |
| 159 | /* Set up the ethernet device structure, private data, |
| 160 | * and anything else we need before we start */ |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 161 | static int gfar_probe(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | { |
| 163 | u32 tempval; |
| 164 | struct net_device *dev = NULL; |
| 165 | struct gfar_private *priv = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | struct gianfar_platform_data *einfo; |
| 167 | struct resource *r; |
| 168 | int idx; |
| 169 | int err = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 170 | |
| 171 | einfo = (struct gianfar_platform_data *) pdev->dev.platform_data; |
| 172 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 173 | if (NULL == einfo) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 174 | printk(KERN_ERR "gfar %d: Missing additional data!\n", |
| 175 | pdev->id); |
| 176 | |
| 177 | return -ENODEV; |
| 178 | } |
| 179 | |
| 180 | /* Create an ethernet device instance */ |
| 181 | dev = alloc_etherdev(sizeof (*priv)); |
| 182 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 183 | if (NULL == dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | return -ENOMEM; |
| 185 | |
| 186 | priv = netdev_priv(dev); |
| 187 | |
| 188 | /* Set the info in the priv to the current info */ |
| 189 | priv->einfo = einfo; |
| 190 | |
| 191 | /* fill out IRQ fields */ |
| 192 | if (einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { |
| 193 | priv->interruptTransmit = platform_get_irq_byname(pdev, "tx"); |
| 194 | priv->interruptReceive = platform_get_irq_byname(pdev, "rx"); |
| 195 | priv->interruptError = platform_get_irq_byname(pdev, "error"); |
| 196 | } else { |
| 197 | priv->interruptTransmit = platform_get_irq(pdev, 0); |
| 198 | } |
| 199 | |
| 200 | /* get a pointer to the register memory */ |
| 201 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 202 | priv->regs = (struct gfar *) |
| 203 | ioremap(r->start, sizeof (struct gfar)); |
| 204 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 205 | if (NULL == priv->regs) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 206 | err = -ENOMEM; |
| 207 | goto regs_fail; |
| 208 | } |
| 209 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | spin_lock_init(&priv->lock); |
| 211 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 212 | platform_set_drvdata(pdev, dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 213 | |
| 214 | /* Stop the DMA engine now, in case it was running before */ |
| 215 | /* (The firmware could have used it, and left it running). */ |
| 216 | /* To do this, we write Graceful Receive Stop and Graceful */ |
| 217 | /* Transmit Stop, and then wait until the corresponding bits */ |
| 218 | /* in IEVENT indicate the stops have completed. */ |
| 219 | tempval = gfar_read(&priv->regs->dmactrl); |
| 220 | tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); |
| 221 | gfar_write(&priv->regs->dmactrl, tempval); |
| 222 | |
| 223 | tempval = gfar_read(&priv->regs->dmactrl); |
| 224 | tempval |= (DMACTRL_GRS | DMACTRL_GTS); |
| 225 | gfar_write(&priv->regs->dmactrl, tempval); |
| 226 | |
| 227 | while (!(gfar_read(&priv->regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC))) |
| 228 | cpu_relax(); |
| 229 | |
| 230 | /* Reset MAC layer */ |
| 231 | gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); |
| 232 | |
| 233 | tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); |
| 234 | gfar_write(&priv->regs->maccfg1, tempval); |
| 235 | |
| 236 | /* Initialize MACCFG2. */ |
| 237 | gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS); |
| 238 | |
| 239 | /* Initialize ECNTRL */ |
| 240 | gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS); |
| 241 | |
| 242 | /* Copy the station address into the dev structure, */ |
| 243 | memcpy(dev->dev_addr, einfo->mac_addr, MAC_ADDR_LEN); |
| 244 | |
| 245 | /* Set the dev->base_addr to the gfar reg region */ |
| 246 | dev->base_addr = (unsigned long) (priv->regs); |
| 247 | |
| 248 | SET_MODULE_OWNER(dev); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 249 | SET_NETDEV_DEV(dev, &pdev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 250 | |
| 251 | /* Fill in the dev structure */ |
| 252 | dev->open = gfar_enet_open; |
| 253 | dev->hard_start_xmit = gfar_start_xmit; |
| 254 | dev->tx_timeout = gfar_timeout; |
| 255 | dev->watchdog_timeo = TX_TIMEOUT; |
| 256 | #ifdef CONFIG_GFAR_NAPI |
| 257 | dev->poll = gfar_poll; |
| 258 | dev->weight = GFAR_DEV_WEIGHT; |
| 259 | #endif |
| 260 | dev->stop = gfar_close; |
| 261 | dev->get_stats = gfar_get_stats; |
| 262 | dev->change_mtu = gfar_change_mtu; |
| 263 | dev->mtu = 1500; |
| 264 | dev->set_multicast_list = gfar_set_multi; |
| 265 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 266 | dev->ethtool_ops = &gfar_ethtool_ops; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 267 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 268 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) { |
| 269 | priv->rx_csum_enable = 1; |
| 270 | dev->features |= NETIF_F_IP_CSUM; |
| 271 | } else |
| 272 | priv->rx_csum_enable = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 273 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 274 | priv->vlgrp = NULL; |
| 275 | |
| 276 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) { |
| 277 | dev->vlan_rx_register = gfar_vlan_rx_register; |
| 278 | dev->vlan_rx_kill_vid = gfar_vlan_rx_kill_vid; |
| 279 | |
| 280 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
| 281 | |
| 282 | priv->vlan_enable = 1; |
| 283 | } |
| 284 | |
| 285 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) { |
| 286 | priv->extended_hash = 1; |
| 287 | priv->hash_width = 9; |
| 288 | |
| 289 | priv->hash_regs[0] = &priv->regs->igaddr0; |
| 290 | priv->hash_regs[1] = &priv->regs->igaddr1; |
| 291 | priv->hash_regs[2] = &priv->regs->igaddr2; |
| 292 | priv->hash_regs[3] = &priv->regs->igaddr3; |
| 293 | priv->hash_regs[4] = &priv->regs->igaddr4; |
| 294 | priv->hash_regs[5] = &priv->regs->igaddr5; |
| 295 | priv->hash_regs[6] = &priv->regs->igaddr6; |
| 296 | priv->hash_regs[7] = &priv->regs->igaddr7; |
| 297 | priv->hash_regs[8] = &priv->regs->gaddr0; |
| 298 | priv->hash_regs[9] = &priv->regs->gaddr1; |
| 299 | priv->hash_regs[10] = &priv->regs->gaddr2; |
| 300 | priv->hash_regs[11] = &priv->regs->gaddr3; |
| 301 | priv->hash_regs[12] = &priv->regs->gaddr4; |
| 302 | priv->hash_regs[13] = &priv->regs->gaddr5; |
| 303 | priv->hash_regs[14] = &priv->regs->gaddr6; |
| 304 | priv->hash_regs[15] = &priv->regs->gaddr7; |
| 305 | |
| 306 | } else { |
| 307 | priv->extended_hash = 0; |
| 308 | priv->hash_width = 8; |
| 309 | |
| 310 | priv->hash_regs[0] = &priv->regs->gaddr0; |
| 311 | priv->hash_regs[1] = &priv->regs->gaddr1; |
| 312 | priv->hash_regs[2] = &priv->regs->gaddr2; |
| 313 | priv->hash_regs[3] = &priv->regs->gaddr3; |
| 314 | priv->hash_regs[4] = &priv->regs->gaddr4; |
| 315 | priv->hash_regs[5] = &priv->regs->gaddr5; |
| 316 | priv->hash_regs[6] = &priv->regs->gaddr6; |
| 317 | priv->hash_regs[7] = &priv->regs->gaddr7; |
| 318 | } |
| 319 | |
| 320 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_PADDING) |
| 321 | priv->padding = DEFAULT_PADDING; |
| 322 | else |
| 323 | priv->padding = 0; |
| 324 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 325 | if (dev->features & NETIF_F_IP_CSUM) |
| 326 | dev->hard_header_len += GMAC_FCB_LEN; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 327 | |
| 328 | priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 329 | priv->tx_ring_size = DEFAULT_TX_RING_SIZE; |
| 330 | priv->rx_ring_size = DEFAULT_RX_RING_SIZE; |
| 331 | |
| 332 | priv->txcoalescing = DEFAULT_TX_COALESCE; |
| 333 | priv->txcount = DEFAULT_TXCOUNT; |
| 334 | priv->txtime = DEFAULT_TXTIME; |
| 335 | priv->rxcoalescing = DEFAULT_RX_COALESCE; |
| 336 | priv->rxcount = DEFAULT_RXCOUNT; |
| 337 | priv->rxtime = DEFAULT_RXTIME; |
| 338 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 339 | /* Enable most messages by default */ |
| 340 | priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1; |
| 341 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 342 | err = register_netdev(dev); |
| 343 | |
| 344 | if (err) { |
| 345 | printk(KERN_ERR "%s: Cannot register net device, aborting.\n", |
| 346 | dev->name); |
| 347 | goto register_fail; |
| 348 | } |
| 349 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 350 | /* Create all the sysfs files */ |
| 351 | gfar_init_sysfs(dev); |
| 352 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | /* Print out the device info */ |
| 354 | printk(KERN_INFO DEVICE_NAME, dev->name); |
| 355 | for (idx = 0; idx < 6; idx++) |
| 356 | printk("%2.2x%c", dev->dev_addr[idx], idx == 5 ? ' ' : ':'); |
| 357 | printk("\n"); |
| 358 | |
| 359 | /* Even more device info helps when determining which kernel */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 360 | /* provided which set of benchmarks. */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | #ifdef CONFIG_GFAR_NAPI |
| 362 | printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name); |
| 363 | #else |
| 364 | printk(KERN_INFO "%s: Running with NAPI disabled\n", dev->name); |
| 365 | #endif |
| 366 | printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n", |
| 367 | dev->name, priv->rx_ring_size, priv->tx_ring_size); |
| 368 | |
| 369 | return 0; |
| 370 | |
| 371 | register_fail: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | iounmap((void *) priv->regs); |
| 373 | regs_fail: |
| 374 | free_netdev(dev); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 375 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | } |
| 377 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 378 | static int gfar_remove(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 380 | struct net_device *dev = platform_get_drvdata(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 381 | struct gfar_private *priv = netdev_priv(dev); |
| 382 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 383 | platform_set_drvdata(pdev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | |
| 385 | iounmap((void *) priv->regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 386 | free_netdev(dev); |
| 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | |
| 391 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 392 | /* Initializes driver's PHY state, and attaches to the PHY. |
| 393 | * Returns 0 on success. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 394 | */ |
| 395 | static int init_phy(struct net_device *dev) |
| 396 | { |
| 397 | struct gfar_private *priv = netdev_priv(dev); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 398 | uint gigabit_support = |
| 399 | priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ? |
| 400 | SUPPORTED_1000baseT_Full : 0; |
| 401 | struct phy_device *phydev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 402 | |
| 403 | priv->oldlink = 0; |
| 404 | priv->oldspeed = 0; |
| 405 | priv->oldduplex = -1; |
| 406 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 407 | phydev = phy_connect(dev, priv->einfo->bus_id, &adjust_link, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 408 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 409 | if (IS_ERR(phydev)) { |
| 410 | printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); |
| 411 | return PTR_ERR(phydev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 412 | } |
| 413 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 414 | /* Remove any features not supported by the controller */ |
| 415 | phydev->supported &= (GFAR_SUPPORTED | gigabit_support); |
| 416 | phydev->advertising = phydev->supported; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 418 | priv->phydev = phydev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 419 | |
| 420 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 421 | } |
| 422 | |
| 423 | static void init_registers(struct net_device *dev) |
| 424 | { |
| 425 | struct gfar_private *priv = netdev_priv(dev); |
| 426 | |
| 427 | /* Clear IEVENT */ |
| 428 | gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR); |
| 429 | |
| 430 | /* Initialize IMASK */ |
| 431 | gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR); |
| 432 | |
| 433 | /* Init hash registers to zero */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 434 | gfar_write(&priv->regs->igaddr0, 0); |
| 435 | gfar_write(&priv->regs->igaddr1, 0); |
| 436 | gfar_write(&priv->regs->igaddr2, 0); |
| 437 | gfar_write(&priv->regs->igaddr3, 0); |
| 438 | gfar_write(&priv->regs->igaddr4, 0); |
| 439 | gfar_write(&priv->regs->igaddr5, 0); |
| 440 | gfar_write(&priv->regs->igaddr6, 0); |
| 441 | gfar_write(&priv->regs->igaddr7, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 442 | |
| 443 | gfar_write(&priv->regs->gaddr0, 0); |
| 444 | gfar_write(&priv->regs->gaddr1, 0); |
| 445 | gfar_write(&priv->regs->gaddr2, 0); |
| 446 | gfar_write(&priv->regs->gaddr3, 0); |
| 447 | gfar_write(&priv->regs->gaddr4, 0); |
| 448 | gfar_write(&priv->regs->gaddr5, 0); |
| 449 | gfar_write(&priv->regs->gaddr6, 0); |
| 450 | gfar_write(&priv->regs->gaddr7, 0); |
| 451 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 452 | /* Zero out the rmon mib registers if it has them */ |
| 453 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { |
| 454 | memset((void *) &(priv->regs->rmon), 0, |
| 455 | sizeof (struct rmon_mib)); |
| 456 | |
| 457 | /* Mask off the CAM interrupts */ |
| 458 | gfar_write(&priv->regs->rmon.cam1, 0xffffffff); |
| 459 | gfar_write(&priv->regs->rmon.cam2, 0xffffffff); |
| 460 | } |
| 461 | |
| 462 | /* Initialize the max receive buffer length */ |
| 463 | gfar_write(&priv->regs->mrblr, priv->rx_buffer_size); |
| 464 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 465 | /* Initialize the Minimum Frame Length Register */ |
| 466 | gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS); |
| 467 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 468 | /* Assign the TBI an address which won't conflict with the PHYs */ |
| 469 | gfar_write(&priv->regs->tbipa, TBIPA_VALUE); |
| 470 | } |
| 471 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 472 | |
| 473 | /* Halt the receive and transmit queues */ |
| 474 | void gfar_halt(struct net_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 475 | { |
| 476 | struct gfar_private *priv = netdev_priv(dev); |
| 477 | struct gfar *regs = priv->regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | u32 tempval; |
| 479 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 480 | /* Mask all interrupts */ |
| 481 | gfar_write(®s->imask, IMASK_INIT_CLEAR); |
| 482 | |
| 483 | /* Clear all interrupts */ |
| 484 | gfar_write(®s->ievent, IEVENT_INIT_CLEAR); |
| 485 | |
| 486 | /* Stop the DMA, and wait for it to stop */ |
| 487 | tempval = gfar_read(&priv->regs->dmactrl); |
| 488 | if ((tempval & (DMACTRL_GRS | DMACTRL_GTS)) |
| 489 | != (DMACTRL_GRS | DMACTRL_GTS)) { |
| 490 | tempval |= (DMACTRL_GRS | DMACTRL_GTS); |
| 491 | gfar_write(&priv->regs->dmactrl, tempval); |
| 492 | |
| 493 | while (!(gfar_read(&priv->regs->ievent) & |
| 494 | (IEVENT_GRSC | IEVENT_GTSC))) |
| 495 | cpu_relax(); |
| 496 | } |
| 497 | |
| 498 | /* Disable Rx and Tx */ |
| 499 | tempval = gfar_read(®s->maccfg1); |
| 500 | tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN); |
| 501 | gfar_write(®s->maccfg1, tempval); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 502 | } |
| 503 | |
| 504 | void stop_gfar(struct net_device *dev) |
| 505 | { |
| 506 | struct gfar_private *priv = netdev_priv(dev); |
| 507 | struct gfar *regs = priv->regs; |
| 508 | unsigned long flags; |
| 509 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 510 | phy_stop(priv->phydev); |
| 511 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 512 | /* Lock it down */ |
| 513 | spin_lock_irqsave(&priv->lock, flags); |
| 514 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 515 | gfar_halt(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 516 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 517 | spin_unlock_irqrestore(&priv->lock, flags); |
| 518 | |
| 519 | /* Free the IRQs */ |
| 520 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { |
| 521 | free_irq(priv->interruptError, dev); |
| 522 | free_irq(priv->interruptTransmit, dev); |
| 523 | free_irq(priv->interruptReceive, dev); |
| 524 | } else { |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 525 | free_irq(priv->interruptTransmit, dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 526 | } |
| 527 | |
| 528 | free_skb_resources(priv); |
| 529 | |
| 530 | dma_free_coherent(NULL, |
| 531 | sizeof(struct txbd8)*priv->tx_ring_size |
| 532 | + sizeof(struct rxbd8)*priv->rx_ring_size, |
| 533 | priv->tx_bd_base, |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 534 | gfar_read(®s->tbase0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 535 | } |
| 536 | |
| 537 | /* If there are any tx skbs or rx skbs still around, free them. |
| 538 | * Then free tx_skbuff and rx_skbuff */ |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 539 | static void free_skb_resources(struct gfar_private *priv) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | { |
| 541 | struct rxbd8 *rxbdp; |
| 542 | struct txbd8 *txbdp; |
| 543 | int i; |
| 544 | |
| 545 | /* Go through all the buffer descriptors and free their data buffers */ |
| 546 | txbdp = priv->tx_bd_base; |
| 547 | |
| 548 | for (i = 0; i < priv->tx_ring_size; i++) { |
| 549 | |
| 550 | if (priv->tx_skbuff[i]) { |
| 551 | dma_unmap_single(NULL, txbdp->bufPtr, |
| 552 | txbdp->length, |
| 553 | DMA_TO_DEVICE); |
| 554 | dev_kfree_skb_any(priv->tx_skbuff[i]); |
| 555 | priv->tx_skbuff[i] = NULL; |
| 556 | } |
| 557 | } |
| 558 | |
| 559 | kfree(priv->tx_skbuff); |
| 560 | |
| 561 | rxbdp = priv->rx_bd_base; |
| 562 | |
| 563 | /* rx_skbuff is not guaranteed to be allocated, so only |
| 564 | * free it and its contents if it is allocated */ |
| 565 | if(priv->rx_skbuff != NULL) { |
| 566 | for (i = 0; i < priv->rx_ring_size; i++) { |
| 567 | if (priv->rx_skbuff[i]) { |
| 568 | dma_unmap_single(NULL, rxbdp->bufPtr, |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 569 | priv->rx_buffer_size, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 570 | DMA_FROM_DEVICE); |
| 571 | |
| 572 | dev_kfree_skb_any(priv->rx_skbuff[i]); |
| 573 | priv->rx_skbuff[i] = NULL; |
| 574 | } |
| 575 | |
| 576 | rxbdp->status = 0; |
| 577 | rxbdp->length = 0; |
| 578 | rxbdp->bufPtr = 0; |
| 579 | |
| 580 | rxbdp++; |
| 581 | } |
| 582 | |
| 583 | kfree(priv->rx_skbuff); |
| 584 | } |
| 585 | } |
| 586 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 587 | void gfar_start(struct net_device *dev) |
| 588 | { |
| 589 | struct gfar_private *priv = netdev_priv(dev); |
| 590 | struct gfar *regs = priv->regs; |
| 591 | u32 tempval; |
| 592 | |
| 593 | /* Enable Rx and Tx in MACCFG1 */ |
| 594 | tempval = gfar_read(®s->maccfg1); |
| 595 | tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN); |
| 596 | gfar_write(®s->maccfg1, tempval); |
| 597 | |
| 598 | /* Initialize DMACTRL to have WWR and WOP */ |
| 599 | tempval = gfar_read(&priv->regs->dmactrl); |
| 600 | tempval |= DMACTRL_INIT_SETTINGS; |
| 601 | gfar_write(&priv->regs->dmactrl, tempval); |
| 602 | |
| 603 | /* Clear THLT, so that the DMA starts polling now */ |
| 604 | gfar_write(®s->tstat, TSTAT_CLEAR_THALT); |
| 605 | |
| 606 | /* Make sure we aren't stopped */ |
| 607 | tempval = gfar_read(&priv->regs->dmactrl); |
| 608 | tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); |
| 609 | gfar_write(&priv->regs->dmactrl, tempval); |
| 610 | |
| 611 | /* Unmask the interrupts we look for */ |
| 612 | gfar_write(®s->imask, IMASK_DEFAULT); |
| 613 | } |
| 614 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 615 | /* Bring the controller up and running */ |
| 616 | int startup_gfar(struct net_device *dev) |
| 617 | { |
| 618 | struct txbd8 *txbdp; |
| 619 | struct rxbd8 *rxbdp; |
| 620 | dma_addr_t addr; |
| 621 | unsigned long vaddr; |
| 622 | int i; |
| 623 | struct gfar_private *priv = netdev_priv(dev); |
| 624 | struct gfar *regs = priv->regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | int err = 0; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 626 | u32 rctrl = 0; |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 627 | u32 attrs = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 628 | |
| 629 | gfar_write(®s->imask, IMASK_INIT_CLEAR); |
| 630 | |
| 631 | /* Allocate memory for the buffer descriptors */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 632 | vaddr = (unsigned long) dma_alloc_coherent(NULL, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 633 | sizeof (struct txbd8) * priv->tx_ring_size + |
| 634 | sizeof (struct rxbd8) * priv->rx_ring_size, |
| 635 | &addr, GFP_KERNEL); |
| 636 | |
| 637 | if (vaddr == 0) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 638 | if (netif_msg_ifup(priv)) |
| 639 | printk(KERN_ERR "%s: Could not allocate buffer descriptors!\n", |
| 640 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 641 | return -ENOMEM; |
| 642 | } |
| 643 | |
| 644 | priv->tx_bd_base = (struct txbd8 *) vaddr; |
| 645 | |
| 646 | /* enet DMA only understands physical addresses */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 647 | gfar_write(®s->tbase0, addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 648 | |
| 649 | /* Start the rx descriptor ring where the tx ring leaves off */ |
| 650 | addr = addr + sizeof (struct txbd8) * priv->tx_ring_size; |
| 651 | vaddr = vaddr + sizeof (struct txbd8) * priv->tx_ring_size; |
| 652 | priv->rx_bd_base = (struct rxbd8 *) vaddr; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 653 | gfar_write(®s->rbase0, addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | |
| 655 | /* Setup the skbuff rings */ |
| 656 | priv->tx_skbuff = |
| 657 | (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) * |
| 658 | priv->tx_ring_size, GFP_KERNEL); |
| 659 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 660 | if (NULL == priv->tx_skbuff) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 661 | if (netif_msg_ifup(priv)) |
| 662 | printk(KERN_ERR "%s: Could not allocate tx_skbuff\n", |
| 663 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | err = -ENOMEM; |
| 665 | goto tx_skb_fail; |
| 666 | } |
| 667 | |
| 668 | for (i = 0; i < priv->tx_ring_size; i++) |
| 669 | priv->tx_skbuff[i] = NULL; |
| 670 | |
| 671 | priv->rx_skbuff = |
| 672 | (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) * |
| 673 | priv->rx_ring_size, GFP_KERNEL); |
| 674 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 675 | if (NULL == priv->rx_skbuff) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 676 | if (netif_msg_ifup(priv)) |
| 677 | printk(KERN_ERR "%s: Could not allocate rx_skbuff\n", |
| 678 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 679 | err = -ENOMEM; |
| 680 | goto rx_skb_fail; |
| 681 | } |
| 682 | |
| 683 | for (i = 0; i < priv->rx_ring_size; i++) |
| 684 | priv->rx_skbuff[i] = NULL; |
| 685 | |
| 686 | /* Initialize some variables in our dev structure */ |
| 687 | priv->dirty_tx = priv->cur_tx = priv->tx_bd_base; |
| 688 | priv->cur_rx = priv->rx_bd_base; |
| 689 | priv->skb_curtx = priv->skb_dirtytx = 0; |
| 690 | priv->skb_currx = 0; |
| 691 | |
| 692 | /* Initialize Transmit Descriptor Ring */ |
| 693 | txbdp = priv->tx_bd_base; |
| 694 | for (i = 0; i < priv->tx_ring_size; i++) { |
| 695 | txbdp->status = 0; |
| 696 | txbdp->length = 0; |
| 697 | txbdp->bufPtr = 0; |
| 698 | txbdp++; |
| 699 | } |
| 700 | |
| 701 | /* Set the last descriptor in the ring to indicate wrap */ |
| 702 | txbdp--; |
| 703 | txbdp->status |= TXBD_WRAP; |
| 704 | |
| 705 | rxbdp = priv->rx_bd_base; |
| 706 | for (i = 0; i < priv->rx_ring_size; i++) { |
| 707 | struct sk_buff *skb = NULL; |
| 708 | |
| 709 | rxbdp->status = 0; |
| 710 | |
| 711 | skb = gfar_new_skb(dev, rxbdp); |
| 712 | |
| 713 | priv->rx_skbuff[i] = skb; |
| 714 | |
| 715 | rxbdp++; |
| 716 | } |
| 717 | |
| 718 | /* Set the last descriptor in the ring to wrap */ |
| 719 | rxbdp--; |
| 720 | rxbdp->status |= RXBD_WRAP; |
| 721 | |
| 722 | /* If the device has multiple interrupts, register for |
| 723 | * them. Otherwise, only register for the one */ |
| 724 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 725 | /* Install our interrupt handlers for Error, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 726 | * Transmit, and Receive */ |
| 727 | if (request_irq(priv->interruptError, gfar_error, |
| 728 | 0, "enet_error", dev) < 0) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 729 | if (netif_msg_intr(priv)) |
| 730 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
| 731 | dev->name, priv->interruptError); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
| 733 | err = -1; |
| 734 | goto err_irq_fail; |
| 735 | } |
| 736 | |
| 737 | if (request_irq(priv->interruptTransmit, gfar_transmit, |
| 738 | 0, "enet_tx", dev) < 0) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 739 | if (netif_msg_intr(priv)) |
| 740 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
| 741 | dev->name, priv->interruptTransmit); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 742 | |
| 743 | err = -1; |
| 744 | |
| 745 | goto tx_irq_fail; |
| 746 | } |
| 747 | |
| 748 | if (request_irq(priv->interruptReceive, gfar_receive, |
| 749 | 0, "enet_rx", dev) < 0) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 750 | if (netif_msg_intr(priv)) |
| 751 | printk(KERN_ERR "%s: Can't get IRQ %d (receive0)\n", |
| 752 | dev->name, priv->interruptReceive); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 753 | |
| 754 | err = -1; |
| 755 | goto rx_irq_fail; |
| 756 | } |
| 757 | } else { |
| 758 | if (request_irq(priv->interruptTransmit, gfar_interrupt, |
| 759 | 0, "gfar_interrupt", dev) < 0) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 760 | if (netif_msg_intr(priv)) |
| 761 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
| 762 | dev->name, priv->interruptError); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | |
| 764 | err = -1; |
| 765 | goto err_irq_fail; |
| 766 | } |
| 767 | } |
| 768 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 769 | phy_start(priv->phydev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 770 | |
| 771 | /* Configure the coalescing support */ |
| 772 | if (priv->txcoalescing) |
| 773 | gfar_write(®s->txic, |
| 774 | mk_ic_value(priv->txcount, priv->txtime)); |
| 775 | else |
| 776 | gfar_write(®s->txic, 0); |
| 777 | |
| 778 | if (priv->rxcoalescing) |
| 779 | gfar_write(®s->rxic, |
| 780 | mk_ic_value(priv->rxcount, priv->rxtime)); |
| 781 | else |
| 782 | gfar_write(®s->rxic, 0); |
| 783 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 784 | if (priv->rx_csum_enable) |
| 785 | rctrl |= RCTRL_CHECKSUMMING; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 786 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 787 | if (priv->extended_hash) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 788 | rctrl |= RCTRL_EXTHASH; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 789 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 790 | gfar_clear_exact_match(dev); |
| 791 | rctrl |= RCTRL_EMEN; |
| 792 | } |
| 793 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 794 | if (priv->vlan_enable) |
| 795 | rctrl |= RCTRL_VLAN; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 796 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 797 | if (priv->padding) { |
| 798 | rctrl &= ~RCTRL_PAL_MASK; |
| 799 | rctrl |= RCTRL_PADDING(priv->padding); |
| 800 | } |
| 801 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 802 | /* Init rctrl based on our settings */ |
| 803 | gfar_write(&priv->regs->rctrl, rctrl); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 804 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 805 | if (dev->features & NETIF_F_IP_CSUM) |
| 806 | gfar_write(&priv->regs->tctrl, TCTRL_INIT_CSUM); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 807 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 808 | /* Set the extraction length and index */ |
| 809 | attrs = ATTRELI_EL(priv->rx_stash_size) | |
| 810 | ATTRELI_EI(priv->rx_stash_index); |
| 811 | |
| 812 | gfar_write(&priv->regs->attreli, attrs); |
| 813 | |
| 814 | /* Start with defaults, and add stashing or locking |
| 815 | * depending on the approprate variables */ |
| 816 | attrs = ATTR_INIT_SETTINGS; |
| 817 | |
| 818 | if (priv->bd_stash_en) |
| 819 | attrs |= ATTR_BDSTASH; |
| 820 | |
| 821 | if (priv->rx_stash_size != 0) |
| 822 | attrs |= ATTR_BUFSTASH; |
| 823 | |
| 824 | gfar_write(&priv->regs->attr, attrs); |
| 825 | |
| 826 | gfar_write(&priv->regs->fifo_tx_thr, priv->fifo_threshold); |
| 827 | gfar_write(&priv->regs->fifo_tx_starve, priv->fifo_starve); |
| 828 | gfar_write(&priv->regs->fifo_tx_starve_shutoff, priv->fifo_starve_off); |
| 829 | |
| 830 | /* Start the controller */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 831 | gfar_start(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 832 | |
| 833 | return 0; |
| 834 | |
| 835 | rx_irq_fail: |
| 836 | free_irq(priv->interruptTransmit, dev); |
| 837 | tx_irq_fail: |
| 838 | free_irq(priv->interruptError, dev); |
| 839 | err_irq_fail: |
| 840 | rx_skb_fail: |
| 841 | free_skb_resources(priv); |
| 842 | tx_skb_fail: |
| 843 | dma_free_coherent(NULL, |
| 844 | sizeof(struct txbd8)*priv->tx_ring_size |
| 845 | + sizeof(struct rxbd8)*priv->rx_ring_size, |
| 846 | priv->tx_bd_base, |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 847 | gfar_read(®s->tbase0)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | return err; |
| 850 | } |
| 851 | |
| 852 | /* Called when something needs to use the ethernet device */ |
| 853 | /* Returns 0 for success. */ |
| 854 | static int gfar_enet_open(struct net_device *dev) |
| 855 | { |
| 856 | int err; |
| 857 | |
| 858 | /* Initialize a bunch of registers */ |
| 859 | init_registers(dev); |
| 860 | |
| 861 | gfar_set_mac_address(dev); |
| 862 | |
| 863 | err = init_phy(dev); |
| 864 | |
| 865 | if(err) |
| 866 | return err; |
| 867 | |
| 868 | err = startup_gfar(dev); |
| 869 | |
| 870 | netif_start_queue(dev); |
| 871 | |
| 872 | return err; |
| 873 | } |
| 874 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 875 | static inline struct txfcb *gfar_add_fcb(struct sk_buff *skb, struct txbd8 *bdp) |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 876 | { |
| 877 | struct txfcb *fcb = (struct txfcb *)skb_push (skb, GMAC_FCB_LEN); |
| 878 | |
| 879 | memset(fcb, 0, GMAC_FCB_LEN); |
| 880 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 881 | return fcb; |
| 882 | } |
| 883 | |
| 884 | static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb) |
| 885 | { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 886 | u8 flags = 0; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 887 | |
| 888 | /* If we're here, it's a IP packet with a TCP or UDP |
| 889 | * payload. We set it to checksum, using a pseudo-header |
| 890 | * we provide |
| 891 | */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 892 | flags = TXFCB_DEFAULT; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 893 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 894 | /* Tell the controller what the protocol is */ |
| 895 | /* And provide the already calculated phcs */ |
| 896 | if (skb->nh.iph->protocol == IPPROTO_UDP) { |
| 897 | flags |= TXFCB_UDP; |
| 898 | fcb->phcs = skb->h.uh->check; |
| 899 | } else |
| 900 | fcb->phcs = skb->h.th->check; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 901 | |
| 902 | /* l3os is the distance between the start of the |
| 903 | * frame (skb->data) and the start of the IP hdr. |
| 904 | * l4os is the distance between the start of the |
| 905 | * l3 hdr and the l4 hdr */ |
| 906 | fcb->l3os = (u16)(skb->nh.raw - skb->data - GMAC_FCB_LEN); |
| 907 | fcb->l4os = (u16)(skb->h.raw - skb->nh.raw); |
| 908 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 909 | fcb->flags = flags; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 910 | } |
| 911 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 912 | void inline gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb) |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 913 | { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 914 | fcb->flags |= TXFCB_VLN; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 915 | fcb->vlctl = vlan_tx_tag_get(skb); |
| 916 | } |
| 917 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 918 | /* This is called by the kernel when a frame is ready for transmission. */ |
| 919 | /* It is pointed to by the dev->hard_start_xmit function pointer */ |
| 920 | static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 921 | { |
| 922 | struct gfar_private *priv = netdev_priv(dev); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 923 | struct txfcb *fcb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 924 | struct txbd8 *txbdp; |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 925 | u16 status; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 926 | |
| 927 | /* Update transmit stats */ |
| 928 | priv->stats.tx_bytes += skb->len; |
| 929 | |
| 930 | /* Lock priv now */ |
| 931 | spin_lock_irq(&priv->lock); |
| 932 | |
| 933 | /* Point at the first free tx descriptor */ |
| 934 | txbdp = priv->cur_tx; |
| 935 | |
| 936 | /* Clear all but the WRAP status flags */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 937 | status = txbdp->status & TXBD_WRAP; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 938 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 939 | /* Set up checksumming */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 940 | if (likely((dev->features & NETIF_F_IP_CSUM) |
| 941 | && (CHECKSUM_HW == skb->ip_summed))) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 942 | fcb = gfar_add_fcb(skb, txbdp); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 943 | status |= TXBD_TOE; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 944 | gfar_tx_checksum(skb, fcb); |
| 945 | } |
| 946 | |
| 947 | if (priv->vlan_enable && |
| 948 | unlikely(priv->vlgrp && vlan_tx_tag_present(skb))) { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 949 | if (unlikely(NULL == fcb)) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 950 | fcb = gfar_add_fcb(skb, txbdp); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 951 | status |= TXBD_TOE; |
| 952 | } |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 953 | |
| 954 | gfar_tx_vlan(skb, fcb); |
| 955 | } |
| 956 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 957 | /* Set buffer length and pointer */ |
| 958 | txbdp->length = skb->len; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 959 | txbdp->bufPtr = dma_map_single(NULL, skb->data, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 960 | skb->len, DMA_TO_DEVICE); |
| 961 | |
| 962 | /* Save the skb pointer so we can free it later */ |
| 963 | priv->tx_skbuff[priv->skb_curtx] = skb; |
| 964 | |
| 965 | /* Update the current skb pointer (wrapping if this was the last) */ |
| 966 | priv->skb_curtx = |
| 967 | (priv->skb_curtx + 1) & TX_RING_MOD_MASK(priv->tx_ring_size); |
| 968 | |
| 969 | /* Flag the BD as interrupt-causing */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 970 | status |= TXBD_INTERRUPT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 971 | |
| 972 | /* Flag the BD as ready to go, last in frame, and */ |
| 973 | /* in need of CRC */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 974 | status |= (TXBD_READY | TXBD_LAST | TXBD_CRC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 975 | |
| 976 | dev->trans_start = jiffies; |
| 977 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 978 | txbdp->status = status; |
| 979 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 980 | /* If this was the last BD in the ring, the next one */ |
| 981 | /* is at the beginning of the ring */ |
| 982 | if (txbdp->status & TXBD_WRAP) |
| 983 | txbdp = priv->tx_bd_base; |
| 984 | else |
| 985 | txbdp++; |
| 986 | |
| 987 | /* If the next BD still needs to be cleaned up, then the bds |
| 988 | are full. We need to tell the kernel to stop sending us stuff. */ |
| 989 | if (txbdp == priv->dirty_tx) { |
| 990 | netif_stop_queue(dev); |
| 991 | |
| 992 | priv->stats.tx_fifo_errors++; |
| 993 | } |
| 994 | |
| 995 | /* Update the current txbd to the next one */ |
| 996 | priv->cur_tx = txbdp; |
| 997 | |
| 998 | /* Tell the DMA to go go go */ |
| 999 | gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); |
| 1000 | |
| 1001 | /* Unlock priv */ |
| 1002 | spin_unlock_irq(&priv->lock); |
| 1003 | |
| 1004 | return 0; |
| 1005 | } |
| 1006 | |
| 1007 | /* Stops the kernel queue, and halts the controller */ |
| 1008 | static int gfar_close(struct net_device *dev) |
| 1009 | { |
| 1010 | struct gfar_private *priv = netdev_priv(dev); |
| 1011 | stop_gfar(dev); |
| 1012 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1013 | /* Disconnect from the PHY */ |
| 1014 | phy_disconnect(priv->phydev); |
| 1015 | priv->phydev = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | |
| 1017 | netif_stop_queue(dev); |
| 1018 | |
| 1019 | return 0; |
| 1020 | } |
| 1021 | |
| 1022 | /* returns a net_device_stats structure pointer */ |
| 1023 | static struct net_device_stats * gfar_get_stats(struct net_device *dev) |
| 1024 | { |
| 1025 | struct gfar_private *priv = netdev_priv(dev); |
| 1026 | |
| 1027 | return &(priv->stats); |
| 1028 | } |
| 1029 | |
| 1030 | /* Changes the mac address if the controller is not running. */ |
| 1031 | int gfar_set_mac_address(struct net_device *dev) |
| 1032 | { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1033 | gfar_set_mac_for_addr(dev, 0, dev->dev_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | |
| 1035 | return 0; |
| 1036 | } |
| 1037 | |
| 1038 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1039 | /* Enables and disables VLAN insertion/extraction */ |
| 1040 | static void gfar_vlan_rx_register(struct net_device *dev, |
| 1041 | struct vlan_group *grp) |
| 1042 | { |
| 1043 | struct gfar_private *priv = netdev_priv(dev); |
| 1044 | unsigned long flags; |
| 1045 | u32 tempval; |
| 1046 | |
| 1047 | spin_lock_irqsave(&priv->lock, flags); |
| 1048 | |
| 1049 | priv->vlgrp = grp; |
| 1050 | |
| 1051 | if (grp) { |
| 1052 | /* Enable VLAN tag insertion */ |
| 1053 | tempval = gfar_read(&priv->regs->tctrl); |
| 1054 | tempval |= TCTRL_VLINS; |
| 1055 | |
| 1056 | gfar_write(&priv->regs->tctrl, tempval); |
| 1057 | |
| 1058 | /* Enable VLAN tag extraction */ |
| 1059 | tempval = gfar_read(&priv->regs->rctrl); |
| 1060 | tempval |= RCTRL_VLEX; |
| 1061 | gfar_write(&priv->regs->rctrl, tempval); |
| 1062 | } else { |
| 1063 | /* Disable VLAN tag insertion */ |
| 1064 | tempval = gfar_read(&priv->regs->tctrl); |
| 1065 | tempval &= ~TCTRL_VLINS; |
| 1066 | gfar_write(&priv->regs->tctrl, tempval); |
| 1067 | |
| 1068 | /* Disable VLAN tag extraction */ |
| 1069 | tempval = gfar_read(&priv->regs->rctrl); |
| 1070 | tempval &= ~RCTRL_VLEX; |
| 1071 | gfar_write(&priv->regs->rctrl, tempval); |
| 1072 | } |
| 1073 | |
| 1074 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1075 | } |
| 1076 | |
| 1077 | |
| 1078 | static void gfar_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) |
| 1079 | { |
| 1080 | struct gfar_private *priv = netdev_priv(dev); |
| 1081 | unsigned long flags; |
| 1082 | |
| 1083 | spin_lock_irqsave(&priv->lock, flags); |
| 1084 | |
| 1085 | if (priv->vlgrp) |
| 1086 | priv->vlgrp->vlan_devices[vid] = NULL; |
| 1087 | |
| 1088 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1089 | } |
| 1090 | |
| 1091 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | static int gfar_change_mtu(struct net_device *dev, int new_mtu) |
| 1093 | { |
| 1094 | int tempsize, tempval; |
| 1095 | struct gfar_private *priv = netdev_priv(dev); |
| 1096 | int oldsize = priv->rx_buffer_size; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1097 | int frame_size = new_mtu + ETH_HLEN; |
| 1098 | |
| 1099 | if (priv->vlan_enable) |
| 1100 | frame_size += VLAN_ETH_HLEN; |
| 1101 | |
| 1102 | if (gfar_uses_fcb(priv)) |
| 1103 | frame_size += GMAC_FCB_LEN; |
| 1104 | |
| 1105 | frame_size += priv->padding; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1106 | |
| 1107 | if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1108 | if (netif_msg_drv(priv)) |
| 1109 | printk(KERN_ERR "%s: Invalid MTU setting\n", |
| 1110 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1111 | return -EINVAL; |
| 1112 | } |
| 1113 | |
| 1114 | tempsize = |
| 1115 | (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) + |
| 1116 | INCREMENTAL_BUFFER_SIZE; |
| 1117 | |
| 1118 | /* Only stop and start the controller if it isn't already |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1119 | * stopped, and we changed something */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1120 | if ((oldsize != tempsize) && (dev->flags & IFF_UP)) |
| 1121 | stop_gfar(dev); |
| 1122 | |
| 1123 | priv->rx_buffer_size = tempsize; |
| 1124 | |
| 1125 | dev->mtu = new_mtu; |
| 1126 | |
| 1127 | gfar_write(&priv->regs->mrblr, priv->rx_buffer_size); |
| 1128 | gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size); |
| 1129 | |
| 1130 | /* If the mtu is larger than the max size for standard |
| 1131 | * ethernet frames (ie, a jumbo frame), then set maccfg2 |
| 1132 | * to allow huge frames, and to check the length */ |
| 1133 | tempval = gfar_read(&priv->regs->maccfg2); |
| 1134 | |
| 1135 | if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE) |
| 1136 | tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK); |
| 1137 | else |
| 1138 | tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK); |
| 1139 | |
| 1140 | gfar_write(&priv->regs->maccfg2, tempval); |
| 1141 | |
| 1142 | if ((oldsize != tempsize) && (dev->flags & IFF_UP)) |
| 1143 | startup_gfar(dev); |
| 1144 | |
| 1145 | return 0; |
| 1146 | } |
| 1147 | |
| 1148 | /* gfar_timeout gets called when a packet has not been |
| 1149 | * transmitted after a set amount of time. |
| 1150 | * For now, assume that clearing out all the structures, and |
| 1151 | * starting over will fix the problem. */ |
| 1152 | static void gfar_timeout(struct net_device *dev) |
| 1153 | { |
| 1154 | struct gfar_private *priv = netdev_priv(dev); |
| 1155 | |
| 1156 | priv->stats.tx_errors++; |
| 1157 | |
| 1158 | if (dev->flags & IFF_UP) { |
| 1159 | stop_gfar(dev); |
| 1160 | startup_gfar(dev); |
| 1161 | } |
| 1162 | |
| 1163 | netif_schedule(dev); |
| 1164 | } |
| 1165 | |
| 1166 | /* Interrupt Handler for Transmit complete */ |
| 1167 | static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs) |
| 1168 | { |
| 1169 | struct net_device *dev = (struct net_device *) dev_id; |
| 1170 | struct gfar_private *priv = netdev_priv(dev); |
| 1171 | struct txbd8 *bdp; |
| 1172 | |
| 1173 | /* Clear IEVENT */ |
| 1174 | gfar_write(&priv->regs->ievent, IEVENT_TX_MASK); |
| 1175 | |
| 1176 | /* Lock priv */ |
| 1177 | spin_lock(&priv->lock); |
| 1178 | bdp = priv->dirty_tx; |
| 1179 | while ((bdp->status & TXBD_READY) == 0) { |
| 1180 | /* If dirty_tx and cur_tx are the same, then either the */ |
| 1181 | /* ring is empty or full now (it could only be full in the beginning, */ |
| 1182 | /* obviously). If it is empty, we are done. */ |
| 1183 | if ((bdp == priv->cur_tx) && (netif_queue_stopped(dev) == 0)) |
| 1184 | break; |
| 1185 | |
| 1186 | priv->stats.tx_packets++; |
| 1187 | |
| 1188 | /* Deferred means some collisions occurred during transmit, */ |
| 1189 | /* but we eventually sent the packet. */ |
| 1190 | if (bdp->status & TXBD_DEF) |
| 1191 | priv->stats.collisions++; |
| 1192 | |
| 1193 | /* Free the sk buffer associated with this TxBD */ |
| 1194 | dev_kfree_skb_irq(priv->tx_skbuff[priv->skb_dirtytx]); |
| 1195 | priv->tx_skbuff[priv->skb_dirtytx] = NULL; |
| 1196 | priv->skb_dirtytx = |
| 1197 | (priv->skb_dirtytx + |
| 1198 | 1) & TX_RING_MOD_MASK(priv->tx_ring_size); |
| 1199 | |
| 1200 | /* update bdp to point at next bd in the ring (wrapping if necessary) */ |
| 1201 | if (bdp->status & TXBD_WRAP) |
| 1202 | bdp = priv->tx_bd_base; |
| 1203 | else |
| 1204 | bdp++; |
| 1205 | |
| 1206 | /* Move dirty_tx to be the next bd */ |
| 1207 | priv->dirty_tx = bdp; |
| 1208 | |
| 1209 | /* We freed a buffer, so now we can restart transmission */ |
| 1210 | if (netif_queue_stopped(dev)) |
| 1211 | netif_wake_queue(dev); |
| 1212 | } /* while ((bdp->status & TXBD_READY) == 0) */ |
| 1213 | |
| 1214 | /* If we are coalescing the interrupts, reset the timer */ |
| 1215 | /* Otherwise, clear it */ |
| 1216 | if (priv->txcoalescing) |
| 1217 | gfar_write(&priv->regs->txic, |
| 1218 | mk_ic_value(priv->txcount, priv->txtime)); |
| 1219 | else |
| 1220 | gfar_write(&priv->regs->txic, 0); |
| 1221 | |
| 1222 | spin_unlock(&priv->lock); |
| 1223 | |
| 1224 | return IRQ_HANDLED; |
| 1225 | } |
| 1226 | |
| 1227 | struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp) |
| 1228 | { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1229 | unsigned int alignamount; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | struct gfar_private *priv = netdev_priv(dev); |
| 1231 | struct sk_buff *skb = NULL; |
| 1232 | unsigned int timeout = SKB_ALLOC_TIMEOUT; |
| 1233 | |
| 1234 | /* We have to allocate the skb, so keep trying till we succeed */ |
| 1235 | while ((!skb) && timeout--) |
| 1236 | skb = dev_alloc_skb(priv->rx_buffer_size + RXBUF_ALIGNMENT); |
| 1237 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1238 | if (NULL == skb) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1239 | return NULL; |
| 1240 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1241 | alignamount = RXBUF_ALIGNMENT - |
| 1242 | (((unsigned) skb->data) & (RXBUF_ALIGNMENT - 1)); |
| 1243 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1244 | /* We need the data buffer to be aligned properly. We will reserve |
| 1245 | * as many bytes as needed to align the data properly |
| 1246 | */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1247 | skb_reserve(skb, alignamount); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1248 | |
| 1249 | skb->dev = dev; |
| 1250 | |
| 1251 | bdp->bufPtr = dma_map_single(NULL, skb->data, |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1252 | priv->rx_buffer_size, DMA_FROM_DEVICE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1253 | |
| 1254 | bdp->length = 0; |
| 1255 | |
| 1256 | /* Mark the buffer empty */ |
| 1257 | bdp->status |= (RXBD_EMPTY | RXBD_INTERRUPT); |
| 1258 | |
| 1259 | return skb; |
| 1260 | } |
| 1261 | |
| 1262 | static inline void count_errors(unsigned short status, struct gfar_private *priv) |
| 1263 | { |
| 1264 | struct net_device_stats *stats = &priv->stats; |
| 1265 | struct gfar_extra_stats *estats = &priv->extra_stats; |
| 1266 | |
| 1267 | /* If the packet was truncated, none of the other errors |
| 1268 | * matter */ |
| 1269 | if (status & RXBD_TRUNCATED) { |
| 1270 | stats->rx_length_errors++; |
| 1271 | |
| 1272 | estats->rx_trunc++; |
| 1273 | |
| 1274 | return; |
| 1275 | } |
| 1276 | /* Count the errors, if there were any */ |
| 1277 | if (status & (RXBD_LARGE | RXBD_SHORT)) { |
| 1278 | stats->rx_length_errors++; |
| 1279 | |
| 1280 | if (status & RXBD_LARGE) |
| 1281 | estats->rx_large++; |
| 1282 | else |
| 1283 | estats->rx_short++; |
| 1284 | } |
| 1285 | if (status & RXBD_NONOCTET) { |
| 1286 | stats->rx_frame_errors++; |
| 1287 | estats->rx_nonoctet++; |
| 1288 | } |
| 1289 | if (status & RXBD_CRCERR) { |
| 1290 | estats->rx_crcerr++; |
| 1291 | stats->rx_crc_errors++; |
| 1292 | } |
| 1293 | if (status & RXBD_OVERRUN) { |
| 1294 | estats->rx_overrun++; |
| 1295 | stats->rx_crc_errors++; |
| 1296 | } |
| 1297 | } |
| 1298 | |
| 1299 | irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) |
| 1300 | { |
| 1301 | struct net_device *dev = (struct net_device *) dev_id; |
| 1302 | struct gfar_private *priv = netdev_priv(dev); |
| 1303 | |
| 1304 | #ifdef CONFIG_GFAR_NAPI |
| 1305 | u32 tempval; |
| 1306 | #endif |
| 1307 | |
| 1308 | /* Clear IEVENT, so rx interrupt isn't called again |
| 1309 | * because of this interrupt */ |
| 1310 | gfar_write(&priv->regs->ievent, IEVENT_RX_MASK); |
| 1311 | |
| 1312 | /* support NAPI */ |
| 1313 | #ifdef CONFIG_GFAR_NAPI |
| 1314 | if (netif_rx_schedule_prep(dev)) { |
| 1315 | tempval = gfar_read(&priv->regs->imask); |
| 1316 | tempval &= IMASK_RX_DISABLED; |
| 1317 | gfar_write(&priv->regs->imask, tempval); |
| 1318 | |
| 1319 | __netif_rx_schedule(dev); |
| 1320 | } else { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1321 | if (netif_msg_rx_err(priv)) |
| 1322 | printk(KERN_DEBUG "%s: receive called twice (%x)[%x]\n", |
| 1323 | dev->name, gfar_read(&priv->regs->ievent), |
| 1324 | gfar_read(&priv->regs->imask)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1325 | } |
| 1326 | #else |
| 1327 | |
| 1328 | spin_lock(&priv->lock); |
| 1329 | gfar_clean_rx_ring(dev, priv->rx_ring_size); |
| 1330 | |
| 1331 | /* If we are coalescing interrupts, update the timer */ |
| 1332 | /* Otherwise, clear it */ |
| 1333 | if (priv->rxcoalescing) |
| 1334 | gfar_write(&priv->regs->rxic, |
| 1335 | mk_ic_value(priv->rxcount, priv->rxtime)); |
| 1336 | else |
| 1337 | gfar_write(&priv->regs->rxic, 0); |
| 1338 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1339 | spin_unlock(&priv->lock); |
| 1340 | #endif |
| 1341 | |
| 1342 | return IRQ_HANDLED; |
| 1343 | } |
| 1344 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1345 | static inline int gfar_rx_vlan(struct sk_buff *skb, |
| 1346 | struct vlan_group *vlgrp, unsigned short vlctl) |
| 1347 | { |
| 1348 | #ifdef CONFIG_GFAR_NAPI |
| 1349 | return vlan_hwaccel_receive_skb(skb, vlgrp, vlctl); |
| 1350 | #else |
| 1351 | return vlan_hwaccel_rx(skb, vlgrp, vlctl); |
| 1352 | #endif |
| 1353 | } |
| 1354 | |
| 1355 | static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb) |
| 1356 | { |
| 1357 | /* If valid headers were found, and valid sums |
| 1358 | * were verified, then we tell the kernel that no |
| 1359 | * checksumming is necessary. Otherwise, it is */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1360 | if ((fcb->flags & RXFCB_CSUM_MASK) == (RXFCB_CIP | RXFCB_CTU)) |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1361 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
| 1362 | else |
| 1363 | skb->ip_summed = CHECKSUM_NONE; |
| 1364 | } |
| 1365 | |
| 1366 | |
| 1367 | static inline struct rxfcb *gfar_get_fcb(struct sk_buff *skb) |
| 1368 | { |
| 1369 | struct rxfcb *fcb = (struct rxfcb *)skb->data; |
| 1370 | |
| 1371 | /* Remove the FCB from the skb */ |
| 1372 | skb_pull(skb, GMAC_FCB_LEN); |
| 1373 | |
| 1374 | return fcb; |
| 1375 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1376 | |
| 1377 | /* gfar_process_frame() -- handle one incoming packet if skb |
| 1378 | * isn't NULL. */ |
| 1379 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, |
| 1380 | int length) |
| 1381 | { |
| 1382 | struct gfar_private *priv = netdev_priv(dev); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1383 | struct rxfcb *fcb = NULL; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1384 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1385 | if (NULL == skb) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1386 | if (netif_msg_rx_err(priv)) |
| 1387 | printk(KERN_WARNING "%s: Missing skb!!.\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1388 | priv->stats.rx_dropped++; |
| 1389 | priv->extra_stats.rx_skbmissing++; |
| 1390 | } else { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1391 | int ret; |
| 1392 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1393 | /* Prep the skb for the packet */ |
| 1394 | skb_put(skb, length); |
| 1395 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1396 | /* Grab the FCB if there is one */ |
| 1397 | if (gfar_uses_fcb(priv)) |
| 1398 | fcb = gfar_get_fcb(skb); |
| 1399 | |
| 1400 | /* Remove the padded bytes, if there are any */ |
| 1401 | if (priv->padding) |
| 1402 | skb_pull(skb, priv->padding); |
| 1403 | |
| 1404 | if (priv->rx_csum_enable) |
| 1405 | gfar_rx_checksum(skb, fcb); |
| 1406 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1407 | /* Tell the skb what kind of packet this is */ |
| 1408 | skb->protocol = eth_type_trans(skb, dev); |
| 1409 | |
| 1410 | /* Send the packet up the stack */ |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1411 | if (unlikely(priv->vlgrp && (fcb->flags & RXFCB_VLN))) |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1412 | ret = gfar_rx_vlan(skb, priv->vlgrp, fcb->vlctl); |
| 1413 | else |
| 1414 | ret = RECEIVE(skb); |
| 1415 | |
| 1416 | if (NET_RX_DROP == ret) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1417 | priv->extra_stats.kernel_dropped++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1418 | } |
| 1419 | |
| 1420 | return 0; |
| 1421 | } |
| 1422 | |
| 1423 | /* gfar_clean_rx_ring() -- Processes each frame in the rx ring |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1424 | * until the budget/quota has been reached. Returns the number |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1425 | * of frames handled |
| 1426 | */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1427 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1428 | { |
| 1429 | struct rxbd8 *bdp; |
| 1430 | struct sk_buff *skb; |
| 1431 | u16 pkt_len; |
| 1432 | int howmany = 0; |
| 1433 | struct gfar_private *priv = netdev_priv(dev); |
| 1434 | |
| 1435 | /* Get the first full descriptor */ |
| 1436 | bdp = priv->cur_rx; |
| 1437 | |
| 1438 | while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) { |
| 1439 | skb = priv->rx_skbuff[priv->skb_currx]; |
| 1440 | |
| 1441 | if (!(bdp->status & |
| 1442 | (RXBD_LARGE | RXBD_SHORT | RXBD_NONOCTET |
| 1443 | | RXBD_CRCERR | RXBD_OVERRUN | RXBD_TRUNCATED))) { |
| 1444 | /* Increment the number of packets */ |
| 1445 | priv->stats.rx_packets++; |
| 1446 | howmany++; |
| 1447 | |
| 1448 | /* Remove the FCS from the packet length */ |
| 1449 | pkt_len = bdp->length - 4; |
| 1450 | |
| 1451 | gfar_process_frame(dev, skb, pkt_len); |
| 1452 | |
| 1453 | priv->stats.rx_bytes += pkt_len; |
| 1454 | } else { |
| 1455 | count_errors(bdp->status, priv); |
| 1456 | |
| 1457 | if (skb) |
| 1458 | dev_kfree_skb_any(skb); |
| 1459 | |
| 1460 | priv->rx_skbuff[priv->skb_currx] = NULL; |
| 1461 | } |
| 1462 | |
| 1463 | dev->last_rx = jiffies; |
| 1464 | |
| 1465 | /* Clear the status flags for this buffer */ |
| 1466 | bdp->status &= ~RXBD_STATS; |
| 1467 | |
| 1468 | /* Add another skb for the future */ |
| 1469 | skb = gfar_new_skb(dev, bdp); |
| 1470 | priv->rx_skbuff[priv->skb_currx] = skb; |
| 1471 | |
| 1472 | /* Update to the next pointer */ |
| 1473 | if (bdp->status & RXBD_WRAP) |
| 1474 | bdp = priv->rx_bd_base; |
| 1475 | else |
| 1476 | bdp++; |
| 1477 | |
| 1478 | /* update to point at the next skb */ |
| 1479 | priv->skb_currx = |
| 1480 | (priv->skb_currx + |
| 1481 | 1) & RX_RING_MOD_MASK(priv->rx_ring_size); |
| 1482 | |
| 1483 | } |
| 1484 | |
| 1485 | /* Update the current rxbd pointer to be the next one */ |
| 1486 | priv->cur_rx = bdp; |
| 1487 | |
| 1488 | /* If no packets have arrived since the |
| 1489 | * last one we processed, clear the IEVENT RX and |
| 1490 | * BSY bits so that another interrupt won't be |
| 1491 | * generated when we set IMASK */ |
| 1492 | if (bdp->status & RXBD_EMPTY) |
| 1493 | gfar_write(&priv->regs->ievent, IEVENT_RX_MASK); |
| 1494 | |
| 1495 | return howmany; |
| 1496 | } |
| 1497 | |
| 1498 | #ifdef CONFIG_GFAR_NAPI |
| 1499 | static int gfar_poll(struct net_device *dev, int *budget) |
| 1500 | { |
| 1501 | int howmany; |
| 1502 | struct gfar_private *priv = netdev_priv(dev); |
| 1503 | int rx_work_limit = *budget; |
| 1504 | |
| 1505 | if (rx_work_limit > dev->quota) |
| 1506 | rx_work_limit = dev->quota; |
| 1507 | |
| 1508 | howmany = gfar_clean_rx_ring(dev, rx_work_limit); |
| 1509 | |
| 1510 | dev->quota -= howmany; |
| 1511 | rx_work_limit -= howmany; |
| 1512 | *budget -= howmany; |
| 1513 | |
| 1514 | if (rx_work_limit >= 0) { |
| 1515 | netif_rx_complete(dev); |
| 1516 | |
| 1517 | /* Clear the halt bit in RSTAT */ |
| 1518 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); |
| 1519 | |
| 1520 | gfar_write(&priv->regs->imask, IMASK_DEFAULT); |
| 1521 | |
| 1522 | /* If we are coalescing interrupts, update the timer */ |
| 1523 | /* Otherwise, clear it */ |
| 1524 | if (priv->rxcoalescing) |
| 1525 | gfar_write(&priv->regs->rxic, |
| 1526 | mk_ic_value(priv->rxcount, priv->rxtime)); |
| 1527 | else |
| 1528 | gfar_write(&priv->regs->rxic, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1529 | } |
| 1530 | |
| 1531 | return (rx_work_limit < 0) ? 1 : 0; |
| 1532 | } |
| 1533 | #endif |
| 1534 | |
| 1535 | /* The interrupt handler for devices with one interrupt */ |
| 1536 | static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
| 1537 | { |
| 1538 | struct net_device *dev = dev_id; |
| 1539 | struct gfar_private *priv = netdev_priv(dev); |
| 1540 | |
| 1541 | /* Save ievent for future reference */ |
| 1542 | u32 events = gfar_read(&priv->regs->ievent); |
| 1543 | |
| 1544 | /* Clear IEVENT */ |
| 1545 | gfar_write(&priv->regs->ievent, events); |
| 1546 | |
| 1547 | /* Check for reception */ |
| 1548 | if ((events & IEVENT_RXF0) || (events & IEVENT_RXB0)) |
| 1549 | gfar_receive(irq, dev_id, regs); |
| 1550 | |
| 1551 | /* Check for transmit completion */ |
| 1552 | if ((events & IEVENT_TXF) || (events & IEVENT_TXB)) |
| 1553 | gfar_transmit(irq, dev_id, regs); |
| 1554 | |
| 1555 | /* Update error statistics */ |
| 1556 | if (events & IEVENT_TXE) { |
| 1557 | priv->stats.tx_errors++; |
| 1558 | |
| 1559 | if (events & IEVENT_LC) |
| 1560 | priv->stats.tx_window_errors++; |
| 1561 | if (events & IEVENT_CRL) |
| 1562 | priv->stats.tx_aborted_errors++; |
| 1563 | if (events & IEVENT_XFUN) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1564 | if (netif_msg_tx_err(priv)) |
| 1565 | printk(KERN_WARNING "%s: tx underrun. dropped packet\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1566 | priv->stats.tx_dropped++; |
| 1567 | priv->extra_stats.tx_underrun++; |
| 1568 | |
| 1569 | /* Reactivate the Tx Queues */ |
| 1570 | gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); |
| 1571 | } |
| 1572 | } |
| 1573 | if (events & IEVENT_BSY) { |
| 1574 | priv->stats.rx_errors++; |
| 1575 | priv->extra_stats.rx_bsy++; |
| 1576 | |
| 1577 | gfar_receive(irq, dev_id, regs); |
| 1578 | |
| 1579 | #ifndef CONFIG_GFAR_NAPI |
| 1580 | /* Clear the halt bit in RSTAT */ |
| 1581 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); |
| 1582 | #endif |
| 1583 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1584 | if (netif_msg_rx_err(priv)) |
| 1585 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", |
| 1586 | dev->name, |
| 1587 | gfar_read(&priv->regs->rstat)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1588 | } |
| 1589 | if (events & IEVENT_BABR) { |
| 1590 | priv->stats.rx_errors++; |
| 1591 | priv->extra_stats.rx_babr++; |
| 1592 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1593 | if (netif_msg_rx_err(priv)) |
| 1594 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1595 | } |
| 1596 | if (events & IEVENT_EBERR) { |
| 1597 | priv->extra_stats.eberr++; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1598 | if (netif_msg_rx_err(priv)) |
| 1599 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1600 | } |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1601 | if ((events & IEVENT_RXC) && (netif_msg_rx_err(priv))) |
| 1602 | printk(KERN_DEBUG "%s: control frame\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1603 | |
| 1604 | if (events & IEVENT_BABT) { |
| 1605 | priv->extra_stats.tx_babt++; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1606 | if (netif_msg_rx_err(priv)) |
| 1607 | printk(KERN_DEBUG "%s: babt error\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1608 | } |
| 1609 | |
| 1610 | return IRQ_HANDLED; |
| 1611 | } |
| 1612 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1613 | /* Called every time the controller might need to be made |
| 1614 | * aware of new link state. The PHY code conveys this |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1615 | * information through variables in the phydev structure, and this |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1616 | * function converts those variables into the appropriate |
| 1617 | * register values, and can bring down the device if needed. |
| 1618 | */ |
| 1619 | static void adjust_link(struct net_device *dev) |
| 1620 | { |
| 1621 | struct gfar_private *priv = netdev_priv(dev); |
| 1622 | struct gfar *regs = priv->regs; |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1623 | unsigned long flags; |
| 1624 | struct phy_device *phydev = priv->phydev; |
| 1625 | int new_state = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1626 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1627 | spin_lock_irqsave(&priv->lock, flags); |
| 1628 | if (phydev->link) { |
| 1629 | u32 tempval = gfar_read(®s->maccfg2); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1630 | u32 ecntrl = gfar_read(®s->ecntrl); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1631 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1632 | /* Now we make sure that we can be in full duplex mode. |
| 1633 | * If not, we operate in half-duplex mode. */ |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1634 | if (phydev->duplex != priv->oldduplex) { |
| 1635 | new_state = 1; |
| 1636 | if (!(phydev->duplex)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1637 | tempval &= ~(MACCFG2_FULL_DUPLEX); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1638 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1639 | tempval |= MACCFG2_FULL_DUPLEX; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1640 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1641 | priv->oldduplex = phydev->duplex; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1642 | } |
| 1643 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1644 | if (phydev->speed != priv->oldspeed) { |
| 1645 | new_state = 1; |
| 1646 | switch (phydev->speed) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1647 | case 1000: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1648 | tempval = |
| 1649 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1650 | break; |
| 1651 | case 100: |
| 1652 | case 10: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1653 | tempval = |
| 1654 | ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1655 | |
| 1656 | /* Reduced mode distinguishes |
| 1657 | * between 10 and 100 */ |
| 1658 | if (phydev->speed == SPEED_100) |
| 1659 | ecntrl |= ECNTRL_R100; |
| 1660 | else |
| 1661 | ecntrl &= ~(ECNTRL_R100); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1662 | break; |
| 1663 | default: |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1664 | if (netif_msg_link(priv)) |
| 1665 | printk(KERN_WARNING |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1666 | "%s: Ack! Speed (%d) is not 10/100/1000!\n", |
| 1667 | dev->name, phydev->speed); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1668 | break; |
| 1669 | } |
| 1670 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1671 | priv->oldspeed = phydev->speed; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1672 | } |
| 1673 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1674 | gfar_write(®s->maccfg2, tempval); |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1675 | gfar_write(®s->ecntrl, ecntrl); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1676 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1677 | if (!priv->oldlink) { |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1678 | new_state = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1679 | priv->oldlink = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1680 | netif_schedule(dev); |
| 1681 | } |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1682 | } else if (priv->oldlink) { |
| 1683 | new_state = 1; |
| 1684 | priv->oldlink = 0; |
| 1685 | priv->oldspeed = 0; |
| 1686 | priv->oldduplex = -1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1687 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1688 | |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1689 | if (new_state && netif_msg_link(priv)) |
| 1690 | phy_print_status(phydev); |
| 1691 | |
| 1692 | spin_unlock_irqrestore(&priv->lock, flags); |
| 1693 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1694 | |
| 1695 | /* Update the hash table based on the current list of multicast |
| 1696 | * addresses we subscribe to. Also, change the promiscuity of |
| 1697 | * the device based on the flags (this function is called |
| 1698 | * whenever dev->flags is changed */ |
| 1699 | static void gfar_set_multi(struct net_device *dev) |
| 1700 | { |
| 1701 | struct dev_mc_list *mc_ptr; |
| 1702 | struct gfar_private *priv = netdev_priv(dev); |
| 1703 | struct gfar *regs = priv->regs; |
| 1704 | u32 tempval; |
| 1705 | |
| 1706 | if(dev->flags & IFF_PROMISC) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1707 | if (netif_msg_drv(priv)) |
| 1708 | printk(KERN_INFO "%s: Entering promiscuous mode.\n", |
| 1709 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1710 | /* Set RCTRL to PROM */ |
| 1711 | tempval = gfar_read(®s->rctrl); |
| 1712 | tempval |= RCTRL_PROM; |
| 1713 | gfar_write(®s->rctrl, tempval); |
| 1714 | } else { |
| 1715 | /* Set RCTRL to not PROM */ |
| 1716 | tempval = gfar_read(®s->rctrl); |
| 1717 | tempval &= ~(RCTRL_PROM); |
| 1718 | gfar_write(®s->rctrl, tempval); |
| 1719 | } |
| 1720 | |
| 1721 | if(dev->flags & IFF_ALLMULTI) { |
| 1722 | /* Set the hash to rx all multicast frames */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1723 | gfar_write(®s->igaddr0, 0xffffffff); |
| 1724 | gfar_write(®s->igaddr1, 0xffffffff); |
| 1725 | gfar_write(®s->igaddr2, 0xffffffff); |
| 1726 | gfar_write(®s->igaddr3, 0xffffffff); |
| 1727 | gfar_write(®s->igaddr4, 0xffffffff); |
| 1728 | gfar_write(®s->igaddr5, 0xffffffff); |
| 1729 | gfar_write(®s->igaddr6, 0xffffffff); |
| 1730 | gfar_write(®s->igaddr7, 0xffffffff); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1731 | gfar_write(®s->gaddr0, 0xffffffff); |
| 1732 | gfar_write(®s->gaddr1, 0xffffffff); |
| 1733 | gfar_write(®s->gaddr2, 0xffffffff); |
| 1734 | gfar_write(®s->gaddr3, 0xffffffff); |
| 1735 | gfar_write(®s->gaddr4, 0xffffffff); |
| 1736 | gfar_write(®s->gaddr5, 0xffffffff); |
| 1737 | gfar_write(®s->gaddr6, 0xffffffff); |
| 1738 | gfar_write(®s->gaddr7, 0xffffffff); |
| 1739 | } else { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1740 | int em_num; |
| 1741 | int idx; |
| 1742 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1743 | /* zero out the hash */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1744 | gfar_write(®s->igaddr0, 0x0); |
| 1745 | gfar_write(®s->igaddr1, 0x0); |
| 1746 | gfar_write(®s->igaddr2, 0x0); |
| 1747 | gfar_write(®s->igaddr3, 0x0); |
| 1748 | gfar_write(®s->igaddr4, 0x0); |
| 1749 | gfar_write(®s->igaddr5, 0x0); |
| 1750 | gfar_write(®s->igaddr6, 0x0); |
| 1751 | gfar_write(®s->igaddr7, 0x0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1752 | gfar_write(®s->gaddr0, 0x0); |
| 1753 | gfar_write(®s->gaddr1, 0x0); |
| 1754 | gfar_write(®s->gaddr2, 0x0); |
| 1755 | gfar_write(®s->gaddr3, 0x0); |
| 1756 | gfar_write(®s->gaddr4, 0x0); |
| 1757 | gfar_write(®s->gaddr5, 0x0); |
| 1758 | gfar_write(®s->gaddr6, 0x0); |
| 1759 | gfar_write(®s->gaddr7, 0x0); |
| 1760 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1761 | /* If we have extended hash tables, we need to |
| 1762 | * clear the exact match registers to prepare for |
| 1763 | * setting them */ |
| 1764 | if (priv->extended_hash) { |
| 1765 | em_num = GFAR_EM_NUM + 1; |
| 1766 | gfar_clear_exact_match(dev); |
| 1767 | idx = 1; |
| 1768 | } else { |
| 1769 | idx = 0; |
| 1770 | em_num = 0; |
| 1771 | } |
| 1772 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1773 | if(dev->mc_count == 0) |
| 1774 | return; |
| 1775 | |
| 1776 | /* Parse the list, and set the appropriate bits */ |
| 1777 | for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) { |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1778 | if (idx < em_num) { |
| 1779 | gfar_set_mac_for_addr(dev, idx, |
| 1780 | mc_ptr->dmi_addr); |
| 1781 | idx++; |
| 1782 | } else |
| 1783 | gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1784 | } |
| 1785 | } |
| 1786 | |
| 1787 | return; |
| 1788 | } |
| 1789 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1790 | |
| 1791 | /* Clears each of the exact match registers to zero, so they |
| 1792 | * don't interfere with normal reception */ |
| 1793 | static void gfar_clear_exact_match(struct net_device *dev) |
| 1794 | { |
| 1795 | int idx; |
| 1796 | u8 zero_arr[MAC_ADDR_LEN] = {0,0,0,0,0,0}; |
| 1797 | |
| 1798 | for(idx = 1;idx < GFAR_EM_NUM + 1;idx++) |
| 1799 | gfar_set_mac_for_addr(dev, idx, (u8 *)zero_arr); |
| 1800 | } |
| 1801 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1802 | /* Set the appropriate hash bit for the given addr */ |
| 1803 | /* The algorithm works like so: |
| 1804 | * 1) Take the Destination Address (ie the multicast address), and |
| 1805 | * do a CRC on it (little endian), and reverse the bits of the |
| 1806 | * result. |
| 1807 | * 2) Use the 8 most significant bits as a hash into a 256-entry |
| 1808 | * table. The table is controlled through 8 32-bit registers: |
| 1809 | * gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is |
| 1810 | * gaddr7. This means that the 3 most significant bits in the |
| 1811 | * hash index which gaddr register to use, and the 5 other bits |
| 1812 | * indicate which bit (assuming an IBM numbering scheme, which |
| 1813 | * for PowerPC (tm) is usually the case) in the register holds |
| 1814 | * the entry. */ |
| 1815 | static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr) |
| 1816 | { |
| 1817 | u32 tempval; |
| 1818 | struct gfar_private *priv = netdev_priv(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1819 | u32 result = ether_crc(MAC_ADDR_LEN, addr); |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1820 | int width = priv->hash_width; |
| 1821 | u8 whichbit = (result >> (32 - width)) & 0x1f; |
| 1822 | u8 whichreg = result >> (32 - width + 5); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1823 | u32 value = (1 << (31-whichbit)); |
| 1824 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1825 | tempval = gfar_read(priv->hash_regs[whichreg]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1826 | tempval |= value; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1827 | gfar_write(priv->hash_regs[whichreg], tempval); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1828 | |
| 1829 | return; |
| 1830 | } |
| 1831 | |
Andy Fleming | 7f7f531 | 2005-11-11 12:38:59 -0600 | [diff] [blame] | 1832 | |
| 1833 | /* There are multiple MAC Address register pairs on some controllers |
| 1834 | * This function sets the numth pair to a given address |
| 1835 | */ |
| 1836 | static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr) |
| 1837 | { |
| 1838 | struct gfar_private *priv = netdev_priv(dev); |
| 1839 | int idx; |
| 1840 | char tmpbuf[MAC_ADDR_LEN]; |
| 1841 | u32 tempval; |
| 1842 | u32 *macptr = &priv->regs->macstnaddr1; |
| 1843 | |
| 1844 | macptr += num*2; |
| 1845 | |
| 1846 | /* Now copy it into the mac registers backwards, cuz */ |
| 1847 | /* little endian is silly */ |
| 1848 | for (idx = 0; idx < MAC_ADDR_LEN; idx++) |
| 1849 | tmpbuf[MAC_ADDR_LEN - 1 - idx] = addr[idx]; |
| 1850 | |
| 1851 | gfar_write(macptr, *((u32 *) (tmpbuf))); |
| 1852 | |
| 1853 | tempval = *((u32 *) (tmpbuf + 4)); |
| 1854 | |
| 1855 | gfar_write(macptr+1, tempval); |
| 1856 | } |
| 1857 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1858 | /* GFAR error interrupt handler */ |
| 1859 | static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs) |
| 1860 | { |
| 1861 | struct net_device *dev = dev_id; |
| 1862 | struct gfar_private *priv = netdev_priv(dev); |
| 1863 | |
| 1864 | /* Save ievent for future reference */ |
| 1865 | u32 events = gfar_read(&priv->regs->ievent); |
| 1866 | |
| 1867 | /* Clear IEVENT */ |
| 1868 | gfar_write(&priv->regs->ievent, IEVENT_ERR_MASK); |
| 1869 | |
| 1870 | /* Hmm... */ |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1871 | if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv)) |
| 1872 | printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n", |
| 1873 | dev->name, events, gfar_read(&priv->regs->imask)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1874 | |
| 1875 | /* Update the error counters */ |
| 1876 | if (events & IEVENT_TXE) { |
| 1877 | priv->stats.tx_errors++; |
| 1878 | |
| 1879 | if (events & IEVENT_LC) |
| 1880 | priv->stats.tx_window_errors++; |
| 1881 | if (events & IEVENT_CRL) |
| 1882 | priv->stats.tx_aborted_errors++; |
| 1883 | if (events & IEVENT_XFUN) { |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1884 | if (netif_msg_tx_err(priv)) |
| 1885 | printk(KERN_DEBUG "%s: underrun. packet dropped.\n", |
| 1886 | dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1887 | priv->stats.tx_dropped++; |
| 1888 | priv->extra_stats.tx_underrun++; |
| 1889 | |
| 1890 | /* Reactivate the Tx Queues */ |
| 1891 | gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); |
| 1892 | } |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1893 | if (netif_msg_tx_err(priv)) |
| 1894 | printk(KERN_DEBUG "%s: Transmit Error\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1895 | } |
| 1896 | if (events & IEVENT_BSY) { |
| 1897 | priv->stats.rx_errors++; |
| 1898 | priv->extra_stats.rx_bsy++; |
| 1899 | |
| 1900 | gfar_receive(irq, dev_id, regs); |
| 1901 | |
| 1902 | #ifndef CONFIG_GFAR_NAPI |
| 1903 | /* Clear the halt bit in RSTAT */ |
| 1904 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); |
| 1905 | #endif |
| 1906 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1907 | if (netif_msg_rx_err(priv)) |
| 1908 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", |
| 1909 | dev->name, |
| 1910 | gfar_read(&priv->regs->rstat)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1911 | } |
| 1912 | if (events & IEVENT_BABR) { |
| 1913 | priv->stats.rx_errors++; |
| 1914 | priv->extra_stats.rx_babr++; |
| 1915 | |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1916 | if (netif_msg_rx_err(priv)) |
| 1917 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1918 | } |
| 1919 | if (events & IEVENT_EBERR) { |
| 1920 | priv->extra_stats.eberr++; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1921 | if (netif_msg_rx_err(priv)) |
| 1922 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1923 | } |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1924 | if ((events & IEVENT_RXC) && netif_msg_rx_status(priv)) |
| 1925 | if (netif_msg_rx_status(priv)) |
| 1926 | printk(KERN_DEBUG "%s: control frame\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1927 | |
| 1928 | if (events & IEVENT_BABT) { |
| 1929 | priv->extra_stats.tx_babt++; |
Kumar Gala | 0bbaf06 | 2005-06-20 10:54:21 -0500 | [diff] [blame] | 1930 | if (netif_msg_tx_err(priv)) |
| 1931 | printk(KERN_DEBUG "%s: babt error\n", dev->name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1932 | } |
| 1933 | return IRQ_HANDLED; |
| 1934 | } |
| 1935 | |
| 1936 | /* Structure for a device driver */ |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1937 | static struct platform_driver gfar_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1938 | .probe = gfar_probe, |
| 1939 | .remove = gfar_remove, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1940 | .driver = { |
| 1941 | .name = "fsl-gianfar", |
| 1942 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1943 | }; |
| 1944 | |
| 1945 | static int __init gfar_init(void) |
| 1946 | { |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1947 | int err = gfar_mdio_init(); |
| 1948 | |
| 1949 | if (err) |
| 1950 | return err; |
| 1951 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1952 | err = platform_driver_register(&gfar_driver); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1953 | |
| 1954 | if (err) |
| 1955 | gfar_mdio_exit(); |
| 1956 | |
| 1957 | return err; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1958 | } |
| 1959 | |
| 1960 | static void __exit gfar_exit(void) |
| 1961 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 1962 | platform_driver_unregister(&gfar_driver); |
Andy Fleming | bb40dcb | 2005-09-23 22:54:21 -0400 | [diff] [blame] | 1963 | gfar_mdio_exit(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1964 | } |
| 1965 | |
| 1966 | module_init(gfar_init); |
| 1967 | module_exit(gfar_exit); |
| 1968 | |