Andrew Lunn | 4f5e01e | 2014-09-01 19:35:41 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Marvell RD88F6181 A Board descrition |
| 3 | * |
| 4 | * Andrew Lunn <andrew@lunn.ch> |
| 5 | * |
| 6 | * This file is licensed under the terms of the GNU General Public |
| 7 | * License version 2. This program is licensed "as is" without any |
| 8 | * warranty of any kind, whether express or implied. |
| 9 | * |
| 10 | * This file contains the definitions for the board with the A0 or |
| 11 | * higher stepping of the SoC. The ethernet switch does not have a |
| 12 | * "wan" port. |
| 13 | */ |
| 14 | |
| 15 | /dts-v1/; |
| 16 | #include "kirkwood-rd88f6281.dtsi" |
| 17 | |
| 18 | / { |
| 19 | model = "Marvell RD88f6281 Reference design, with A0 or higher SoC"; |
| 20 | compatible = "marvell,rd88f6281-a", "marvell,rd88f6281","marvell,kirkwood-88f6281", "marvell,kirkwood"; |
| 21 | |
Andrew Lunn | 689168a | 2016-04-03 04:03:45 +0200 | [diff] [blame] | 22 | dsa { |
Andrew Lunn | 4f5e01e | 2014-09-01 19:35:41 +0200 | [diff] [blame] | 23 | switch@0 { |
| 24 | reg = <10 0>; /* MDIO address 10, switch 0 in tree */ |
| 25 | }; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | &mdio { |
| 30 | status = "okay"; |
| 31 | |
| 32 | ethphy1: ethernet-phy@11 { |
| 33 | reg = <11>; |
| 34 | }; |
| 35 | }; |
| 36 | |
| 37 | ð1 { |
| 38 | status = "okay"; |
| 39 | |
| 40 | ethernet1-port@0 { |
| 41 | phy-handle = <ðphy1>; |
| 42 | }; |
| 43 | }; |