Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ALSA SoC I2S (McBSP) Audio Layer for TI DAVINCI processor |
| 3 | * |
Vladimir Barinov | d6b5203 | 2008-09-29 23:14:11 +0400 | [diff] [blame] | 4 | * Author: Vladimir Barinov, <vbarinov@embeddedalley.com> |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 5 | * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/device.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/io.h> |
| 17 | #include <linux/clk.h> |
| 18 | |
| 19 | #include <sound/core.h> |
| 20 | #include <sound/pcm.h> |
| 21 | #include <sound/pcm_params.h> |
| 22 | #include <sound/initval.h> |
| 23 | #include <sound/soc.h> |
| 24 | |
| 25 | #include "davinci-pcm.h" |
| 26 | |
| 27 | #define DAVINCI_MCBSP_DRR_REG 0x00 |
| 28 | #define DAVINCI_MCBSP_DXR_REG 0x04 |
| 29 | #define DAVINCI_MCBSP_SPCR_REG 0x08 |
| 30 | #define DAVINCI_MCBSP_RCR_REG 0x0c |
| 31 | #define DAVINCI_MCBSP_XCR_REG 0x10 |
| 32 | #define DAVINCI_MCBSP_SRGR_REG 0x14 |
| 33 | #define DAVINCI_MCBSP_PCR_REG 0x24 |
| 34 | |
| 35 | #define DAVINCI_MCBSP_SPCR_RRST (1 << 0) |
| 36 | #define DAVINCI_MCBSP_SPCR_RINTM(v) ((v) << 4) |
| 37 | #define DAVINCI_MCBSP_SPCR_XRST (1 << 16) |
| 38 | #define DAVINCI_MCBSP_SPCR_XINTM(v) ((v) << 20) |
| 39 | #define DAVINCI_MCBSP_SPCR_GRST (1 << 22) |
| 40 | #define DAVINCI_MCBSP_SPCR_FRST (1 << 23) |
| 41 | #define DAVINCI_MCBSP_SPCR_FREE (1 << 25) |
| 42 | |
| 43 | #define DAVINCI_MCBSP_RCR_RWDLEN1(v) ((v) << 5) |
| 44 | #define DAVINCI_MCBSP_RCR_RFRLEN1(v) ((v) << 8) |
| 45 | #define DAVINCI_MCBSP_RCR_RDATDLY(v) ((v) << 16) |
| 46 | #define DAVINCI_MCBSP_RCR_RWDLEN2(v) ((v) << 21) |
| 47 | |
| 48 | #define DAVINCI_MCBSP_XCR_XWDLEN1(v) ((v) << 5) |
| 49 | #define DAVINCI_MCBSP_XCR_XFRLEN1(v) ((v) << 8) |
| 50 | #define DAVINCI_MCBSP_XCR_XDATDLY(v) ((v) << 16) |
| 51 | #define DAVINCI_MCBSP_XCR_XFIG (1 << 18) |
| 52 | #define DAVINCI_MCBSP_XCR_XWDLEN2(v) ((v) << 21) |
| 53 | |
| 54 | #define DAVINCI_MCBSP_SRGR_FWID(v) ((v) << 8) |
| 55 | #define DAVINCI_MCBSP_SRGR_FPER(v) ((v) << 16) |
| 56 | #define DAVINCI_MCBSP_SRGR_FSGM (1 << 28) |
| 57 | |
| 58 | #define DAVINCI_MCBSP_PCR_CLKRP (1 << 0) |
| 59 | #define DAVINCI_MCBSP_PCR_CLKXP (1 << 1) |
| 60 | #define DAVINCI_MCBSP_PCR_FSRP (1 << 2) |
| 61 | #define DAVINCI_MCBSP_PCR_FSXP (1 << 3) |
Hugo Villeneuve | b402dff | 2008-11-08 13:26:09 -0500 | [diff] [blame] | 62 | #define DAVINCI_MCBSP_PCR_SCLKME (1 << 7) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 63 | #define DAVINCI_MCBSP_PCR_CLKRM (1 << 8) |
| 64 | #define DAVINCI_MCBSP_PCR_CLKXM (1 << 9) |
| 65 | #define DAVINCI_MCBSP_PCR_FSRM (1 << 10) |
| 66 | #define DAVINCI_MCBSP_PCR_FSXM (1 << 11) |
| 67 | |
| 68 | #define MOD_REG_BIT(val, mask, set) do { \ |
| 69 | if (set) { \ |
| 70 | val |= mask; \ |
| 71 | } else { \ |
| 72 | val &= ~mask; \ |
| 73 | } \ |
| 74 | } while (0) |
| 75 | |
| 76 | enum { |
| 77 | DAVINCI_MCBSP_WORD_8 = 0, |
| 78 | DAVINCI_MCBSP_WORD_12, |
| 79 | DAVINCI_MCBSP_WORD_16, |
| 80 | DAVINCI_MCBSP_WORD_20, |
| 81 | DAVINCI_MCBSP_WORD_24, |
| 82 | DAVINCI_MCBSP_WORD_32, |
| 83 | }; |
| 84 | |
| 85 | static struct davinci_pcm_dma_params davinci_i2s_pcm_out = { |
| 86 | .name = "I2S PCM Stereo out", |
| 87 | }; |
| 88 | |
| 89 | static struct davinci_pcm_dma_params davinci_i2s_pcm_in = { |
| 90 | .name = "I2S PCM Stereo in", |
| 91 | }; |
| 92 | |
| 93 | struct davinci_mcbsp_dev { |
| 94 | void __iomem *base; |
| 95 | struct clk *clk; |
| 96 | struct davinci_pcm_dma_params *dma_params[2]; |
| 97 | }; |
| 98 | |
| 99 | static inline void davinci_mcbsp_write_reg(struct davinci_mcbsp_dev *dev, |
| 100 | int reg, u32 val) |
| 101 | { |
| 102 | __raw_writel(val, dev->base + reg); |
| 103 | } |
| 104 | |
| 105 | static inline u32 davinci_mcbsp_read_reg(struct davinci_mcbsp_dev *dev, int reg) |
| 106 | { |
| 107 | return __raw_readl(dev->base + reg); |
| 108 | } |
| 109 | |
| 110 | static void davinci_mcbsp_start(struct snd_pcm_substream *substream) |
| 111 | { |
| 112 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 113 | struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data; |
Naresh Medisetty | fb0ef64 | 2008-11-12 10:26:31 +0530 | [diff] [blame] | 114 | struct snd_soc_device *socdev = rtd->socdev; |
Mark Brown | 87689d5 | 2008-12-02 16:01:14 +0000 | [diff] [blame] | 115 | struct snd_soc_platform *platform = socdev->card->platform; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 116 | u32 w; |
Naresh Medisetty | fb0ef64 | 2008-11-12 10:26:31 +0530 | [diff] [blame] | 117 | int ret; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 118 | |
| 119 | /* Start the sample generator and enable transmitter/receiver */ |
| 120 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 121 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_GRST, 1); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 122 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 123 | |
Naresh Medisetty | fb0ef64 | 2008-11-12 10:26:31 +0530 | [diff] [blame] | 124 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { |
| 125 | /* Stop the DMA to avoid data loss */ |
| 126 | /* while the transmitter is out of reset to handle XSYNCERR */ |
| 127 | if (platform->pcm_ops->trigger) { |
| 128 | ret = platform->pcm_ops->trigger(substream, |
| 129 | SNDRV_PCM_TRIGGER_STOP); |
| 130 | if (ret < 0) |
| 131 | printk(KERN_DEBUG "Playback DMA stop failed\n"); |
| 132 | } |
| 133 | |
| 134 | /* Enable the transmitter */ |
| 135 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 136 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 1); |
| 137 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 138 | |
| 139 | /* wait for any unexpected frame sync error to occur */ |
| 140 | udelay(100); |
| 141 | |
| 142 | /* Disable the transmitter to clear any outstanding XSYNCERR */ |
| 143 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 144 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 0); |
| 145 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 146 | |
| 147 | /* Restart the DMA */ |
| 148 | if (platform->pcm_ops->trigger) { |
| 149 | ret = platform->pcm_ops->trigger(substream, |
| 150 | SNDRV_PCM_TRIGGER_START); |
| 151 | if (ret < 0) |
| 152 | printk(KERN_DEBUG "Playback DMA start failed\n"); |
| 153 | } |
| 154 | /* Enable the transmitter */ |
| 155 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 156 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 1); |
| 157 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 158 | |
| 159 | } else { |
| 160 | |
| 161 | /* Enable the reciever */ |
| 162 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 163 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_RRST, 1); |
| 164 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 165 | } |
| 166 | |
| 167 | |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 168 | /* Start frame sync */ |
| 169 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 170 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_FRST, 1); |
| 171 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 172 | } |
| 173 | |
| 174 | static void davinci_mcbsp_stop(struct snd_pcm_substream *substream) |
| 175 | { |
| 176 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 177 | struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data; |
| 178 | u32 w; |
| 179 | |
| 180 | /* Reset transmitter/receiver and sample rate/frame sync generators */ |
| 181 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 182 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_GRST | |
| 183 | DAVINCI_MCBSP_SPCR_FRST, 0); |
| 184 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
| 185 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_XRST, 0); |
| 186 | else |
| 187 | MOD_REG_BIT(w, DAVINCI_MCBSP_SPCR_RRST, 0); |
| 188 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 189 | } |
| 190 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 191 | static int davinci_i2s_startup(struct snd_pcm_substream *substream, |
| 192 | struct snd_soc_dai *dai) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 193 | { |
| 194 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
Liam Girdwood | 9cb132d | 2008-07-07 16:07:42 +0100 | [diff] [blame] | 195 | struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 196 | struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data; |
| 197 | |
| 198 | cpu_dai->dma_data = dev->dma_params[substream->stream]; |
| 199 | |
| 200 | return 0; |
| 201 | } |
| 202 | |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 203 | #define DEFAULT_BITPERSAMPLE 16 |
| 204 | |
Liam Girdwood | 9cb132d | 2008-07-07 16:07:42 +0100 | [diff] [blame] | 205 | static int davinci_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai, |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 206 | unsigned int fmt) |
| 207 | { |
| 208 | struct davinci_mcbsp_dev *dev = cpu_dai->private_data; |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 209 | unsigned int pcr; |
| 210 | unsigned int srgr; |
| 211 | unsigned int rcr; |
| 212 | unsigned int xcr; |
| 213 | srgr = DAVINCI_MCBSP_SRGR_FSGM | |
| 214 | DAVINCI_MCBSP_SRGR_FPER(DEFAULT_BITPERSAMPLE * 2 - 1) | |
| 215 | DAVINCI_MCBSP_SRGR_FWID(DEFAULT_BITPERSAMPLE - 1); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 216 | |
| 217 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 218 | case SND_SOC_DAIFMT_CBS_CFS: |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 219 | /* cpu is master */ |
| 220 | pcr = DAVINCI_MCBSP_PCR_FSXM | |
| 221 | DAVINCI_MCBSP_PCR_FSRM | |
| 222 | DAVINCI_MCBSP_PCR_CLKXM | |
| 223 | DAVINCI_MCBSP_PCR_CLKRM; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 224 | break; |
Hugo Villeneuve | b402dff | 2008-11-08 13:26:09 -0500 | [diff] [blame] | 225 | case SND_SOC_DAIFMT_CBM_CFS: |
| 226 | /* McBSP CLKR pin is the input for the Sample Rate Generator. |
| 227 | * McBSP FSR and FSX are driven by the Sample Rate Generator. */ |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 228 | pcr = DAVINCI_MCBSP_PCR_SCLKME | |
| 229 | DAVINCI_MCBSP_PCR_FSXM | |
| 230 | DAVINCI_MCBSP_PCR_FSRM; |
Hugo Villeneuve | b402dff | 2008-11-08 13:26:09 -0500 | [diff] [blame] | 231 | break; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 232 | case SND_SOC_DAIFMT_CBM_CFM: |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 233 | /* codec is master */ |
| 234 | pcr = 0; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 235 | break; |
| 236 | default: |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 237 | printk(KERN_ERR "%s:bad master\n", __func__); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 238 | return -EINVAL; |
| 239 | } |
| 240 | |
Troy Kisky | 69ab820 | 2008-12-18 12:36:44 -0700 | [diff] [blame] | 241 | rcr = DAVINCI_MCBSP_RCR_RFRLEN1(1); |
| 242 | xcr = DAVINCI_MCBSP_XCR_XFIG | DAVINCI_MCBSP_XCR_XFRLEN1(1); |
| 243 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
Troy Kisky | 07d8d9d | 2008-12-19 13:05:24 -0700 | [diff] [blame] | 244 | case SND_SOC_DAIFMT_DSP_B: |
Troy Kisky | 69ab820 | 2008-12-18 12:36:44 -0700 | [diff] [blame] | 245 | break; |
| 246 | case SND_SOC_DAIFMT_I2S: |
Troy Kisky | 07d8d9d | 2008-12-19 13:05:24 -0700 | [diff] [blame] | 247 | /* Davinci doesn't support TRUE I2S, but some codecs will have |
| 248 | * the left and right channels contiguous. This allows |
| 249 | * dsp_a mode to be used with an inverted normal frame clk. |
| 250 | * If your codec is master and does not have contiguous |
| 251 | * channels, then you will have sound on only one channel. |
| 252 | * Try using a different mode, or codec as slave. |
| 253 | * |
| 254 | * The TLV320AIC33 is an example of a codec where this works. |
| 255 | * It has a variable bit clock frequency allowing it to have |
| 256 | * valid data on every bit clock. |
| 257 | * |
| 258 | * The TLV320AIC23 is an example of a codec where this does not |
| 259 | * work. It has a fixed bit clock frequency with progressively |
| 260 | * more empty bit clock slots between channels as the sample |
| 261 | * rate is lowered. |
| 262 | */ |
| 263 | fmt ^= SND_SOC_DAIFMT_NB_IF; |
| 264 | case SND_SOC_DAIFMT_DSP_A: |
Troy Kisky | 69ab820 | 2008-12-18 12:36:44 -0700 | [diff] [blame] | 265 | rcr |= DAVINCI_MCBSP_RCR_RDATDLY(1); |
| 266 | xcr |= DAVINCI_MCBSP_XCR_XDATDLY(1); |
| 267 | break; |
| 268 | default: |
| 269 | printk(KERN_ERR "%s:bad format\n", __func__); |
| 270 | return -EINVAL; |
| 271 | } |
| 272 | |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 273 | switch (fmt & SND_SOC_DAIFMT_INV_MASK) { |
Troy Kisky | 9e03162 | 2008-12-19 13:05:23 -0700 | [diff] [blame^] | 274 | case SND_SOC_DAIFMT_NB_NF: |
Troy Kisky | 664b4af | 2008-12-18 12:36:41 -0700 | [diff] [blame] | 275 | /* CLKRP Receive clock polarity, |
| 276 | * 1 - sampled on rising edge of CLKR |
| 277 | * valid on rising edge |
| 278 | * CLKXP Transmit clock polarity, |
| 279 | * 1 - clocked on falling edge of CLKX |
| 280 | * valid on rising edge |
| 281 | * FSRP Receive frame sync pol, 0 - active high |
| 282 | * FSXP Transmit frame sync pol, 0 - active high |
| 283 | */ |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 284 | pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 285 | break; |
Troy Kisky | 9e03162 | 2008-12-19 13:05:23 -0700 | [diff] [blame^] | 286 | case SND_SOC_DAIFMT_IB_IF: |
Troy Kisky | 664b4af | 2008-12-18 12:36:41 -0700 | [diff] [blame] | 287 | /* CLKRP Receive clock polarity, |
| 288 | * 0 - sampled on falling edge of CLKR |
| 289 | * valid on falling edge |
| 290 | * CLKXP Transmit clock polarity, |
| 291 | * 0 - clocked on rising edge of CLKX |
| 292 | * valid on falling edge |
| 293 | * FSRP Receive frame sync pol, 1 - active low |
| 294 | * FSXP Transmit frame sync pol, 1 - active low |
| 295 | */ |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 296 | pcr |= (DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 297 | break; |
Troy Kisky | 9e03162 | 2008-12-19 13:05:23 -0700 | [diff] [blame^] | 298 | case SND_SOC_DAIFMT_NB_IF: |
Troy Kisky | 664b4af | 2008-12-18 12:36:41 -0700 | [diff] [blame] | 299 | /* CLKRP Receive clock polarity, |
| 300 | * 1 - sampled on rising edge of CLKR |
| 301 | * valid on rising edge |
| 302 | * CLKXP Transmit clock polarity, |
| 303 | * 1 - clocked on falling edge of CLKX |
| 304 | * valid on rising edge |
| 305 | * FSRP Receive frame sync pol, 1 - active low |
| 306 | * FSXP Transmit frame sync pol, 1 - active low |
| 307 | */ |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 308 | pcr |= (DAVINCI_MCBSP_PCR_CLKXP | DAVINCI_MCBSP_PCR_CLKRP | |
| 309 | DAVINCI_MCBSP_PCR_FSXP | DAVINCI_MCBSP_PCR_FSRP); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 310 | break; |
Troy Kisky | 9e03162 | 2008-12-19 13:05:23 -0700 | [diff] [blame^] | 311 | case SND_SOC_DAIFMT_IB_NF: |
Troy Kisky | 664b4af | 2008-12-18 12:36:41 -0700 | [diff] [blame] | 312 | /* CLKRP Receive clock polarity, |
| 313 | * 0 - sampled on falling edge of CLKR |
| 314 | * valid on falling edge |
| 315 | * CLKXP Transmit clock polarity, |
| 316 | * 0 - clocked on rising edge of CLKX |
| 317 | * valid on falling edge |
| 318 | * FSRP Receive frame sync pol, 0 - active high |
| 319 | * FSXP Transmit frame sync pol, 0 - active high |
| 320 | */ |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 321 | break; |
| 322 | default: |
| 323 | return -EINVAL; |
| 324 | } |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 325 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, srgr); |
| 326 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_PCR_REG, pcr); |
| 327 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG, rcr); |
| 328 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG, xcr); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | static int davinci_i2s_hw_params(struct snd_pcm_substream *substream, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 333 | struct snd_pcm_hw_params *params, |
| 334 | struct snd_soc_dai *dai) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 335 | { |
| 336 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 337 | struct davinci_pcm_dma_params *dma_params = rtd->dai->cpu_dai->dma_data; |
| 338 | struct davinci_mcbsp_dev *dev = rtd->dai->cpu_dai->private_data; |
| 339 | struct snd_interval *i = NULL; |
| 340 | int mcbsp_word_length; |
| 341 | u32 w; |
| 342 | |
| 343 | /* general line settings */ |
Naresh Medisetty | cb6e206 | 2008-11-18 11:01:03 +0530 | [diff] [blame] | 344 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_SPCR_REG); |
| 345 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 346 | w |= DAVINCI_MCBSP_SPCR_RINTM(3) | DAVINCI_MCBSP_SPCR_FREE; |
| 347 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 348 | } else { |
| 349 | w |= DAVINCI_MCBSP_SPCR_XINTM(3) | DAVINCI_MCBSP_SPCR_FREE; |
| 350 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SPCR_REG, w); |
| 351 | } |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 352 | |
| 353 | i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS); |
Troy Kisky | 21903c1 | 2008-12-18 12:36:43 -0700 | [diff] [blame] | 354 | w = DAVINCI_MCBSP_SRGR_FSGM; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 355 | MOD_REG_BIT(w, DAVINCI_MCBSP_SRGR_FWID(snd_interval_value(i) - 1), 1); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 356 | |
| 357 | i = hw_param_interval(params, SNDRV_PCM_HW_PARAM_FRAME_BITS); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 358 | MOD_REG_BIT(w, DAVINCI_MCBSP_SRGR_FPER(snd_interval_value(i) - 1), 1); |
| 359 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_SRGR_REG, w); |
| 360 | |
| 361 | /* Determine xfer data type */ |
| 362 | switch (params_format(params)) { |
| 363 | case SNDRV_PCM_FORMAT_S8: |
| 364 | dma_params->data_type = 1; |
| 365 | mcbsp_word_length = DAVINCI_MCBSP_WORD_8; |
| 366 | break; |
| 367 | case SNDRV_PCM_FORMAT_S16_LE: |
| 368 | dma_params->data_type = 2; |
| 369 | mcbsp_word_length = DAVINCI_MCBSP_WORD_16; |
| 370 | break; |
| 371 | case SNDRV_PCM_FORMAT_S32_LE: |
| 372 | dma_params->data_type = 4; |
| 373 | mcbsp_word_length = DAVINCI_MCBSP_WORD_32; |
| 374 | break; |
| 375 | default: |
Jean Delvare | 9b6e12e | 2008-08-26 15:47:55 +0200 | [diff] [blame] | 376 | printk(KERN_WARNING "davinci-i2s: unsupported PCM format\n"); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 377 | return -EINVAL; |
| 378 | } |
| 379 | |
Naresh Medisetty | cb6e206 | 2008-11-18 11:01:03 +0530 | [diff] [blame] | 380 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
| 381 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_RCR_REG); |
| 382 | MOD_REG_BIT(w, DAVINCI_MCBSP_RCR_RWDLEN1(mcbsp_word_length) | |
| 383 | DAVINCI_MCBSP_RCR_RWDLEN2(mcbsp_word_length), 1); |
| 384 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_RCR_REG, w); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 385 | |
Naresh Medisetty | cb6e206 | 2008-11-18 11:01:03 +0530 | [diff] [blame] | 386 | } else { |
| 387 | w = davinci_mcbsp_read_reg(dev, DAVINCI_MCBSP_XCR_REG); |
| 388 | MOD_REG_BIT(w, DAVINCI_MCBSP_XCR_XWDLEN1(mcbsp_word_length) | |
| 389 | DAVINCI_MCBSP_XCR_XWDLEN2(mcbsp_word_length), 1); |
| 390 | davinci_mcbsp_write_reg(dev, DAVINCI_MCBSP_XCR_REG, w); |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 391 | |
Naresh Medisetty | cb6e206 | 2008-11-18 11:01:03 +0530 | [diff] [blame] | 392 | } |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 393 | return 0; |
| 394 | } |
| 395 | |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 396 | static int davinci_i2s_trigger(struct snd_pcm_substream *substream, int cmd, |
| 397 | struct snd_soc_dai *dai) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 398 | { |
| 399 | int ret = 0; |
| 400 | |
| 401 | switch (cmd) { |
| 402 | case SNDRV_PCM_TRIGGER_START: |
| 403 | case SNDRV_PCM_TRIGGER_RESUME: |
| 404 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: |
| 405 | davinci_mcbsp_start(substream); |
| 406 | break; |
| 407 | case SNDRV_PCM_TRIGGER_STOP: |
| 408 | case SNDRV_PCM_TRIGGER_SUSPEND: |
| 409 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: |
| 410 | davinci_mcbsp_stop(substream); |
| 411 | break; |
| 412 | default: |
| 413 | ret = -EINVAL; |
| 414 | } |
| 415 | |
| 416 | return ret; |
| 417 | } |
| 418 | |
Mark Brown | bdb9287 | 2008-06-11 13:47:10 +0100 | [diff] [blame] | 419 | static int davinci_i2s_probe(struct platform_device *pdev, |
Liam Girdwood | 9cb132d | 2008-07-07 16:07:42 +0100 | [diff] [blame] | 420 | struct snd_soc_dai *dai) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 421 | { |
| 422 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
Mark Brown | 8750654 | 2008-11-18 20:50:34 +0000 | [diff] [blame] | 423 | struct snd_soc_card *card = socdev->card; |
| 424 | struct snd_soc_dai *cpu_dai = card->dai_link[pdev->id].cpu_dai; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 425 | struct davinci_mcbsp_dev *dev; |
| 426 | struct resource *mem, *ioarea; |
| 427 | struct evm_snd_platform_data *pdata; |
| 428 | int ret; |
| 429 | |
| 430 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 431 | if (!mem) { |
| 432 | dev_err(&pdev->dev, "no mem resource?\n"); |
| 433 | return -ENODEV; |
| 434 | } |
| 435 | |
| 436 | ioarea = request_mem_region(mem->start, (mem->end - mem->start) + 1, |
| 437 | pdev->name); |
| 438 | if (!ioarea) { |
| 439 | dev_err(&pdev->dev, "McBSP region already claimed\n"); |
| 440 | return -EBUSY; |
| 441 | } |
| 442 | |
| 443 | dev = kzalloc(sizeof(struct davinci_mcbsp_dev), GFP_KERNEL); |
| 444 | if (!dev) { |
| 445 | ret = -ENOMEM; |
| 446 | goto err_release_region; |
| 447 | } |
| 448 | |
| 449 | cpu_dai->private_data = dev; |
| 450 | |
| 451 | dev->clk = clk_get(&pdev->dev, "McBSPCLK"); |
| 452 | if (IS_ERR(dev->clk)) { |
| 453 | ret = -ENODEV; |
| 454 | goto err_free_mem; |
| 455 | } |
| 456 | clk_enable(dev->clk); |
| 457 | |
| 458 | dev->base = (void __iomem *)IO_ADDRESS(mem->start); |
| 459 | pdata = pdev->dev.platform_data; |
| 460 | |
| 461 | dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK] = &davinci_i2s_pcm_out; |
| 462 | dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]->channel = pdata->tx_dma_ch; |
| 463 | dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK]->dma_addr = |
| 464 | (dma_addr_t)(io_v2p(dev->base) + DAVINCI_MCBSP_DXR_REG); |
| 465 | |
| 466 | dev->dma_params[SNDRV_PCM_STREAM_CAPTURE] = &davinci_i2s_pcm_in; |
| 467 | dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]->channel = pdata->rx_dma_ch; |
| 468 | dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]->dma_addr = |
| 469 | (dma_addr_t)(io_v2p(dev->base) + DAVINCI_MCBSP_DRR_REG); |
| 470 | |
| 471 | return 0; |
| 472 | |
| 473 | err_free_mem: |
| 474 | kfree(dev); |
| 475 | err_release_region: |
| 476 | release_mem_region(mem->start, (mem->end - mem->start) + 1); |
| 477 | |
| 478 | return ret; |
| 479 | } |
| 480 | |
Mark Brown | bdb9287 | 2008-06-11 13:47:10 +0100 | [diff] [blame] | 481 | static void davinci_i2s_remove(struct platform_device *pdev, |
Liam Girdwood | 9cb132d | 2008-07-07 16:07:42 +0100 | [diff] [blame] | 482 | struct snd_soc_dai *dai) |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 483 | { |
| 484 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
Mark Brown | 8750654 | 2008-11-18 20:50:34 +0000 | [diff] [blame] | 485 | struct snd_soc_card *card = socdev->card; |
| 486 | struct snd_soc_dai *cpu_dai = card->dai_link[pdev->id].cpu_dai; |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 487 | struct davinci_mcbsp_dev *dev = cpu_dai->private_data; |
| 488 | struct resource *mem; |
| 489 | |
| 490 | clk_disable(dev->clk); |
| 491 | clk_put(dev->clk); |
| 492 | dev->clk = NULL; |
| 493 | |
| 494 | kfree(dev); |
| 495 | |
| 496 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 497 | release_mem_region(mem->start, (mem->end - mem->start) + 1); |
| 498 | } |
| 499 | |
| 500 | #define DAVINCI_I2S_RATES SNDRV_PCM_RATE_8000_96000 |
| 501 | |
Liam Girdwood | 9cb132d | 2008-07-07 16:07:42 +0100 | [diff] [blame] | 502 | struct snd_soc_dai davinci_i2s_dai = { |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 503 | .name = "davinci-i2s", |
| 504 | .id = 0, |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 505 | .probe = davinci_i2s_probe, |
| 506 | .remove = davinci_i2s_remove, |
| 507 | .playback = { |
| 508 | .channels_min = 2, |
| 509 | .channels_max = 2, |
| 510 | .rates = DAVINCI_I2S_RATES, |
| 511 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, |
| 512 | .capture = { |
| 513 | .channels_min = 2, |
| 514 | .channels_max = 2, |
| 515 | .rates = DAVINCI_I2S_RATES, |
| 516 | .formats = SNDRV_PCM_FMTBIT_S16_LE,}, |
| 517 | .ops = { |
| 518 | .startup = davinci_i2s_startup, |
| 519 | .trigger = davinci_i2s_trigger, |
Mark Brown | dee89c4 | 2008-11-18 22:11:38 +0000 | [diff] [blame] | 520 | .hw_params = davinci_i2s_hw_params, |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 521 | .set_fmt = davinci_i2s_set_dai_fmt, |
| 522 | }, |
| 523 | }; |
| 524 | EXPORT_SYMBOL_GPL(davinci_i2s_dai); |
| 525 | |
Takashi Iwai | c9b3a40 | 2008-12-10 07:47:22 +0100 | [diff] [blame] | 526 | static int __init davinci_i2s_init(void) |
Mark Brown | 3f4b783 | 2008-12-03 19:26:35 +0000 | [diff] [blame] | 527 | { |
| 528 | return snd_soc_register_dai(&davinci_i2s_dai); |
| 529 | } |
| 530 | module_init(davinci_i2s_init); |
| 531 | |
| 532 | static void __exit davinci_i2s_exit(void) |
| 533 | { |
| 534 | snd_soc_unregister_dai(&davinci_i2s_dai); |
| 535 | } |
| 536 | module_exit(davinci_i2s_exit); |
| 537 | |
Vladimir Barinov | 310355c | 2008-02-18 11:40:22 +0100 | [diff] [blame] | 538 | MODULE_AUTHOR("Vladimir Barinov"); |
| 539 | MODULE_DESCRIPTION("TI DAVINCI I2S (McBSP) SoC Interface"); |
| 540 | MODULE_LICENSE("GPL"); |