Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2 Power Management Routines |
| 3 | * |
| 4 | * Copyright (C) 2005 Texas Instruments, Inc. |
| 5 | * Copyright (C) 2006-2008 Nokia Corporation |
| 6 | * |
| 7 | * Written by: |
| 8 | * Richard Woodruff <r-woodruff2@ti.com> |
| 9 | * Tony Lindgren |
| 10 | * Juha Yrjola |
| 11 | * Amit Kucheria <amit.kucheria@nokia.com> |
| 12 | * Igor Stoppa <igor.stoppa@nokia.com> |
| 13 | * |
| 14 | * Based on pm.c for omap1 |
| 15 | * |
| 16 | * This program is free software; you can redistribute it and/or modify |
| 17 | * it under the terms of the GNU General Public License version 2 as |
| 18 | * published by the Free Software Foundation. |
| 19 | */ |
| 20 | |
| 21 | #include <linux/suspend.h> |
| 22 | #include <linux/sched.h> |
| 23 | #include <linux/proc_fs.h> |
| 24 | #include <linux/interrupt.h> |
| 25 | #include <linux/sysfs.h> |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/delay.h> |
Rajendra Nayak | ed1ebc4 | 2012-04-27 15:59:32 +0530 | [diff] [blame] | 28 | #include <linux/clk-provider.h> |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 29 | #include <linux/irq.h> |
| 30 | #include <linux/time.h> |
| 31 | #include <linux/gpio.h> |
Tony Lindgren | 4b25408 | 2012-08-30 15:37:24 -0700 | [diff] [blame] | 32 | #include <linux/platform_data/gpio-omap.h> |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 33 | |
Tony Lindgren | bf027ca | 2012-10-29 13:54:06 -0700 | [diff] [blame] | 34 | #include <asm/fncpy.h> |
| 35 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 36 | #include <asm/mach/time.h> |
| 37 | #include <asm/mach/irq.h> |
| 38 | #include <asm/mach-types.h> |
David Howells | 9f97da7 | 2012-03-28 18:30:01 +0100 | [diff] [blame] | 39 | #include <asm/system_misc.h> |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 40 | |
Tony Lindgren | 45c3eb7 | 2012-11-30 08:41:50 -0800 | [diff] [blame] | 41 | #include <linux/omap-dma.h> |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 42 | |
Tony Lindgren | e4c060d | 2012-10-05 13:25:59 -0700 | [diff] [blame] | 43 | #include "soc.h" |
Tony Lindgren | 4e65331 | 2011-11-10 22:45:17 +0100 | [diff] [blame] | 44 | #include "common.h" |
Paul Walmsley | a135eaa | 2012-09-27 10:33:34 -0600 | [diff] [blame] | 45 | #include "clock.h" |
Paul Walmsley | 139563a | 2012-10-21 01:01:10 -0600 | [diff] [blame] | 46 | #include "prm2xxx.h" |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 47 | #include "prm-regbits-24xx.h" |
Paul Walmsley | ff4ae5d | 2012-10-21 01:01:11 -0600 | [diff] [blame] | 48 | #include "cm2xxx.h" |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 49 | #include "cm-regbits-24xx.h" |
| 50 | #include "sdrc.h" |
Tony Lindgren | bf027ca | 2012-10-29 13:54:06 -0700 | [diff] [blame] | 51 | #include "sram.h" |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 52 | #include "pm.h" |
Paul Walmsley | 4814ced | 2010-10-08 11:40:20 -0600 | [diff] [blame] | 53 | #include "control.h" |
Paul Walmsley | 72e06d0 | 2010-12-21 21:05:16 -0700 | [diff] [blame] | 54 | #include "powerdomain.h" |
Paul Walmsley | 1540f214 | 2010-12-21 21:05:15 -0700 | [diff] [blame] | 55 | #include "clockdomain.h" |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 56 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 57 | static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, |
| 58 | void __iomem *sdrc_power); |
| 59 | |
Paul Walmsley | 369d561 | 2010-01-26 20:13:01 -0700 | [diff] [blame] | 60 | static struct powerdomain *mpu_pwrdm, *core_pwrdm; |
| 61 | static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 62 | |
| 63 | static struct clk *osc_ck, *emul_ck; |
| 64 | |
Paul Walmsley | 1416408 | 2012-02-02 02:30:50 -0700 | [diff] [blame] | 65 | static int omap2_enter_full_retention(void) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 66 | { |
| 67 | u32 l; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 68 | |
| 69 | /* There is 1 reference hold for all children of the oscillator |
| 70 | * clock, the following will remove it. If no one else uses the |
| 71 | * oscillator itself it will be disabled if/when we enter retention |
| 72 | * mode. |
| 73 | */ |
| 74 | clk_disable(osc_ck); |
| 75 | |
| 76 | /* Clear old wake-up events */ |
| 77 | /* REVISIT: These write to reserved bits? */ |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 78 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); |
| 79 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); |
| 80 | omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 81 | |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 82 | pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 83 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); |
| 84 | |
| 85 | /* Workaround to kill USB */ |
| 86 | l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL; |
| 87 | omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0); |
| 88 | |
Paul Walmsley | 72e06d0 | 2010-12-21 21:05:16 -0700 | [diff] [blame] | 89 | omap2_gpio_prepare_for_idle(0); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 90 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 91 | /* One last check for pending IRQs to avoid extra latency due |
| 92 | * to sleeping unnecessarily. */ |
Jouni Hogander | 9443453 | 2009-02-03 15:49:04 -0800 | [diff] [blame] | 93 | if (omap_irq_pending()) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 94 | goto no_sleep; |
| 95 | |
| 96 | /* Jump to SRAM suspend code */ |
| 97 | omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL), |
| 98 | OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL), |
| 99 | OMAP_SDRC_REGADDR(SDRC_POWER)); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 100 | |
Kevin Hilman | 4af4016 | 2009-02-04 10:51:40 -0800 | [diff] [blame] | 101 | no_sleep: |
Kevin Hilman | 43ffcd9 | 2009-01-27 11:09:24 -0800 | [diff] [blame] | 102 | omap2_gpio_resume_after_idle(); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 103 | |
| 104 | clk_enable(osc_ck); |
| 105 | |
| 106 | /* clear CORE wake-up events */ |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 107 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); |
| 108 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 109 | |
| 110 | /* wakeup domain events - bit 1: GPT1, bit5 GPIO */ |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 111 | omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, 0x4 | 0x1); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 112 | |
| 113 | /* MPU domain wake events */ |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 114 | omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, |
| 115 | 0x1); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 116 | |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 117 | omap2xxx_prm_clear_mod_irqs(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET, |
| 118 | 0x20); |
Paul Walmsley | 1416408 | 2012-02-02 02:30:50 -0700 | [diff] [blame] | 119 | |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 120 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); |
| 121 | pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_ON); |
| 122 | |
Paul Walmsley | 1416408 | 2012-02-02 02:30:50 -0700 | [diff] [blame] | 123 | return 0; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 124 | } |
| 125 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 126 | static int sti_console_enabled; |
| 127 | |
| 128 | static int omap2_allow_mpu_retention(void) |
| 129 | { |
Tero Kristo | cd6e9db | 2013-10-11 19:15:31 +0300 | [diff] [blame] | 130 | if (!omap2xxx_cm_mpu_retention_allowed()) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 131 | return 0; |
| 132 | if (sti_console_enabled) |
| 133 | return 0; |
| 134 | |
| 135 | return 1; |
| 136 | } |
| 137 | |
| 138 | static void omap2_enter_mpu_retention(void) |
| 139 | { |
Paul Walmsley | 088e880 | 2012-12-30 10:15:48 -0700 | [diff] [blame] | 140 | const int zero = 0; |
| 141 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 142 | /* The peripherals seem not to be able to wake up the MPU when |
| 143 | * it is in retention mode. */ |
| 144 | if (omap2_allow_mpu_retention()) { |
| 145 | /* REVISIT: These write to reserved bits? */ |
Tero Kristo | 6bdc4b4 | 2014-02-26 15:31:05 +0200 | [diff] [blame] | 146 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); |
| 147 | omap2xxx_prm_clear_mod_irqs(CORE_MOD, OMAP24XX_PM_WKST2, ~0); |
| 148 | omap2xxx_prm_clear_mod_irqs(WKUP_MOD, PM_WKST, ~0); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 149 | |
| 150 | /* Try to enter MPU retention */ |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 151 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET); |
| 152 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 153 | } else { |
| 154 | /* Block MPU retention */ |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 155 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 156 | } |
| 157 | |
Paul Walmsley | 088e880 | 2012-12-30 10:15:48 -0700 | [diff] [blame] | 158 | /* WFI */ |
| 159 | asm("mcr p15, 0, %0, c7, c0, 4" : : "r" (zero) : "memory", "cc"); |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 160 | |
| 161 | pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | static int omap2_can_sleep(void) |
| 165 | { |
Tero Kristo | cd6e9db | 2013-10-11 19:15:31 +0300 | [diff] [blame] | 166 | if (omap2xxx_cm_fclks_active()) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 167 | return 0; |
Rajendra Nayak | ed1ebc4 | 2012-04-27 15:59:32 +0530 | [diff] [blame] | 168 | if (__clk_is_enabled(osc_ck)) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 169 | return 0; |
| 170 | if (omap_dma_running()) |
| 171 | return 0; |
| 172 | |
| 173 | return 1; |
| 174 | } |
| 175 | |
| 176 | static void omap2_pm_idle(void) |
| 177 | { |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 178 | if (!omap2_can_sleep()) { |
Jouni Hogander | 9443453 | 2009-02-03 15:49:04 -0800 | [diff] [blame] | 179 | if (omap_irq_pending()) |
Santosh Shilimkar | 6b85638 | 2013-02-11 19:29:45 +0530 | [diff] [blame] | 180 | return; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 181 | omap2_enter_mpu_retention(); |
Santosh Shilimkar | 6b85638 | 2013-02-11 19:29:45 +0530 | [diff] [blame] | 182 | return; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 183 | } |
| 184 | |
Jouni Hogander | 9443453 | 2009-02-03 15:49:04 -0800 | [diff] [blame] | 185 | if (omap_irq_pending()) |
Santosh Shilimkar | 6b85638 | 2013-02-11 19:29:45 +0530 | [diff] [blame] | 186 | return; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 187 | |
| 188 | omap2_enter_full_retention(); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 189 | } |
| 190 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 191 | static void __init prcm_setup_regs(void) |
| 192 | { |
| 193 | int i, num_mem_banks; |
| 194 | struct powerdomain *pwrdm; |
| 195 | |
Paul Walmsley | 4ef70c0 | 2011-02-25 15:39:30 -0700 | [diff] [blame] | 196 | /* |
| 197 | * Enable autoidle |
| 198 | * XXX This should be handled by hwmod code or PRCM init code |
| 199 | */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 200 | omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD, |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 201 | OMAP2_PRCM_SYSCONFIG_OFFSET); |
| 202 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 203 | /* |
| 204 | * Set CORE powerdomain memory banks to retain their contents |
| 205 | * during RETENTION |
| 206 | */ |
| 207 | num_mem_banks = pwrdm_get_mem_bank_count(core_pwrdm); |
| 208 | for (i = 0; i < num_mem_banks; i++) |
| 209 | pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET); |
| 210 | |
Paul Walmsley | f653b29 | 2013-01-26 00:58:14 -0700 | [diff] [blame] | 211 | pwrdm_set_logic_retst(core_pwrdm, PWRDM_POWER_RET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 212 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 213 | pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 214 | |
| 215 | /* Force-power down DSP, GFX powerdomains */ |
| 216 | |
| 217 | pwrdm = clkdm_get_pwrdm(dsp_clkdm); |
| 218 | pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 219 | |
| 220 | pwrdm = clkdm_get_pwrdm(gfx_clkdm); |
| 221 | pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 222 | |
Paul Walmsley | 51d070a | 2011-01-27 02:52:55 -0700 | [diff] [blame] | 223 | /* Enable hardware-supervised idle for all clkdms */ |
Paul Walmsley | 92206fd | 2012-02-02 02:38:50 -0700 | [diff] [blame] | 224 | clkdm_for_each(omap_pm_clkdms_setup, NULL); |
Paul Walmsley | 369d561 | 2010-01-26 20:13:01 -0700 | [diff] [blame] | 225 | clkdm_add_wkdep(mpu_clkdm, wkup_clkdm); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 226 | |
Dave Gerlach | 2e4b62d | 2014-05-12 13:33:21 -0500 | [diff] [blame] | 227 | omap_common_suspend_init(omap2_enter_full_retention); |
Paul Walmsley | 1416408 | 2012-02-02 02:30:50 -0700 | [diff] [blame] | 228 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 229 | /* REVISIT: Configure number of 32 kHz clock cycles for sys_clk |
| 230 | * stabilisation */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 231 | omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, |
| 232 | OMAP2_PRCM_CLKSSETUP_OFFSET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 233 | |
| 234 | /* Configure automatic voltage transition */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 235 | omap2_prm_write_mod_reg(2 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD, |
| 236 | OMAP2_PRCM_VOLTSETUP_OFFSET); |
| 237 | omap2_prm_write_mod_reg(OMAP24XX_AUTO_EXTVOLT_MASK | |
| 238 | (0x1 << OMAP24XX_SETOFF_LEVEL_SHIFT) | |
| 239 | OMAP24XX_MEMRETCTRL_MASK | |
| 240 | (0x1 << OMAP24XX_SETRET_LEVEL_SHIFT) | |
| 241 | (0x0 << OMAP24XX_VOLT_LEVEL_SHIFT), |
| 242 | OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 243 | |
| 244 | /* Enable wake-up events */ |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 245 | omap2_prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK, |
| 246 | WKUP_MOD, PM_WKEN); |
Tero Kristo | 944ee5d | 2014-02-20 19:09:18 +0200 | [diff] [blame] | 247 | |
| 248 | /* Enable SYS_CLKEN control when all domains idle */ |
| 249 | omap2_prm_set_mod_reg_bits(OMAP_AUTOEXTCLKMODE_MASK, OMAP24XX_GR_MOD, |
| 250 | OMAP2_PRCM_CLKSRC_CTRL_OFFSET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 251 | } |
| 252 | |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 253 | int __init omap2_pm_init(void) |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 254 | { |
| 255 | u32 l; |
| 256 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 257 | printk(KERN_INFO "Power Management for OMAP2 initializing\n"); |
Paul Walmsley | c4d7e58 | 2010-12-21 21:05:14 -0700 | [diff] [blame] | 258 | l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 259 | printk(KERN_INFO "PRCM revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f); |
| 260 | |
Paul Walmsley | 369d561 | 2010-01-26 20:13:01 -0700 | [diff] [blame] | 261 | /* Look up important powerdomains */ |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 262 | |
| 263 | mpu_pwrdm = pwrdm_lookup("mpu_pwrdm"); |
| 264 | if (!mpu_pwrdm) |
| 265 | pr_err("PM: mpu_pwrdm not found\n"); |
| 266 | |
| 267 | core_pwrdm = pwrdm_lookup("core_pwrdm"); |
| 268 | if (!core_pwrdm) |
| 269 | pr_err("PM: core_pwrdm not found\n"); |
| 270 | |
Paul Walmsley | 369d561 | 2010-01-26 20:13:01 -0700 | [diff] [blame] | 271 | /* Look up important clockdomains */ |
| 272 | |
| 273 | mpu_clkdm = clkdm_lookup("mpu_clkdm"); |
| 274 | if (!mpu_clkdm) |
| 275 | pr_err("PM: mpu_clkdm not found\n"); |
| 276 | |
| 277 | wkup_clkdm = clkdm_lookup("wkup_clkdm"); |
| 278 | if (!wkup_clkdm) |
| 279 | pr_err("PM: wkup_clkdm not found\n"); |
| 280 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 281 | dsp_clkdm = clkdm_lookup("dsp_clkdm"); |
| 282 | if (!dsp_clkdm) |
Paul Walmsley | 369d561 | 2010-01-26 20:13:01 -0700 | [diff] [blame] | 283 | pr_err("PM: dsp_clkdm not found\n"); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 284 | |
| 285 | gfx_clkdm = clkdm_lookup("gfx_clkdm"); |
| 286 | if (!gfx_clkdm) |
| 287 | pr_err("PM: gfx_clkdm not found\n"); |
| 288 | |
| 289 | |
| 290 | osc_ck = clk_get(NULL, "osc_ck"); |
| 291 | if (IS_ERR(osc_ck)) { |
| 292 | printk(KERN_ERR "could not get osc_ck\n"); |
| 293 | return -ENODEV; |
| 294 | } |
| 295 | |
| 296 | if (cpu_is_omap242x()) { |
| 297 | emul_ck = clk_get(NULL, "emul_ck"); |
| 298 | if (IS_ERR(emul_ck)) { |
| 299 | printk(KERN_ERR "could not get emul_ck\n"); |
| 300 | clk_put(osc_ck); |
| 301 | return -ENODEV; |
| 302 | } |
| 303 | } |
| 304 | |
| 305 | prcm_setup_regs(); |
| 306 | |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 307 | /* |
| 308 | * We copy the assembler sleep/wakeup routines to SRAM. |
| 309 | * These routines need to be in SRAM as that's the only |
Paul Walmsley | 088e880 | 2012-12-30 10:15:48 -0700 | [diff] [blame] | 310 | * memory the MPU can see when it wakes up after the entire |
| 311 | * chip enters idle. |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 312 | */ |
Shawn Guo | bbd707a | 2012-04-26 16:06:50 +0800 | [diff] [blame] | 313 | omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend, |
| 314 | omap24xx_cpu_suspend_sz); |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 315 | |
Nicolas Pitre | 0bcd24b | 2012-01-04 16:27:48 -0500 | [diff] [blame] | 316 | arm_pm_idle = omap2_pm_idle; |
Kevin Hilman | 8bd2294 | 2009-05-28 10:56:16 -0700 | [diff] [blame] | 317 | |
| 318 | return 0; |
| 319 | } |