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Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -07001/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
Josh Cartwright5a418552014-04-03 14:50:13 -070012#include <linux/of.h>
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070013#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/rtc.h>
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -070016#include <linux/platform_device.h>
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070017#include <linux/pm.h>
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -070018#include <linux/regmap.h>
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070019#include <linux/slab.h>
20#include <linux/spinlock.h>
21
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070022/* RTC Register offsets from RTC CTRL REG */
23#define PM8XXX_ALARM_CTRL_OFFSET 0x01
24#define PM8XXX_RTC_WRITE_OFFSET 0x02
25#define PM8XXX_RTC_READ_OFFSET 0x06
26#define PM8XXX_ALARM_RW_OFFSET 0x0A
27
28/* RTC_CTRL register bit fields */
29#define PM8xxx_RTC_ENABLE BIT(7)
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070030#define PM8xxx_RTC_ALARM_CLEAR BIT(0)
31
32#define NUM_8_BIT_RTC_REGS 0x4
33
34/**
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -070035 * struct pm8xxx_rtc_regs - describe RTC registers per PMIC versions
36 * @ctrl: base address of control register
37 * @write: base address of write register
38 * @read: base address of read register
39 * @alarm_ctrl: base address of alarm control register
40 * @alarm_ctrl2: base address of alarm control2 register
41 * @alarm_rw: base address of alarm read-write register
42 * @alarm_en: alarm enable mask
43 */
44struct pm8xxx_rtc_regs {
45 unsigned int ctrl;
46 unsigned int write;
47 unsigned int read;
48 unsigned int alarm_ctrl;
49 unsigned int alarm_ctrl2;
50 unsigned int alarm_rw;
51 unsigned int alarm_en;
52};
53
54/**
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070055 * struct pm8xxx_rtc - rtc driver internal structure
56 * @rtc: rtc device for this driver.
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -070057 * @regmap: regmap used to access RTC registers
Josh Cartwright5a418552014-04-03 14:50:13 -070058 * @allow_set_time: indicates whether writing to the RTC is allowed
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070059 * @rtc_alarm_irq: rtc alarm irq number.
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070060 * @ctrl_reg: rtc control register.
61 * @rtc_dev: device structure.
62 * @ctrl_reg_lock: spinlock protecting access to ctrl_reg.
63 */
64struct pm8xxx_rtc {
65 struct rtc_device *rtc;
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -070066 struct regmap *regmap;
Josh Cartwright5a418552014-04-03 14:50:13 -070067 bool allow_set_time;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070068 int rtc_alarm_irq;
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -070069 const struct pm8xxx_rtc_regs *regs;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070070 struct device *rtc_dev;
71 spinlock_t ctrl_reg_lock;
72};
73
74/*
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070075 * Steps to write the RTC registers.
76 * 1. Disable alarm if enabled.
77 * 2. Write 0x00 to LSB.
78 * 3. Write Byte[1], Byte[2], Byte[3] then Byte[0].
79 * 4. Enable alarm if disabled in step 1.
80 */
81static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
82{
83 int rc, i;
84 unsigned long secs, irq_flags;
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -070085 u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0;
86 unsigned int ctrl_reg;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070087 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -070088 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070089
Josh Cartwright5a418552014-04-03 14:50:13 -070090 if (!rtc_dd->allow_set_time)
91 return -EACCES;
92
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -070093 rtc_tm_to_time(tm, &secs);
94
95 for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
96 value[i] = secs & 0xFF;
97 secs >>= 8;
98 }
99
100 dev_dbg(dev, "Seconds value to be written to RTC = %lu\n", secs);
101
102 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700103
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700104 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
105 if (rc)
106 goto rtc_rw_fail;
107
108 if (ctrl_reg & regs->alarm_en) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700109 alarm_enabled = 1;
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700110 ctrl_reg &= ~regs->alarm_en;
111 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700112 if (rc) {
Josh Cartwright5bed8112014-04-03 14:50:10 -0700113 dev_err(dev, "Write to RTC control register failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700114 goto rtc_rw_fail;
115 }
Josh Cartwright5bed8112014-04-03 14:50:10 -0700116 }
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700117
118 /* Write 0 to Byte[0] */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700119 rc = regmap_write(rtc_dd->regmap, regs->write, 0);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700120 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700121 dev_err(dev, "Write to RTC write data register failed\n");
122 goto rtc_rw_fail;
123 }
124
125 /* Write Byte[1], Byte[2], Byte[3] */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700126 rc = regmap_bulk_write(rtc_dd->regmap, regs->write + 1,
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700127 &value[1], sizeof(value) - 1);
128 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700129 dev_err(dev, "Write to RTC write data register failed\n");
130 goto rtc_rw_fail;
131 }
132
133 /* Write Byte[0] */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700134 rc = regmap_write(rtc_dd->regmap, regs->write, value[0]);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700135 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700136 dev_err(dev, "Write to RTC write data register failed\n");
137 goto rtc_rw_fail;
138 }
139
140 if (alarm_enabled) {
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700141 ctrl_reg |= regs->alarm_en;
142 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700143 if (rc) {
Josh Cartwright5bed8112014-04-03 14:50:10 -0700144 dev_err(dev, "Write to RTC control register failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700145 goto rtc_rw_fail;
146 }
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700147 }
148
149rtc_rw_fail:
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700150 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700151
152 return rc;
153}
154
155static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
156{
157 int rc;
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700158 u8 value[NUM_8_BIT_RTC_REGS];
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700159 unsigned long secs;
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700160 unsigned int reg;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700161 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700162 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700163
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700164 rc = regmap_bulk_read(rtc_dd->regmap, regs->read, value, sizeof(value));
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700165 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700166 dev_err(dev, "RTC read data register failed\n");
167 return rc;
168 }
169
170 /*
171 * Read the LSB again and check if there has been a carry over.
172 * If there is, redo the read operation.
173 */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700174 rc = regmap_read(rtc_dd->regmap, regs->read, &reg);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700175 if (rc < 0) {
176 dev_err(dev, "RTC read data register failed\n");
177 return rc;
178 }
179
180 if (unlikely(reg < value[0])) {
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700181 rc = regmap_bulk_read(rtc_dd->regmap, regs->read,
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700182 value, sizeof(value));
183 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700184 dev_err(dev, "RTC read data register failed\n");
185 return rc;
186 }
187 }
188
189 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
190
191 rtc_time_to_tm(secs, tm);
192
193 rc = rtc_valid_tm(tm);
194 if (rc < 0) {
195 dev_err(dev, "Invalid time read from RTC\n");
196 return rc;
197 }
198
199 dev_dbg(dev, "secs = %lu, h:m:s == %d:%d:%d, d/m/y = %d/%d/%d\n",
Josh Cartwright5bed8112014-04-03 14:50:10 -0700200 secs, tm->tm_hour, tm->tm_min, tm->tm_sec,
201 tm->tm_mday, tm->tm_mon, tm->tm_year);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700202
203 return 0;
204}
205
206static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
207{
208 int rc, i;
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700209 u8 value[NUM_8_BIT_RTC_REGS];
210 unsigned int ctrl_reg;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700211 unsigned long secs, irq_flags;
212 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700213 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700214
215 rtc_tm_to_time(&alarm->time, &secs);
216
217 for (i = 0; i < NUM_8_BIT_RTC_REGS; i++) {
218 value[i] = secs & 0xFF;
219 secs >>= 8;
220 }
221
222 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
223
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700224 rc = regmap_bulk_write(rtc_dd->regmap, regs->alarm_rw, value,
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700225 sizeof(value));
226 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700227 dev_err(dev, "Write to RTC ALARM register failed\n");
228 goto rtc_rw_fail;
229 }
230
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700231 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
232 if (rc)
233 goto rtc_rw_fail;
Josh Cartwright5bed8112014-04-03 14:50:10 -0700234
235 if (alarm->enabled)
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700236 ctrl_reg |= regs->alarm_en;
Josh Cartwright5bed8112014-04-03 14:50:10 -0700237 else
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700238 ctrl_reg &= ~regs->alarm_en;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700239
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700240 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700241 if (rc) {
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700242 dev_err(dev, "Write to RTC alarm control register failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700243 goto rtc_rw_fail;
244 }
245
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700246 dev_dbg(dev, "Alarm Set for h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
Josh Cartwright5bed8112014-04-03 14:50:10 -0700247 alarm->time.tm_hour, alarm->time.tm_min,
248 alarm->time.tm_sec, alarm->time.tm_mday,
249 alarm->time.tm_mon, alarm->time.tm_year);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700250rtc_rw_fail:
251 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
252 return rc;
253}
254
255static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
256{
257 int rc;
258 u8 value[NUM_8_BIT_RTC_REGS];
259 unsigned long secs;
260 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700261 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700262
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700263 rc = regmap_bulk_read(rtc_dd->regmap, regs->alarm_rw, value,
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700264 sizeof(value));
265 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700266 dev_err(dev, "RTC alarm time read failed\n");
267 return rc;
268 }
269
270 secs = value[0] | (value[1] << 8) | (value[2] << 16) | (value[3] << 24);
271
272 rtc_time_to_tm(secs, &alarm->time);
273
274 rc = rtc_valid_tm(&alarm->time);
275 if (rc < 0) {
276 dev_err(dev, "Invalid alarm time read from RTC\n");
277 return rc;
278 }
279
280 dev_dbg(dev, "Alarm set for - h:r:s=%d:%d:%d, d/m/y=%d/%d/%d\n",
Josh Cartwright5bed8112014-04-03 14:50:10 -0700281 alarm->time.tm_hour, alarm->time.tm_min,
282 alarm->time.tm_sec, alarm->time.tm_mday,
283 alarm->time.tm_mon, alarm->time.tm_year);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700284
285 return 0;
286}
287
288static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
289{
290 int rc;
291 unsigned long irq_flags;
292 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700293 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
294 unsigned int ctrl_reg;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700295
296 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
Josh Cartwright5bed8112014-04-03 14:50:10 -0700297
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700298 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
299 if (rc)
300 goto rtc_rw_fail;
Josh Cartwright5bed8112014-04-03 14:50:10 -0700301
302 if (enable)
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700303 ctrl_reg |= regs->alarm_en;
Josh Cartwright5bed8112014-04-03 14:50:10 -0700304 else
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700305 ctrl_reg &= ~regs->alarm_en;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700306
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700307 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700308 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700309 dev_err(dev, "Write to RTC control register failed\n");
310 goto rtc_rw_fail;
311 }
312
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700313rtc_rw_fail:
314 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
315 return rc;
316}
317
Josh Cartwright5a418552014-04-03 14:50:13 -0700318static const struct rtc_class_ops pm8xxx_rtc_ops = {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700319 .read_time = pm8xxx_rtc_read_time,
Josh Cartwright5a418552014-04-03 14:50:13 -0700320 .set_time = pm8xxx_rtc_set_time,
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700321 .set_alarm = pm8xxx_rtc_set_alarm,
322 .read_alarm = pm8xxx_rtc_read_alarm,
323 .alarm_irq_enable = pm8xxx_rtc_alarm_irq_enable,
324};
325
326static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
327{
328 struct pm8xxx_rtc *rtc_dd = dev_id;
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700329 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700330 unsigned int ctrl_reg;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700331 int rc;
332 unsigned long irq_flags;
333
334 rtc_update_irq(rtc_dd->rtc, 1, RTC_IRQF | RTC_AF);
335
336 spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
337
338 /* Clear the alarm enable bit */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700339 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl, &ctrl_reg);
340 if (rc) {
341 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
342 goto rtc_alarm_handled;
343 }
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700344
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700345 ctrl_reg &= ~regs->alarm_en;
346
347 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700348 if (rc) {
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700349 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
Josh Cartwright5bed8112014-04-03 14:50:10 -0700350 dev_err(rtc_dd->rtc_dev,
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700351 "Write to alarm control register failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700352 goto rtc_alarm_handled;
353 }
354
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700355 spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
356
357 /* Clear RTC alarm register */
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700358 rc = regmap_read(rtc_dd->regmap, regs->alarm_ctrl2, &ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700359 if (rc) {
Josh Cartwright5bed8112014-04-03 14:50:10 -0700360 dev_err(rtc_dd->rtc_dev,
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700361 "RTC Alarm control2 register read failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700362 goto rtc_alarm_handled;
363 }
364
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700365 ctrl_reg |= PM8xxx_RTC_ALARM_CLEAR;
366 rc = regmap_write(rtc_dd->regmap, regs->alarm_ctrl2, ctrl_reg);
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700367 if (rc)
Josh Cartwright5bed8112014-04-03 14:50:10 -0700368 dev_err(rtc_dd->rtc_dev,
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700369 "Write to RTC Alarm control2 register failed\n");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700370
371rtc_alarm_handled:
372 return IRQ_HANDLED;
373}
374
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700375static int pm8xxx_rtc_enable(struct pm8xxx_rtc *rtc_dd)
376{
377 const struct pm8xxx_rtc_regs *regs = rtc_dd->regs;
378 unsigned int ctrl_reg;
379 int rc;
380
381 /* Check if the RTC is on, else turn it on */
382 rc = regmap_read(rtc_dd->regmap, regs->ctrl, &ctrl_reg);
383 if (rc)
384 return rc;
385
386 if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
387 ctrl_reg |= PM8xxx_RTC_ENABLE;
388 rc = regmap_write(rtc_dd->regmap, regs->ctrl, ctrl_reg);
389 if (rc)
390 return rc;
391 }
392
393 return 0;
394}
395
396static const struct pm8xxx_rtc_regs pm8921_regs = {
397 .ctrl = 0x11d,
398 .write = 0x11f,
399 .read = 0x123,
400 .alarm_rw = 0x127,
401 .alarm_ctrl = 0x11d,
402 .alarm_ctrl2 = 0x11e,
403 .alarm_en = BIT(1),
404};
405
406static const struct pm8xxx_rtc_regs pm8058_regs = {
407 .ctrl = 0x1e8,
408 .write = 0x1ea,
409 .read = 0x1ee,
410 .alarm_rw = 0x1f2,
411 .alarm_ctrl = 0x1e8,
412 .alarm_ctrl2 = 0x1e9,
413 .alarm_en = BIT(1),
414};
415
416static const struct pm8xxx_rtc_regs pm8941_regs = {
417 .ctrl = 0x6046,
418 .write = 0x6040,
419 .read = 0x6048,
420 .alarm_rw = 0x6140,
421 .alarm_ctrl = 0x6146,
422 .alarm_ctrl2 = 0x6148,
423 .alarm_en = BIT(7),
424};
425
Josh Cartwright5a418552014-04-03 14:50:13 -0700426/*
427 * Hardcoded RTC bases until IORESOURCE_REG mapping is figured out
428 */
429static const struct of_device_id pm8xxx_id_table[] = {
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700430 { .compatible = "qcom,pm8921-rtc", .data = &pm8921_regs },
431 { .compatible = "qcom,pm8058-rtc", .data = &pm8058_regs },
432 { .compatible = "qcom,pm8941-rtc", .data = &pm8941_regs },
Josh Cartwright5a418552014-04-03 14:50:13 -0700433 { },
434};
435MODULE_DEVICE_TABLE(of, pm8xxx_id_table);
436
Greg Kroah-Hartman5a167f42012-12-21 13:09:38 -0800437static int pm8xxx_rtc_probe(struct platform_device *pdev)
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700438{
439 int rc;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700440 struct pm8xxx_rtc *rtc_dd;
Josh Cartwright5a418552014-04-03 14:50:13 -0700441 const struct of_device_id *match;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700442
Josh Cartwright5a418552014-04-03 14:50:13 -0700443 match = of_match_node(pm8xxx_id_table, pdev->dev.of_node);
444 if (!match)
445 return -ENXIO;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700446
Jingoo Hanc4172992013-07-03 15:07:09 -0700447 rtc_dd = devm_kzalloc(&pdev->dev, sizeof(*rtc_dd), GFP_KERNEL);
Jingoo Han49ae4252014-04-03 14:49:43 -0700448 if (rtc_dd == NULL)
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700449 return -ENOMEM;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700450
451 /* Initialise spinlock to protect RTC control register */
452 spin_lock_init(&rtc_dd->ctrl_reg_lock);
453
Josh Cartwright5d7dc4c2014-04-03 14:50:11 -0700454 rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
455 if (!rtc_dd->regmap) {
456 dev_err(&pdev->dev, "Parent regmap unavailable.\n");
457 return -ENXIO;
458 }
459
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700460 rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
461 if (rtc_dd->rtc_alarm_irq < 0) {
462 dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
Jingoo Hanc4172992013-07-03 15:07:09 -0700463 return -ENXIO;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700464 }
465
Josh Cartwright5a418552014-04-03 14:50:13 -0700466 rtc_dd->allow_set_time = of_property_read_bool(pdev->dev.of_node,
467 "allow-set-time");
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700468
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700469 rtc_dd->regs = match->data;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700470 rtc_dd->rtc_dev = &pdev->dev;
471
Stanimir Varbanovc8d523a2014-10-29 14:50:33 -0700472 rc = pm8xxx_rtc_enable(rtc_dd);
473 if (rc)
Jingoo Hanc4172992013-07-03 15:07:09 -0700474 return rc;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700475
476 platform_set_drvdata(pdev, rtc_dd);
477
Josh Cartwrightfda99092014-04-03 14:50:14 -0700478 device_init_wakeup(&pdev->dev, 1);
479
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700480 /* Register the RTC device */
Jingoo Hanc4172992013-07-03 15:07:09 -0700481 rtc_dd->rtc = devm_rtc_device_register(&pdev->dev, "pm8xxx_rtc",
Josh Cartwright5bed8112014-04-03 14:50:10 -0700482 &pm8xxx_rtc_ops, THIS_MODULE);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700483 if (IS_ERR(rtc_dd->rtc)) {
484 dev_err(&pdev->dev, "%s: RTC registration failed (%ld)\n",
Josh Cartwright5bed8112014-04-03 14:50:10 -0700485 __func__, PTR_ERR(rtc_dd->rtc));
Jingoo Hanc4172992013-07-03 15:07:09 -0700486 return PTR_ERR(rtc_dd->rtc);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700487 }
488
489 /* Request the alarm IRQ */
Josh Cartwrightbffcbc02014-04-03 14:50:12 -0700490 rc = devm_request_any_context_irq(&pdev->dev, rtc_dd->rtc_alarm_irq,
491 pm8xxx_alarm_trigger,
492 IRQF_TRIGGER_RISING,
493 "pm8xxx_rtc_alarm", rtc_dd);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700494 if (rc < 0) {
495 dev_err(&pdev->dev, "Request IRQ failed (%d)\n", rc);
Jingoo Hanc4172992013-07-03 15:07:09 -0700496 return rc;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700497 }
498
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700499 dev_dbg(&pdev->dev, "Probe success !!\n");
500
501 return 0;
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700502}
503
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700504#ifdef CONFIG_PM_SLEEP
505static int pm8xxx_rtc_resume(struct device *dev)
506{
507 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
508
509 if (device_may_wakeup(dev))
510 disable_irq_wake(rtc_dd->rtc_alarm_irq);
511
512 return 0;
513}
514
515static int pm8xxx_rtc_suspend(struct device *dev)
516{
517 struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
518
519 if (device_may_wakeup(dev))
520 enable_irq_wake(rtc_dd->rtc_alarm_irq);
521
522 return 0;
523}
524#endif
525
Josh Cartwright5bed8112014-04-03 14:50:10 -0700526static SIMPLE_DEV_PM_OPS(pm8xxx_rtc_pm_ops,
527 pm8xxx_rtc_suspend,
528 pm8xxx_rtc_resume);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700529
530static struct platform_driver pm8xxx_rtc_driver = {
531 .probe = pm8xxx_rtc_probe,
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700532 .driver = {
Josh Cartwright5a418552014-04-03 14:50:13 -0700533 .name = "rtc-pm8xxx",
534 .owner = THIS_MODULE,
535 .pm = &pm8xxx_rtc_pm_ops,
536 .of_match_table = pm8xxx_id_table,
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700537 },
538};
539
Axel Lin0c4eae62012-01-10 15:10:48 -0800540module_platform_driver(pm8xxx_rtc_driver);
Anirudh Ghayal9a9a54a2011-07-25 17:13:33 -0700541
542MODULE_ALIAS("platform:rtc-pm8xxx");
543MODULE_DESCRIPTION("PMIC8xxx RTC driver");
544MODULE_LICENSE("GPL v2");
545MODULE_AUTHOR("Anirudh Ghayal <aghayal@codeaurora.org>");