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Uwe Kleine-König9ed9c072013-10-08 09:57:20 +02001/*
2 * Copyright (C) 2013 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
Uwe Kleine-König9ed9c072013-10-08 09:57:20 +02009#include <linux/io.h>
10#include <linux/clk-provider.h>
11#include <linux/of.h>
12#include <linux/of_address.h>
13
14#include <dt-bindings/clock/efm32-cmu.h>
15
16#define CMU_HFPERCLKEN0 0x44
17
18static struct clk *clk[37];
19static struct clk_onecell_data clk_data = {
20 .clks = clk,
21 .clk_num = ARRAY_SIZE(clk),
22};
23
Uwe Kleine-König8ce8ebe2014-07-28 16:38:21 +020024static void __init efm32gg_cmu_init(struct device_node *np)
Uwe Kleine-König9ed9c072013-10-08 09:57:20 +020025{
26 int i;
27 void __iomem *base;
28
29 for (i = 0; i < ARRAY_SIZE(clk); ++i)
30 clk[i] = ERR_PTR(-ENOENT);
31
32 base = of_iomap(np, 0);
33 if (!base) {
34 pr_warn("Failed to map address range for efm32gg,cmu node\n");
Uwe Kleine-König8ce8ebe2014-07-28 16:38:21 +020035 return;
Uwe Kleine-König9ed9c072013-10-08 09:57:20 +020036 }
37
38 clk[clk_HFXO] = clk_register_fixed_rate(NULL, "HFXO", NULL,
Stephen Boyd12460392016-03-01 11:00:11 -080039 0, 48000000);
Uwe Kleine-König9ed9c072013-10-08 09:57:20 +020040
41 clk[clk_HFPERCLKUSART0] = clk_register_gate(NULL, "HFPERCLK.USART0",
42 "HFXO", 0, base + CMU_HFPERCLKEN0, 0, 0, NULL);
43 clk[clk_HFPERCLKUSART1] = clk_register_gate(NULL, "HFPERCLK.USART1",
44 "HFXO", 0, base + CMU_HFPERCLKEN0, 1, 0, NULL);
45 clk[clk_HFPERCLKUSART2] = clk_register_gate(NULL, "HFPERCLK.USART2",
46 "HFXO", 0, base + CMU_HFPERCLKEN0, 2, 0, NULL);
47 clk[clk_HFPERCLKUART0] = clk_register_gate(NULL, "HFPERCLK.UART0",
48 "HFXO", 0, base + CMU_HFPERCLKEN0, 3, 0, NULL);
49 clk[clk_HFPERCLKUART1] = clk_register_gate(NULL, "HFPERCLK.UART1",
50 "HFXO", 0, base + CMU_HFPERCLKEN0, 4, 0, NULL);
51 clk[clk_HFPERCLKTIMER0] = clk_register_gate(NULL, "HFPERCLK.TIMER0",
52 "HFXO", 0, base + CMU_HFPERCLKEN0, 5, 0, NULL);
53 clk[clk_HFPERCLKTIMER1] = clk_register_gate(NULL, "HFPERCLK.TIMER1",
54 "HFXO", 0, base + CMU_HFPERCLKEN0, 6, 0, NULL);
55 clk[clk_HFPERCLKTIMER2] = clk_register_gate(NULL, "HFPERCLK.TIMER2",
56 "HFXO", 0, base + CMU_HFPERCLKEN0, 7, 0, NULL);
57 clk[clk_HFPERCLKTIMER3] = clk_register_gate(NULL, "HFPERCLK.TIMER3",
58 "HFXO", 0, base + CMU_HFPERCLKEN0, 8, 0, NULL);
59 clk[clk_HFPERCLKACMP0] = clk_register_gate(NULL, "HFPERCLK.ACMP0",
60 "HFXO", 0, base + CMU_HFPERCLKEN0, 9, 0, NULL);
61 clk[clk_HFPERCLKACMP1] = clk_register_gate(NULL, "HFPERCLK.ACMP1",
62 "HFXO", 0, base + CMU_HFPERCLKEN0, 10, 0, NULL);
63 clk[clk_HFPERCLKI2C0] = clk_register_gate(NULL, "HFPERCLK.I2C0",
64 "HFXO", 0, base + CMU_HFPERCLKEN0, 11, 0, NULL);
65 clk[clk_HFPERCLKI2C1] = clk_register_gate(NULL, "HFPERCLK.I2C1",
66 "HFXO", 0, base + CMU_HFPERCLKEN0, 12, 0, NULL);
67 clk[clk_HFPERCLKGPIO] = clk_register_gate(NULL, "HFPERCLK.GPIO",
68 "HFXO", 0, base + CMU_HFPERCLKEN0, 13, 0, NULL);
69 clk[clk_HFPERCLKVCMP] = clk_register_gate(NULL, "HFPERCLK.VCMP",
70 "HFXO", 0, base + CMU_HFPERCLKEN0, 14, 0, NULL);
71 clk[clk_HFPERCLKPRS] = clk_register_gate(NULL, "HFPERCLK.PRS",
72 "HFXO", 0, base + CMU_HFPERCLKEN0, 15, 0, NULL);
73 clk[clk_HFPERCLKADC0] = clk_register_gate(NULL, "HFPERCLK.ADC0",
74 "HFXO", 0, base + CMU_HFPERCLKEN0, 16, 0, NULL);
75 clk[clk_HFPERCLKDAC0] = clk_register_gate(NULL, "HFPERCLK.DAC0",
76 "HFXO", 0, base + CMU_HFPERCLKEN0, 17, 0, NULL);
77
Uwe Kleine-König8ce8ebe2014-07-28 16:38:21 +020078 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
Uwe Kleine-König9ed9c072013-10-08 09:57:20 +020079}
80CLK_OF_DECLARE(efm32ggcmu, "efm32gg,cmu", efm32gg_cmu_init);