blob: 2776a09bee58df0207968a74fa9fdc435fb5f402 [file] [log] [blame]
Rabin Vincent03f822f2010-07-02 16:52:09 +05301/*
2 * Copyright (C) ST-Ericsson SA 2010
3 *
4 * License Terms: GNU General Public License, version 2
5 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
6 */
7
8#include <linux/module.h>
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/gpio.h>
13#include <linux/irq.h>
Lee Jonesfc13d5a2012-12-10 10:07:54 +000014#include <linux/irqdomain.h>
Rabin Vincent03f822f2010-07-02 16:52:09 +053015#include <linux/interrupt.h>
Vipul Kumar Samar86605cf2012-11-26 17:06:51 +053016#include <linux/of.h>
Rabin Vincent03f822f2010-07-02 16:52:09 +053017#include <linux/mfd/stmpe.h>
18
19/*
20 * These registers are modified under the irq bus lock and cached to avoid
21 * unnecessary writes in bus_sync_unlock.
22 */
23enum { REG_RE, REG_FE, REG_IE };
24
25#define CACHE_NR_REGS 3
26#define CACHE_NR_BANKS (STMPE_NR_GPIOS / 8)
27
28struct stmpe_gpio {
29 struct gpio_chip chip;
30 struct stmpe *stmpe;
31 struct device *dev;
32 struct mutex irq_lock;
Lee Jonesfc13d5a2012-12-10 10:07:54 +000033 struct irq_domain *domain;
Rabin Vincent03f822f2010-07-02 16:52:09 +053034
35 int irq_base;
Wolfram Sangb8e9cf02010-08-16 17:14:44 +020036 unsigned norequest_mask;
Rabin Vincent03f822f2010-07-02 16:52:09 +053037
38 /* Caches of interrupt control registers for bus_lock */
39 u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
40 u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
41};
42
43static inline struct stmpe_gpio *to_stmpe_gpio(struct gpio_chip *chip)
44{
45 return container_of(chip, struct stmpe_gpio, chip);
46}
47
48static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset)
49{
50 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
51 struct stmpe *stmpe = stmpe_gpio->stmpe;
52 u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8);
53 u8 mask = 1 << (offset % 8);
54 int ret;
55
56 ret = stmpe_reg_read(stmpe, reg);
57 if (ret < 0)
58 return ret;
59
Bhupesh Sharma7535b8b2012-02-27 11:19:43 +053060 return !!(ret & mask);
Rabin Vincent03f822f2010-07-02 16:52:09 +053061}
62
63static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
64{
65 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
66 struct stmpe *stmpe = stmpe_gpio->stmpe;
67 int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;
68 u8 reg = stmpe->regs[which] - (offset / 8);
69 u8 mask = 1 << (offset % 8);
70
Viresh Kumarcccdceb2011-12-14 09:28:27 +053071 /*
72 * Some variants have single register for gpio set/clear functionality.
73 * For them we need to write 0 to clear and 1 to set.
74 */
75 if (stmpe->regs[STMPE_IDX_GPSR_LSB] == stmpe->regs[STMPE_IDX_GPCR_LSB])
76 stmpe_set_bits(stmpe, reg, mask, val ? mask : 0);
77 else
78 stmpe_reg_write(stmpe, reg, mask);
Rabin Vincent03f822f2010-07-02 16:52:09 +053079}
80
81static int stmpe_gpio_direction_output(struct gpio_chip *chip,
82 unsigned offset, int val)
83{
84 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
85 struct stmpe *stmpe = stmpe_gpio->stmpe;
86 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
87 u8 mask = 1 << (offset % 8);
88
89 stmpe_gpio_set(chip, offset, val);
90
91 return stmpe_set_bits(stmpe, reg, mask, mask);
92}
93
94static int stmpe_gpio_direction_input(struct gpio_chip *chip,
95 unsigned offset)
96{
97 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
98 struct stmpe *stmpe = stmpe_gpio->stmpe;
99 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
100 u8 mask = 1 << (offset % 8);
101
102 return stmpe_set_bits(stmpe, reg, mask, 0);
103}
104
105static int stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
106{
107 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
108
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000109 return irq_create_mapping(stmpe_gpio->domain, offset);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530110}
111
112static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset)
113{
114 struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
115 struct stmpe *stmpe = stmpe_gpio->stmpe;
116
Wolfram Sangb8e9cf02010-08-16 17:14:44 +0200117 if (stmpe_gpio->norequest_mask & (1 << offset))
118 return -EINVAL;
119
Rabin Vincent03f822f2010-07-02 16:52:09 +0530120 return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO);
121}
122
123static struct gpio_chip template_chip = {
124 .label = "stmpe",
125 .owner = THIS_MODULE,
126 .direction_input = stmpe_gpio_direction_input,
127 .get = stmpe_gpio_get,
128 .direction_output = stmpe_gpio_direction_output,
129 .set = stmpe_gpio_set,
130 .to_irq = stmpe_gpio_to_irq,
131 .request = stmpe_gpio_request,
Linus Walleij9fb1f392013-12-04 14:42:46 +0100132 .can_sleep = true,
Rabin Vincent03f822f2010-07-02 16:52:09 +0530133};
134
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800135static int stmpe_gpio_irq_set_type(struct irq_data *d, unsigned int type)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530136{
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800137 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000138 int offset = d->hwirq;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530139 int regoffset = offset / 8;
140 int mask = 1 << (offset % 8);
141
142 if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
143 return -EINVAL;
144
Viresh Kumarcccdceb2011-12-14 09:28:27 +0530145 /* STMPE801 doesn't have RE and FE registers */
146 if (stmpe_gpio->stmpe->partnum == STMPE801)
147 return 0;
148
Rabin Vincent03f822f2010-07-02 16:52:09 +0530149 if (type == IRQ_TYPE_EDGE_RISING)
150 stmpe_gpio->regs[REG_RE][regoffset] |= mask;
151 else
152 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask;
153
154 if (type == IRQ_TYPE_EDGE_FALLING)
155 stmpe_gpio->regs[REG_FE][regoffset] |= mask;
156 else
157 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask;
158
159 return 0;
160}
161
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800162static void stmpe_gpio_irq_lock(struct irq_data *d)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530163{
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800164 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530165
166 mutex_lock(&stmpe_gpio->irq_lock);
167}
168
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800169static void stmpe_gpio_irq_sync_unlock(struct irq_data *d)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530170{
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800171 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530172 struct stmpe *stmpe = stmpe_gpio->stmpe;
173 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
174 static const u8 regmap[] = {
175 [REG_RE] = STMPE_IDX_GPRER_LSB,
176 [REG_FE] = STMPE_IDX_GPFER_LSB,
177 [REG_IE] = STMPE_IDX_IEGPIOR_LSB,
178 };
179 int i, j;
180
181 for (i = 0; i < CACHE_NR_REGS; i++) {
Viresh Kumarcccdceb2011-12-14 09:28:27 +0530182 /* STMPE801 doesn't have RE and FE registers */
183 if ((stmpe->partnum == STMPE801) &&
184 (i != REG_IE))
185 continue;
186
Rabin Vincent03f822f2010-07-02 16:52:09 +0530187 for (j = 0; j < num_banks; j++) {
188 u8 old = stmpe_gpio->oldregs[i][j];
189 u8 new = stmpe_gpio->regs[i][j];
190
191 if (new == old)
192 continue;
193
194 stmpe_gpio->oldregs[i][j] = new;
195 stmpe_reg_write(stmpe, stmpe->regs[regmap[i]] - j, new);
196 }
197 }
198
199 mutex_unlock(&stmpe_gpio->irq_lock);
200}
201
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800202static void stmpe_gpio_irq_mask(struct irq_data *d)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530203{
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800204 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000205 int offset = d->hwirq;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530206 int regoffset = offset / 8;
207 int mask = 1 << (offset % 8);
208
209 stmpe_gpio->regs[REG_IE][regoffset] &= ~mask;
210}
211
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800212static void stmpe_gpio_irq_unmask(struct irq_data *d)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530213{
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800214 struct stmpe_gpio *stmpe_gpio = irq_data_get_irq_chip_data(d);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000215 int offset = d->hwirq;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530216 int regoffset = offset / 8;
217 int mask = 1 << (offset % 8);
218
219 stmpe_gpio->regs[REG_IE][regoffset] |= mask;
220}
221
222static struct irq_chip stmpe_gpio_irq_chip = {
223 .name = "stmpe-gpio",
Lennert Buytenhek2a866f32011-01-12 17:00:17 -0800224 .irq_bus_lock = stmpe_gpio_irq_lock,
225 .irq_bus_sync_unlock = stmpe_gpio_irq_sync_unlock,
226 .irq_mask = stmpe_gpio_irq_mask,
227 .irq_unmask = stmpe_gpio_irq_unmask,
228 .irq_set_type = stmpe_gpio_irq_set_type,
Rabin Vincent03f822f2010-07-02 16:52:09 +0530229};
230
231static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
232{
233 struct stmpe_gpio *stmpe_gpio = dev;
234 struct stmpe *stmpe = stmpe_gpio->stmpe;
235 u8 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB];
236 int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
237 u8 status[num_banks];
238 int ret;
239 int i;
240
241 ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status);
242 if (ret < 0)
243 return IRQ_NONE;
244
245 for (i = 0; i < num_banks; i++) {
246 int bank = num_banks - i - 1;
247 unsigned int enabled = stmpe_gpio->regs[REG_IE][bank];
248 unsigned int stat = status[i];
249
250 stat &= enabled;
251 if (!stat)
252 continue;
253
254 while (stat) {
255 int bit = __ffs(stat);
256 int line = bank * 8 + bit;
Linus Walleijed05e202013-10-11 19:51:38 +0200257 int child_irq = irq_find_mapping(stmpe_gpio->domain,
258 line);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530259
Linus Walleijed05e202013-10-11 19:51:38 +0200260 handle_nested_irq(child_irq);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530261 stat &= ~(1 << bit);
262 }
263
264 stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
Viresh Kumarcccdceb2011-12-14 09:28:27 +0530265
266 /* Edge detect register is not present on 801 */
267 if (stmpe->partnum != STMPE801)
268 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB]
269 + i, status[i]);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530270 }
271
272 return IRQ_HANDLED;
273}
274
Linus Walleijed05e202013-10-11 19:51:38 +0200275static int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int irq,
Axel Lin8700d0a2013-05-10 17:32:28 +0800276 irq_hw_number_t hwirq)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530277{
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000278 struct stmpe_gpio *stmpe_gpio = d->host_data;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530279
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000280 if (!stmpe_gpio)
281 return -EINVAL;
282
Linus Walleijed05e202013-10-11 19:51:38 +0200283 irq_set_chip_data(irq, stmpe_gpio);
284 irq_set_chip_and_handler(irq, &stmpe_gpio_irq_chip,
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000285 handle_simple_irq);
Linus Walleijed05e202013-10-11 19:51:38 +0200286 irq_set_nested_thread(irq, 1);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530287#ifdef CONFIG_ARM
Linus Walleijed05e202013-10-11 19:51:38 +0200288 set_irq_flags(irq, IRQF_VALID);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530289#else
Linus Walleijed05e202013-10-11 19:51:38 +0200290 irq_set_noprobe(irq);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530291#endif
Rabin Vincent03f822f2010-07-02 16:52:09 +0530292
293 return 0;
294}
295
Linus Walleijed05e202013-10-11 19:51:38 +0200296static void stmpe_gpio_irq_unmap(struct irq_domain *d, unsigned int irq)
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000297{
298#ifdef CONFIG_ARM
Linus Walleijed05e202013-10-11 19:51:38 +0200299 set_irq_flags(irq, 0);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000300#endif
Linus Walleijed05e202013-10-11 19:51:38 +0200301 irq_set_chip_and_handler(irq, NULL, NULL);
302 irq_set_chip_data(irq, NULL);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000303}
304
305static const struct irq_domain_ops stmpe_gpio_irq_simple_ops = {
306 .unmap = stmpe_gpio_irq_unmap,
307 .map = stmpe_gpio_irq_map,
308 .xlate = irq_domain_xlate_twocell,
309};
310
Gabriel Fernandez9afd9b72013-03-18 11:45:05 +0100311static int stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio,
312 struct device_node *np)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530313{
Gabriel Fernandez9afd9b72013-03-18 11:45:05 +0100314 int base = 0;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530315
Gabriel Fernandez9afd9b72013-03-18 11:45:05 +0100316 if (!np)
317 base = stmpe_gpio->irq_base;
318
319 stmpe_gpio->domain = irq_domain_add_simple(np,
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000320 stmpe_gpio->chip.ngpio, base,
321 &stmpe_gpio_irq_simple_ops, stmpe_gpio);
322 if (!stmpe_gpio->domain) {
323 dev_err(stmpe_gpio->dev, "failed to create irqdomain\n");
324 return -ENOSYS;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530325 }
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000326
327 return 0;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530328}
329
Bill Pemberton38363092012-11-19 13:22:34 -0500330static int stmpe_gpio_probe(struct platform_device *pdev)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530331{
332 struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
Vipul Kumar Samar86605cf2012-11-26 17:06:51 +0530333 struct device_node *np = pdev->dev.of_node;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530334 struct stmpe_gpio_platform_data *pdata;
335 struct stmpe_gpio *stmpe_gpio;
336 int ret;
Chris Blair38040c82012-01-26 22:17:15 +0100337 int irq = 0;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530338
339 pdata = stmpe->pdata->gpio;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530340
341 irq = platform_get_irq(pdev, 0);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530342
343 stmpe_gpio = kzalloc(sizeof(struct stmpe_gpio), GFP_KERNEL);
344 if (!stmpe_gpio)
345 return -ENOMEM;
346
347 mutex_init(&stmpe_gpio->irq_lock);
348
349 stmpe_gpio->dev = &pdev->dev;
350 stmpe_gpio->stmpe = stmpe;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530351 stmpe_gpio->chip = template_chip;
352 stmpe_gpio->chip.ngpio = stmpe->num_gpios;
353 stmpe_gpio->chip.dev = &pdev->dev;
Gabriel Fernandez9afd9b72013-03-18 11:45:05 +0100354#ifdef CONFIG_OF
355 stmpe_gpio->chip.of_node = np;
356#endif
Rabin Vincent03f822f2010-07-02 16:52:09 +0530357 stmpe_gpio->chip.base = pdata ? pdata->gpio_base : -1;
358
Vipul Kumar Samar86605cf2012-11-26 17:06:51 +0530359 if (pdata)
360 stmpe_gpio->norequest_mask = pdata->norequest_mask;
361 else if (np)
362 of_property_read_u32(np, "st,norequest-mask",
363 &stmpe_gpio->norequest_mask);
364
Chris Blair38040c82012-01-26 22:17:15 +0100365 if (irq >= 0)
366 stmpe_gpio->irq_base = stmpe->irq_base + STMPE_INT_GPIO(0);
367 else
368 dev_info(&pdev->dev,
369 "device configured in no-irq mode; "
370 "irqs are not available\n");
Rabin Vincent03f822f2010-07-02 16:52:09 +0530371
372 ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
373 if (ret)
Vasiliy Kulikov02bf0742010-09-12 22:57:19 +0400374 goto out_free;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530375
Chris Blair38040c82012-01-26 22:17:15 +0100376 if (irq >= 0) {
Gabriel Fernandez9afd9b72013-03-18 11:45:05 +0100377 ret = stmpe_gpio_irq_init(stmpe_gpio, np);
Chris Blair38040c82012-01-26 22:17:15 +0100378 if (ret)
379 goto out_disable;
Rabin Vincent03f822f2010-07-02 16:52:09 +0530380
Chris Blair38040c82012-01-26 22:17:15 +0100381 ret = request_threaded_irq(irq, NULL, stmpe_gpio_irq,
382 IRQF_ONESHOT, "stmpe-gpio", stmpe_gpio);
383 if (ret) {
384 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000385 goto out_disable;
Chris Blair38040c82012-01-26 22:17:15 +0100386 }
Rabin Vincent03f822f2010-07-02 16:52:09 +0530387 }
388
389 ret = gpiochip_add(&stmpe_gpio->chip);
390 if (ret) {
391 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
392 goto out_freeirq;
393 }
394
395 if (pdata && pdata->setup)
396 pdata->setup(stmpe, stmpe_gpio->chip.base);
397
398 platform_set_drvdata(pdev, stmpe_gpio);
399
400 return 0;
401
402out_freeirq:
Chris Blair38040c82012-01-26 22:17:15 +0100403 if (irq >= 0)
404 free_irq(irq, stmpe_gpio);
Vasiliy Kulikov02bf0742010-09-12 22:57:19 +0400405out_disable:
406 stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
Rabin Vincent03f822f2010-07-02 16:52:09 +0530407out_free:
408 kfree(stmpe_gpio);
409 return ret;
410}
411
Bill Pemberton206210c2012-11-19 13:25:50 -0500412static int stmpe_gpio_remove(struct platform_device *pdev)
Rabin Vincent03f822f2010-07-02 16:52:09 +0530413{
414 struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev);
415 struct stmpe *stmpe = stmpe_gpio->stmpe;
416 struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio;
417 int irq = platform_get_irq(pdev, 0);
418 int ret;
419
420 if (pdata && pdata->remove)
421 pdata->remove(stmpe, stmpe_gpio->chip.base);
422
423 ret = gpiochip_remove(&stmpe_gpio->chip);
424 if (ret < 0) {
425 dev_err(stmpe_gpio->dev,
426 "unable to remove gpiochip: %d\n", ret);
427 return ret;
428 }
429
430 stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
431
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000432 if (irq >= 0)
Chris Blair38040c82012-01-26 22:17:15 +0100433 free_irq(irq, stmpe_gpio);
Lee Jonesfc13d5a2012-12-10 10:07:54 +0000434
Rabin Vincent03f822f2010-07-02 16:52:09 +0530435 kfree(stmpe_gpio);
436
437 return 0;
438}
439
440static struct platform_driver stmpe_gpio_driver = {
441 .driver.name = "stmpe-gpio",
442 .driver.owner = THIS_MODULE,
443 .probe = stmpe_gpio_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500444 .remove = stmpe_gpio_remove,
Rabin Vincent03f822f2010-07-02 16:52:09 +0530445};
446
447static int __init stmpe_gpio_init(void)
448{
449 return platform_driver_register(&stmpe_gpio_driver);
450}
451subsys_initcall(stmpe_gpio_init);
452
453static void __exit stmpe_gpio_exit(void)
454{
455 platform_driver_unregister(&stmpe_gpio_driver);
456}
457module_exit(stmpe_gpio_exit);
458
459MODULE_LICENSE("GPL v2");
460MODULE_DESCRIPTION("STMPExxxx GPIO driver");
461MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");