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Douglas Thompson7c9281d2007-07-19 01:49:33 -07001/*
2 * Defines, structures, APIs for edac_core module
3 *
4 * (C) 2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written by Thayne Harbaugh
9 * Based on work by Dan Hollis <goemon at anime dot net> and others.
10 * http://www.anime.net/~goemon/linux-ecc/
11 *
12 * NMI handling support added by
13 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
14 *
15 * Refactored for multi-source files:
16 * Doug Thompson <norsk5@xmission.com>
17 *
18 */
19
20#ifndef _EDAC_CORE_H_
21#define _EDAC_CORE_H_
22
23#include <linux/kernel.h>
24#include <linux/types.h>
25#include <linux/module.h>
26#include <linux/spinlock.h>
27#include <linux/smp.h>
28#include <linux/pci.h>
29#include <linux/time.h>
30#include <linux/nmi.h>
31#include <linux/rcupdate.h>
32#include <linux/completion.h>
33#include <linux/kobject.h>
34#include <linux/platform_device.h>
Douglas Thompsone27e3da2007-07-19 01:49:36 -070035#include <linux/sysdev.h>
36#include <linux/workqueue.h>
Douglas Thompson7c9281d2007-07-19 01:49:33 -070037
38#define EDAC_MC_LABEL_LEN 31
Douglas Thompsone27e3da2007-07-19 01:49:36 -070039#define EDAC_DEVICE_NAME_LEN 31
40#define EDAC_ATTRIB_VALUE_LEN 15
41#define MC_PROC_NAME_MAX_LEN 7
Douglas Thompson7c9281d2007-07-19 01:49:33 -070042
43#if PAGE_SHIFT < 20
44#define PAGES_TO_MiB( pages ) ( ( pages ) >> ( 20 - PAGE_SHIFT ) )
45#else /* PAGE_SHIFT > 20 */
46#define PAGES_TO_MiB( pages ) ( ( pages ) << ( PAGE_SHIFT - 20 ) )
47#endif
48
49#define edac_printk(level, prefix, fmt, arg...) \
50 printk(level "EDAC " prefix ": " fmt, ##arg)
51
Hitoshi Mitakecc18e3c2009-04-02 16:58:43 -070052#define edac_printk_verbose(level, prefix, fmt, arg...) \
53 printk(level "EDAC " prefix ": " "in %s, line at %d: " fmt, \
54 __FILE__, __LINE__, ##arg)
55
Douglas Thompson7c9281d2007-07-19 01:49:33 -070056#define edac_mc_printk(mci, level, fmt, arg...) \
57 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
58
59#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \
60 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
61
Douglas Thompsone27e3da2007-07-19 01:49:36 -070062/* edac_device printk */
63#define edac_device_printk(ctl, level, fmt, arg...) \
64 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
65
Dave Jiang91b99042007-07-19 01:49:52 -070066/* edac_pci printk */
67#define edac_pci_printk(ctl, level, fmt, arg...) \
68 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
69
Douglas Thompson7c9281d2007-07-19 01:49:33 -070070/* prefixes for edac_printk() and edac_mc_printk() */
71#define EDAC_MC "MC"
72#define EDAC_PCI "PCI"
73#define EDAC_DEBUG "DEBUG"
74
75#ifdef CONFIG_EDAC_DEBUG
76extern int edac_debug_level;
Borislav Petkov239642f2009-11-12 15:33:16 +010077extern const char *edac_mem_types[];
Douglas Thompson7c9281d2007-07-19 01:49:33 -070078
Hitoshi Mitakecc18e3c2009-04-02 16:58:43 -070079#ifndef CONFIG_EDAC_DEBUG_VERBOSE
Borislav Petkovd357cbb2009-05-14 17:49:28 +020080#define edac_debug_printk(level, fmt, arg...) \
81 do { \
82 if (level <= edac_debug_level) \
83 edac_printk(KERN_DEBUG, EDAC_DEBUG, \
84 "%s: " fmt, __func__, ##arg); \
Hitoshi Mitakecc18e3c2009-04-02 16:58:43 -070085 } while (0)
86#else /* CONFIG_EDAC_DEBUG_VERBOSE */
87#define edac_debug_printk(level, fmt, arg...) \
88 do { \
89 if (level <= edac_debug_level) \
90 edac_printk_verbose(KERN_DEBUG, EDAC_DEBUG, fmt, \
91 ##arg); \
92 } while (0)
93#endif
Douglas Thompson7c9281d2007-07-19 01:49:33 -070094
95#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
96#define debugf1( ... ) edac_debug_printk(1, __VA_ARGS__ )
97#define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ )
98#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
99#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
100
Douglas Thompson079708b2007-07-19 01:49:58 -0700101#else /* !CONFIG_EDAC_DEBUG */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700102
103#define debugf0( ... )
104#define debugf1( ... )
105#define debugf2( ... )
106#define debugf3( ... )
107#define debugf4( ... )
108
Douglas Thompson079708b2007-07-19 01:49:58 -0700109#endif /* !CONFIG_EDAC_DEBUG */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700110
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700111#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
112 PCI_DEVICE_ID_ ## vend ## _ ## dev
113
Stephen Rothwell17aa7e02008-05-05 13:54:19 +1000114#define edac_dev_name(dev) (dev)->dev_name
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700115
116/* memory devices */
117enum dev_type {
118 DEV_UNKNOWN = 0,
119 DEV_X1,
120 DEV_X2,
121 DEV_X4,
122 DEV_X8,
123 DEV_X16,
124 DEV_X32, /* Do these parts exist? */
125 DEV_X64 /* Do these parts exist? */
126};
127
128#define DEV_FLAG_UNKNOWN BIT(DEV_UNKNOWN)
129#define DEV_FLAG_X1 BIT(DEV_X1)
130#define DEV_FLAG_X2 BIT(DEV_X2)
131#define DEV_FLAG_X4 BIT(DEV_X4)
132#define DEV_FLAG_X8 BIT(DEV_X8)
133#define DEV_FLAG_X16 BIT(DEV_X16)
134#define DEV_FLAG_X32 BIT(DEV_X32)
135#define DEV_FLAG_X64 BIT(DEV_X64)
136
137/* memory types */
138enum mem_type {
139 MEM_EMPTY = 0, /* Empty csrow */
140 MEM_RESERVED, /* Reserved csrow type */
141 MEM_UNKNOWN, /* Unknown csrow type */
142 MEM_FPM, /* Fast page mode */
143 MEM_EDO, /* Extended data out */
144 MEM_BEDO, /* Burst Extended data out */
145 MEM_SDR, /* Single data rate SDRAM */
146 MEM_RDR, /* Registered single data rate SDRAM */
147 MEM_DDR, /* Double data rate SDRAM */
148 MEM_RDDR, /* Registered Double data rate SDRAM */
149 MEM_RMBS, /* Rambus DRAM */
Douglas Thompson079708b2007-07-19 01:49:58 -0700150 MEM_DDR2, /* DDR2 RAM */
151 MEM_FB_DDR2, /* fully buffered DDR2 */
152 MEM_RDDR2, /* Registered DDR2 RAM */
Benjamin Herrenschmidt1d5f7262008-02-07 00:14:52 -0800153 MEM_XDR, /* Rambus XDR */
Yang Shib1cfebc2009-06-30 11:41:22 -0700154 MEM_DDR3, /* DDR3 RAM */
155 MEM_RDDR3, /* Registered DDR3 RAM */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700156};
157
158#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
159#define MEM_FLAG_RESERVED BIT(MEM_RESERVED)
160#define MEM_FLAG_UNKNOWN BIT(MEM_UNKNOWN)
161#define MEM_FLAG_FPM BIT(MEM_FPM)
162#define MEM_FLAG_EDO BIT(MEM_EDO)
163#define MEM_FLAG_BEDO BIT(MEM_BEDO)
164#define MEM_FLAG_SDR BIT(MEM_SDR)
165#define MEM_FLAG_RDR BIT(MEM_RDR)
166#define MEM_FLAG_DDR BIT(MEM_DDR)
167#define MEM_FLAG_RDDR BIT(MEM_RDDR)
168#define MEM_FLAG_RMBS BIT(MEM_RMBS)
169#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
170#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
171#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
Benjamin Herrenschmidt1d5f7262008-02-07 00:14:52 -0800172#define MEM_FLAG_XDR BIT(MEM_XDR)
Yang Shib1cfebc2009-06-30 11:41:22 -0700173#define MEM_FLAG_DDR3 BIT(MEM_DDR3)
174#define MEM_FLAG_RDDR3 BIT(MEM_RDDR3)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700175
176/* chipset Error Detection and Correction capabilities and mode */
177enum edac_type {
178 EDAC_UNKNOWN = 0, /* Unknown if ECC is available */
179 EDAC_NONE, /* Doesnt support ECC */
180 EDAC_RESERVED, /* Reserved ECC type */
181 EDAC_PARITY, /* Detects parity errors */
182 EDAC_EC, /* Error Checking - no correction */
183 EDAC_SECDED, /* Single bit error correction, Double detection */
184 EDAC_S2ECD2ED, /* Chipkill x2 devices - do these exist? */
185 EDAC_S4ECD4ED, /* Chipkill x4 devices */
186 EDAC_S8ECD8ED, /* Chipkill x8 devices */
187 EDAC_S16ECD16ED, /* Chipkill x16 devices */
188};
189
190#define EDAC_FLAG_UNKNOWN BIT(EDAC_UNKNOWN)
191#define EDAC_FLAG_NONE BIT(EDAC_NONE)
192#define EDAC_FLAG_PARITY BIT(EDAC_PARITY)
193#define EDAC_FLAG_EC BIT(EDAC_EC)
194#define EDAC_FLAG_SECDED BIT(EDAC_SECDED)
195#define EDAC_FLAG_S2ECD2ED BIT(EDAC_S2ECD2ED)
196#define EDAC_FLAG_S4ECD4ED BIT(EDAC_S4ECD4ED)
197#define EDAC_FLAG_S8ECD8ED BIT(EDAC_S8ECD8ED)
198#define EDAC_FLAG_S16ECD16ED BIT(EDAC_S16ECD16ED)
199
200/* scrubbing capabilities */
201enum scrub_type {
202 SCRUB_UNKNOWN = 0, /* Unknown if scrubber is available */
203 SCRUB_NONE, /* No scrubber */
204 SCRUB_SW_PROG, /* SW progressive (sequential) scrubbing */
205 SCRUB_SW_SRC, /* Software scrub only errors */
206 SCRUB_SW_PROG_SRC, /* Progressive software scrub from an error */
207 SCRUB_SW_TUNABLE, /* Software scrub frequency is tunable */
208 SCRUB_HW_PROG, /* HW progressive (sequential) scrubbing */
209 SCRUB_HW_SRC, /* Hardware scrub only errors */
210 SCRUB_HW_PROG_SRC, /* Progressive hardware scrub from an error */
211 SCRUB_HW_TUNABLE /* Hardware scrub frequency is tunable */
212};
213
214#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)
Douglas Thompson522a94b2007-07-19 01:49:41 -0700215#define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC)
216#define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700217#define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE)
218#define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG)
Douglas Thompson522a94b2007-07-19 01:49:41 -0700219#define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC)
220#define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700221#define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE)
222
223/* FIXME - should have notify capabilities: NMI, LOG, PROC, etc */
224
Dave Jiang91b99042007-07-19 01:49:52 -0700225/* EDAC internal operation states */
226#define OP_ALLOC 0x100
227#define OP_RUNNING_POLL 0x201
228#define OP_RUNNING_INTERRUPT 0x202
229#define OP_RUNNING_POLL_INTR 0x203
230#define OP_OFFLINE 0x300
231
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700232/*
233 * There are several things to be aware of that aren't at all obvious:
234 *
235 *
236 * SOCKETS, SOCKET SETS, BANKS, ROWS, CHIP-SELECT ROWS, CHANNELS, etc..
237 *
238 * These are some of the many terms that are thrown about that don't always
239 * mean what people think they mean (Inconceivable!). In the interest of
240 * creating a common ground for discussion, terms and their definitions
241 * will be established.
242 *
243 * Memory devices: The individual chip on a memory stick. These devices
244 * commonly output 4 and 8 bits each. Grouping several
245 * of these in parallel provides 64 bits which is common
246 * for a memory stick.
247 *
248 * Memory Stick: A printed circuit board that agregates multiple
249 * memory devices in parallel. This is the atomic
250 * memory component that is purchaseable by Joe consumer
251 * and loaded into a memory socket.
252 *
253 * Socket: A physical connector on the motherboard that accepts
254 * a single memory stick.
255 *
256 * Channel: Set of memory devices on a memory stick that must be
257 * grouped in parallel with one or more additional
258 * channels from other memory sticks. This parallel
259 * grouping of the output from multiple channels are
260 * necessary for the smallest granularity of memory access.
261 * Some memory controllers are capable of single channel -
262 * which means that memory sticks can be loaded
263 * individually. Other memory controllers are only
264 * capable of dual channel - which means that memory
265 * sticks must be loaded as pairs (see "socket set").
266 *
267 * Chip-select row: All of the memory devices that are selected together.
268 * for a single, minimum grain of memory access.
269 * This selects all of the parallel memory devices across
270 * all of the parallel channels. Common chip-select rows
271 * for single channel are 64 bits, for dual channel 128
272 * bits.
273 *
274 * Single-Ranked stick: A Single-ranked stick has 1 chip-select row of memmory.
275 * Motherboards commonly drive two chip-select pins to
276 * a memory stick. A single-ranked stick, will occupy
277 * only one of those rows. The other will be unused.
278 *
279 * Double-Ranked stick: A double-ranked stick has two chip-select rows which
280 * access different sets of memory devices. The two
281 * rows cannot be accessed concurrently.
282 *
283 * Double-sided stick: DEPRECATED TERM, see Double-Ranked stick.
284 * A double-sided stick has two chip-select rows which
285 * access different sets of memory devices. The two
286 * rows cannot be accessed concurrently. "Double-sided"
287 * is irrespective of the memory devices being mounted
288 * on both sides of the memory stick.
289 *
Anand Gadiyar411c9402009-07-07 15:24:23 +0530290 * Socket set: All of the memory sticks that are required for
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700291 * a single memory access or all of the memory sticks
292 * spanned by a chip-select row. A single socket set
293 * has two chip-select rows and if double-sided sticks
294 * are used these will occupy those chip-select rows.
295 *
296 * Bank: This term is avoided because it is unclear when
297 * needing to distinguish between chip-select rows and
298 * socket sets.
299 *
300 * Controller pages:
301 *
302 * Physical pages:
303 *
304 * Virtual pages:
305 *
306 *
307 * STRUCTURE ORGANIZATION AND CHOICES
308 *
309 *
310 *
311 * PS - I enjoyed writing all that about as much as you enjoyed reading it.
312 */
313
314struct channel_info {
315 int chan_idx; /* channel index */
316 u32 ce_count; /* Correctable Errors for this CHANNEL */
Douglas Thompson079708b2007-07-19 01:49:58 -0700317 char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700318 struct csrow_info *csrow; /* the parent */
319};
320
321struct csrow_info {
322 unsigned long first_page; /* first page number in dimm */
323 unsigned long last_page; /* last page number in dimm */
324 unsigned long page_mask; /* used for interleaving -
325 * 0UL for non intlv
326 */
327 u32 nr_pages; /* number of pages in csrow */
328 u32 grain; /* granularity of reported error in bytes */
329 int csrow_idx; /* the chip-select row */
330 enum dev_type dtype; /* memory device type */
331 u32 ue_count; /* Uncorrectable Errors for this csrow */
332 u32 ce_count; /* Correctable Errors for this csrow */
333 enum mem_type mtype; /* memory csrow type */
334 enum edac_type edac_mode; /* EDAC mode for this csrow */
335 struct mem_ctl_info *mci; /* the parent */
336
337 struct kobject kobj; /* sysfs kobject for this csrow */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700338
Doug Thompson8096cfa2007-07-19 01:50:27 -0700339 /* channel information for this csrow */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700340 u32 nr_channels;
341 struct channel_info *channels;
342};
343
Douglas Thompson42a8e392007-07-19 01:50:10 -0700344/* mcidev_sysfs_attribute structure
345 * used for driver sysfs attributes and in mem_ctl_info
346 * sysfs top level entries
347 */
348struct mcidev_sysfs_attribute {
349 struct attribute attr;
350 ssize_t (*show)(struct mem_ctl_info *,char *);
351 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
352};
353
354/* MEMORY controller information structure
355 */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700356struct mem_ctl_info {
Douglas Thompson079708b2007-07-19 01:49:58 -0700357 struct list_head link; /* for global list of mem_ctl_info structs */
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700358
359 struct module *owner; /* Module owner of this control struct */
360
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700361 unsigned long mtype_cap; /* memory types supported by mc */
362 unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */
363 unsigned long edac_cap; /* configuration capabilities - this is
364 * closely related to edac_ctl_cap. The
365 * difference is that the controller may be
366 * capable of s4ecd4ed which would be listed
367 * in edac_ctl_cap, but if channels aren't
368 * capable of s4ecd4ed then the edac_cap would
369 * not have that capability.
370 */
371 unsigned long scrub_cap; /* chipset scrub capabilities */
372 enum scrub_type scrub_mode; /* current scrub mode */
373
374 /* Translates sdram memory scrub rate given in bytes/sec to the
375 internal representation and configures whatever else needs
376 to be configured.
Douglas Thompson079708b2007-07-19 01:49:58 -0700377 */
378 int (*set_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700379
380 /* Get the current sdram memory scrub rate from the internal
381 representation and converts it to the closest matching
382 bandwith in bytes/sec.
Douglas Thompson079708b2007-07-19 01:49:58 -0700383 */
384 int (*get_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700385
Douglas Thompson42a8e392007-07-19 01:50:10 -0700386
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700387 /* pointer to edac checking routine */
388 void (*edac_check) (struct mem_ctl_info * mci);
389
390 /*
391 * Remaps memory pages: controller pages to physical pages.
392 * For most MC's, this will be NULL.
393 */
394 /* FIXME - why not send the phys page to begin with? */
395 unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700396 unsigned long page);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700397 int mc_idx;
398 int nr_csrows;
399 struct csrow_info *csrows;
400 /*
401 * FIXME - what about controllers on other busses? - IDs must be
402 * unique. dev pointer should be sufficiently unique, but
403 * BUS:SLOT.FUNC numbers may not be unique.
404 */
405 struct device *dev;
406 const char *mod_name;
407 const char *mod_ver;
408 const char *ctl_name;
Dave Jiangc4192702007-07-19 01:49:47 -0700409 const char *dev_name;
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700410 char proc_name[MC_PROC_NAME_MAX_LEN + 1];
411 void *pvt_info;
412 u32 ue_noinfo_count; /* Uncorrectable Errors w/o info */
413 u32 ce_noinfo_count; /* Correctable Errors w/o info */
414 u32 ue_count; /* Total Uncorrectable Errors for this MC */
415 u32 ce_count; /* Total Correctable Errors for this MC */
416 unsigned long start_time; /* mci load start time (in jiffies) */
417
418 /* this stuff is for safe removal of mc devices from global list while
419 * NMI handlers may be traversing list
420 */
421 struct rcu_head rcu;
422 struct completion complete;
423
424 /* edac sysfs device control */
425 struct kobject edac_mci_kobj;
Dave Jiang81d87cb2007-07-19 01:49:52 -0700426
Douglas Thompson42a8e392007-07-19 01:50:10 -0700427 /* Additional top controller level attributes, but specified
428 * by the low level driver.
429 *
430 * Set by the low level driver to provide attributes at the
431 * controller level, same level as 'ue_count' and 'ce_count' above.
432 * An array of structures, NULL terminated
433 *
434 * If attributes are desired, then set to array of attributes
435 * If no attributes are desired, leave NULL
436 */
437 struct mcidev_sysfs_attribute *mc_driver_sysfs_attributes;
438
Dave Jiang81d87cb2007-07-19 01:49:52 -0700439 /* work struct for this MC */
Dave Jiang81d87cb2007-07-19 01:49:52 -0700440 struct delayed_work work;
Douglas Thompson86aa8cb2007-07-19 01:50:01 -0700441
Dave Jiang81d87cb2007-07-19 01:49:52 -0700442 /* the internal state of this controller instance */
443 int op_state;
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700444};
445
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700446/*
Douglas Thompson42a8e392007-07-19 01:50:10 -0700447 * The following are the structures to provide for a generic
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700448 * or abstract 'edac_device'. This set of structures and the
449 * code that implements the APIs for the same, provide for
450 * registering EDAC type devices which are NOT standard memory.
451 *
452 * CPU caches (L1 and L2)
453 * DMA engines
454 * Core CPU swithces
455 * Fabric switch units
456 * PCIe interface controllers
457 * other EDAC/ECC type devices that can be monitored for
458 * errors, etc.
459 *
460 * It allows for a 2 level set of hiearchry. For example:
461 *
462 * cache could be composed of L1, L2 and L3 levels of cache.
463 * Each CPU core would have its own L1 cache, while sharing
464 * L2 and maybe L3 caches.
465 *
466 * View them arranged, via the sysfs presentation:
467 * /sys/devices/system/edac/..
468 *
469 * mc/ <existing memory device directory>
470 * cpu/cpu0/.. <L1 and L2 block directory>
471 * /L1-cache/ce_count
472 * /ue_count
473 * /L2-cache/ce_count
474 * /ue_count
475 * cpu/cpu1/.. <L1 and L2 block directory>
476 * /L1-cache/ce_count
477 * /ue_count
478 * /L2-cache/ce_count
479 * /ue_count
480 * ...
481 *
482 * the L1 and L2 directories would be "edac_device_block's"
483 */
484
485struct edac_device_counter {
Douglas Thompson079708b2007-07-19 01:49:58 -0700486 u32 ue_count;
487 u32 ce_count;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700488};
489
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700490/* forward reference */
491struct edac_device_ctl_info;
492struct edac_device_block;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700493
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700494/* edac_dev_sysfs_attribute structure
495 * used for driver sysfs attributes in mem_ctl_info
496 * for extra controls and attributes:
497 * like high level error Injection controls
498 */
499struct edac_dev_sysfs_attribute {
500 struct attribute attr;
501 ssize_t (*show)(struct edac_device_ctl_info *, char *);
502 ssize_t (*store)(struct edac_device_ctl_info *, const char *, size_t);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700503};
504
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700505/* edac_dev_sysfs_block_attribute structure
Doug Thompsonb2a4ac02007-07-19 01:50:33 -0700506 *
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700507 * used in leaf 'block' nodes for adding controls/attributes
Doug Thompsonb2a4ac02007-07-19 01:50:33 -0700508 *
509 * each block in each instance of the containing control structure
510 * can have an array of the following. The show and store functions
511 * will be filled in with the show/store function in the
512 * low level driver.
513 *
514 * The 'value' field will be the actual value field used for
515 * counting
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700516 */
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700517struct edac_dev_sysfs_block_attribute {
518 struct attribute attr;
519 ssize_t (*show)(struct kobject *, struct attribute *, char *);
520 ssize_t (*store)(struct kobject *, struct attribute *,
521 const char *, size_t);
522 struct edac_device_block *block;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700523
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700524 unsigned int value;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700525};
526
527/* device block control structure */
528struct edac_device_block {
529 struct edac_device_instance *instance; /* Up Pointer */
Douglas Thompson079708b2007-07-19 01:49:58 -0700530 char name[EDAC_DEVICE_NAME_LEN + 1];
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700531
532 struct edac_device_counter counters; /* basic UE and CE counters */
533
Douglas Thompson079708b2007-07-19 01:49:58 -0700534 int nr_attribs; /* how many attributes */
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700535
536 /* this block's attributes, could be NULL */
537 struct edac_dev_sysfs_block_attribute *block_attributes;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700538
539 /* edac sysfs device control */
540 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700541};
542
543/* device instance control structure */
544struct edac_device_instance {
545 struct edac_device_ctl_info *ctl; /* Up pointer */
546 char name[EDAC_DEVICE_NAME_LEN + 4];
547
548 struct edac_device_counter counters; /* instance counters */
549
Douglas Thompson079708b2007-07-19 01:49:58 -0700550 u32 nr_blocks; /* how many blocks */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700551 struct edac_device_block *blocks; /* block array */
552
553 /* edac sysfs device control */
554 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700555};
556
Douglas Thompson42a8e392007-07-19 01:50:10 -0700557
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700558/*
559 * Abstract edac_device control info structure
560 *
561 */
562struct edac_device_ctl_info {
563 /* for global list of edac_device_ctl_info structs */
564 struct list_head link;
565
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700566 struct module *owner; /* Module owner of this control struct */
567
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700568 int dev_idx;
569
570 /* Per instance controls for this edac_device */
571 int log_ue; /* boolean for logging UEs */
572 int log_ce; /* boolean for logging CEs */
573 int panic_on_ue; /* boolean for panic'ing on an UE */
574 unsigned poll_msec; /* number of milliseconds to poll interval */
575 unsigned long delay; /* number of jiffies for poll_msec */
576
Douglas Thompson42a8e392007-07-19 01:50:10 -0700577 /* Additional top controller level attributes, but specified
578 * by the low level driver.
579 *
580 * Set by the low level driver to provide attributes at the
581 * controller level, same level as 'ue_count' and 'ce_count' above.
582 * An array of structures, NULL terminated
583 *
584 * If attributes are desired, then set to array of attributes
585 * If no attributes are desired, leave NULL
586 */
587 struct edac_dev_sysfs_attribute *sysfs_attributes;
588
589 /* pointer to main 'edac' class in sysfs */
590 struct sysdev_class *edac_class;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700591
592 /* the internal state of this controller instance */
593 int op_state;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700594 /* work struct for this instance */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700595 struct delayed_work work;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700596
597 /* pointer to edac polling checking routine:
Douglas Thompson079708b2007-07-19 01:49:58 -0700598 * If NOT NULL: points to polling check routine
599 * If NULL: Then assumes INTERRUPT operation, where
600 * MC driver will receive events
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700601 */
602 void (*edac_check) (struct edac_device_ctl_info * edac_dev);
603
604 struct device *dev; /* pointer to device structure */
605
606 const char *mod_name; /* module name */
607 const char *ctl_name; /* edac controller name */
Dave Jiangc4192702007-07-19 01:49:47 -0700608 const char *dev_name; /* pci/platform/etc... name */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700609
610 void *pvt_info; /* pointer to 'private driver' info */
611
Douglas Thompson079708b2007-07-19 01:49:58 -0700612 unsigned long start_time; /* edac_device load start time (jiffies) */
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700613
614 /* these are for safe removal of mc devices from global list while
615 * NMI handlers may be traversing list
616 */
617 struct rcu_head rcu;
Douglas Thompson1c3631f2007-07-19 01:50:29 -0700618 struct completion removal_complete;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700619
620 /* sysfs top name under 'edac' directory
621 * and instance name:
Douglas Thompson079708b2007-07-19 01:49:58 -0700622 * cpu/cpu0/...
623 * cpu/cpu1/...
624 * cpu/cpu2/...
625 * ...
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700626 */
627 char name[EDAC_DEVICE_NAME_LEN + 1];
628
629 /* Number of instances supported on this control structure
630 * and the array of those instances
631 */
632 u32 nr_instances;
633 struct edac_device_instance *instances;
634
635 /* Event counters for the this whole EDAC Device */
636 struct edac_device_counter counters;
637
638 /* edac sysfs device control for the 'name'
639 * device this structure controls
640 */
641 struct kobject kobj;
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700642};
643
644/* To get from the instance's wq to the beginning of the ctl structure */
Dave Jiang81d87cb2007-07-19 01:49:52 -0700645#define to_edac_mem_ctl_work(w) \
646 container_of(w, struct mem_ctl_info, work)
647
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700648#define to_edac_device_ctl_work(w) \
649 container_of(w,struct edac_device_ctl_info,work)
650
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700651/*
652 * The alloc() and free() functions for the 'edac_device' control info
653 * structure. A MC driver will allocate one of these for each edac_device
654 * it is going to control/register with the EDAC CORE.
655 */
656extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
Douglas Thompson079708b2007-07-19 01:49:58 -0700657 unsigned sizeof_private,
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700658 char *edac_device_name, unsigned nr_instances,
659 char *edac_block_name, unsigned nr_blocks,
Douglas Thompson079708b2007-07-19 01:49:58 -0700660 unsigned offset_value,
Douglas Thompsonfd309a9d2007-07-19 01:50:25 -0700661 struct edac_dev_sysfs_block_attribute *block_attributes,
Doug Thompsond45e7822007-07-19 01:50:27 -0700662 unsigned nr_attribs,
663 int device_index);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700664
665/* The offset value can be:
666 * -1 indicating no offset value
667 * 0 for zero-based block numbers
668 * 1 for 1-based block number
669 * other for other-based block number
670 */
671#define BLOCK_OFFSET_VALUE_OFF ((unsigned) -1)
672
Douglas Thompson079708b2007-07-19 01:49:58 -0700673extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700674
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700675#ifdef CONFIG_PCI
676
Dave Jiang91b99042007-07-19 01:49:52 -0700677struct edac_pci_counter {
Douglas Thompson079708b2007-07-19 01:49:58 -0700678 atomic_t pe_count;
679 atomic_t npe_count;
Dave Jiang91b99042007-07-19 01:49:52 -0700680};
681
682/*
683 * Abstract edac_pci control info structure
684 *
685 */
686struct edac_pci_ctl_info {
687 /* for global list of edac_pci_ctl_info structs */
688 struct list_head link;
689
690 int pci_idx;
691
Dave Jiang91b99042007-07-19 01:49:52 -0700692 struct sysdev_class *edac_class; /* pointer to class */
693
694 /* the internal state of this controller instance */
695 int op_state;
696 /* work struct for this instance */
Dave Jiang91b99042007-07-19 01:49:52 -0700697 struct delayed_work work;
Dave Jiang91b99042007-07-19 01:49:52 -0700698
699 /* pointer to edac polling checking routine:
Douglas Thompson079708b2007-07-19 01:49:58 -0700700 * If NOT NULL: points to polling check routine
701 * If NULL: Then assumes INTERRUPT operation, where
702 * MC driver will receive events
Dave Jiang91b99042007-07-19 01:49:52 -0700703 */
704 void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
705
706 struct device *dev; /* pointer to device structure */
707
708 const char *mod_name; /* module name */
709 const char *ctl_name; /* edac controller name */
710 const char *dev_name; /* pci/platform/etc... name */
711
712 void *pvt_info; /* pointer to 'private driver' info */
713
Douglas Thompson079708b2007-07-19 01:49:58 -0700714 unsigned long start_time; /* edac_pci load start time (jiffies) */
Dave Jiang91b99042007-07-19 01:49:52 -0700715
716 /* these are for safe removal of devices from global list while
717 * NMI handlers may be traversing list
718 */
719 struct rcu_head rcu;
720 struct completion complete;
721
722 /* sysfs top name under 'edac' directory
723 * and instance name:
Douglas Thompson079708b2007-07-19 01:49:58 -0700724 * cpu/cpu0/...
725 * cpu/cpu1/...
726 * cpu/cpu2/...
727 * ...
Dave Jiang91b99042007-07-19 01:49:52 -0700728 */
729 char name[EDAC_DEVICE_NAME_LEN + 1];
730
731 /* Event counters for the this whole EDAC Device */
732 struct edac_pci_counter counters;
733
734 /* edac sysfs device control for the 'name'
735 * device this structure controls
736 */
737 struct kobject kobj;
738 struct completion kobj_complete;
739};
740
741#define to_edac_pci_ctl_work(w) \
742 container_of(w, struct edac_pci_ctl_info,work)
743
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700744/* write all or some bits in a byte-register*/
745static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
Douglas Thompson079708b2007-07-19 01:49:58 -0700746 u8 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700747{
748 if (mask != 0xff) {
749 u8 buf;
750
751 pci_read_config_byte(pdev, offset, &buf);
752 value &= mask;
753 buf &= ~mask;
754 value |= buf;
755 }
756
757 pci_write_config_byte(pdev, offset, value);
758}
759
760/* write all or some bits in a word-register*/
761static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
Douglas Thompson079708b2007-07-19 01:49:58 -0700762 u16 value, u16 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700763{
764 if (mask != 0xffff) {
765 u16 buf;
766
767 pci_read_config_word(pdev, offset, &buf);
768 value &= mask;
769 buf &= ~mask;
770 value |= buf;
771 }
772
773 pci_write_config_word(pdev, offset, value);
774}
775
Jeff Harane6da46b2009-04-13 14:40:20 -0700776/*
777 * pci_write_bits32
778 *
779 * edac local routine to do pci_write_config_dword, but adds
780 * a mask parameter. If mask is all ones, ignore the mask.
781 * Otherwise utilize the mask to isolate specified bits
782 *
783 * write all or some bits in a dword-register
784 */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700785static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
Douglas Thompson079708b2007-07-19 01:49:58 -0700786 u32 value, u32 mask)
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700787{
Jeff Harane6da46b2009-04-13 14:40:20 -0700788 if (mask != 0xffffffff) {
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700789 u32 buf;
790
791 pci_read_config_dword(pdev, offset, &buf);
792 value &= mask;
793 buf &= ~mask;
794 value |= buf;
795 }
796
797 pci_write_config_dword(pdev, offset, value);
798}
799
Douglas Thompson079708b2007-07-19 01:49:58 -0700800#endif /* CONFIG_PCI */
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700801
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700802extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
803 unsigned nr_chans, int edac_index);
804extern int edac_mc_add_mc(struct mem_ctl_info *mci);
805extern void edac_mc_free(struct mem_ctl_info *mci);
Douglas Thompson079708b2007-07-19 01:49:58 -0700806extern struct mem_ctl_info *edac_mc_find(int idx);
Douglas Thompson079708b2007-07-19 01:49:58 -0700807extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700808extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700809 unsigned long page);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700810
811/*
812 * The no info errors are used when error overflows are reported.
813 * There are a limited number of error logging registers that can
814 * be exausted. When all registers are exhausted and an additional
815 * error occurs then an error overflow register records that an
816 * error occured and the type of error, but doesn't have any
817 * further information. The ce/ue versions make for cleaner
818 * reporting logic and function interface - reduces conditional
819 * statement clutter and extra function arguments.
820 */
821extern void edac_mc_handle_ce(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700822 unsigned long page_frame_number,
823 unsigned long offset_in_page,
824 unsigned long syndrome, int row, int channel,
825 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700826extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700827 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700828extern void edac_mc_handle_ue(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700829 unsigned long page_frame_number,
830 unsigned long offset_in_page, int row,
831 const char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700832extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
Douglas Thompson079708b2007-07-19 01:49:58 -0700833 const char *msg);
834extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, unsigned int csrow,
835 unsigned int channel0, unsigned int channel1,
836 char *msg);
837extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow,
838 unsigned int channel, char *msg);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700839
840/*
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700841 * edac_device APIs
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700842 */
Doug Thompsond45e7822007-07-19 01:50:27 -0700843extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
Douglas Thompson079708b2007-07-19 01:49:58 -0700844extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700845extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700846 int inst_nr, int block_nr, const char *msg);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700847extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700848 int inst_nr, int block_nr, const char *msg);
Harry Ciao1dc9b702009-06-17 16:27:59 -0700849extern int edac_device_alloc_index(void);
Douglas Thompsone27e3da2007-07-19 01:49:36 -0700850
Dave Jiang91b99042007-07-19 01:49:52 -0700851/*
852 * edac_pci APIs
853 */
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700854extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
855 const char *edac_pci_name);
Dave Jiang91b99042007-07-19 01:49:52 -0700856
857extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
858
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700859extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
860 unsigned long value);
Dave Jiang91b99042007-07-19 01:49:52 -0700861
Harry Ciao8641a382009-04-02 16:58:47 -0700862extern int edac_pci_alloc_index(void);
Dave Jiang91b99042007-07-19 01:49:52 -0700863extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
Douglas Thompson079708b2007-07-19 01:49:58 -0700864extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
Dave Jiang91b99042007-07-19 01:49:52 -0700865
Doug Thompsonb8f6f972007-07-19 01:50:26 -0700866extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
867 struct device *dev,
868 const char *mod_name);
Dave Jiang91b99042007-07-19 01:49:52 -0700869
870extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
871extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
872extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
873
874/*
875 * edac misc APIs
876 */
Douglas Thompson494d0d52007-07-19 01:50:21 -0700877extern char *edac_op_state_to_string(int op_state);
Douglas Thompson7c9281d2007-07-19 01:49:33 -0700878
879#endif /* _EDAC_CORE_H_ */