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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Tony Lindgrendbdf9ced2005-07-10 19:58:11 +01002 * linux/arch/arm/mach-omap1/board-perseus2.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Modified from board-generic.c
5 *
6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/device.h>
17#include <linux/delay.h>
18#include <linux/mtd/mtd.h>
19#include <linux/mtd/partitions.h>
20
21#include <asm/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/flash.h>
25#include <asm/mach/map.h>
26
Tony Lindgren7c38cf02005-09-08 23:07:38 +010027#include <asm/arch/tc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <asm/arch/gpio.h>
29#include <asm/arch/mux.h>
30#include <asm/arch/fpga.h>
Tony Lindgrend48af152005-07-10 19:58:17 +010031#include <asm/arch/common.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33static struct resource smc91x_resources[] = {
34 [0] = {
35 .start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
36 .end = H2P2_DBG_FPGA_ETHR_START + 0xf,
37 .flags = IORESOURCE_MEM,
38 },
39 [1] = {
40 .start = INT_730_MPU_EXT_NIRQ,
41 .end = 0,
42 .flags = IORESOURCE_IRQ,
43 },
44};
45
46static int __initdata p2_serial_ports[OMAP_MAX_NR_PORTS] = {1, 1, 0};
47
48static struct mtd_partition p2_partitions[] = {
49 /* bootloader (U-Boot, etc) in first sector */
50 {
51 .name = "bootloader",
52 .offset = 0,
53 .size = SZ_128K,
54 .mask_flags = MTD_WRITEABLE, /* force read-only */
55 },
56 /* bootloader params in the next sector */
57 {
58 .name = "params",
59 .offset = MTDPART_OFS_APPEND,
60 .size = SZ_128K,
61 .mask_flags = 0,
62 },
63 /* kernel */
64 {
65 .name = "kernel",
66 .offset = MTDPART_OFS_APPEND,
67 .size = SZ_2M,
68 .mask_flags = 0
69 },
70 /* rest of flash is a file system */
71 {
72 .name = "rootfs",
73 .offset = MTDPART_OFS_APPEND,
74 .size = MTDPART_SIZ_FULL,
75 .mask_flags = 0
76 },
77};
78
79static struct flash_platform_data p2_flash_data = {
80 .map_name = "cfi_probe",
81 .width = 2,
82 .parts = p2_partitions,
83 .nr_parts = ARRAY_SIZE(p2_partitions),
84};
85
86static struct resource p2_flash_resource = {
Tony Lindgren7c38cf02005-09-08 23:07:38 +010087 .start = OMAP_CS0_PHYS,
88 .end = OMAP_CS0_PHYS + SZ_32M - 1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070089 .flags = IORESOURCE_MEM,
90};
91
92static struct platform_device p2_flash_device = {
93 .name = "omapflash",
94 .id = 0,
95 .dev = {
96 .platform_data = &p2_flash_data,
97 },
98 .num_resources = 1,
99 .resource = &p2_flash_resource,
100};
101
102static struct platform_device smc91x_device = {
103 .name = "smc91x",
104 .id = 0,
105 .num_resources = ARRAY_SIZE(smc91x_resources),
106 .resource = smc91x_resources,
107};
108
109static struct platform_device *devices[] __initdata = {
110 &p2_flash_device,
111 &smc91x_device,
112};
113
114static void __init omap_perseus2_init(void)
115{
116 (void) platform_add_devices(devices, ARRAY_SIZE(devices));
117}
118
119static void __init perseus2_init_smc91x(void)
120{
121 fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
122 mdelay(50);
123 fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
124 H2P2_DBG_FPGA_LAN_RESET);
125 mdelay(50);
126}
127
128void omap_perseus2_init_irq(void)
129{
130 omap_init_irq();
131 omap_gpio_init();
132 perseus2_init_smc91x();
133}
134
135/* Only FPGA needs to be mapped here. All others are done with ioremap */
136static struct map_desc omap_perseus2_io_desc[] __initdata = {
137 {H2P2_DBG_FPGA_BASE, H2P2_DBG_FPGA_START, H2P2_DBG_FPGA_SIZE,
138 MT_DEVICE},
139};
140
141static void __init omap_perseus2_map_io(void)
142{
Tony Lindgrend48af152005-07-10 19:58:17 +0100143 omap_map_common_io();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 iotable_init(omap_perseus2_io_desc,
145 ARRAY_SIZE(omap_perseus2_io_desc));
146
147 /* Early, board-dependent init */
148
149 /*
150 * Hold GSM Reset until needed
151 */
152 omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
153
154 /*
155 * UARTs -> done automagically by 8250 driver
156 */
157
158 /*
159 * CSx timings, GPIO Mux ... setup
160 */
161
162 /* Flash: CS0 timings setup */
163 omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
164 omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
165
166 /*
167 * Ethernet support trough the debug board
168 * CS1 timings setup
169 */
170 omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
171 omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
172
173 /*
174 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
175 * It is used as the Ethernet controller interrupt
176 */
177 omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
178 omap_serial_init(p2_serial_ports);
179}
180
181MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
Russell Kinge9dea0c2005-07-03 17:38:58 +0100182 /* Maintainer: Kevin Hilman <kjh@hilman.org> */
183 .phys_ram = 0x10000000,
184 .phys_io = 0xfff00000,
185 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
186 .boot_params = 0x10000100,
187 .map_io = omap_perseus2_map_io,
188 .init_irq = omap_perseus2_init_irq,
189 .init_machine = omap_perseus2_init,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190 .timer = &omap_timer,
191MACHINE_END