Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1 | /* |
| 2 | * rt298.c -- RT298 ALSA SoC audio codec driver |
| 3 | * |
| 4 | * Copyright 2015 Realtek Semiconductor Corp. |
| 5 | * Author: Bard Liao <bardliao@realtek.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/moduleparam.h> |
| 14 | #include <linux/init.h> |
| 15 | #include <linux/delay.h> |
| 16 | #include <linux/pm.h> |
| 17 | #include <linux/i2c.h> |
| 18 | #include <linux/platform_device.h> |
| 19 | #include <linux/spi/spi.h> |
| 20 | #include <linux/acpi.h> |
| 21 | #include <sound/core.h> |
| 22 | #include <sound/pcm.h> |
| 23 | #include <sound/pcm_params.h> |
| 24 | #include <sound/soc.h> |
| 25 | #include <sound/soc-dapm.h> |
| 26 | #include <sound/initval.h> |
| 27 | #include <sound/tlv.h> |
| 28 | #include <sound/jack.h> |
| 29 | #include <linux/workqueue.h> |
| 30 | #include <sound/rt298.h> |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 31 | |
| 32 | #include "rl6347a.h" |
| 33 | #include "rt298.h" |
| 34 | |
| 35 | #define RT298_VENDOR_ID 0x10ec0298 |
| 36 | |
| 37 | struct rt298_priv { |
| 38 | struct reg_default *index_cache; |
| 39 | int index_cache_size; |
| 40 | struct regmap *regmap; |
| 41 | struct snd_soc_codec *codec; |
| 42 | struct rt298_platform_data pdata; |
| 43 | struct i2c_client *i2c; |
| 44 | struct snd_soc_jack *jack; |
| 45 | struct delayed_work jack_detect_work; |
| 46 | int sys_clk; |
| 47 | int clk_id; |
| 48 | int is_hp_in; |
| 49 | }; |
| 50 | |
Axel Lin | 3943b9e | 2015-10-05 21:23:48 +0800 | [diff] [blame] | 51 | static const struct reg_default rt298_index_def[] = { |
Bard Liao | 7ba6e4e | 2015-10-16 15:21:32 +0800 | [diff] [blame] | 52 | { 0x01, 0xa5a8 }, |
| 53 | { 0x02, 0x8e95 }, |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 54 | { 0x03, 0x0002 }, |
Bard Liao | 7ba6e4e | 2015-10-16 15:21:32 +0800 | [diff] [blame] | 55 | { 0x04, 0xaf67 }, |
| 56 | { 0x08, 0x200f }, |
| 57 | { 0x09, 0xd010 }, |
| 58 | { 0x0a, 0x0100 }, |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 59 | { 0x0b, 0x0000 }, |
| 60 | { 0x0d, 0x2800 }, |
Bard Liao | 7ba6e4e | 2015-10-16 15:21:32 +0800 | [diff] [blame] | 61 | { 0x0f, 0x0022 }, |
| 62 | { 0x19, 0x0217 }, |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 63 | { 0x20, 0x0020 }, |
| 64 | { 0x33, 0x0208 }, |
| 65 | { 0x46, 0x0300 }, |
Bard Liao | 7ba6e4e | 2015-10-16 15:21:32 +0800 | [diff] [blame] | 66 | { 0x49, 0x4004 }, |
| 67 | { 0x4f, 0x50c9 }, |
| 68 | { 0x50, 0x3000 }, |
| 69 | { 0x63, 0x1b02 }, |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 70 | { 0x67, 0x1111 }, |
| 71 | { 0x68, 0x1016 }, |
| 72 | { 0x69, 0x273f }, |
| 73 | }; |
| 74 | #define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def) |
| 75 | |
| 76 | static const struct reg_default rt298_reg[] = { |
| 77 | { 0x00170500, 0x00000400 }, |
| 78 | { 0x00220000, 0x00000031 }, |
| 79 | { 0x00239000, 0x0000007f }, |
| 80 | { 0x0023a000, 0x0000007f }, |
| 81 | { 0x00270500, 0x00000400 }, |
| 82 | { 0x00370500, 0x00000400 }, |
| 83 | { 0x00870500, 0x00000400 }, |
| 84 | { 0x00920000, 0x00000031 }, |
| 85 | { 0x00935000, 0x000000c3 }, |
| 86 | { 0x00936000, 0x000000c3 }, |
| 87 | { 0x00970500, 0x00000400 }, |
| 88 | { 0x00b37000, 0x00000097 }, |
| 89 | { 0x00b37200, 0x00000097 }, |
| 90 | { 0x00b37300, 0x00000097 }, |
| 91 | { 0x00c37000, 0x00000000 }, |
| 92 | { 0x00c37100, 0x00000080 }, |
| 93 | { 0x01270500, 0x00000400 }, |
| 94 | { 0x01370500, 0x00000400 }, |
| 95 | { 0x01371f00, 0x411111f0 }, |
| 96 | { 0x01439000, 0x00000080 }, |
| 97 | { 0x0143a000, 0x00000080 }, |
| 98 | { 0x01470700, 0x00000000 }, |
| 99 | { 0x01470500, 0x00000400 }, |
| 100 | { 0x01470c00, 0x00000000 }, |
| 101 | { 0x01470100, 0x00000000 }, |
| 102 | { 0x01837000, 0x00000000 }, |
| 103 | { 0x01870500, 0x00000400 }, |
| 104 | { 0x02050000, 0x00000000 }, |
| 105 | { 0x02139000, 0x00000080 }, |
| 106 | { 0x0213a000, 0x00000080 }, |
| 107 | { 0x02170100, 0x00000000 }, |
| 108 | { 0x02170500, 0x00000400 }, |
| 109 | { 0x02170700, 0x00000000 }, |
| 110 | { 0x02270100, 0x00000000 }, |
| 111 | { 0x02370100, 0x00000000 }, |
| 112 | { 0x01870700, 0x00000020 }, |
| 113 | { 0x00830000, 0x000000c3 }, |
| 114 | { 0x00930000, 0x000000c3 }, |
| 115 | { 0x01270700, 0x00000000 }, |
| 116 | }; |
| 117 | |
| 118 | static bool rt298_volatile_register(struct device *dev, unsigned int reg) |
| 119 | { |
| 120 | switch (reg) { |
| 121 | case 0 ... 0xff: |
| 122 | case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): |
| 123 | case RT298_GET_HP_SENSE: |
| 124 | case RT298_GET_MIC1_SENSE: |
| 125 | case RT298_PROC_COEF: |
| 126 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0): |
| 127 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0): |
| 128 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0): |
| 129 | return true; |
| 130 | default: |
Bard Liao | a5fe58f | 2015-10-12 21:34:59 +0800 | [diff] [blame] | 131 | return false; |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 132 | } |
| 133 | |
| 134 | |
| 135 | } |
| 136 | |
| 137 | static bool rt298_readable_register(struct device *dev, unsigned int reg) |
| 138 | { |
| 139 | switch (reg) { |
| 140 | case 0 ... 0xff: |
| 141 | case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID): |
| 142 | case RT298_GET_HP_SENSE: |
| 143 | case RT298_GET_MIC1_SENSE: |
| 144 | case RT298_SET_AUDIO_POWER: |
| 145 | case RT298_SET_HPO_POWER: |
| 146 | case RT298_SET_SPK_POWER: |
| 147 | case RT298_SET_DMIC1_POWER: |
| 148 | case RT298_SPK_MUX: |
| 149 | case RT298_HPO_MUX: |
| 150 | case RT298_ADC0_MUX: |
| 151 | case RT298_ADC1_MUX: |
| 152 | case RT298_SET_MIC1: |
| 153 | case RT298_SET_PIN_HPO: |
| 154 | case RT298_SET_PIN_SPK: |
| 155 | case RT298_SET_PIN_DMIC1: |
| 156 | case RT298_SPK_EAPD: |
| 157 | case RT298_SET_AMP_GAIN_HPO: |
| 158 | case RT298_SET_DMIC2_DEFAULT: |
| 159 | case RT298_DACL_GAIN: |
| 160 | case RT298_DACR_GAIN: |
| 161 | case RT298_ADCL_GAIN: |
| 162 | case RT298_ADCR_GAIN: |
| 163 | case RT298_MIC_GAIN: |
| 164 | case RT298_SPOL_GAIN: |
| 165 | case RT298_SPOR_GAIN: |
| 166 | case RT298_HPOL_GAIN: |
| 167 | case RT298_HPOR_GAIN: |
| 168 | case RT298_F_DAC_SWITCH: |
| 169 | case RT298_F_RECMIX_SWITCH: |
| 170 | case RT298_REC_MIC_SWITCH: |
| 171 | case RT298_REC_I2S_SWITCH: |
| 172 | case RT298_REC_LINE_SWITCH: |
| 173 | case RT298_REC_BEEP_SWITCH: |
| 174 | case RT298_DAC_FORMAT: |
| 175 | case RT298_ADC_FORMAT: |
| 176 | case RT298_COEF_INDEX: |
| 177 | case RT298_PROC_COEF: |
| 178 | case RT298_SET_AMP_GAIN_ADC_IN1: |
| 179 | case RT298_SET_AMP_GAIN_ADC_IN2: |
| 180 | case RT298_SET_POWER(RT298_DAC_OUT1): |
| 181 | case RT298_SET_POWER(RT298_DAC_OUT2): |
| 182 | case RT298_SET_POWER(RT298_ADC_IN1): |
| 183 | case RT298_SET_POWER(RT298_ADC_IN2): |
| 184 | case RT298_SET_POWER(RT298_DMIC2): |
| 185 | case RT298_SET_POWER(RT298_MIC1): |
| 186 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0): |
| 187 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0): |
| 188 | case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0): |
| 189 | return true; |
| 190 | default: |
| 191 | return false; |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | #ifdef CONFIG_PM |
| 196 | static void rt298_index_sync(struct snd_soc_codec *codec) |
| 197 | { |
| 198 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 199 | int i; |
| 200 | |
| 201 | for (i = 0; i < INDEX_CACHE_SIZE; i++) { |
| 202 | snd_soc_write(codec, rt298->index_cache[i].reg, |
| 203 | rt298->index_cache[i].def); |
| 204 | } |
| 205 | } |
| 206 | #endif |
| 207 | |
| 208 | static int rt298_support_power_controls[] = { |
| 209 | RT298_DAC_OUT1, |
| 210 | RT298_DAC_OUT2, |
| 211 | RT298_ADC_IN1, |
| 212 | RT298_ADC_IN2, |
| 213 | RT298_MIC1, |
| 214 | RT298_DMIC1, |
| 215 | RT298_DMIC2, |
| 216 | RT298_SPK_OUT, |
| 217 | RT298_HP_OUT, |
| 218 | }; |
| 219 | #define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls) |
| 220 | |
| 221 | static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic) |
| 222 | { |
| 223 | struct snd_soc_dapm_context *dapm; |
| 224 | unsigned int val, buf; |
| 225 | |
| 226 | *hp = false; |
| 227 | *mic = false; |
| 228 | |
| 229 | if (!rt298->codec) |
| 230 | return -EINVAL; |
| 231 | |
| 232 | dapm = snd_soc_codec_get_dapm(rt298->codec); |
| 233 | |
| 234 | if (rt298->pdata.cbj_en) { |
| 235 | regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf); |
| 236 | *hp = buf & 0x80000000; |
| 237 | if (*hp == rt298->is_hp_in) |
| 238 | return -1; |
| 239 | rt298->is_hp_in = *hp; |
| 240 | if (*hp) { |
| 241 | /* power on HV,VERF */ |
| 242 | regmap_update_bits(rt298->regmap, |
| 243 | RT298_DC_GAIN, 0x200, 0x200); |
| 244 | |
| 245 | snd_soc_dapm_force_enable_pin(dapm, "HV"); |
| 246 | snd_soc_dapm_force_enable_pin(dapm, "VREF"); |
| 247 | /* power LDO1 */ |
| 248 | snd_soc_dapm_force_enable_pin(dapm, "LDO1"); |
| 249 | snd_soc_dapm_sync(dapm); |
| 250 | |
| 251 | regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24); |
| 252 | msleep(50); |
| 253 | |
| 254 | regmap_update_bits(rt298->regmap, |
| 255 | RT298_CBJ_CTRL1, 0xfcc0, 0xd400); |
| 256 | msleep(300); |
| 257 | regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val); |
| 258 | |
| 259 | if (0x0070 == (val & 0x0070)) { |
| 260 | *mic = true; |
| 261 | } else { |
| 262 | regmap_update_bits(rt298->regmap, |
| 263 | RT298_CBJ_CTRL1, 0xfcc0, 0xe400); |
| 264 | msleep(300); |
| 265 | regmap_read(rt298->regmap, |
| 266 | RT298_CBJ_CTRL2, &val); |
| 267 | if (0x0070 == (val & 0x0070)) |
| 268 | *mic = true; |
| 269 | else |
| 270 | *mic = false; |
| 271 | } |
| 272 | regmap_update_bits(rt298->regmap, |
| 273 | RT298_DC_GAIN, 0x200, 0x0); |
| 274 | |
| 275 | } else { |
| 276 | *mic = false; |
| 277 | regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20); |
Bard Liao | 9ff49ce | 2016-04-26 18:07:11 +0800 | [diff] [blame^] | 278 | regmap_update_bits(rt298->regmap, |
| 279 | RT298_CBJ_CTRL1, 0x0400, 0x0000); |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 280 | } |
| 281 | } else { |
| 282 | regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf); |
| 283 | *hp = buf & 0x80000000; |
| 284 | regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf); |
| 285 | *mic = buf & 0x80000000; |
| 286 | } |
| 287 | |
| 288 | snd_soc_dapm_disable_pin(dapm, "HV"); |
| 289 | snd_soc_dapm_disable_pin(dapm, "VREF"); |
| 290 | if (!*hp) |
| 291 | snd_soc_dapm_disable_pin(dapm, "LDO1"); |
| 292 | snd_soc_dapm_sync(dapm); |
| 293 | |
| 294 | pr_debug("*hp = %d *mic = %d\n", *hp, *mic); |
| 295 | |
| 296 | return 0; |
| 297 | } |
| 298 | |
| 299 | static void rt298_jack_detect_work(struct work_struct *work) |
| 300 | { |
| 301 | struct rt298_priv *rt298 = |
| 302 | container_of(work, struct rt298_priv, jack_detect_work.work); |
| 303 | int status = 0; |
| 304 | bool hp = false; |
| 305 | bool mic = false; |
| 306 | |
| 307 | if (rt298_jack_detect(rt298, &hp, &mic) < 0) |
| 308 | return; |
| 309 | |
| 310 | if (hp == true) |
| 311 | status |= SND_JACK_HEADPHONE; |
| 312 | |
| 313 | if (mic == true) |
| 314 | status |= SND_JACK_MICROPHONE; |
| 315 | |
| 316 | snd_soc_jack_report(rt298->jack, status, |
| 317 | SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); |
| 318 | } |
| 319 | |
| 320 | int rt298_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack) |
| 321 | { |
| 322 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 323 | |
| 324 | rt298->jack = jack; |
| 325 | |
| 326 | /* Send an initial empty report */ |
| 327 | snd_soc_jack_report(rt298->jack, 0, |
| 328 | SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); |
| 329 | |
| 330 | return 0; |
| 331 | } |
| 332 | EXPORT_SYMBOL_GPL(rt298_mic_detect); |
| 333 | |
| 334 | static int is_mclk_mode(struct snd_soc_dapm_widget *source, |
| 335 | struct snd_soc_dapm_widget *sink) |
| 336 | { |
| 337 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm); |
| 338 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 339 | |
| 340 | if (rt298->clk_id == RT298_SCLK_S_MCLK) |
| 341 | return 1; |
| 342 | else |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0); |
| 347 | static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0); |
| 348 | |
| 349 | static const struct snd_kcontrol_new rt298_snd_controls[] = { |
| 350 | SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN, |
| 351 | RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv), |
| 352 | SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN, |
| 353 | RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv), |
| 354 | SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN, |
| 355 | 0, 0x3, 0, mic_vol_tlv), |
| 356 | SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN, |
| 357 | RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1), |
| 358 | }; |
| 359 | |
| 360 | /* Digital Mixer */ |
| 361 | static const struct snd_kcontrol_new rt298_front_mix[] = { |
| 362 | SOC_DAPM_SINGLE("DAC Switch", RT298_F_DAC_SWITCH, |
| 363 | RT298_MUTE_SFT, 1, 1), |
| 364 | SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH, |
| 365 | RT298_MUTE_SFT, 1, 1), |
| 366 | }; |
| 367 | |
| 368 | /* Analog Input Mixer */ |
| 369 | static const struct snd_kcontrol_new rt298_rec_mix[] = { |
| 370 | SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH, |
| 371 | RT298_MUTE_SFT, 1, 1), |
| 372 | SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH, |
| 373 | RT298_MUTE_SFT, 1, 1), |
| 374 | SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH, |
| 375 | RT298_MUTE_SFT, 1, 1), |
| 376 | SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH, |
| 377 | RT298_MUTE_SFT, 1, 1), |
| 378 | }; |
| 379 | |
| 380 | static const struct snd_kcontrol_new spo_enable_control = |
| 381 | SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK, |
| 382 | RT298_SET_PIN_SFT, 1, 0); |
| 383 | |
| 384 | static const struct snd_kcontrol_new hpol_enable_control = |
| 385 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN, |
| 386 | RT298_MUTE_SFT, 1, 1); |
| 387 | |
| 388 | static const struct snd_kcontrol_new hpor_enable_control = |
| 389 | SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN, |
| 390 | RT298_MUTE_SFT, 1, 1); |
| 391 | |
| 392 | /* ADC0 source */ |
| 393 | static const char * const rt298_adc_src[] = { |
| 394 | "Mic", "RECMIX", "Dmic" |
| 395 | }; |
| 396 | |
| 397 | static const int rt298_adc_values[] = { |
| 398 | 0, 4, 5, |
| 399 | }; |
| 400 | |
| 401 | static SOC_VALUE_ENUM_SINGLE_DECL( |
| 402 | rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT, |
| 403 | RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values); |
| 404 | |
| 405 | static const struct snd_kcontrol_new rt298_adc0_mux = |
| 406 | SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum); |
| 407 | |
| 408 | static SOC_VALUE_ENUM_SINGLE_DECL( |
| 409 | rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT, |
| 410 | RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values); |
| 411 | |
| 412 | static const struct snd_kcontrol_new rt298_adc1_mux = |
| 413 | SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum); |
| 414 | |
| 415 | static const char * const rt298_dac_src[] = { |
| 416 | "Front", "Surround" |
| 417 | }; |
| 418 | /* HP-OUT source */ |
| 419 | static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX, |
| 420 | 0, rt298_dac_src); |
| 421 | |
| 422 | static const struct snd_kcontrol_new rt298_hpo_mux = |
| 423 | SOC_DAPM_ENUM("HPO source", rt298_hpo_enum); |
| 424 | |
| 425 | /* SPK-OUT source */ |
| 426 | static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX, |
| 427 | 0, rt298_dac_src); |
| 428 | |
| 429 | static const struct snd_kcontrol_new rt298_spo_mux = |
| 430 | SOC_DAPM_ENUM("SPO source", rt298_spo_enum); |
| 431 | |
| 432 | static int rt298_spk_event(struct snd_soc_dapm_widget *w, |
| 433 | struct snd_kcontrol *kcontrol, int event) |
| 434 | { |
| 435 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
| 436 | |
| 437 | switch (event) { |
| 438 | case SND_SOC_DAPM_POST_PMU: |
| 439 | snd_soc_write(codec, |
| 440 | RT298_SPK_EAPD, RT298_SET_EAPD_HIGH); |
| 441 | break; |
| 442 | case SND_SOC_DAPM_PRE_PMD: |
| 443 | snd_soc_write(codec, |
| 444 | RT298_SPK_EAPD, RT298_SET_EAPD_LOW); |
| 445 | break; |
| 446 | |
| 447 | default: |
| 448 | return 0; |
| 449 | } |
| 450 | |
| 451 | return 0; |
| 452 | } |
| 453 | |
| 454 | static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w, |
| 455 | struct snd_kcontrol *kcontrol, int event) |
| 456 | { |
| 457 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
| 458 | |
| 459 | switch (event) { |
| 460 | case SND_SOC_DAPM_POST_PMU: |
| 461 | snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0x20); |
| 462 | break; |
| 463 | case SND_SOC_DAPM_PRE_PMD: |
| 464 | snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0); |
| 465 | break; |
| 466 | default: |
| 467 | return 0; |
| 468 | } |
| 469 | |
| 470 | return 0; |
| 471 | } |
| 472 | |
| 473 | static int rt298_adc_event(struct snd_soc_dapm_widget *w, |
| 474 | struct snd_kcontrol *kcontrol, int event) |
| 475 | { |
| 476 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
| 477 | unsigned int nid; |
| 478 | |
| 479 | nid = (w->reg >> 20) & 0xff; |
| 480 | |
| 481 | switch (event) { |
| 482 | case SND_SOC_DAPM_POST_PMU: |
| 483 | snd_soc_update_bits(codec, |
| 484 | VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), |
| 485 | 0x7080, 0x7000); |
Bard Liao | 3c9e014 | 2016-04-26 18:07:10 +0800 | [diff] [blame] | 486 | /* If MCLK doesn't exist, reset AD filter */ |
| 487 | if (!(snd_soc_read(codec, RT298_VAD_CTRL) & 0x200)) { |
| 488 | pr_info("NO MCLK\n"); |
| 489 | switch (nid) { |
| 490 | case RT298_ADC_IN1: |
| 491 | snd_soc_update_bits(codec, |
| 492 | RT298_D_FILTER_CTRL, 0x2, 0x2); |
| 493 | mdelay(10); |
| 494 | snd_soc_update_bits(codec, |
| 495 | RT298_D_FILTER_CTRL, 0x2, 0x0); |
| 496 | break; |
| 497 | case RT298_ADC_IN2: |
| 498 | snd_soc_update_bits(codec, |
| 499 | RT298_D_FILTER_CTRL, 0x4, 0x4); |
| 500 | mdelay(10); |
| 501 | snd_soc_update_bits(codec, |
| 502 | RT298_D_FILTER_CTRL, 0x4, 0x0); |
| 503 | break; |
| 504 | } |
| 505 | } |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 506 | break; |
| 507 | case SND_SOC_DAPM_PRE_PMD: |
| 508 | snd_soc_update_bits(codec, |
| 509 | VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0), |
| 510 | 0x7080, 0x7080); |
| 511 | break; |
| 512 | default: |
| 513 | return 0; |
| 514 | } |
| 515 | |
| 516 | return 0; |
| 517 | } |
| 518 | |
| 519 | static int rt298_mic1_event(struct snd_soc_dapm_widget *w, |
| 520 | struct snd_kcontrol *kcontrol, int event) |
| 521 | { |
| 522 | struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); |
| 523 | |
| 524 | switch (event) { |
| 525 | case SND_SOC_DAPM_PRE_PMU: |
| 526 | snd_soc_update_bits(codec, |
| 527 | RT298_A_BIAS_CTRL3, 0xc000, 0x8000); |
| 528 | snd_soc_update_bits(codec, |
| 529 | RT298_A_BIAS_CTRL2, 0xc000, 0x8000); |
| 530 | break; |
| 531 | case SND_SOC_DAPM_POST_PMD: |
| 532 | snd_soc_update_bits(codec, |
| 533 | RT298_A_BIAS_CTRL3, 0xc000, 0x0000); |
| 534 | snd_soc_update_bits(codec, |
| 535 | RT298_A_BIAS_CTRL2, 0xc000, 0x0000); |
| 536 | break; |
| 537 | default: |
| 538 | return 0; |
| 539 | } |
| 540 | |
| 541 | return 0; |
| 542 | } |
| 543 | |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 544 | static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = { |
| 545 | |
| 546 | SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1, |
| 547 | 12, 1, NULL, 0), |
| 548 | SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1, |
Bard Liao | 9ff49ce | 2016-04-26 18:07:11 +0800 | [diff] [blame^] | 549 | 0, 1, NULL, 0), |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 550 | SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2, |
| 551 | 1, 0, NULL, 0), |
| 552 | SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2, |
| 553 | 2, 0, NULL, 0), |
| 554 | SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2, |
| 555 | 3, 0, NULL, 0), |
| 556 | SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2, |
| 557 | 4, 1, NULL, 0), |
| 558 | SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1, |
| 559 | 13, 1, NULL, 0), |
| 560 | |
| 561 | |
| 562 | SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1, |
| 563 | 5, 0, NULL, 0), |
| 564 | SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM, |
| 565 | 0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU | |
| 566 | SND_SOC_DAPM_POST_PMD), |
| 567 | |
| 568 | /* Input Lines */ |
| 569 | SND_SOC_DAPM_INPUT("DMIC1 Pin"), |
| 570 | SND_SOC_DAPM_INPUT("DMIC2 Pin"), |
| 571 | SND_SOC_DAPM_INPUT("MIC1"), |
| 572 | SND_SOC_DAPM_INPUT("LINE1"), |
| 573 | SND_SOC_DAPM_INPUT("Beep"), |
| 574 | |
| 575 | /* DMIC */ |
| 576 | SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1, |
| 577 | NULL, 0, rt298_set_dmic1_event, |
| 578 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 579 | SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1, |
| 580 | NULL, 0), |
| 581 | SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM, |
| 582 | 0, 0, NULL, 0), |
| 583 | |
| 584 | /* REC Mixer */ |
| 585 | SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0, |
| 586 | rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)), |
| 587 | |
| 588 | /* ADCs */ |
| 589 | SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0), |
| 590 | SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0), |
| 591 | |
| 592 | /* ADC Mux */ |
| 593 | SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1, |
| 594 | &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD | |
| 595 | SND_SOC_DAPM_POST_PMU), |
| 596 | SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1, |
| 597 | &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD | |
| 598 | SND_SOC_DAPM_POST_PMU), |
| 599 | |
| 600 | /* Audio Interface */ |
| 601 | SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 602 | SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0), |
| 603 | SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0), |
| 604 | SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0), |
| 605 | |
| 606 | /* Output Side */ |
| 607 | /* DACs */ |
| 608 | SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0), |
| 609 | SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0), |
| 610 | |
| 611 | /* Output Mux */ |
| 612 | SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux), |
| 613 | SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux), |
| 614 | |
| 615 | SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO, |
| 616 | RT298_SET_PIN_SFT, 0, NULL, 0), |
| 617 | |
| 618 | /* Output Mixer */ |
| 619 | SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1, |
| 620 | rt298_front_mix, ARRAY_SIZE(rt298_front_mix)), |
| 621 | SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1, |
| 622 | NULL, 0), |
| 623 | |
| 624 | /* Output Pga */ |
| 625 | SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0, |
| 626 | &spo_enable_control, rt298_spk_event, |
| 627 | SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU), |
| 628 | SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0, |
| 629 | &hpol_enable_control), |
| 630 | SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0, |
| 631 | &hpor_enable_control), |
| 632 | |
| 633 | /* Output Lines */ |
| 634 | SND_SOC_DAPM_OUTPUT("SPOL"), |
| 635 | SND_SOC_DAPM_OUTPUT("SPOR"), |
| 636 | SND_SOC_DAPM_OUTPUT("HPO Pin"), |
| 637 | SND_SOC_DAPM_OUTPUT("SPDIF"), |
| 638 | }; |
| 639 | |
| 640 | static const struct snd_soc_dapm_route rt298_dapm_routes[] = { |
| 641 | |
| 642 | {"ADC 0", NULL, "MCLK MODE", is_mclk_mode}, |
| 643 | {"ADC 1", NULL, "MCLK MODE", is_mclk_mode}, |
| 644 | {"Front", NULL, "MCLK MODE", is_mclk_mode}, |
| 645 | {"Surround", NULL, "MCLK MODE", is_mclk_mode}, |
| 646 | |
| 647 | {"HP Power", NULL, "LDO1"}, |
| 648 | {"HP Power", NULL, "LDO2"}, |
| 649 | {"HP Power", NULL, "LV"}, |
| 650 | {"HP Power", NULL, "VREF1"}, |
| 651 | {"HP Power", NULL, "BG_MBIAS"}, |
| 652 | |
| 653 | {"MIC1", NULL, "LDO1"}, |
| 654 | {"MIC1", NULL, "LDO2"}, |
| 655 | {"MIC1", NULL, "HV"}, |
| 656 | {"MIC1", NULL, "LV"}, |
| 657 | {"MIC1", NULL, "VREF"}, |
| 658 | {"MIC1", NULL, "VREF1"}, |
| 659 | {"MIC1", NULL, "BG_MBIAS"}, |
| 660 | {"MIC1", NULL, "MIC1 Input Buffer"}, |
| 661 | |
| 662 | {"SPO", NULL, "LDO1"}, |
| 663 | {"SPO", NULL, "LDO2"}, |
| 664 | {"SPO", NULL, "HV"}, |
| 665 | {"SPO", NULL, "LV"}, |
| 666 | {"SPO", NULL, "VREF"}, |
| 667 | {"SPO", NULL, "VREF1"}, |
| 668 | {"SPO", NULL, "BG_MBIAS"}, |
| 669 | |
| 670 | {"DMIC1", NULL, "DMIC1 Pin"}, |
| 671 | {"DMIC2", NULL, "DMIC2 Pin"}, |
| 672 | {"DMIC1", NULL, "DMIC Receiver"}, |
| 673 | {"DMIC2", NULL, "DMIC Receiver"}, |
| 674 | |
| 675 | {"RECMIX", "Beep Switch", "Beep"}, |
| 676 | {"RECMIX", "Line1 Switch", "LINE1"}, |
| 677 | {"RECMIX", "Mic1 Switch", "MIC1"}, |
| 678 | |
| 679 | {"ADC 0 Mux", "Dmic", "DMIC1"}, |
| 680 | {"ADC 0 Mux", "RECMIX", "RECMIX"}, |
| 681 | {"ADC 0 Mux", "Mic", "MIC1"}, |
| 682 | {"ADC 1 Mux", "Dmic", "DMIC2"}, |
| 683 | {"ADC 1 Mux", "RECMIX", "RECMIX"}, |
| 684 | {"ADC 1 Mux", "Mic", "MIC1"}, |
| 685 | |
| 686 | {"ADC 0", NULL, "ADC 0 Mux"}, |
| 687 | {"ADC 1", NULL, "ADC 1 Mux"}, |
| 688 | |
| 689 | {"AIF1TX", NULL, "ADC 0"}, |
| 690 | {"AIF2TX", NULL, "ADC 1"}, |
| 691 | |
| 692 | {"DAC 0", NULL, "AIF1RX"}, |
| 693 | {"DAC 1", NULL, "AIF2RX"}, |
| 694 | |
| 695 | {"Front", "DAC Switch", "DAC 0"}, |
| 696 | {"Front", "RECMIX Switch", "RECMIX"}, |
| 697 | |
| 698 | {"Surround", NULL, "DAC 1"}, |
| 699 | |
| 700 | {"SPK Mux", "Front", "Front"}, |
| 701 | {"SPK Mux", "Surround", "Surround"}, |
| 702 | |
| 703 | {"HPO Mux", "Front", "Front"}, |
| 704 | {"HPO Mux", "Surround", "Surround"}, |
| 705 | |
| 706 | {"SPO", "Switch", "SPK Mux"}, |
| 707 | {"HPO L", "Switch", "HPO Mux"}, |
| 708 | {"HPO R", "Switch", "HPO Mux"}, |
| 709 | {"HPO L", NULL, "HP Power"}, |
| 710 | {"HPO R", NULL, "HP Power"}, |
| 711 | |
| 712 | {"SPOL", NULL, "SPO"}, |
| 713 | {"SPOR", NULL, "SPO"}, |
| 714 | {"HPO Pin", NULL, "HPO L"}, |
| 715 | {"HPO Pin", NULL, "HPO R"}, |
| 716 | }; |
| 717 | |
| 718 | static int rt298_hw_params(struct snd_pcm_substream *substream, |
| 719 | struct snd_pcm_hw_params *params, |
| 720 | struct snd_soc_dai *dai) |
| 721 | { |
| 722 | struct snd_soc_codec *codec = dai->codec; |
| 723 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 724 | unsigned int val = 0; |
| 725 | int d_len_code; |
| 726 | |
| 727 | switch (params_rate(params)) { |
| 728 | /* bit 14 0:48K 1:44.1K */ |
| 729 | case 44100: |
| 730 | case 48000: |
| 731 | break; |
| 732 | default: |
| 733 | dev_err(codec->dev, "Unsupported sample rate %d\n", |
| 734 | params_rate(params)); |
| 735 | return -EINVAL; |
| 736 | } |
| 737 | switch (rt298->sys_clk) { |
| 738 | case 12288000: |
| 739 | case 24576000: |
| 740 | if (params_rate(params) != 48000) { |
| 741 | dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", |
| 742 | params_rate(params), rt298->sys_clk); |
| 743 | return -EINVAL; |
| 744 | } |
| 745 | break; |
| 746 | case 11289600: |
| 747 | case 22579200: |
| 748 | if (params_rate(params) != 44100) { |
| 749 | dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n", |
| 750 | params_rate(params), rt298->sys_clk); |
| 751 | return -EINVAL; |
| 752 | } |
| 753 | break; |
| 754 | } |
| 755 | |
| 756 | if (params_channels(params) <= 16) { |
| 757 | /* bit 3:0 Number of Channel */ |
| 758 | val |= (params_channels(params) - 1); |
| 759 | } else { |
| 760 | dev_err(codec->dev, "Unsupported channels %d\n", |
| 761 | params_channels(params)); |
| 762 | return -EINVAL; |
| 763 | } |
| 764 | |
| 765 | d_len_code = 0; |
| 766 | switch (params_width(params)) { |
| 767 | /* bit 6:4 Bits per Sample */ |
| 768 | case 16: |
| 769 | d_len_code = 0; |
| 770 | val |= (0x1 << 4); |
| 771 | break; |
| 772 | case 32: |
| 773 | d_len_code = 2; |
| 774 | val |= (0x4 << 4); |
| 775 | break; |
| 776 | case 20: |
| 777 | d_len_code = 1; |
| 778 | val |= (0x2 << 4); |
| 779 | break; |
| 780 | case 24: |
| 781 | d_len_code = 2; |
| 782 | val |= (0x3 << 4); |
| 783 | break; |
| 784 | case 8: |
| 785 | d_len_code = 3; |
| 786 | break; |
| 787 | default: |
| 788 | return -EINVAL; |
| 789 | } |
| 790 | |
| 791 | snd_soc_update_bits(codec, |
| 792 | RT298_I2S_CTRL1, 0x0018, d_len_code << 3); |
| 793 | dev_dbg(codec->dev, "format val = 0x%x\n", val); |
| 794 | |
| 795 | snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x407f, val); |
| 796 | snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x407f, val); |
| 797 | |
| 798 | return 0; |
| 799 | } |
| 800 | |
| 801 | static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) |
| 802 | { |
| 803 | struct snd_soc_codec *codec = dai->codec; |
| 804 | |
| 805 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
| 806 | case SND_SOC_DAIFMT_CBM_CFM: |
| 807 | snd_soc_update_bits(codec, |
| 808 | RT298_I2S_CTRL1, 0x800, 0x800); |
| 809 | break; |
| 810 | case SND_SOC_DAIFMT_CBS_CFS: |
| 811 | snd_soc_update_bits(codec, |
| 812 | RT298_I2S_CTRL1, 0x800, 0x0); |
| 813 | break; |
| 814 | default: |
| 815 | return -EINVAL; |
| 816 | } |
| 817 | |
| 818 | switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 819 | case SND_SOC_DAIFMT_I2S: |
| 820 | snd_soc_update_bits(codec, |
| 821 | RT298_I2S_CTRL1, 0x300, 0x0); |
| 822 | break; |
| 823 | case SND_SOC_DAIFMT_LEFT_J: |
| 824 | snd_soc_update_bits(codec, |
| 825 | RT298_I2S_CTRL1, 0x300, 0x1 << 8); |
| 826 | break; |
| 827 | case SND_SOC_DAIFMT_DSP_A: |
| 828 | snd_soc_update_bits(codec, |
| 829 | RT298_I2S_CTRL1, 0x300, 0x2 << 8); |
| 830 | break; |
| 831 | case SND_SOC_DAIFMT_DSP_B: |
| 832 | snd_soc_update_bits(codec, |
| 833 | RT298_I2S_CTRL1, 0x300, 0x3 << 8); |
| 834 | break; |
| 835 | default: |
| 836 | return -EINVAL; |
| 837 | } |
| 838 | /* bit 15 Stream Type 0:PCM 1:Non-PCM */ |
| 839 | snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x8000, 0); |
| 840 | snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x8000, 0); |
| 841 | |
| 842 | return 0; |
| 843 | } |
| 844 | |
| 845 | static int rt298_set_dai_sysclk(struct snd_soc_dai *dai, |
| 846 | int clk_id, unsigned int freq, int dir) |
| 847 | { |
| 848 | struct snd_soc_codec *codec = dai->codec; |
| 849 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 850 | |
| 851 | dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq); |
| 852 | |
| 853 | if (RT298_SCLK_S_MCLK == clk_id) { |
| 854 | snd_soc_update_bits(codec, |
| 855 | RT298_I2S_CTRL2, 0x0100, 0x0); |
| 856 | snd_soc_update_bits(codec, |
| 857 | RT298_PLL_CTRL1, 0x20, 0x20); |
| 858 | } else { |
| 859 | snd_soc_update_bits(codec, |
| 860 | RT298_I2S_CTRL2, 0x0100, 0x0100); |
| 861 | snd_soc_update_bits(codec, |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 862 | RT298_PLL_CTRL1, 0x20, 0x0); |
| 863 | } |
| 864 | |
| 865 | switch (freq) { |
| 866 | case 19200000: |
| 867 | if (RT298_SCLK_S_MCLK == clk_id) { |
| 868 | dev_err(codec->dev, "Should not use MCLK\n"); |
| 869 | return -EINVAL; |
| 870 | } |
| 871 | snd_soc_update_bits(codec, |
| 872 | RT298_I2S_CTRL2, 0x40, 0x40); |
| 873 | break; |
| 874 | case 24000000: |
| 875 | if (RT298_SCLK_S_MCLK == clk_id) { |
| 876 | dev_err(codec->dev, "Should not use MCLK\n"); |
| 877 | return -EINVAL; |
| 878 | } |
| 879 | snd_soc_update_bits(codec, |
| 880 | RT298_I2S_CTRL2, 0x40, 0x0); |
| 881 | break; |
| 882 | case 12288000: |
| 883 | case 11289600: |
| 884 | snd_soc_update_bits(codec, |
| 885 | RT298_I2S_CTRL2, 0x8, 0x0); |
| 886 | snd_soc_update_bits(codec, |
| 887 | RT298_CLK_DIV, 0xfc1e, 0x0004); |
| 888 | break; |
| 889 | case 24576000: |
| 890 | case 22579200: |
| 891 | snd_soc_update_bits(codec, |
| 892 | RT298_I2S_CTRL2, 0x8, 0x8); |
| 893 | snd_soc_update_bits(codec, |
| 894 | RT298_CLK_DIV, 0xfc1e, 0x5406); |
| 895 | break; |
| 896 | default: |
| 897 | dev_err(codec->dev, "Unsupported system clock\n"); |
| 898 | return -EINVAL; |
| 899 | } |
| 900 | |
| 901 | rt298->sys_clk = freq; |
| 902 | rt298->clk_id = clk_id; |
| 903 | |
| 904 | return 0; |
| 905 | } |
| 906 | |
| 907 | static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio) |
| 908 | { |
| 909 | struct snd_soc_codec *codec = dai->codec; |
| 910 | |
| 911 | dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio); |
| 912 | if (50 == ratio) |
| 913 | snd_soc_update_bits(codec, |
| 914 | RT298_I2S_CTRL1, 0x1000, 0x1000); |
| 915 | else |
| 916 | snd_soc_update_bits(codec, |
| 917 | RT298_I2S_CTRL1, 0x1000, 0x0); |
| 918 | |
| 919 | |
| 920 | return 0; |
| 921 | } |
| 922 | |
| 923 | static int rt298_set_bias_level(struct snd_soc_codec *codec, |
| 924 | enum snd_soc_bias_level level) |
| 925 | { |
| 926 | switch (level) { |
| 927 | case SND_SOC_BIAS_PREPARE: |
| 928 | if (SND_SOC_BIAS_STANDBY == |
| 929 | snd_soc_codec_get_bias_level(codec)) { |
| 930 | snd_soc_write(codec, |
| 931 | RT298_SET_AUDIO_POWER, AC_PWRST_D0); |
| 932 | snd_soc_update_bits(codec, 0x0d, 0x200, 0x200); |
| 933 | snd_soc_update_bits(codec, 0x52, 0x80, 0x0); |
| 934 | mdelay(20); |
| 935 | snd_soc_update_bits(codec, 0x0d, 0x200, 0x0); |
| 936 | snd_soc_update_bits(codec, 0x52, 0x80, 0x80); |
| 937 | } |
| 938 | break; |
| 939 | |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 940 | case SND_SOC_BIAS_STANDBY: |
| 941 | snd_soc_write(codec, |
| 942 | RT298_SET_AUDIO_POWER, AC_PWRST_D3); |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 943 | break; |
| 944 | |
| 945 | default: |
| 946 | break; |
| 947 | } |
| 948 | |
| 949 | return 0; |
| 950 | } |
| 951 | |
| 952 | static irqreturn_t rt298_irq(int irq, void *data) |
| 953 | { |
| 954 | struct rt298_priv *rt298 = data; |
| 955 | bool hp = false; |
| 956 | bool mic = false; |
| 957 | int ret, status = 0; |
| 958 | |
| 959 | ret = rt298_jack_detect(rt298, &hp, &mic); |
| 960 | |
| 961 | /* Clear IRQ */ |
| 962 | regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1); |
| 963 | |
| 964 | if (ret == 0) { |
| 965 | if (hp == true) |
| 966 | status |= SND_JACK_HEADPHONE; |
| 967 | |
| 968 | if (mic == true) |
| 969 | status |= SND_JACK_MICROPHONE; |
| 970 | |
| 971 | snd_soc_jack_report(rt298->jack, status, |
| 972 | SND_JACK_MICROPHONE | SND_JACK_HEADPHONE); |
| 973 | |
| 974 | pm_wakeup_event(&rt298->i2c->dev, 300); |
| 975 | } |
| 976 | |
| 977 | return IRQ_HANDLED; |
| 978 | } |
| 979 | |
| 980 | static int rt298_probe(struct snd_soc_codec *codec) |
| 981 | { |
| 982 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 983 | |
| 984 | rt298->codec = codec; |
| 985 | |
| 986 | if (rt298->i2c->irq) { |
| 987 | regmap_update_bits(rt298->regmap, |
| 988 | RT298_IRQ_CTRL, 0x2, 0x2); |
| 989 | |
| 990 | INIT_DELAYED_WORK(&rt298->jack_detect_work, |
| 991 | rt298_jack_detect_work); |
| 992 | schedule_delayed_work(&rt298->jack_detect_work, |
| 993 | msecs_to_jiffies(1250)); |
| 994 | } |
| 995 | |
| 996 | return 0; |
| 997 | } |
| 998 | |
| 999 | static int rt298_remove(struct snd_soc_codec *codec) |
| 1000 | { |
| 1001 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 1002 | |
| 1003 | cancel_delayed_work_sync(&rt298->jack_detect_work); |
| 1004 | |
| 1005 | return 0; |
| 1006 | } |
| 1007 | |
| 1008 | #ifdef CONFIG_PM |
| 1009 | static int rt298_suspend(struct snd_soc_codec *codec) |
| 1010 | { |
| 1011 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 1012 | |
| 1013 | rt298->is_hp_in = -1; |
| 1014 | regcache_cache_only(rt298->regmap, true); |
| 1015 | regcache_mark_dirty(rt298->regmap); |
| 1016 | |
| 1017 | return 0; |
| 1018 | } |
| 1019 | |
| 1020 | static int rt298_resume(struct snd_soc_codec *codec) |
| 1021 | { |
| 1022 | struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec); |
| 1023 | |
| 1024 | regcache_cache_only(rt298->regmap, false); |
| 1025 | rt298_index_sync(codec); |
| 1026 | regcache_sync(rt298->regmap); |
| 1027 | |
| 1028 | return 0; |
| 1029 | } |
| 1030 | #else |
| 1031 | #define rt298_suspend NULL |
| 1032 | #define rt298_resume NULL |
| 1033 | #endif |
| 1034 | |
| 1035 | #define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000) |
| 1036 | #define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ |
| 1037 | SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8) |
| 1038 | |
| 1039 | static const struct snd_soc_dai_ops rt298_aif_dai_ops = { |
| 1040 | .hw_params = rt298_hw_params, |
| 1041 | .set_fmt = rt298_set_dai_fmt, |
| 1042 | .set_sysclk = rt298_set_dai_sysclk, |
| 1043 | .set_bclk_ratio = rt298_set_bclk_ratio, |
| 1044 | }; |
| 1045 | |
| 1046 | static struct snd_soc_dai_driver rt298_dai[] = { |
| 1047 | { |
| 1048 | .name = "rt298-aif1", |
| 1049 | .id = RT298_AIF1, |
| 1050 | .playback = { |
| 1051 | .stream_name = "AIF1 Playback", |
| 1052 | .channels_min = 1, |
| 1053 | .channels_max = 2, |
| 1054 | .rates = RT298_STEREO_RATES, |
| 1055 | .formats = RT298_FORMATS, |
| 1056 | }, |
| 1057 | .capture = { |
| 1058 | .stream_name = "AIF1 Capture", |
| 1059 | .channels_min = 1, |
| 1060 | .channels_max = 2, |
| 1061 | .rates = RT298_STEREO_RATES, |
| 1062 | .formats = RT298_FORMATS, |
| 1063 | }, |
| 1064 | .ops = &rt298_aif_dai_ops, |
| 1065 | .symmetric_rates = 1, |
| 1066 | }, |
| 1067 | { |
| 1068 | .name = "rt298-aif2", |
| 1069 | .id = RT298_AIF2, |
| 1070 | .playback = { |
| 1071 | .stream_name = "AIF2 Playback", |
| 1072 | .channels_min = 1, |
| 1073 | .channels_max = 2, |
| 1074 | .rates = RT298_STEREO_RATES, |
| 1075 | .formats = RT298_FORMATS, |
| 1076 | }, |
| 1077 | .capture = { |
| 1078 | .stream_name = "AIF2 Capture", |
| 1079 | .channels_min = 1, |
| 1080 | .channels_max = 2, |
| 1081 | .rates = RT298_STEREO_RATES, |
| 1082 | .formats = RT298_FORMATS, |
| 1083 | }, |
| 1084 | .ops = &rt298_aif_dai_ops, |
| 1085 | .symmetric_rates = 1, |
| 1086 | }, |
| 1087 | |
| 1088 | }; |
| 1089 | |
| 1090 | static struct snd_soc_codec_driver soc_codec_dev_rt298 = { |
| 1091 | .probe = rt298_probe, |
| 1092 | .remove = rt298_remove, |
| 1093 | .suspend = rt298_suspend, |
| 1094 | .resume = rt298_resume, |
| 1095 | .set_bias_level = rt298_set_bias_level, |
| 1096 | .idle_bias_off = true, |
| 1097 | .controls = rt298_snd_controls, |
| 1098 | .num_controls = ARRAY_SIZE(rt298_snd_controls), |
| 1099 | .dapm_widgets = rt298_dapm_widgets, |
| 1100 | .num_dapm_widgets = ARRAY_SIZE(rt298_dapm_widgets), |
| 1101 | .dapm_routes = rt298_dapm_routes, |
| 1102 | .num_dapm_routes = ARRAY_SIZE(rt298_dapm_routes), |
| 1103 | }; |
| 1104 | |
| 1105 | static const struct regmap_config rt298_regmap = { |
| 1106 | .reg_bits = 32, |
| 1107 | .val_bits = 32, |
| 1108 | .max_register = 0x02370100, |
| 1109 | .volatile_reg = rt298_volatile_register, |
| 1110 | .readable_reg = rt298_readable_register, |
| 1111 | .reg_write = rl6347a_hw_write, |
| 1112 | .reg_read = rl6347a_hw_read, |
| 1113 | .cache_type = REGCACHE_RBTREE, |
| 1114 | .reg_defaults = rt298_reg, |
| 1115 | .num_reg_defaults = ARRAY_SIZE(rt298_reg), |
| 1116 | }; |
| 1117 | |
| 1118 | static const struct i2c_device_id rt298_i2c_id[] = { |
| 1119 | {"rt298", 0}, |
| 1120 | {} |
| 1121 | }; |
| 1122 | MODULE_DEVICE_TABLE(i2c, rt298_i2c_id); |
| 1123 | |
| 1124 | static const struct acpi_device_id rt298_acpi_match[] = { |
| 1125 | { "INT343A", 0 }, |
| 1126 | {}, |
| 1127 | }; |
| 1128 | MODULE_DEVICE_TABLE(acpi, rt298_acpi_match); |
| 1129 | |
| 1130 | static int rt298_i2c_probe(struct i2c_client *i2c, |
| 1131 | const struct i2c_device_id *id) |
| 1132 | { |
| 1133 | struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev); |
| 1134 | struct rt298_priv *rt298; |
| 1135 | struct device *dev = &i2c->dev; |
| 1136 | const struct acpi_device_id *acpiid; |
| 1137 | int i, ret; |
| 1138 | |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1139 | rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298), |
| 1140 | GFP_KERNEL); |
| 1141 | if (NULL == rt298) |
| 1142 | return -ENOMEM; |
| 1143 | |
| 1144 | rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap); |
| 1145 | if (IS_ERR(rt298->regmap)) { |
| 1146 | ret = PTR_ERR(rt298->regmap); |
| 1147 | dev_err(&i2c->dev, "Failed to allocate register map: %d\n", |
| 1148 | ret); |
| 1149 | return ret; |
| 1150 | } |
| 1151 | |
| 1152 | regmap_read(rt298->regmap, |
| 1153 | RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret); |
| 1154 | if (ret != RT298_VENDOR_ID) { |
| 1155 | dev_err(&i2c->dev, |
| 1156 | "Device with ID register %#x is not rt298\n", ret); |
| 1157 | return -ENODEV; |
| 1158 | } |
| 1159 | |
Axel Lin | 3943b9e | 2015-10-05 21:23:48 +0800 | [diff] [blame] | 1160 | rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def, |
| 1161 | sizeof(rt298_index_def), GFP_KERNEL); |
| 1162 | if (!rt298->index_cache) |
| 1163 | return -ENOMEM; |
| 1164 | |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1165 | rt298->index_cache_size = INDEX_CACHE_SIZE; |
| 1166 | rt298->i2c = i2c; |
| 1167 | i2c_set_clientdata(i2c, rt298); |
| 1168 | |
| 1169 | /* restore codec default */ |
| 1170 | for (i = 0; i < INDEX_CACHE_SIZE; i++) |
| 1171 | regmap_write(rt298->regmap, rt298->index_cache[i].reg, |
| 1172 | rt298->index_cache[i].def); |
| 1173 | for (i = 0; i < ARRAY_SIZE(rt298_reg); i++) |
| 1174 | regmap_write(rt298->regmap, rt298_reg[i].reg, |
| 1175 | rt298_reg[i].def); |
| 1176 | |
| 1177 | if (pdata) |
| 1178 | rt298->pdata = *pdata; |
| 1179 | |
| 1180 | /* enable jack combo mode on supported devices */ |
| 1181 | acpiid = acpi_match_device(dev->driver->acpi_match_table, dev); |
| 1182 | if (acpiid) { |
| 1183 | rt298->pdata = *(struct rt298_platform_data *) |
| 1184 | acpiid->driver_data; |
| 1185 | } |
| 1186 | |
| 1187 | /* VREF Charging */ |
| 1188 | regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80); |
| 1189 | regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860); |
| 1190 | /* Vref2 */ |
| 1191 | regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20); |
| 1192 | |
| 1193 | regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3); |
| 1194 | |
| 1195 | for (i = 0; i < RT298_POWER_REG_LEN; i++) |
| 1196 | regmap_write(rt298->regmap, |
| 1197 | RT298_SET_POWER(rt298_support_power_controls[i]), |
| 1198 | AC_PWRST_D1); |
| 1199 | |
| 1200 | if (!rt298->pdata.cbj_en) { |
| 1201 | regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000); |
| 1202 | regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816); |
| 1203 | regmap_update_bits(rt298->regmap, |
| 1204 | RT298_CBJ_CTRL1, 0xf000, 0xb000); |
| 1205 | } else { |
| 1206 | regmap_update_bits(rt298->regmap, |
| 1207 | RT298_CBJ_CTRL1, 0xf000, 0x5000); |
| 1208 | } |
| 1209 | |
| 1210 | mdelay(10); |
| 1211 | |
| 1212 | if (!rt298->pdata.gpio2_en) |
Bard Liao | f8f2dc4 | 2015-10-21 16:18:18 +0800 | [diff] [blame] | 1213 | regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40); |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1214 | else |
| 1215 | regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0); |
| 1216 | |
| 1217 | mdelay(10); |
| 1218 | |
| 1219 | regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000); |
| 1220 | regmap_update_bits(rt298->regmap, |
| 1221 | RT298_WIND_FILTER_CTRL, 0x0082, 0x0082); |
Bard Liao | 4b2fe38 | 2016-02-24 15:51:26 +0800 | [diff] [blame] | 1222 | |
| 1223 | regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81); |
| 1224 | regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82); |
| 1225 | regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84); |
| 1226 | regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2); |
| 1227 | |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1228 | rt298->is_hp_in = -1; |
| 1229 | |
| 1230 | if (rt298->i2c->irq) { |
| 1231 | ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq, |
| 1232 | IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298); |
| 1233 | if (ret != 0) { |
| 1234 | dev_err(&i2c->dev, |
| 1235 | "Failed to reguest IRQ: %d\n", ret); |
| 1236 | return ret; |
| 1237 | } |
| 1238 | } |
| 1239 | |
| 1240 | ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt298, |
| 1241 | rt298_dai, ARRAY_SIZE(rt298_dai)); |
| 1242 | |
| 1243 | return ret; |
| 1244 | } |
| 1245 | |
| 1246 | static int rt298_i2c_remove(struct i2c_client *i2c) |
| 1247 | { |
| 1248 | struct rt298_priv *rt298 = i2c_get_clientdata(i2c); |
| 1249 | |
| 1250 | if (i2c->irq) |
| 1251 | free_irq(i2c->irq, rt298); |
| 1252 | snd_soc_unregister_codec(&i2c->dev); |
| 1253 | |
| 1254 | return 0; |
| 1255 | } |
| 1256 | |
| 1257 | |
| 1258 | static struct i2c_driver rt298_i2c_driver = { |
| 1259 | .driver = { |
| 1260 | .name = "rt298", |
Bard Liao | 6adcafa | 2015-06-26 10:59:49 +0800 | [diff] [blame] | 1261 | .acpi_match_table = ACPI_PTR(rt298_acpi_match), |
| 1262 | }, |
| 1263 | .probe = rt298_i2c_probe, |
| 1264 | .remove = rt298_i2c_remove, |
| 1265 | .id_table = rt298_i2c_id, |
| 1266 | }; |
| 1267 | |
| 1268 | module_i2c_driver(rt298_i2c_driver); |
| 1269 | |
| 1270 | MODULE_DESCRIPTION("ASoC RT298 driver"); |
| 1271 | MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>"); |
| 1272 | MODULE_LICENSE("GPL"); |