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Ashwin Chaugule337aadf2015-10-02 10:01:19 -04001/*
2 * CPPC (Collaborative Processor Performance Control) methods used
3 * by CPUfreq drivers.
4 *
5 * (C) Copyright 2014, 2015 Linaro Ltd.
6 * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; version 2
11 * of the License.
12 */
13
14#ifndef _CPPC_ACPI_H
15#define _CPPC_ACPI_H
16
17#include <linux/acpi.h>
18#include <linux/mailbox_controller.h>
19#include <linux/mailbox_client.h>
20#include <linux/types.h>
21
22#include <acpi/processor.h>
23
24/* Only support CPPCv2 for now. */
25#define CPPC_NUM_ENT 21
26#define CPPC_REV 2
27
28#define PCC_CMD_COMPLETE 1
29#define MAX_CPC_REG_ENT 19
30
31/* CPPC specific PCC commands. */
32#define CMD_READ 0
33#define CMD_WRITE 1
34
35/* Each register has the folowing format. */
36struct cpc_reg {
37 u8 descriptor;
38 u16 length;
39 u8 space_id;
40 u8 bit_width;
41 u8 bit_offset;
42 u8 access_width;
43 u64 __iomem address;
44} __packed;
45
46/*
47 * Each entry in the CPC table is either
48 * of type ACPI_TYPE_BUFFER or
49 * ACPI_TYPE_INTEGER.
50 */
51struct cpc_register_resource {
52 acpi_object_type type;
53 union {
54 struct cpc_reg reg;
55 u64 int_value;
56 } cpc_entry;
57};
58
59/* Container to hold the CPC details for each CPU */
60struct cpc_desc {
61 int num_entries;
62 int version;
63 int cpu_id;
64 struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
65 struct acpi_psd_package domain_info;
66};
67
68/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
69enum cppc_regs {
70 HIGHEST_PERF,
71 NOMINAL_PERF,
72 LOW_NON_LINEAR_PERF,
73 LOWEST_PERF,
74 GUARANTEED_PERF,
75 DESIRED_PERF,
76 MIN_PERF,
77 MAX_PERF,
78 PERF_REDUC_TOLERANCE,
79 TIME_WINDOW,
80 CTR_WRAP_TIME,
81 REFERENCE_CTR,
82 DELIVERED_CTR,
83 PERF_LIMITED,
84 ENABLE,
85 AUTO_SEL_ENABLE,
86 AUTO_ACT_WINDOW,
87 ENERGY_PERF,
88 REFERENCE_PERF,
89};
90
91/*
92 * Categorization of registers as described
93 * in the ACPI v.5.1 spec.
94 * XXX: Only filling up ones which are used by governors
95 * today.
96 */
97struct cppc_perf_caps {
98 u32 highest_perf;
99 u32 nominal_perf;
100 u32 reference_perf;
101 u32 lowest_perf;
102};
103
104struct cppc_perf_ctrls {
105 u32 max_perf;
106 u32 min_perf;
107 u32 desired_perf;
108};
109
110struct cppc_perf_fb_ctrs {
111 u64 reference;
112 u64 prev_reference;
113 u64 delivered;
114 u64 prev_delivered;
115};
116
117/* Per CPU container for runtime CPPC management. */
118struct cpudata {
119 int cpu;
120 struct cppc_perf_caps perf_caps;
121 struct cppc_perf_ctrls perf_ctrls;
122 struct cppc_perf_fb_ctrs perf_fb_ctrs;
123 struct cpufreq_policy *cur_policy;
124 unsigned int shared_type;
125 cpumask_var_t shared_cpu_map;
126};
127
128extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
129extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
130extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
131extern int acpi_get_psd_map(struct cpudata **);
132
133/* Methods to interact with the PCC mailbox controller. */
134extern struct mbox_chan *
135 pcc_mbox_request_channel(struct mbox_client *, unsigned int);
Ashwin Chaugule337aadf2015-10-02 10:01:19 -0400136
137#endif /* _CPPC_ACPI_H*/