Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 1 | /* |
| 2 | * AK4104 ALSA SoC (ASoC) driver |
| 3 | * |
| 4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/module.h> |
| 13 | #include <sound/core.h> |
| 14 | #include <sound/soc.h> |
| 15 | #include <sound/initval.h> |
| 16 | #include <linux/spi/spi.h> |
| 17 | #include <sound/asoundef.h> |
| 18 | |
| 19 | #include "ak4104.h" |
| 20 | |
| 21 | /* AK4104 registers addresses */ |
| 22 | #define AK4104_REG_CONTROL1 0x00 |
| 23 | #define AK4104_REG_RESERVED 0x01 |
| 24 | #define AK4104_REG_CONTROL2 0x02 |
| 25 | #define AK4104_REG_TX 0x03 |
| 26 | #define AK4104_REG_CHN_STATUS(x) ((x) + 0x04) |
| 27 | #define AK4104_NUM_REGS 10 |
| 28 | |
| 29 | #define AK4104_REG_MASK 0x1f |
| 30 | #define AK4104_READ 0xc0 |
| 31 | #define AK4104_WRITE 0xe0 |
| 32 | #define AK4104_RESERVED_VAL 0x5b |
| 33 | |
| 34 | /* Bit masks for AK4104 registers */ |
| 35 | #define AK4104_CONTROL1_RSTN (1 << 0) |
| 36 | #define AK4104_CONTROL1_PW (1 << 1) |
| 37 | #define AK4104_CONTROL1_DIF0 (1 << 2) |
| 38 | #define AK4104_CONTROL1_DIF1 (1 << 3) |
| 39 | |
| 40 | #define AK4104_CONTROL2_SEL0 (1 << 0) |
| 41 | #define AK4104_CONTROL2_SEL1 (1 << 1) |
| 42 | #define AK4104_CONTROL2_MODE (1 << 2) |
| 43 | |
| 44 | #define AK4104_TX_TXE (1 << 0) |
| 45 | #define AK4104_TX_V (1 << 1) |
| 46 | |
| 47 | #define DRV_NAME "ak4104" |
| 48 | |
| 49 | struct ak4104_private { |
| 50 | struct snd_soc_codec codec; |
| 51 | u8 reg_cache[AK4104_NUM_REGS]; |
| 52 | }; |
| 53 | |
| 54 | static int ak4104_fill_cache(struct snd_soc_codec *codec) |
| 55 | { |
| 56 | int i; |
| 57 | u8 *reg_cache = codec->reg_cache; |
| 58 | struct spi_device *spi = codec->control_data; |
| 59 | |
| 60 | for (i = 0; i < codec->reg_cache_size; i++) { |
| 61 | int ret = spi_w8r8(spi, i | AK4104_READ); |
| 62 | if (ret < 0) { |
| 63 | dev_err(&spi->dev, "SPI write failure\n"); |
| 64 | return ret; |
| 65 | } |
| 66 | |
| 67 | reg_cache[i] = ret; |
| 68 | } |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | static unsigned int ak4104_read_reg_cache(struct snd_soc_codec *codec, |
| 74 | unsigned int reg) |
| 75 | { |
| 76 | u8 *reg_cache = codec->reg_cache; |
| 77 | |
| 78 | if (reg >= codec->reg_cache_size) |
| 79 | return -EINVAL; |
| 80 | |
| 81 | return reg_cache[reg]; |
| 82 | } |
| 83 | |
| 84 | static int ak4104_spi_write(struct snd_soc_codec *codec, unsigned int reg, |
| 85 | unsigned int value) |
| 86 | { |
| 87 | u8 *cache = codec->reg_cache; |
| 88 | struct spi_device *spi = codec->control_data; |
| 89 | |
| 90 | if (reg >= codec->reg_cache_size) |
| 91 | return -EINVAL; |
| 92 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 93 | /* only write to the hardware if value has changed */ |
| 94 | if (cache[reg] != value) { |
Daniel Mack | e555317 | 2010-02-26 14:36:54 +0800 | [diff] [blame] | 95 | u8 tmp[2] = { (reg & AK4104_REG_MASK) | AK4104_WRITE, value }; |
| 96 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 97 | if (spi_write(spi, tmp, sizeof(tmp))) { |
| 98 | dev_err(&spi->dev, "SPI write failed\n"); |
| 99 | return -EIO; |
| 100 | } |
| 101 | |
| 102 | cache[reg] = value; |
| 103 | } |
| 104 | |
| 105 | return 0; |
| 106 | } |
| 107 | |
| 108 | static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai, |
| 109 | unsigned int format) |
| 110 | { |
| 111 | struct snd_soc_codec *codec = codec_dai->codec; |
| 112 | int val = 0; |
| 113 | |
| 114 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); |
| 115 | if (val < 0) |
| 116 | return val; |
| 117 | |
| 118 | val &= ~(AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1); |
| 119 | |
| 120 | /* set DAI format */ |
| 121 | switch (format & SND_SOC_DAIFMT_FORMAT_MASK) { |
| 122 | case SND_SOC_DAIFMT_RIGHT_J: |
| 123 | break; |
| 124 | case SND_SOC_DAIFMT_LEFT_J: |
| 125 | val |= AK4104_CONTROL1_DIF0; |
| 126 | break; |
| 127 | case SND_SOC_DAIFMT_I2S: |
| 128 | val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1; |
| 129 | break; |
| 130 | default: |
| 131 | dev_err(codec->dev, "invalid dai format\n"); |
| 132 | return -EINVAL; |
| 133 | } |
| 134 | |
| 135 | /* This device can only be slave */ |
| 136 | if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) |
| 137 | return -EINVAL; |
| 138 | |
| 139 | return ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); |
| 140 | } |
| 141 | |
| 142 | static int ak4104_hw_params(struct snd_pcm_substream *substream, |
| 143 | struct snd_pcm_hw_params *params, |
| 144 | struct snd_soc_dai *dai) |
| 145 | { |
| 146 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
| 147 | struct snd_soc_device *socdev = rtd->socdev; |
| 148 | struct snd_soc_codec *codec = socdev->card->codec; |
| 149 | int val = 0; |
| 150 | |
| 151 | /* set the IEC958 bits: consumer mode, no copyright bit */ |
| 152 | val |= IEC958_AES0_CON_NOT_COPYRIGHT; |
| 153 | ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(0), val); |
| 154 | |
| 155 | val = 0; |
| 156 | |
| 157 | switch (params_rate(params)) { |
| 158 | case 44100: |
| 159 | val |= IEC958_AES3_CON_FS_44100; |
| 160 | break; |
| 161 | case 48000: |
| 162 | val |= IEC958_AES3_CON_FS_48000; |
| 163 | break; |
| 164 | case 32000: |
| 165 | val |= IEC958_AES3_CON_FS_32000; |
| 166 | break; |
| 167 | default: |
| 168 | dev_err(codec->dev, "unsupported sampling rate\n"); |
| 169 | return -EINVAL; |
| 170 | } |
| 171 | |
| 172 | return ak4104_spi_write(codec, AK4104_REG_CHN_STATUS(3), val); |
| 173 | } |
| 174 | |
Mark Brown | 65ec1cd | 2009-03-11 16:51:31 +0000 | [diff] [blame] | 175 | static struct snd_soc_dai_ops ak4101_dai_ops = { |
| 176 | .hw_params = ak4104_hw_params, |
| 177 | .set_fmt = ak4104_set_dai_fmt, |
| 178 | }; |
| 179 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 180 | struct snd_soc_dai ak4104_dai = { |
| 181 | .name = DRV_NAME, |
| 182 | .playback = { |
| 183 | .stream_name = "Playback", |
| 184 | .channels_min = 2, |
| 185 | .channels_max = 2, |
Daniel Mack | 617b14c | 2010-01-13 11:25:05 +0100 | [diff] [blame] | 186 | .rates = SNDRV_PCM_RATE_8000_192000, |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 187 | .formats = SNDRV_PCM_FMTBIT_S16_LE | |
| 188 | SNDRV_PCM_FMTBIT_S24_3LE | |
| 189 | SNDRV_PCM_FMTBIT_S24_LE |
| 190 | }, |
Mark Brown | 65ec1cd | 2009-03-11 16:51:31 +0000 | [diff] [blame] | 191 | .ops = &ak4101_dai_ops, |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 192 | }; |
| 193 | |
| 194 | static struct snd_soc_codec *ak4104_codec; |
| 195 | |
| 196 | static int ak4104_spi_probe(struct spi_device *spi) |
| 197 | { |
| 198 | struct snd_soc_codec *codec; |
| 199 | struct ak4104_private *ak4104; |
| 200 | int ret, val; |
| 201 | |
| 202 | spi->bits_per_word = 8; |
| 203 | spi->mode = SPI_MODE_0; |
| 204 | ret = spi_setup(spi); |
| 205 | if (ret < 0) |
| 206 | return ret; |
| 207 | |
| 208 | ak4104 = kzalloc(sizeof(struct ak4104_private), GFP_KERNEL); |
| 209 | if (!ak4104) { |
| 210 | dev_err(&spi->dev, "could not allocate codec\n"); |
| 211 | return -ENOMEM; |
| 212 | } |
| 213 | |
| 214 | codec = &ak4104->codec; |
| 215 | mutex_init(&codec->mutex); |
| 216 | INIT_LIST_HEAD(&codec->dapm_widgets); |
| 217 | INIT_LIST_HEAD(&codec->dapm_paths); |
| 218 | |
| 219 | codec->dev = &spi->dev; |
| 220 | codec->name = DRV_NAME; |
| 221 | codec->owner = THIS_MODULE; |
| 222 | codec->dai = &ak4104_dai; |
| 223 | codec->num_dai = 1; |
| 224 | codec->private_data = ak4104; |
| 225 | codec->control_data = spi; |
| 226 | codec->reg_cache = ak4104->reg_cache; |
| 227 | codec->reg_cache_size = AK4104_NUM_REGS; |
| 228 | |
| 229 | /* read all regs and fill the cache */ |
| 230 | ret = ak4104_fill_cache(codec); |
| 231 | if (ret < 0) { |
| 232 | dev_err(&spi->dev, "failed to fill register cache\n"); |
| 233 | return ret; |
| 234 | } |
| 235 | |
| 236 | /* read the 'reserved' register - according to the datasheet, it |
| 237 | * should contain 0x5b. Not a good way to verify the presence of |
| 238 | * the device, but there is no hardware ID register. */ |
| 239 | if (ak4104_read_reg_cache(codec, AK4104_REG_RESERVED) != |
| 240 | AK4104_RESERVED_VAL) { |
| 241 | ret = -ENODEV; |
| 242 | goto error_free_codec; |
| 243 | } |
| 244 | |
| 245 | /* set power-up and non-reset bits */ |
| 246 | val = ak4104_read_reg_cache(codec, AK4104_REG_CONTROL1); |
| 247 | val |= AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN; |
| 248 | ret = ak4104_spi_write(codec, AK4104_REG_CONTROL1, val); |
| 249 | if (ret < 0) |
| 250 | goto error_free_codec; |
| 251 | |
| 252 | /* enable transmitter */ |
| 253 | val = ak4104_read_reg_cache(codec, AK4104_REG_TX); |
| 254 | val |= AK4104_TX_TXE; |
| 255 | ret = ak4104_spi_write(codec, AK4104_REG_TX, val); |
| 256 | if (ret < 0) |
| 257 | goto error_free_codec; |
| 258 | |
| 259 | ak4104_codec = codec; |
| 260 | ret = snd_soc_register_dai(&ak4104_dai); |
| 261 | if (ret < 0) { |
| 262 | dev_err(&spi->dev, "failed to register DAI\n"); |
| 263 | goto error_free_codec; |
| 264 | } |
| 265 | |
| 266 | spi_set_drvdata(spi, ak4104); |
| 267 | dev_info(&spi->dev, "SPI device initialized\n"); |
| 268 | return 0; |
| 269 | |
| 270 | error_free_codec: |
| 271 | kfree(ak4104); |
| 272 | ak4104_dai.dev = NULL; |
| 273 | return ret; |
| 274 | } |
| 275 | |
| 276 | static int __devexit ak4104_spi_remove(struct spi_device *spi) |
| 277 | { |
| 278 | int ret, val; |
| 279 | struct ak4104_private *ak4104 = spi_get_drvdata(spi); |
| 280 | |
| 281 | val = ak4104_read_reg_cache(&ak4104->codec, AK4104_REG_CONTROL1); |
| 282 | if (val < 0) |
| 283 | return val; |
| 284 | |
| 285 | /* clear power-up and non-reset bits */ |
| 286 | val &= ~(AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN); |
| 287 | ret = ak4104_spi_write(&ak4104->codec, AK4104_REG_CONTROL1, val); |
| 288 | if (ret < 0) |
| 289 | return ret; |
| 290 | |
| 291 | ak4104_codec = NULL; |
| 292 | kfree(ak4104); |
| 293 | return 0; |
| 294 | } |
| 295 | |
| 296 | static int ak4104_probe(struct platform_device *pdev) |
| 297 | { |
| 298 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 299 | struct snd_soc_codec *codec = ak4104_codec; |
| 300 | int ret; |
| 301 | |
| 302 | /* Connect the codec to the socdev. snd_soc_new_pcms() needs this. */ |
| 303 | socdev->card->codec = codec; |
| 304 | |
| 305 | /* Register PCMs */ |
| 306 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); |
| 307 | if (ret < 0) { |
| 308 | dev_err(codec->dev, "failed to create pcms\n"); |
| 309 | return ret; |
| 310 | } |
| 311 | |
Daniel Mack | a381934 | 2009-03-09 02:13:17 +0100 | [diff] [blame] | 312 | return 0; |
| 313 | } |
| 314 | |
| 315 | static int ak4104_remove(struct platform_device *pdev) |
| 316 | { |
| 317 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); |
| 318 | snd_soc_free_pcms(socdev); |
| 319 | return 0; |
| 320 | }; |
| 321 | |
| 322 | struct snd_soc_codec_device soc_codec_device_ak4104 = { |
| 323 | .probe = ak4104_probe, |
| 324 | .remove = ak4104_remove |
| 325 | }; |
| 326 | EXPORT_SYMBOL_GPL(soc_codec_device_ak4104); |
| 327 | |
| 328 | static struct spi_driver ak4104_spi_driver = { |
| 329 | .driver = { |
| 330 | .name = DRV_NAME, |
| 331 | .owner = THIS_MODULE, |
| 332 | }, |
| 333 | .probe = ak4104_spi_probe, |
| 334 | .remove = __devexit_p(ak4104_spi_remove), |
| 335 | }; |
| 336 | |
| 337 | static int __init ak4104_init(void) |
| 338 | { |
| 339 | pr_info("Asahi Kasei AK4104 ALSA SoC Codec Driver\n"); |
| 340 | return spi_register_driver(&ak4104_spi_driver); |
| 341 | } |
| 342 | module_init(ak4104_init); |
| 343 | |
| 344 | static void __exit ak4104_exit(void) |
| 345 | { |
| 346 | spi_unregister_driver(&ak4104_spi_driver); |
| 347 | } |
| 348 | module_exit(ak4104_exit); |
| 349 | |
| 350 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); |
| 351 | MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver"); |
| 352 | MODULE_LICENSE("GPL"); |
| 353 | |