Jingchang Lu | d6be34f | 2014-02-18 10:17:12 +0800 | [diff] [blame] | 1 | * Freescale enhanced Direct Memory Access(eDMA) Controller |
| 2 | |
| 3 | The eDMA channels have multiplex capability by programmble memory-mapped |
| 4 | registers. channels are split into two groups, called DMAMUX0 and DMAMUX1, |
| 5 | specific DMA request source can only be multiplexed by any channel of certain |
| 6 | group, DMAMUX0 or DMAMUX1, but not both. |
| 7 | |
| 8 | * eDMA Controller |
| 9 | Required properties: |
| 10 | - compatible : |
| 11 | - "fsl,vf610-edma" for eDMA used similar to that on Vybrid vf610 SoC |
| 12 | - reg : Specifies base physical address(s) and size of the eDMA registers. |
| 13 | The 1st region is eDMA control register's address and size. |
| 14 | The 2nd and the 3rd regions are programmable channel multiplexing |
| 15 | control register's address and size. |
| 16 | - interrupts : A list of interrupt-specifiers, one for each entry in |
| 17 | interrupt-names. |
| 18 | - interrupt-names : Should contain: |
| 19 | "edma-tx" - the transmission interrupt |
| 20 | "edma-err" - the error interrupt |
| 21 | - #dma-cells : Must be <2>. |
| 22 | The 1st cell specifies the DMAMUX(0 for DMAMUX0 and 1 for DMAMUX1). |
| 23 | Specific request source can only be multiplexed by specific channels |
| 24 | group called DMAMUX. |
| 25 | The 2nd cell specifies the request source(slot) ID. |
| 26 | See the SoC's reference manual for all the supported request sources. |
| 27 | - dma-channels : Number of channels supported by the controller |
| 28 | - clock-names : A list of channel group clock names. Should contain: |
| 29 | "dmamux0" - clock name of mux0 group |
| 30 | "dmamux1" - clock name of mux1 group |
| 31 | - clocks : A list of phandle and clock-specifier pairs, one for each entry in |
| 32 | clock-names. |
| 33 | |
| 34 | Optional properties: |
| 35 | - big-endian: If present registers and hardware scatter/gather descriptors |
| 36 | of the eDMA are implemented in big endian mode, otherwise in little |
| 37 | mode. |
| 38 | |
| 39 | |
| 40 | Examples: |
| 41 | |
| 42 | edma0: dma-controller@40018000 { |
| 43 | #dma-cells = <2>; |
| 44 | compatible = "fsl,vf610-edma"; |
| 45 | reg = <0x40018000 0x2000>, |
| 46 | <0x40024000 0x1000>, |
| 47 | <0x40025000 0x1000>; |
| 48 | interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>, |
| 49 | <0 9 IRQ_TYPE_LEVEL_HIGH>; |
| 50 | interrupt-names = "edma-tx", "edma-err"; |
| 51 | dma-channels = <32>; |
| 52 | clock-names = "dmamux0", "dmamux1"; |
| 53 | clocks = <&clks VF610_CLK_DMAMUX0>, |
| 54 | <&clks VF610_CLK_DMAMUX1>; |
| 55 | }; |
| 56 | |
| 57 | |
| 58 | * DMA clients |
| 59 | DMA client drivers that uses the DMA function must use the format described |
| 60 | in the dma.txt file, using a two-cell specifier for each channel: the 1st |
| 61 | specifies the channel group(DMAMUX) in which this request can be multiplexed, |
| 62 | and the 2nd specifies the request source. |
| 63 | |
| 64 | Examples: |
| 65 | |
| 66 | sai2: sai@40031000 { |
| 67 | compatible = "fsl,vf610-sai"; |
| 68 | reg = <0x40031000 0x1000>; |
| 69 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
| 70 | clock-names = "sai"; |
| 71 | clocks = <&clks VF610_CLK_SAI2>; |
| 72 | dma-names = "tx", "rx"; |
| 73 | dmas = <&edma0 0 21>, |
| 74 | <&edma0 0 20>; |
| 75 | status = "disabled"; |
| 76 | }; |