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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * INET An implementation of the TCP/IP protocol suite for the LINUX
3 * operating system. INET is implemented using the BSD Socket
4 * interface as the means of communication with the user level.
5 *
6 * Global definitions for the Frame relay interface.
7 *
8 * Version: @(#)if_ifrad.h 0.20 13 Apr 96
9 *
10 * Author: Mike McLagan <mike.mclagan@linux.org>
11 *
12 * Changes:
13 * 0.15 Mike McLagan Structure packing
14 *
15 * 0.20 Mike McLagan New flags for S508 buffer handling
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License
19 * as published by the Free Software Foundation; either version
20 * 2 of the License, or (at your option) any later version.
21 */
22
23#ifndef SDLA_H
24#define SDLA_H
25
26/* adapter type */
27#define SDLA_TYPES
28#define SDLA_S502A 5020
29#define SDLA_S502E 5021
30#define SDLA_S503 5030
31#define SDLA_S507 5070
32#define SDLA_S508 5080
33#define SDLA_S509 5090
34#define SDLA_UNKNOWN -1
35
36/* port selection flags for the S508 */
37#define SDLA_S508_PORT_V35 0x00
38#define SDLA_S508_PORT_RS232 0x02
39
40/* Z80 CPU speeds */
41#define SDLA_CPU_3M 0x00
42#define SDLA_CPU_5M 0x01
43#define SDLA_CPU_7M 0x02
44#define SDLA_CPU_8M 0x03
45#define SDLA_CPU_10M 0x04
46#define SDLA_CPU_16M 0x05
47#define SDLA_CPU_12M 0x06
48
49/* some private IOCTLs */
50#define SDLA_IDENTIFY (FRAD_LAST_IOCTL + 1)
51#define SDLA_CPUSPEED (FRAD_LAST_IOCTL + 2)
52#define SDLA_PROTOCOL (FRAD_LAST_IOCTL + 3)
53
54#define SDLA_CLEARMEM (FRAD_LAST_IOCTL + 4)
55#define SDLA_WRITEMEM (FRAD_LAST_IOCTL + 5)
56#define SDLA_READMEM (FRAD_LAST_IOCTL + 6)
57
58struct sdla_mem {
59 int addr;
60 int len;
61 void __user *data;
62};
63
64#define SDLA_START (FRAD_LAST_IOCTL + 7)
65#define SDLA_STOP (FRAD_LAST_IOCTL + 8)
66
67/* some offsets in the Z80's memory space */
68#define SDLA_NMIADDR 0x0000
69#define SDLA_CONF_ADDR 0x0010
70#define SDLA_S502A_NMIADDR 0x0066
71#define SDLA_CODE_BASEADDR 0x0100
72#define SDLA_WINDOW_SIZE 0x2000
73#define SDLA_ADDR_MASK 0x1FFF
74
75/* largest handleable block of data */
76#define SDLA_MAX_DATA 4080
77#define SDLA_MAX_MTU 4072 /* MAX_DATA - sizeof(fradhdr) */
78#define SDLA_MAX_DLCI 24
79
80/* this should be the same as frad_conf */
81struct sdla_conf {
82 short station;
83 short config;
84 short kbaud;
85 short clocking;
86 short max_frm;
87 short T391;
88 short T392;
89 short N391;
90 short N392;
91 short N393;
92 short CIR_fwd;
93 short Bc_fwd;
94 short Be_fwd;
95 short CIR_bwd;
96 short Bc_bwd;
97 short Be_bwd;
98};
99
100/* this should be the same as dlci_conf */
101struct sdla_dlci_conf {
102 short config;
103 short CIR_fwd;
104 short Bc_fwd;
105 short Be_fwd;
106 short CIR_bwd;
107 short Bc_bwd;
108 short Be_bwd;
109 short Tc_fwd;
110 short Tc_bwd;
111 short Tf_max;
112 short Tb_max;
113};
114
115#ifndef __KERNEL__
116
117void sdla(void *cfg_info, char *dev, struct frad_conf *conf, int quiet);
118
119#else
120
121/* important Z80 window addresses */
122#define SDLA_CONTROL_WND 0xE000
123
124#define SDLA_502_CMD_BUF 0xEF60
125#define SDLA_502_RCV_BUF 0xA900
126#define SDLA_502_TXN_AVAIL 0xFFF1
127#define SDLA_502_RCV_AVAIL 0xFFF2
128#define SDLA_502_EVENT_FLAGS 0xFFF3
129#define SDLA_502_MDM_STATUS 0xFFF4
130#define SDLA_502_IRQ_INTERFACE 0xFFFD
131#define SDLA_502_IRQ_PERMISSION 0xFFFE
132#define SDLA_502_DATA_OFS 0x0010
133
134#define SDLA_508_CMD_BUF 0xE000
135#define SDLA_508_TXBUF_INFO 0xF100
136#define SDLA_508_RXBUF_INFO 0xF120
137#define SDLA_508_EVENT_FLAGS 0xF003
138#define SDLA_508_MDM_STATUS 0xF004
139#define SDLA_508_IRQ_INTERFACE 0xF010
140#define SDLA_508_IRQ_PERMISSION 0xF011
141#define SDLA_508_TSE_OFFSET 0xF012
142
143/* Event flags */
144#define SDLA_EVENT_STATUS 0x01
145#define SDLA_EVENT_DLCI_STATUS 0x02
146#define SDLA_EVENT_BAD_DLCI 0x04
147#define SDLA_EVENT_LINK_DOWN 0x40
148
149/* IRQ Trigger flags */
150#define SDLA_INTR_RX 0x01
151#define SDLA_INTR_TX 0x02
152#define SDLA_INTR_MODEM 0x04
153#define SDLA_INTR_COMPLETE 0x08
154#define SDLA_INTR_STATUS 0x10
155#define SDLA_INTR_TIMER 0x20
156
157/* DLCI status bits */
158#define SDLA_DLCI_DELETED 0x01
159#define SDLA_DLCI_ACTIVE 0x02
160#define SDLA_DLCI_WAITING 0x04
161#define SDLA_DLCI_NEW 0x08
162#define SDLA_DLCI_INCLUDED 0x40
163
164/* valid command codes */
165#define SDLA_INFORMATION_WRITE 0x01
166#define SDLA_INFORMATION_READ 0x02
167#define SDLA_ISSUE_IN_CHANNEL_SIGNAL 0x03
168#define SDLA_SET_DLCI_CONFIGURATION 0x10
169#define SDLA_READ_DLCI_CONFIGURATION 0x11
170#define SDLA_DISABLE_COMMUNICATIONS 0x12
171#define SDLA_ENABLE_COMMUNICATIONS 0x13
172#define SDLA_READ_DLC_STATUS 0x14
173#define SDLA_READ_DLC_STATISTICS 0x15
174#define SDLA_FLUSH_DLC_STATISTICS 0x16
175#define SDLA_LIST_ACTIVE_DLCI 0x17
176#define SDLA_FLUSH_INFORMATION_BUFFERS 0x18
177#define SDLA_ADD_DLCI 0x20
178#define SDLA_DELETE_DLCI 0x21
179#define SDLA_ACTIVATE_DLCI 0x22
180#define SDLA_DEACTIVATE_DLCI 0x23
181#define SDLA_READ_MODEM_STATUS 0x30
182#define SDLA_SET_MODEM_STATUS 0x31
183#define SDLA_READ_COMMS_ERR_STATS 0x32
184#define SDLA_FLUSH_COMMS_ERR_STATS 0x33
185#define SDLA_READ_CODE_VERSION 0x40
186#define SDLA_SET_IRQ_TRIGGER 0x50
187#define SDLA_GET_IRQ_TRIGGER 0x51
188
189/* In channel signal types */
190#define SDLA_ICS_LINK_VERIFY 0x02
191#define SDLA_ICS_STATUS_ENQ 0x03
192
193/* modem status flags */
194#define SDLA_MODEM_DTR_HIGH 0x01
195#define SDLA_MODEM_RTS_HIGH 0x02
196#define SDLA_MODEM_DCD_HIGH 0x08
197#define SDLA_MODEM_CTS_HIGH 0x20
198
199/* used for RET_MODEM interpretation */
200#define SDLA_MODEM_DCD_LOW 0x01
201#define SDLA_MODEM_CTS_LOW 0x02
202
203/* return codes */
204#define SDLA_RET_OK 0x00
205#define SDLA_RET_COMMUNICATIONS 0x01
206#define SDLA_RET_CHANNEL_INACTIVE 0x02
207#define SDLA_RET_DLCI_INACTIVE 0x03
208#define SDLA_RET_DLCI_CONFIG 0x04
209#define SDLA_RET_BUF_TOO_BIG 0x05
210#define SDLA_RET_NO_DATA 0x05
211#define SDLA_RET_BUF_OVERSIZE 0x06
212#define SDLA_RET_CIR_OVERFLOW 0x07
213#define SDLA_RET_NO_BUFS 0x08
214#define SDLA_RET_TIMEOUT 0x0A
215#define SDLA_RET_MODEM 0x10
216#define SDLA_RET_CHANNEL_OFF 0x11
217#define SDLA_RET_CHANNEL_ON 0x12
218#define SDLA_RET_DLCI_STATUS 0x13
219#define SDLA_RET_DLCI_UNKNOWN 0x14
220#define SDLA_RET_COMMAND_INVALID 0x1F
221
222/* Configuration flags */
223#define SDLA_DIRECT_RECV 0x0080
224#define SDLA_TX_NO_EXCEPT 0x0020
225#define SDLA_NO_ICF_MSGS 0x1000
226#define SDLA_TX50_RX50 0x0000
227#define SDLA_TX70_RX30 0x2000
228#define SDLA_TX30_RX70 0x4000
229
230/* IRQ selection flags */
231#define SDLA_IRQ_RECEIVE 0x01
232#define SDLA_IRQ_TRANSMIT 0x02
233#define SDLA_IRQ_MODEM_STAT 0x04
234#define SDLA_IRQ_COMMAND 0x08
235#define SDLA_IRQ_CHANNEL 0x10
236#define SDLA_IRQ_TIMER 0x20
237
238/* definitions for PC memory mapping */
239#define SDLA_8K_WINDOW 0x01
240#define SDLA_S502_SEG_A 0x10
241#define SDLA_S502_SEG_C 0x20
242#define SDLA_S502_SEG_D 0x00
243#define SDLA_S502_SEG_E 0x30
244#define SDLA_S507_SEG_A 0x00
245#define SDLA_S507_SEG_B 0x40
246#define SDLA_S507_SEG_C 0x80
247#define SDLA_S507_SEG_E 0xC0
248#define SDLA_S508_SEG_A 0x00
249#define SDLA_S508_SEG_C 0x10
250#define SDLA_S508_SEG_D 0x08
251#define SDLA_S508_SEG_E 0x18
252
253/* SDLA adapter port constants */
254#define SDLA_IO_EXTENTS 0x04
255
256#define SDLA_REG_CONTROL 0x00
257#define SDLA_REG_PC_WINDOW 0x01 /* offset for PC window select latch */
258#define SDLA_REG_Z80_WINDOW 0x02 /* offset for Z80 window select latch */
259#define SDLA_REG_Z80_CONTROL 0x03 /* offset for Z80 control latch */
260
261#define SDLA_S502_STS 0x00 /* status reg for 502, 502E, 507 */
262#define SDLA_S508_GNRL 0x00 /* general purp. reg for 508 */
263#define SDLA_S508_STS 0x01 /* status reg for 508 */
264#define SDLA_S508_IDR 0x02 /* ID reg for 508 */
265
266/* control register flags */
267#define SDLA_S502A_START 0x00 /* start the CPU */
268#define SDLA_S502A_INTREQ 0x02
269#define SDLA_S502A_INTEN 0x04
270#define SDLA_S502A_HALT 0x08 /* halt the CPU */
271#define SDLA_S502A_NMI 0x10 /* issue an NMI to the CPU */
272
273#define SDLA_S502E_CPUEN 0x01
274#define SDLA_S502E_ENABLE 0x02
275#define SDLA_S502E_INTACK 0x04
276
277#define SDLA_S507_ENABLE 0x01
278#define SDLA_S507_IRQ3 0x00
279#define SDLA_S507_IRQ4 0x20
280#define SDLA_S507_IRQ5 0x40
281#define SDLA_S507_IRQ7 0x60
282#define SDLA_S507_IRQ10 0x80
283#define SDLA_S507_IRQ11 0xA0
284#define SDLA_S507_IRQ12 0xC0
285#define SDLA_S507_IRQ15 0xE0
286
287#define SDLA_HALT 0x00
288#define SDLA_CPUEN 0x02
289#define SDLA_MEMEN 0x04
290#define SDLA_S507_EPROMWR 0x08
291#define SDLA_S507_EPROMCLK 0x10
292#define SDLA_S508_INTRQ 0x08
293#define SDLA_S508_INTEN 0x10
294
295struct sdla_cmd {
Jan Blunck6a878182006-01-08 01:05:07 -0800296 char opp_flag;
297 char cmd;
298 short length;
299 char retval;
300 short dlci;
301 char flags;
302 short rxlost_int;
303 long rxlost_app;
304 char reserve[2];
305 char data[SDLA_MAX_DATA]; /* transfer data buffer */
306} __attribute__((packed));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307
308struct intr_info {
Jan Blunck6a878182006-01-08 01:05:07 -0800309 char flags;
310 short txlen;
311 char irq;
312 char flags2;
313 short timeout;
314} __attribute__((packed));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315
316/* found in the 508's control window at RXBUF_INFO */
317struct buf_info {
Jan Blunck6a878182006-01-08 01:05:07 -0800318 unsigned short rse_num;
319 unsigned long rse_base;
320 unsigned long rse_next;
321 unsigned long buf_base;
322 unsigned short reserved;
323 unsigned long buf_top;
324} __attribute__((packed));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700325
326/* structure pointed to by rse_base in RXBUF_INFO struct */
327struct buf_entry {
Jan Blunck6a878182006-01-08 01:05:07 -0800328 char opp_flag;
329 short length;
330 short dlci;
331 char flags;
332 short timestamp;
333 short reserved[2];
334 long buf_addr;
335} __attribute__((packed));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336
337#endif
338
339#endif