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Stephen Boyd49fc8252014-03-21 17:59:37 -07001/*
Odelu Kukatla877b3902018-05-18 14:31:28 +05302 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
Stephen Boyd49fc8252014-03-21 17:59:37 -07003 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13#ifndef __QCOM_CLK_COMMON_H__
14#define __QCOM_CLK_COMMON_H__
15
Deepak Katragadda88c266f2016-11-02 14:46:56 -070016#include <linux/reset-controller.h>
Taniya Das1e69ca12017-04-13 15:19:58 +053017#include "clk-rcg.h"
Deepak Katragadda88c266f2016-11-02 14:46:56 -070018
Stephen Boyd49fc8252014-03-21 17:59:37 -070019struct platform_device;
20struct regmap_config;
21struct clk_regmap;
22struct qcom_reset_map;
Stephen Boyd5b6b7492014-07-15 14:59:21 -070023struct regmap;
Stephen Boyd50c6a502014-09-04 13:21:50 -070024struct freq_tbl;
Georgi Djakov293d2e972015-03-20 18:30:26 +020025struct clk_hw;
26struct parent_map;
Stephen Boyd49fc8252014-03-21 17:59:37 -070027
28struct qcom_cc_desc {
29 const struct regmap_config *config;
30 struct clk_regmap **clks;
Odelu Kukatla877b3902018-05-18 14:31:28 +053031 struct clk_hw **hwclks;
Stephen Boyd49fc8252014-03-21 17:59:37 -070032 size_t num_clks;
Odelu Kukatla877b3902018-05-18 14:31:28 +053033 size_t num_hwclks;
Stephen Boyd49fc8252014-03-21 17:59:37 -070034 const struct qcom_reset_map *resets;
35 size_t num_resets;
Rajendra Nayak5e5cc242015-08-06 16:07:43 +053036 struct gdsc **gdscs;
37 size_t num_gdscs;
Stephen Boyd49fc8252014-03-21 17:59:37 -070038};
39
Deepak Katragadda88c266f2016-11-02 14:46:56 -070040struct clk_dummy {
41 struct clk_hw hw;
42 struct reset_controller_dev reset;
43 unsigned long rrate;
44};
45
Taniya Das1e69ca12017-04-13 15:19:58 +053046struct clk_dfs {
47 struct clk_rcg2 *rcg;
48 u8 rcg_flags;
49};
50
51struct qcom_cc_dfs_desc {
52 struct clk_dfs *clks;
53 size_t num_clks;
54};
55
Stephen Boyd50c6a502014-09-04 13:21:50 -070056extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
57 unsigned long rate);
Georgi Djakov293d2e972015-03-20 18:30:26 +020058extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
59 u8 src);
Stephen Boyd50c6a502014-09-04 13:21:50 -070060
Stephen Boydee15faf2015-10-26 17:11:32 -070061extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
62 const char *name, unsigned long rate);
63extern int qcom_cc_register_sleep_clk(struct device *dev);
64
Stephen Boyd5b6b7492014-07-15 14:59:21 -070065extern struct regmap *qcom_cc_map(struct platform_device *pdev,
66 const struct qcom_cc_desc *desc);
67extern int qcom_cc_really_probe(struct platform_device *pdev,
68 const struct qcom_cc_desc *desc,
69 struct regmap *regmap);
Stephen Boyd49fc8252014-03-21 17:59:37 -070070extern int qcom_cc_probe(struct platform_device *pdev,
71 const struct qcom_cc_desc *desc);
Taniya Das1e69ca12017-04-13 15:19:58 +053072
73extern int qcom_cc_register_rcg_dfs(struct platform_device *pdev,
74 const struct qcom_cc_dfs_desc *desc);
75
Taniya Das5d121182016-06-06 15:52:09 +053076extern struct clk_ops clk_dummy_ops;
Deepak Katragadda7abd9312016-12-21 14:18:00 -080077
78#define BM(msb, lsb) (((((uint32_t)-1) << (31-msb)) >> (31-msb+lsb)) << lsb)
79#define BVAL(msb, lsb, val) (((val) << lsb) & BM(msb, lsb))
80
Stephen Boyd49fc8252014-03-21 17:59:37 -070081#endif