Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 DENX Software Engineering GmbH |
| 3 | * Heiko Schocher <hs@denx.de> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2 of the License, or (at your |
| 8 | * option) any later version. |
| 9 | */ |
Philip Avinash | a2bcd77 | 2013-06-14 15:15:53 +0530 | [diff] [blame] | 10 | #include "skeleton.dtsi" |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | arm { |
| 14 | #address-cells = <1>; |
| 15 | #size-cells = <1>; |
| 16 | ranges; |
| 17 | intc: interrupt-controller { |
| 18 | compatible = "ti,cp-intc"; |
| 19 | interrupt-controller; |
| 20 | #interrupt-cells = <1>; |
| 21 | ti,intc-size = <100>; |
| 22 | reg = <0xfffee000 0x2000>; |
| 23 | }; |
| 24 | }; |
| 25 | soc { |
| 26 | compatible = "simple-bus"; |
| 27 | model = "da850"; |
| 28 | #address-cells = <1>; |
| 29 | #size-cells = <1>; |
| 30 | ranges = <0x0 0x01c00000 0x400000>; |
Lad, Prabhakar | c57ff58 | 2013-01-25 16:48:44 +0530 | [diff] [blame] | 31 | interrupt-parent = <&intc>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 32 | |
Kumar, Anil | 1faaba3 | 2013-01-16 14:37:39 +0530 | [diff] [blame] | 33 | pmx_core: pinmux@1c14120 { |
| 34 | compatible = "pinctrl-single"; |
| 35 | reg = <0x14120 0x50>; |
| 36 | #address-cells = <1>; |
| 37 | #size-cells = <0>; |
| 38 | pinctrl-single,bit-per-mux; |
| 39 | pinctrl-single,register-width = <32>; |
Manjunathappa, Prakash | 055cb2a9 | 2013-05-21 19:38:02 +0530 | [diff] [blame] | 40 | pinctrl-single,function-mask = <0xf>; |
Kumar, Anil | 1faaba3 | 2013-01-16 14:37:39 +0530 | [diff] [blame] | 41 | status = "disabled"; |
Kumar, Anil | 99b8800 | 2013-01-16 14:37:41 +0530 | [diff] [blame] | 42 | |
| 43 | nand_cs3_pins: pinmux_nand_pins { |
| 44 | pinctrl-single,bits = < |
| 45 | /* EMA_OE, EMA_WE */ |
| 46 | 0x1c 0x00110000 0x00ff0000 |
| 47 | /* EMA_CS[4],EMA_CS[3]*/ |
| 48 | 0x1c 0x00000110 0x00000ff0 |
| 49 | /* |
| 50 | * EMA_D[0], EMA_D[1], EMA_D[2], |
| 51 | * EMA_D[3], EMA_D[4], EMA_D[5], |
| 52 | * EMA_D[6], EMA_D[7] |
| 53 | */ |
| 54 | 0x24 0x11111111 0xffffffff |
| 55 | /* EMA_A[1], EMA_A[2] */ |
| 56 | 0x30 0x01100000 0x0ff00000 |
| 57 | >; |
| 58 | }; |
Vishwanathrao Badarkhe, Manish | 01729cc | 2013-02-06 15:06:22 +0530 | [diff] [blame] | 59 | i2c0_pins: pinmux_i2c0_pins { |
| 60 | pinctrl-single,bits = < |
| 61 | /* I2C0_SDA,I2C0_SCL */ |
| 62 | 0x10 0x00002200 0x0000ff00 |
| 63 | >; |
| 64 | }; |
Manjunathappa, Prakash | 88df412 | 2013-03-28 18:42:01 +0530 | [diff] [blame] | 65 | mmc0_pins: pinmux_mmc_pins { |
| 66 | pinctrl-single,bits = < |
| 67 | /* MMCSD0_DAT[3] MMCSD0_DAT[2] |
| 68 | * MMCSD0_DAT[1] MMCSD0_DAT[0] |
| 69 | * MMCSD0_CMD MMCSD0_CLK |
| 70 | */ |
| 71 | 0x28 0x00222222 0x00ffffff |
| 72 | >; |
| 73 | }; |
Philip Avinash | 64fa59c | 2013-04-10 17:42:41 +0530 | [diff] [blame] | 74 | ehrpwm0a_pins: pinmux_ehrpwm0a_pins { |
| 75 | pinctrl-single,bits = < |
| 76 | /* EPWM0A */ |
| 77 | 0xc 0x00000002 0x0000000f |
| 78 | >; |
| 79 | }; |
| 80 | ehrpwm0b_pins: pinmux_ehrpwm0b_pins { |
| 81 | pinctrl-single,bits = < |
| 82 | /* EPWM0B */ |
| 83 | 0xc 0x00000020 0x000000f0 |
| 84 | >; |
| 85 | }; |
| 86 | ehrpwm1a_pins: pinmux_ehrpwm1a_pins { |
| 87 | pinctrl-single,bits = < |
| 88 | /* EPWM1A */ |
| 89 | 0x14 0x00000002 0x0000000f |
| 90 | >; |
| 91 | }; |
| 92 | ehrpwm1b_pins: pinmux_ehrpwm1b_pins { |
| 93 | pinctrl-single,bits = < |
| 94 | /* EPWM1B */ |
| 95 | 0x14 0x00000020 0x000000f0 |
| 96 | >; |
| 97 | }; |
| 98 | ecap0_pins: pinmux_ecap0_pins { |
| 99 | pinctrl-single,bits = < |
| 100 | /* ECAP0_APWM0 */ |
| 101 | 0x8 0x20000000 0xf0000000 |
| 102 | >; |
| 103 | }; |
| 104 | ecap1_pins: pinmux_ecap1_pins { |
| 105 | pinctrl-single,bits = < |
| 106 | /* ECAP1_APWM1 */ |
| 107 | 0x4 0x40000000 0xf0000000 |
| 108 | >; |
| 109 | }; |
| 110 | ecap2_pins: pinmux_ecap2_pins { |
| 111 | pinctrl-single,bits = < |
| 112 | /* ECAP2_APWM2 */ |
| 113 | 0x4 0x00000004 0x0000000f |
| 114 | >; |
| 115 | }; |
Manjunathappa, Prakash | c6347e4 | 2013-04-03 19:39:08 +0530 | [diff] [blame] | 116 | spi1_pins: pinmux_spi_pins { |
| 117 | pinctrl-single,bits = < |
| 118 | /* SIMO, SOMI, CLK */ |
| 119 | 0x14 0x00110100 0x00ff0f00 |
| 120 | >; |
| 121 | }; |
| 122 | spi1_cs0_pin: pinmux_spi1_cs0 { |
| 123 | pinctrl-single,bits = < |
| 124 | /* CS0 */ |
| 125 | 0x14 0x00000010 0x000000f0 |
| 126 | >; |
| 127 | }; |
Lad, Prabhakar | 609f4bc | 2013-08-15 11:31:34 +0530 | [diff] [blame] | 128 | mdio_pins: pinmux_mdio_pins { |
| 129 | pinctrl-single,bits = < |
| 130 | /* MDIO_CLK, MDIO_D */ |
| 131 | 0x10 0x00000088 0x000000ff |
| 132 | >; |
| 133 | }; |
Lad, Prabhakar | dd7deaf | 2013-08-16 22:37:09 +0530 | [diff] [blame] | 134 | mii_pins: pinmux_mii_pins { |
| 135 | pinctrl-single,bits = < |
| 136 | /* |
| 137 | * MII_TXEN, MII_TXCLK, MII_COL |
| 138 | * MII_TXD_3, MII_TXD_2, MII_TXD_1 |
| 139 | * MII_TXD_0 |
| 140 | */ |
| 141 | 0x8 0x88888880 0xfffffff0 |
| 142 | /* |
| 143 | * MII_RXER, MII_CRS, MII_RXCLK |
| 144 | * MII_RXDV, MII_RXD_3, MII_RXD_2 |
| 145 | * MII_RXD_1, MII_RXD_0 |
| 146 | */ |
| 147 | 0xc 0x88888888 0xffffffff |
| 148 | >; |
| 149 | }; |
Lad, Prabhakar | 609f4bc | 2013-08-15 11:31:34 +0530 | [diff] [blame] | 150 | |
Kumar, Anil | 1faaba3 | 2013-01-16 14:37:39 +0530 | [diff] [blame] | 151 | }; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 152 | serial0: serial@1c42000 { |
| 153 | compatible = "ns16550a"; |
| 154 | reg = <0x42000 0x100>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 155 | reg-shift = <2>; |
| 156 | interrupts = <25>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 157 | status = "disabled"; |
| 158 | }; |
| 159 | serial1: serial@1d0c000 { |
| 160 | compatible = "ns16550a"; |
| 161 | reg = <0x10c000 0x100>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 162 | reg-shift = <2>; |
| 163 | interrupts = <53>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 164 | status = "disabled"; |
| 165 | }; |
| 166 | serial2: serial@1d0d000 { |
| 167 | compatible = "ns16550a"; |
| 168 | reg = <0x10d000 0x100>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 169 | reg-shift = <2>; |
| 170 | interrupts = <61>; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 171 | status = "disabled"; |
| 172 | }; |
Mrugesh Katepallewar | 1661636 | 2013-01-28 13:17:48 +0530 | [diff] [blame] | 173 | rtc0: rtc@1c23000 { |
| 174 | compatible = "ti,da830-rtc"; |
| 175 | reg = <0x23000 0x1000>; |
| 176 | interrupts = <19 |
| 177 | 19>; |
| 178 | status = "disabled"; |
| 179 | }; |
Vishwanathrao Badarkhe, Manish | 01729cc | 2013-02-06 15:06:22 +0530 | [diff] [blame] | 180 | i2c0: i2c@1c22000 { |
| 181 | compatible = "ti,davinci-i2c"; |
| 182 | reg = <0x22000 0x1000>; |
| 183 | interrupts = <15>; |
| 184 | #address-cells = <1>; |
| 185 | #size-cells = <0>; |
| 186 | status = "disabled"; |
| 187 | }; |
Kumar, Anil | 518f97d | 2013-02-06 09:30:03 +0530 | [diff] [blame] | 188 | wdt: wdt@1c21000 { |
| 189 | compatible = "ti,davinci-wdt"; |
| 190 | reg = <0x21000 0x1000>; |
| 191 | status = "disabled"; |
| 192 | }; |
Manjunathappa, Prakash | 88df412 | 2013-03-28 18:42:01 +0530 | [diff] [blame] | 193 | mmc0: mmc@1c40000 { |
| 194 | compatible = "ti,da830-mmc"; |
| 195 | reg = <0x40000 0x1000>; |
| 196 | interrupts = <16>; |
| 197 | status = "disabled"; |
| 198 | }; |
Philip Avinash | 64fa59c | 2013-04-10 17:42:41 +0530 | [diff] [blame] | 199 | ehrpwm0: ehrpwm@01f00000 { |
| 200 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; |
| 201 | #pwm-cells = <3>; |
| 202 | reg = <0x300000 0x2000>; |
| 203 | status = "disabled"; |
| 204 | }; |
| 205 | ehrpwm1: ehrpwm@01f02000 { |
| 206 | compatible = "ti,da850-ehrpwm", "ti,am33xx-ehrpwm"; |
| 207 | #pwm-cells = <3>; |
| 208 | reg = <0x302000 0x2000>; |
| 209 | status = "disabled"; |
| 210 | }; |
| 211 | ecap0: ecap@01f06000 { |
| 212 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; |
| 213 | #pwm-cells = <3>; |
| 214 | reg = <0x306000 0x80>; |
| 215 | status = "disabled"; |
| 216 | }; |
| 217 | ecap1: ecap@01f07000 { |
| 218 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; |
| 219 | #pwm-cells = <3>; |
| 220 | reg = <0x307000 0x80>; |
| 221 | status = "disabled"; |
| 222 | }; |
| 223 | ecap2: ecap@01f08000 { |
| 224 | compatible = "ti,da850-ecap", "ti,am33xx-ecap"; |
| 225 | #pwm-cells = <3>; |
| 226 | reg = <0x308000 0x80>; |
| 227 | status = "disabled"; |
| 228 | }; |
Manjunathappa, Prakash | c6347e4 | 2013-04-03 19:39:08 +0530 | [diff] [blame] | 229 | spi1: spi@1f0e000 { |
| 230 | #address-cells = <1>; |
| 231 | #size-cells = <0>; |
| 232 | compatible = "ti,da830-spi"; |
| 233 | reg = <0x30e000 0x1000>; |
| 234 | num-cs = <4>; |
| 235 | ti,davinci-spi-intr-line = <1>; |
| 236 | interrupts = <56>; |
| 237 | status = "disabled"; |
| 238 | }; |
Lad, Prabhakar | 609f4bc | 2013-08-15 11:31:34 +0530 | [diff] [blame] | 239 | mdio: mdio@1e24000 { |
| 240 | compatible = "ti,davinci_mdio"; |
| 241 | #address-cells = <1>; |
| 242 | #size-cells = <0>; |
| 243 | reg = <0x224000 0x1000>; |
| 244 | }; |
Lad, Prabhakar | dd7deaf | 2013-08-16 22:37:09 +0530 | [diff] [blame] | 245 | eth0: ethernet@1e20000 { |
| 246 | compatible = "ti,davinci-dm6467-emac"; |
| 247 | reg = <0x220000 0x4000>; |
| 248 | ti,davinci-ctrl-reg-offset = <0x3000>; |
| 249 | ti,davinci-ctrl-mod-reg-offset = <0x2000>; |
| 250 | ti,davinci-ctrl-ram-offset = <0>; |
| 251 | ti,davinci-ctrl-ram-size = <0x2000>; |
| 252 | local-mac-address = [ 00 00 00 00 00 00 ]; |
| 253 | interrupts = <33 |
| 254 | 34 |
| 255 | 35 |
| 256 | 36 |
| 257 | >; |
| 258 | }; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 259 | }; |
Kumar, Anil | 99b8800 | 2013-01-16 14:37:41 +0530 | [diff] [blame] | 260 | nand_cs3@62000000 { |
| 261 | compatible = "ti,davinci-nand"; |
| 262 | reg = <0x62000000 0x807ff |
| 263 | 0x68000000 0x8000>; |
| 264 | ti,davinci-chipselect = <1>; |
| 265 | ti,davinci-mask-ale = <0>; |
| 266 | ti,davinci-mask-cle = <0>; |
| 267 | ti,davinci-mask-chipsel = <0>; |
| 268 | ti,davinci-ecc-mode = "hw"; |
| 269 | ti,davinci-ecc-bits = <4>; |
| 270 | ti,davinci-nand-use-bbt; |
| 271 | status = "disabled"; |
| 272 | }; |
Heiko Schocher | 33085b3 | 2012-08-30 14:21:04 +0530 | [diff] [blame] | 273 | }; |