Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
Siddartha Mohanadoss | cd8aa0b | 2017-04-06 15:17:46 -0700 | [diff] [blame] | 4 | * it under the terms of the GNU General Public License version 2 and |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <asm/arch_timer.h> |
| 15 | #include "tsens.h" |
| 16 | |
| 17 | /* debug defines */ |
| 18 | #define TSENS_DBG_BUS_ID_0 0 |
| 19 | #define TSENS_DBG_BUS_ID_1 1 |
| 20 | #define TSENS_DBG_BUS_ID_2 2 |
| 21 | #define TSENS_DBG_BUS_ID_15 15 |
| 22 | #define TSENS_DEBUG_LOOP_COUNT_ID_0 2 |
| 23 | #define TSENS_DEBUG_LOOP_COUNT 5 |
| 24 | #define TSENS_DEBUG_STATUS_REG_START 10 |
| 25 | #define TSENS_DEBUG_OFFSET_RANGE 16 |
| 26 | #define TSENS_DEBUG_OFFSET_WORD1 0x4 |
| 27 | #define TSENS_DEBUG_OFFSET_WORD2 0x8 |
| 28 | #define TSENS_DEBUG_OFFSET_WORD3 0xc |
| 29 | #define TSENS_DEBUG_OFFSET_ROW 0x10 |
| 30 | #define TSENS_DEBUG_DECIDEGC -950 |
| 31 | #define TSENS_DEBUG_CYCLE_MS 64 |
| 32 | #define TSENS_DEBUG_POLL_MS 200 |
| 33 | #define TSENS_DEBUG_BUS_ID2_MIN_CYCLE 50 |
| 34 | #define TSENS_DEBUG_BUS_ID2_MAX_CYCLE 51 |
| 35 | #define TSENS_DEBUG_ID_MASK_1_4 0xffffffe1 |
| 36 | #define DEBUG_SIZE 10 |
| 37 | |
Siddartha Mohanadoss | 64a5da3 | 2017-05-09 11:09:51 -0700 | [diff] [blame] | 38 | #define TSENS_DEBUG_CONTROL(n) ((n) + 0x130) |
| 39 | #define TSENS_DEBUG_DATA(n) ((n) + 0x134) |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 40 | |
| 41 | struct tsens_dbg_func { |
| 42 | int (*dbg_func)(struct tsens_device *, u32, u32, int *); |
| 43 | }; |
| 44 | |
| 45 | static int tsens_dbg_log_temp_reads(struct tsens_device *data, u32 id, |
| 46 | u32 dbg_type, int *temp) |
| 47 | { |
| 48 | struct tsens_sensor *sensor; |
| 49 | struct tsens_device *tmdev = NULL; |
| 50 | u32 idx = 0; |
| 51 | |
| 52 | if (!data) |
| 53 | return -EINVAL; |
| 54 | |
| 55 | pr_debug("%d %d\n", id, dbg_type); |
| 56 | tmdev = data; |
| 57 | sensor = &tmdev->sensor[id]; |
| 58 | idx = tmdev->tsens_dbg.sensor_dbg_info[sensor->hw_id].idx; |
| 59 | tmdev->tsens_dbg.sensor_dbg_info[sensor->hw_id].temp[idx%10] = *temp; |
| 60 | tmdev->tsens_dbg.sensor_dbg_info[sensor->hw_id].time_stmp[idx%10] = |
| 61 | sched_clock(); |
| 62 | idx++; |
| 63 | tmdev->tsens_dbg.sensor_dbg_info[sensor->hw_id].idx = idx; |
| 64 | |
| 65 | return 0; |
| 66 | } |
| 67 | |
| 68 | static int tsens_dbg_log_interrupt_timestamp(struct tsens_device *data, |
| 69 | u32 id, u32 dbg_type, int *val) |
| 70 | { |
| 71 | struct tsens_device *tmdev = NULL; |
| 72 | u32 idx = 0; |
| 73 | |
| 74 | if (!data) |
| 75 | return -EINVAL; |
| 76 | |
| 77 | pr_debug("%d %d\n", id, dbg_type); |
| 78 | tmdev = data; |
| 79 | /* debug */ |
Rama Krishna Phani A | 6ad6633 | 2017-10-25 21:20:04 +0530 | [diff] [blame] | 80 | idx = tmdev->tsens_dbg.irq_idx; |
| 81 | tmdev->tsens_dbg.irq_time_stmp[idx%10] = |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 82 | sched_clock(); |
Rama Krishna Phani A | 6ad6633 | 2017-10-25 21:20:04 +0530 | [diff] [blame] | 83 | tmdev->tsens_dbg.irq_idx++; |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 84 | |
| 85 | return 0; |
| 86 | } |
| 87 | |
Siddartha Mohanadoss | 64a5da3 | 2017-05-09 11:09:51 -0700 | [diff] [blame] | 88 | static int tsens_dbg_log_bus_id_data(struct tsens_device *data, |
| 89 | u32 id, u32 dbg_type, int *val) |
| 90 | { |
| 91 | struct tsens_device *tmdev = NULL; |
| 92 | u32 loop = 0, i = 0; |
| 93 | uint32_t r1, r2, r3, r4, offset = 0; |
| 94 | unsigned int debug_dump; |
| 95 | unsigned int debug_id = 0, cntrl_id = 0; |
| 96 | void __iomem *srot_addr; |
| 97 | void __iomem *controller_id_addr; |
| 98 | void __iomem *debug_id_addr; |
| 99 | void __iomem *debug_data_addr; |
| 100 | |
| 101 | if (!data) |
| 102 | return -EINVAL; |
| 103 | |
| 104 | pr_debug("%d %d\n", id, dbg_type); |
| 105 | tmdev = data; |
| 106 | controller_id_addr = TSENS_CONTROLLER_ID(tmdev->tsens_tm_addr); |
| 107 | debug_id_addr = TSENS_DEBUG_CONTROL(tmdev->tsens_tm_addr); |
| 108 | debug_data_addr = TSENS_DEBUG_DATA(tmdev->tsens_tm_addr); |
| 109 | srot_addr = TSENS_CTRL_ADDR(tmdev->tsens_srot_addr); |
| 110 | |
| 111 | cntrl_id = readl_relaxed(controller_id_addr); |
| 112 | pr_err("Controller_id: 0x%x\n", cntrl_id); |
| 113 | |
| 114 | loop = 0; |
| 115 | i = 0; |
| 116 | debug_id = readl_relaxed(debug_id_addr); |
| 117 | writel_relaxed((debug_id | (i << 1) | 1), |
| 118 | TSENS_DEBUG_CONTROL(tmdev->tsens_tm_addr)); |
| 119 | while (loop < TSENS_DEBUG_LOOP_COUNT_ID_0) { |
| 120 | debug_dump = readl_relaxed(debug_data_addr); |
| 121 | r1 = readl_relaxed(debug_data_addr); |
| 122 | r2 = readl_relaxed(debug_data_addr); |
| 123 | r3 = readl_relaxed(debug_data_addr); |
| 124 | r4 = readl_relaxed(debug_data_addr); |
| 125 | pr_err("cntrl:%d, bus-id:%d value:0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", |
| 126 | cntrl_id, i, debug_dump, r1, r2, r3, r4); |
| 127 | loop++; |
| 128 | } |
| 129 | |
| 130 | for (i = TSENS_DBG_BUS_ID_1; i <= TSENS_DBG_BUS_ID_15; i++) { |
| 131 | loop = 0; |
| 132 | debug_id = readl_relaxed(debug_id_addr); |
| 133 | debug_id = debug_id & TSENS_DEBUG_ID_MASK_1_4; |
| 134 | writel_relaxed((debug_id | (i << 1) | 1), |
| 135 | TSENS_DEBUG_CONTROL(tmdev->tsens_tm_addr)); |
| 136 | while (loop < TSENS_DEBUG_LOOP_COUNT) { |
| 137 | debug_dump = readl_relaxed(debug_data_addr); |
| 138 | pr_err("cntrl:%d, bus-id:%d with value: 0x%x\n", |
| 139 | cntrl_id, i, debug_dump); |
| 140 | if (i == TSENS_DBG_BUS_ID_2) |
| 141 | usleep_range( |
| 142 | TSENS_DEBUG_BUS_ID2_MIN_CYCLE, |
| 143 | TSENS_DEBUG_BUS_ID2_MAX_CYCLE); |
| 144 | loop++; |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | pr_err("Start of TSENS TM dump\n"); |
| 149 | for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) { |
| 150 | r1 = readl_relaxed(controller_id_addr + offset); |
| 151 | r2 = readl_relaxed(controller_id_addr + (offset + |
| 152 | TSENS_DEBUG_OFFSET_WORD1)); |
| 153 | r3 = readl_relaxed(controller_id_addr + (offset + |
| 154 | TSENS_DEBUG_OFFSET_WORD2)); |
| 155 | r4 = readl_relaxed(controller_id_addr + (offset + |
| 156 | TSENS_DEBUG_OFFSET_WORD3)); |
| 157 | |
| 158 | pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 159 | cntrl_id, offset, r1, r2, r3, r4); |
| 160 | offset += TSENS_DEBUG_OFFSET_ROW; |
| 161 | } |
| 162 | |
| 163 | offset = 0; |
| 164 | pr_err("Start of TSENS SROT dump\n"); |
| 165 | for (i = 0; i < TSENS_DEBUG_OFFSET_RANGE; i++) { |
| 166 | r1 = readl_relaxed(srot_addr + offset); |
| 167 | r2 = readl_relaxed(srot_addr + (offset + |
| 168 | TSENS_DEBUG_OFFSET_WORD1)); |
| 169 | r3 = readl_relaxed(srot_addr + (offset + |
| 170 | TSENS_DEBUG_OFFSET_WORD2)); |
| 171 | r4 = readl_relaxed(srot_addr + (offset + |
| 172 | TSENS_DEBUG_OFFSET_WORD3)); |
| 173 | |
| 174 | pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 175 | cntrl_id, offset, r1, r2, r3, r4); |
| 176 | offset += TSENS_DEBUG_OFFSET_ROW; |
| 177 | } |
| 178 | |
| 179 | loop = 0; |
| 180 | while (loop < TSENS_DEBUG_LOOP_COUNT) { |
| 181 | offset = TSENS_DEBUG_OFFSET_ROW * |
| 182 | TSENS_DEBUG_STATUS_REG_START; |
| 183 | pr_err("Start of TSENS TM dump %d\n", loop); |
| 184 | /* Limited dump of the registers for the temperature */ |
| 185 | for (i = 0; i < TSENS_DEBUG_LOOP_COUNT; i++) { |
| 186 | r1 = readl_relaxed(controller_id_addr + offset); |
| 187 | r2 = readl_relaxed(controller_id_addr + |
| 188 | (offset + TSENS_DEBUG_OFFSET_WORD1)); |
| 189 | r3 = readl_relaxed(controller_id_addr + |
| 190 | (offset + TSENS_DEBUG_OFFSET_WORD2)); |
| 191 | r4 = readl_relaxed(controller_id_addr + |
| 192 | (offset + TSENS_DEBUG_OFFSET_WORD3)); |
| 193 | |
| 194 | pr_err("ctrl:%d:0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 195 | cntrl_id, offset, r1, r2, r3, r4); |
| 196 | offset += TSENS_DEBUG_OFFSET_ROW; |
| 197 | } |
| 198 | loop++; |
| 199 | } |
| 200 | |
| 201 | return 0; |
| 202 | } |
| 203 | |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 204 | static struct tsens_dbg_func dbg_arr[] = { |
| 205 | [TSENS_DBG_LOG_TEMP_READS] = {tsens_dbg_log_temp_reads}, |
| 206 | [TSENS_DBG_LOG_INTERRUPT_TIMESTAMP] = { |
| 207 | tsens_dbg_log_interrupt_timestamp}, |
Siddartha Mohanadoss | 64a5da3 | 2017-05-09 11:09:51 -0700 | [diff] [blame] | 208 | [TSENS_DBG_LOG_BUS_ID_DATA] = {tsens_dbg_log_bus_id_data}, |
Siddartha Mohanadoss | 41b4cd9 | 2017-02-21 14:34:23 -0800 | [diff] [blame] | 209 | }; |
| 210 | |
| 211 | int tsens2xxx_dbg(struct tsens_device *data, u32 id, u32 dbg_type, int *val) |
| 212 | { |
| 213 | if (dbg_type >= TSENS_DBG_LOG_MAX) |
| 214 | return -EINVAL; |
| 215 | |
| 216 | dbg_arr[dbg_type].dbg_func(data, id, dbg_type, val); |
| 217 | |
| 218 | return 0; |
| 219 | } |
| 220 | EXPORT_SYMBOL(tsens2xxx_dbg); |