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Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05301/*
2 * ALSA SoC Synopsys I2S Audio Layer
3 *
Rajeev Kumar22a4adf2013-06-11 09:29:08 +05304 * sound/soc/dwc/designware_i2s.c
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05305 *
6 * Copyright (C) 2010 ST Microelectronics
Rajeev Kumar9a302c32014-09-05 16:47:04 +05307 * Rajeev Kumar <rajeevkumar.linux@gmail.com>
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +05308 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/clk.h>
15#include <linux/device.h>
16#include <linux/init.h>
17#include <linux/io.h>
18#include <linux/interrupt.h>
19#include <linux/module.h>
20#include <linux/slab.h>
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -050021#include <linux/pm_runtime.h>
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053022#include <sound/designware_i2s.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
Andrew Jackson0d274542014-12-30 10:55:48 +000026#include <sound/dmaengine_pcm.h>
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053027
28/* common register for all channel */
29#define IER 0x000
30#define IRER 0x004
31#define ITER 0x008
32#define CER 0x00C
33#define CCR 0x010
34#define RXFFR 0x014
35#define TXFFR 0x018
36
37/* I2STxRxRegisters for all channels */
38#define LRBR_LTHR(x) (0x40 * x + 0x020)
39#define RRBR_RTHR(x) (0x40 * x + 0x024)
40#define RER(x) (0x40 * x + 0x028)
41#define TER(x) (0x40 * x + 0x02C)
42#define RCR(x) (0x40 * x + 0x030)
43#define TCR(x) (0x40 * x + 0x034)
44#define ISR(x) (0x40 * x + 0x038)
45#define IMR(x) (0x40 * x + 0x03C)
46#define ROR(x) (0x40 * x + 0x040)
47#define TOR(x) (0x40 * x + 0x044)
48#define RFCR(x) (0x40 * x + 0x048)
49#define TFCR(x) (0x40 * x + 0x04C)
50#define RFF(x) (0x40 * x + 0x050)
51#define TFF(x) (0x40 * x + 0x054)
52
53/* I2SCOMPRegisters */
54#define I2S_COMP_PARAM_2 0x01F0
55#define I2S_COMP_PARAM_1 0x01F4
56#define I2S_COMP_VERSION 0x01F8
57#define I2S_COMP_TYPE 0x01FC
58
Andrew Jacksonb226efe2014-12-30 10:55:45 +000059/*
60 * Component parameter register fields - define the I2S block's
61 * configuration.
62 */
63#define COMP1_TX_WORDSIZE_3(r) (((r) & GENMASK(27, 25)) >> 25)
64#define COMP1_TX_WORDSIZE_2(r) (((r) & GENMASK(24, 22)) >> 22)
65#define COMP1_TX_WORDSIZE_1(r) (((r) & GENMASK(21, 19)) >> 19)
66#define COMP1_TX_WORDSIZE_0(r) (((r) & GENMASK(18, 16)) >> 16)
67#define COMP1_TX_CHANNELS(r) (((r) & GENMASK(10, 9)) >> 9)
68#define COMP1_RX_CHANNELS(r) (((r) & GENMASK(8, 7)) >> 7)
69#define COMP1_RX_ENABLED(r) (((r) & BIT(6)) >> 6)
70#define COMP1_TX_ENABLED(r) (((r) & BIT(5)) >> 5)
71#define COMP1_MODE_EN(r) (((r) & BIT(4)) >> 4)
72#define COMP1_FIFO_DEPTH_GLOBAL(r) (((r) & GENMASK(3, 2)) >> 2)
73#define COMP1_APB_DATA_WIDTH(r) (((r) & GENMASK(1, 0)) >> 0)
74
75#define COMP2_RX_WORDSIZE_3(r) (((r) & GENMASK(12, 10)) >> 10)
76#define COMP2_RX_WORDSIZE_2(r) (((r) & GENMASK(9, 7)) >> 7)
77#define COMP2_RX_WORDSIZE_1(r) (((r) & GENMASK(5, 3)) >> 3)
78#define COMP2_RX_WORDSIZE_0(r) (((r) & GENMASK(2, 0)) >> 0)
79
80/* Number of entries in WORDSIZE and DATA_WIDTH parameter registers */
81#define COMP_MAX_WORDSIZE (1 << 3)
82#define COMP_MAX_DATA_WIDTH (1 << 2)
83
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053084#define MAX_CHANNEL_NUM 8
85#define MIN_CHANNEL_NUM 2
86
Andrew Jackson0d274542014-12-30 10:55:48 +000087union dw_i2s_snd_dma_data {
88 struct i2s_dma_data pd;
89 struct snd_dmaengine_dai_dma_data dt;
90};
91
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +053092struct dw_i2s_dev {
93 void __iomem *i2s_base;
94 struct clk *clk;
95 int active;
96 unsigned int capability;
Maruthi Srinivas Bayyavarapue1648352015-12-04 18:40:32 -050097 unsigned int quirks;
98 unsigned int i2s_reg_comp1;
99 unsigned int i2s_reg_comp2;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530100 struct device *dev;
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500101 u32 ccr;
102 u32 xfer_resolution;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530103
104 /* data related to DMA transfers b/w i2s and DMAC */
Andrew Jackson0d274542014-12-30 10:55:48 +0000105 union dw_i2s_snd_dma_data play_dma_data;
106 union dw_i2s_snd_dma_data capture_dma_data;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530107 struct i2s_clk_config_data config;
108 int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
109};
110
Mark Brown6b4a21b2012-06-28 13:11:47 +0100111static inline void i2s_write_reg(void __iomem *io_base, int reg, u32 val)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530112{
113 writel(val, io_base + reg);
114}
115
Mark Brown6b4a21b2012-06-28 13:11:47 +0100116static inline u32 i2s_read_reg(void __iomem *io_base, int reg)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530117{
118 return readl(io_base + reg);
119}
120
121static inline void i2s_disable_channels(struct dw_i2s_dev *dev, u32 stream)
122{
123 u32 i = 0;
124
125 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
126 for (i = 0; i < 4; i++)
127 i2s_write_reg(dev->i2s_base, TER(i), 0);
128 } else {
129 for (i = 0; i < 4; i++)
130 i2s_write_reg(dev->i2s_base, RER(i), 0);
131 }
132}
133
134static inline void i2s_clear_irqs(struct dw_i2s_dev *dev, u32 stream)
135{
136 u32 i = 0;
137
138 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
139 for (i = 0; i < 4; i++)
Yitian Bu48738672015-10-02 15:18:41 +0800140 i2s_read_reg(dev->i2s_base, TOR(i));
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530141 } else {
142 for (i = 0; i < 4; i++)
Yitian Bu48738672015-10-02 15:18:41 +0800143 i2s_read_reg(dev->i2s_base, ROR(i));
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530144 }
145}
146
Mark Brown1520ffd2012-07-04 19:04:11 +0100147static void i2s_start(struct dw_i2s_dev *dev,
148 struct snd_pcm_substream *substream)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530149{
yitian924eb472015-09-29 22:43:17 +0800150 u32 i, irq;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530151 i2s_write_reg(dev->i2s_base, IER, 1);
152
yitian924eb472015-09-29 22:43:17 +0800153 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
154 for (i = 0; i < 4; i++) {
155 irq = i2s_read_reg(dev->i2s_base, IMR(i));
156 i2s_write_reg(dev->i2s_base, IMR(i), irq & ~0x30);
157 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530158 i2s_write_reg(dev->i2s_base, ITER, 1);
yitian924eb472015-09-29 22:43:17 +0800159 } else {
160 for (i = 0; i < 4; i++) {
161 irq = i2s_read_reg(dev->i2s_base, IMR(i));
162 i2s_write_reg(dev->i2s_base, IMR(i), irq & ~0x03);
163 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530164 i2s_write_reg(dev->i2s_base, IRER, 1);
yitian924eb472015-09-29 22:43:17 +0800165 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530166
167 i2s_write_reg(dev->i2s_base, CER, 1);
168}
169
170static void i2s_stop(struct dw_i2s_dev *dev,
171 struct snd_pcm_substream *substream)
172{
173 u32 i = 0, irq;
174
175 i2s_clear_irqs(dev, substream->stream);
176 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
177 i2s_write_reg(dev->i2s_base, ITER, 0);
178
179 for (i = 0; i < 4; i++) {
180 irq = i2s_read_reg(dev->i2s_base, IMR(i));
181 i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x30);
182 }
183 } else {
184 i2s_write_reg(dev->i2s_base, IRER, 0);
185
186 for (i = 0; i < 4; i++) {
187 irq = i2s_read_reg(dev->i2s_base, IMR(i));
188 i2s_write_reg(dev->i2s_base, IMR(i), irq | 0x03);
189 }
190 }
191
192 if (!dev->active) {
193 i2s_write_reg(dev->i2s_base, CER, 0);
194 i2s_write_reg(dev->i2s_base, IER, 0);
195 }
196}
197
198static int dw_i2s_startup(struct snd_pcm_substream *substream,
199 struct snd_soc_dai *cpu_dai)
200{
201 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
Andrew Jackson0d274542014-12-30 10:55:48 +0000202 union dw_i2s_snd_dma_data *dma_data = NULL;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530203
204 if (!(dev->capability & DWC_I2S_RECORD) &&
205 (substream->stream == SNDRV_PCM_STREAM_CAPTURE))
206 return -EINVAL;
207
208 if (!(dev->capability & DWC_I2S_PLAY) &&
209 (substream->stream == SNDRV_PCM_STREAM_PLAYBACK))
210 return -EINVAL;
211
212 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
213 dma_data = &dev->play_dma_data;
214 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
215 dma_data = &dev->capture_dma_data;
216
217 snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)dma_data);
218
219 return 0;
220}
221
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500222static void dw_i2s_config(struct dw_i2s_dev *dev, int stream)
223{
224 u32 ch_reg, irq;
225 struct i2s_clk_config_data *config = &dev->config;
226
227
228 i2s_disable_channels(dev, stream);
229
230 for (ch_reg = 0; ch_reg < (config->chan_nr / 2); ch_reg++) {
231 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
232 i2s_write_reg(dev->i2s_base, TCR(ch_reg),
233 dev->xfer_resolution);
234 i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
235 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
236 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
237 i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
238 } else {
239 i2s_write_reg(dev->i2s_base, RCR(ch_reg),
240 dev->xfer_resolution);
241 i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
242 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
243 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
244 i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
245 }
246
247 }
248}
249
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530250static int dw_i2s_hw_params(struct snd_pcm_substream *substream,
251 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
252{
253 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
254 struct i2s_clk_config_data *config = &dev->config;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530255 int ret;
256
257 switch (params_format(params)) {
258 case SNDRV_PCM_FORMAT_S16_LE:
259 config->data_width = 16;
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500260 dev->ccr = 0x00;
261 dev->xfer_resolution = 0x02;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530262 break;
263
264 case SNDRV_PCM_FORMAT_S24_LE:
265 config->data_width = 24;
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500266 dev->ccr = 0x08;
267 dev->xfer_resolution = 0x04;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530268 break;
269
270 case SNDRV_PCM_FORMAT_S32_LE:
271 config->data_width = 32;
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500272 dev->ccr = 0x10;
273 dev->xfer_resolution = 0x05;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530274 break;
275
276 default:
277 dev_err(dev->dev, "designware-i2s: unsuppted PCM fmt");
278 return -EINVAL;
279 }
280
281 config->chan_nr = params_channels(params);
282
283 switch (config->chan_nr) {
284 case EIGHT_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530285 case SIX_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530286 case FOUR_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530287 case TWO_CHANNEL_SUPPORT:
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530288 break;
289 default:
290 dev_err(dev->dev, "channel not supported\n");
Dan Carpenter0099d242013-01-25 09:43:43 +0300291 return -EINVAL;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530292 }
293
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500294 dw_i2s_config(dev, substream->stream);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530295
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500296 i2s_write_reg(dev->i2s_base, CCR, dev->ccr);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530297
298 config->sample_rate = params_rate(params);
299
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400300 if (dev->capability & DW_I2S_MASTER) {
301 if (dev->i2s_clk_cfg) {
302 ret = dev->i2s_clk_cfg(config);
303 if (ret < 0) {
304 dev_err(dev->dev, "runtime audio clk config fail\n");
305 return ret;
306 }
307 } else {
308 u32 bitclk = config->sample_rate *
309 config->data_width * 2;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530310
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400311 ret = clk_set_rate(dev->clk, bitclk);
312 if (ret) {
313 dev_err(dev->dev, "Can't set I2S clock rate: %d\n",
314 ret);
315 return ret;
316 }
Andrew Jackson0d274542014-12-30 10:55:48 +0000317 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530318 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530319 return 0;
320}
321
322static void dw_i2s_shutdown(struct snd_pcm_substream *substream,
323 struct snd_soc_dai *dai)
324{
325 snd_soc_dai_set_dma_data(dai, substream, NULL);
326}
327
Andrew Jackson3475c3d2014-12-19 16:18:05 +0000328static int dw_i2s_prepare(struct snd_pcm_substream *substream,
329 struct snd_soc_dai *dai)
330{
331 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
332
333 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
334 i2s_write_reg(dev->i2s_base, TXFFR, 1);
335 else
336 i2s_write_reg(dev->i2s_base, RXFFR, 1);
337
338 return 0;
339}
340
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530341static int dw_i2s_trigger(struct snd_pcm_substream *substream,
342 int cmd, struct snd_soc_dai *dai)
343{
344 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
345 int ret = 0;
346
347 switch (cmd) {
348 case SNDRV_PCM_TRIGGER_START:
349 case SNDRV_PCM_TRIGGER_RESUME:
350 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
351 dev->active++;
352 i2s_start(dev, substream);
353 break;
354
355 case SNDRV_PCM_TRIGGER_STOP:
356 case SNDRV_PCM_TRIGGER_SUSPEND:
357 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
358 dev->active--;
359 i2s_stop(dev, substream);
360 break;
361 default:
362 ret = -EINVAL;
363 break;
364 }
365 return ret;
366}
367
Maruthi Srinivas Bayyavarapuab57b8e2015-10-23 17:15:41 -0400368static int dw_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int fmt)
369{
370 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
371 int ret = 0;
372
373 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
374 case SND_SOC_DAIFMT_CBM_CFM:
375 if (dev->capability & DW_I2S_SLAVE)
376 ret = 0;
377 else
378 ret = -EINVAL;
379 break;
380 case SND_SOC_DAIFMT_CBS_CFS:
381 if (dev->capability & DW_I2S_MASTER)
382 ret = 0;
383 else
384 ret = -EINVAL;
385 break;
386 case SND_SOC_DAIFMT_CBM_CFS:
387 case SND_SOC_DAIFMT_CBS_CFM:
388 ret = -EINVAL;
389 break;
390 default:
391 dev_dbg(dev->dev, "dwc : Invalid master/slave format\n");
392 ret = -EINVAL;
393 break;
394 }
395 return ret;
396}
397
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530398static struct snd_soc_dai_ops dw_i2s_dai_ops = {
399 .startup = dw_i2s_startup,
400 .shutdown = dw_i2s_shutdown,
401 .hw_params = dw_i2s_hw_params,
Andrew Jackson3475c3d2014-12-19 16:18:05 +0000402 .prepare = dw_i2s_prepare,
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530403 .trigger = dw_i2s_trigger,
Maruthi Srinivas Bayyavarapuab57b8e2015-10-23 17:15:41 -0400404 .set_fmt = dw_i2s_set_fmt,
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530405};
406
Kuninori Morimoto92eaa322013-03-21 03:31:30 -0700407static const struct snd_soc_component_driver dw_i2s_component = {
408 .name = "dw-i2s",
409};
410
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530411#ifdef CONFIG_PM
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -0500412static int dw_i2s_runtime_suspend(struct device *dev)
413{
414 struct dw_i2s_dev *dw_dev = dev_get_drvdata(dev);
415
416 if (dw_dev->capability & DW_I2S_MASTER)
417 clk_disable(dw_dev->clk);
418 return 0;
419}
420
421static int dw_i2s_runtime_resume(struct device *dev)
422{
423 struct dw_i2s_dev *dw_dev = dev_get_drvdata(dev);
424
425 if (dw_dev->capability & DW_I2S_MASTER)
426 clk_enable(dw_dev->clk);
427 return 0;
428}
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530429
430static int dw_i2s_suspend(struct snd_soc_dai *dai)
431{
432 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
433
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400434 if (dev->capability & DW_I2S_MASTER)
435 clk_disable(dev->clk);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530436 return 0;
437}
438
439static int dw_i2s_resume(struct snd_soc_dai *dai)
440{
441 struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai);
442
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400443 if (dev->capability & DW_I2S_MASTER)
444 clk_enable(dev->clk);
Maruthi Srinivas Bayyavarapu0032e9d2015-12-04 18:40:33 -0500445
446 if (dai->playback_active)
447 dw_i2s_config(dev, SNDRV_PCM_STREAM_PLAYBACK);
448 if (dai->capture_active)
449 dw_i2s_config(dev, SNDRV_PCM_STREAM_CAPTURE);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530450 return 0;
451}
452
453#else
454#define dw_i2s_suspend NULL
455#define dw_i2s_resume NULL
456#endif
457
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000458/*
459 * The following tables allow a direct lookup of various parameters
460 * defined in the I2S block's configuration in terms of sound system
461 * parameters. Each table is sized to the number of entries possible
462 * according to the number of configuration bits describing an I2S
463 * block parameter.
464 */
465
Andrew Jackson0d274542014-12-30 10:55:48 +0000466/* Maximum bit resolution of a channel - not uniformly spaced */
467static const u32 fifo_width[COMP_MAX_WORDSIZE] = {
468 12, 16, 20, 24, 32, 0, 0, 0
469};
470
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000471/* Width of (DMA) bus */
472static const u32 bus_widths[COMP_MAX_DATA_WIDTH] = {
473 DMA_SLAVE_BUSWIDTH_1_BYTE,
474 DMA_SLAVE_BUSWIDTH_2_BYTES,
475 DMA_SLAVE_BUSWIDTH_4_BYTES,
476 DMA_SLAVE_BUSWIDTH_UNDEFINED
477};
478
479/* PCM format to support channel resolution */
480static const u32 formats[COMP_MAX_WORDSIZE] = {
481 SNDRV_PCM_FMTBIT_S16_LE,
482 SNDRV_PCM_FMTBIT_S16_LE,
483 SNDRV_PCM_FMTBIT_S24_LE,
484 SNDRV_PCM_FMTBIT_S24_LE,
485 SNDRV_PCM_FMTBIT_S32_LE,
486 0,
487 0,
488 0
489};
490
Andrew Jackson0d274542014-12-30 10:55:48 +0000491static int dw_configure_dai(struct dw_i2s_dev *dev,
Andrew Jacksonafa86032014-12-19 16:18:07 +0000492 struct snd_soc_dai_driver *dw_i2s_dai,
Andrew Jackson0d274542014-12-30 10:55:48 +0000493 unsigned int rates)
Andrew Jacksonafa86032014-12-19 16:18:07 +0000494{
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000495 /*
496 * Read component parameter registers to extract
497 * the I2S block's configuration.
498 */
Maruthi Srinivas Bayyavarapue1648352015-12-04 18:40:32 -0500499 u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
500 u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2);
Andrew Jackson0d274542014-12-30 10:55:48 +0000501 u32 idx;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000502
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000503 if (COMP1_TX_ENABLED(comp1)) {
Andrew Jacksonafa86032014-12-19 16:18:07 +0000504 dev_dbg(dev->dev, " designware: play supported\n");
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000505 idx = COMP1_TX_WORDSIZE_0(comp1);
506 if (WARN_ON(idx >= ARRAY_SIZE(formats)))
507 return -EINVAL;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000508 dw_i2s_dai->playback.channels_min = MIN_CHANNEL_NUM;
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000509 dw_i2s_dai->playback.channels_max =
510 1 << (COMP1_TX_CHANNELS(comp1) + 1);
511 dw_i2s_dai->playback.formats = formats[idx];
Andrew Jackson0d274542014-12-30 10:55:48 +0000512 dw_i2s_dai->playback.rates = rates;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000513 }
514
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000515 if (COMP1_RX_ENABLED(comp1)) {
Andrew Jacksonafa86032014-12-19 16:18:07 +0000516 dev_dbg(dev->dev, "designware: record supported\n");
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000517 idx = COMP2_RX_WORDSIZE_0(comp2);
518 if (WARN_ON(idx >= ARRAY_SIZE(formats)))
519 return -EINVAL;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000520 dw_i2s_dai->capture.channels_min = MIN_CHANNEL_NUM;
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000521 dw_i2s_dai->capture.channels_max =
522 1 << (COMP1_RX_CHANNELS(comp1) + 1);
523 dw_i2s_dai->capture.formats = formats[idx];
Andrew Jackson0d274542014-12-30 10:55:48 +0000524 dw_i2s_dai->capture.rates = rates;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000525 }
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000526
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400527 if (COMP1_MODE_EN(comp1)) {
528 dev_dbg(dev->dev, "designware: i2s master mode supported\n");
529 dev->capability |= DW_I2S_MASTER;
530 } else {
531 dev_dbg(dev->dev, "designware: i2s slave mode supported\n");
532 dev->capability |= DW_I2S_SLAVE;
533 }
534
Andrew Jacksonb226efe2014-12-30 10:55:45 +0000535 return 0;
Andrew Jacksonafa86032014-12-19 16:18:07 +0000536}
537
Andrew Jackson0d274542014-12-30 10:55:48 +0000538static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
539 struct snd_soc_dai_driver *dw_i2s_dai,
540 struct resource *res,
541 const struct i2s_platform_data *pdata)
542{
Maruthi Srinivas Bayyavarapue1648352015-12-04 18:40:32 -0500543 u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
Andrew Jackson0d274542014-12-30 10:55:48 +0000544 u32 idx = COMP1_APB_DATA_WIDTH(comp1);
545 int ret;
546
547 if (WARN_ON(idx >= ARRAY_SIZE(bus_widths)))
548 return -EINVAL;
549
550 ret = dw_configure_dai(dev, dw_i2s_dai, pdata->snd_rates);
551 if (ret < 0)
552 return ret;
553
554 /* Set DMA slaves info */
555 dev->play_dma_data.pd.data = pdata->play_dma_data;
556 dev->capture_dma_data.pd.data = pdata->capture_dma_data;
557 dev->play_dma_data.pd.addr = res->start + I2S_TXDMA;
558 dev->capture_dma_data.pd.addr = res->start + I2S_RXDMA;
559 dev->play_dma_data.pd.max_burst = 16;
560 dev->capture_dma_data.pd.max_burst = 16;
561 dev->play_dma_data.pd.addr_width = bus_widths[idx];
562 dev->capture_dma_data.pd.addr_width = bus_widths[idx];
563 dev->play_dma_data.pd.filter = pdata->filter;
564 dev->capture_dma_data.pd.filter = pdata->filter;
565
566 return 0;
567}
568
569static int dw_configure_dai_by_dt(struct dw_i2s_dev *dev,
570 struct snd_soc_dai_driver *dw_i2s_dai,
571 struct resource *res)
572{
573 u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
574 u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2);
575 u32 fifo_depth = 1 << (1 + COMP1_FIFO_DEPTH_GLOBAL(comp1));
576 u32 idx = COMP1_APB_DATA_WIDTH(comp1);
577 u32 idx2;
578 int ret;
579
580 if (WARN_ON(idx >= ARRAY_SIZE(bus_widths)))
581 return -EINVAL;
582
583 ret = dw_configure_dai(dev, dw_i2s_dai, SNDRV_PCM_RATE_8000_192000);
584 if (ret < 0)
585 return ret;
586
587 if (COMP1_TX_ENABLED(comp1)) {
588 idx2 = COMP1_TX_WORDSIZE_0(comp1);
589
590 dev->capability |= DWC_I2S_PLAY;
591 dev->play_dma_data.dt.addr = res->start + I2S_TXDMA;
592 dev->play_dma_data.dt.addr_width = bus_widths[idx];
593 dev->play_dma_data.dt.chan_name = "TX";
594 dev->play_dma_data.dt.fifo_size = fifo_depth *
595 (fifo_width[idx2]) >> 8;
596 dev->play_dma_data.dt.maxburst = 16;
597 }
598 if (COMP1_RX_ENABLED(comp1)) {
599 idx2 = COMP2_RX_WORDSIZE_0(comp2);
600
601 dev->capability |= DWC_I2S_RECORD;
602 dev->capture_dma_data.dt.addr = res->start + I2S_RXDMA;
603 dev->capture_dma_data.dt.addr_width = bus_widths[idx];
604 dev->capture_dma_data.dt.chan_name = "RX";
605 dev->capture_dma_data.dt.fifo_size = fifo_depth *
606 (fifo_width[idx2] >> 8);
607 dev->capture_dma_data.dt.maxburst = 16;
608 }
609
610 return 0;
611
612}
613
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530614static int dw_i2s_probe(struct platform_device *pdev)
615{
616 const struct i2s_platform_data *pdata = pdev->dev.platform_data;
617 struct dw_i2s_dev *dev;
618 struct resource *res;
619 int ret;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530620 struct snd_soc_dai_driver *dw_i2s_dai;
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400621 const char *clk_id;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530622
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530623 dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
624 if (!dev) {
625 dev_warn(&pdev->dev, "kzalloc fail\n");
626 return -ENOMEM;
627 }
628
Andrew Jacksonb163be42014-12-03 16:38:46 +0000629 dw_i2s_dai = devm_kzalloc(&pdev->dev, sizeof(*dw_i2s_dai), GFP_KERNEL);
Andrew Jacksonbe334652014-12-12 09:25:00 +0000630 if (!dw_i2s_dai)
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530631 return -ENOMEM;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530632
Andrew Jacksonb163be42014-12-03 16:38:46 +0000633 dw_i2s_dai->ops = &dw_i2s_dai_ops;
634 dw_i2s_dai->suspend = dw_i2s_suspend;
635 dw_i2s_dai->resume = dw_i2s_resume;
636
637 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Andrew Jacksonb163be42014-12-03 16:38:46 +0000638 dev->i2s_base = devm_ioremap_resource(&pdev->dev, res);
Andrew Jacksonbe334652014-12-12 09:25:00 +0000639 if (IS_ERR(dev->i2s_base))
Andrew Jacksonb163be42014-12-03 16:38:46 +0000640 return PTR_ERR(dev->i2s_base);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530641
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530642 dev->dev = &pdev->dev;
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400643
Andrew Jackson0d274542014-12-30 10:55:48 +0000644 if (pdata) {
Andrew Jackson0d274542014-12-30 10:55:48 +0000645 dev->capability = pdata->cap;
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400646 clk_id = NULL;
Maruthi Srinivas Bayyavarapue1648352015-12-04 18:40:32 -0500647 dev->quirks = pdata->quirks;
648 if (dev->quirks & DW_I2S_QUIRK_COMP_REG_OFFSET) {
649 dev->i2s_reg_comp1 = pdata->i2s_reg_comp1;
650 dev->i2s_reg_comp2 = pdata->i2s_reg_comp2;
651 } else {
652 dev->i2s_reg_comp1 = I2S_COMP_PARAM_1;
653 dev->i2s_reg_comp2 = I2S_COMP_PARAM_2;
654 }
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400655 ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
Andrew Jackson0d274542014-12-30 10:55:48 +0000656 } else {
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400657 clk_id = "i2sclk";
Andrew Jackson0d274542014-12-30 10:55:48 +0000658 ret = dw_configure_dai_by_dt(dev, dw_i2s_dai, res);
Andrew Jackson0d274542014-12-30 10:55:48 +0000659 }
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530660 if (ret < 0)
Andrew Jacksona56257c62014-12-30 10:55:43 +0000661 return ret;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530662
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400663 if (dev->capability & DW_I2S_MASTER) {
664 if (pdata) {
665 dev->i2s_clk_cfg = pdata->i2s_clk_cfg;
666 if (!dev->i2s_clk_cfg) {
667 dev_err(&pdev->dev, "no clock configure method\n");
668 return -ENODEV;
669 }
670 }
671 dev->clk = devm_clk_get(&pdev->dev, clk_id);
672
673 if (IS_ERR(dev->clk))
674 return PTR_ERR(dev->clk);
675
676 ret = clk_prepare_enable(dev->clk);
677 if (ret < 0)
678 return ret;
679 }
680
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530681 dev_set_drvdata(&pdev->dev, dev);
Andrew Jackson758c2de2014-12-30 10:55:46 +0000682 ret = devm_snd_soc_register_component(&pdev->dev, &dw_i2s_component,
Kuninori Morimoto92eaa322013-03-21 03:31:30 -0700683 dw_i2s_dai, 1);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530684 if (ret != 0) {
685 dev_err(&pdev->dev, "not able to register dai\n");
Fabio Estevame925a6b2013-08-26 09:25:15 -0300686 goto err_clk_disable;
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530687 }
688
Andrew Jackson0d274542014-12-30 10:55:48 +0000689 if (!pdata) {
690 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
691 if (ret) {
692 dev_err(&pdev->dev,
693 "Could not register PCM: %d\n", ret);
694 goto err_clk_disable;
695 }
696 }
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -0500697 pm_runtime_enable(&pdev->dev);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530698 return 0;
699
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530700err_clk_disable:
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400701 if (dev->capability & DW_I2S_MASTER)
702 clk_disable_unprepare(dev->clk);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530703 return ret;
704}
705
706static int dw_i2s_remove(struct platform_device *pdev)
707{
708 struct dw_i2s_dev *dev = dev_get_drvdata(&pdev->dev);
709
Maruthi Srinivas Bayyavarapu1d957d82015-09-25 17:48:22 -0400710 if (dev->capability & DW_I2S_MASTER)
711 clk_disable_unprepare(dev->clk);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530712
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -0500713 pm_runtime_disable(&pdev->dev);
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530714 return 0;
715}
716
Andrew Jackson0d274542014-12-30 10:55:48 +0000717#ifdef CONFIG_OF
718static const struct of_device_id dw_i2s_of_match[] = {
719 { .compatible = "snps,designware-i2s", },
720 {},
721};
722
723MODULE_DEVICE_TABLE(of, dw_i2s_of_match);
724#endif
725
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -0500726static const struct dev_pm_ops dwc_pm_ops = {
727 SET_RUNTIME_PM_OPS(dw_i2s_runtime_suspend, dw_i2s_runtime_resume, NULL)
728};
729
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530730static struct platform_driver dw_i2s_driver = {
731 .probe = dw_i2s_probe,
732 .remove = dw_i2s_remove,
733 .driver = {
734 .name = "designware-i2s",
Andrew Jackson0d274542014-12-30 10:55:48 +0000735 .of_match_table = of_match_ptr(dw_i2s_of_match),
Maruthi Srinivas Bayyavarapuf4830312015-12-04 18:40:31 -0500736 .pm = &dwc_pm_ops,
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530737 },
738};
739
740module_platform_driver(dw_i2s_driver);
741
Rajeev Kumarb794dbc2014-09-09 12:27:19 +0530742MODULE_AUTHOR("Rajeev Kumar <rajeevkumar.linux@gmail.com>");
Rajeev Kumar3a9cf8e2012-06-21 15:54:51 +0530743MODULE_DESCRIPTION("DESIGNWARE I2S SoC Interface");
744MODULE_LICENSE("GPL");
745MODULE_ALIAS("platform:designware_i2s");