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Ben Dooksa21765a2007-02-11 18:31:01 +01001/* linux/arch/arm/mach-s3c2440/mach-osiris.c
Ben Dooks110d3222006-03-20 17:10:02 +00002 *
Ben Dooksf3374222008-07-03 11:24:40 +01003 * Copyright (c) 2005,2008 Simtec Electronics
Ben Dooks110d3222006-03-20 17:10:02 +00004 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/timer.h>
17#include <linux/init.h>
18#include <linux/device.h>
Ben Dooks5698bd22007-06-06 10:36:09 +010019#include <linux/sysdev.h>
Ben Dooksb6d1f542006-12-17 23:22:26 +010020#include <linux/serial_core.h>
Ben Dooksd96a9802008-04-16 00:12:39 +010021#include <linux/clk.h>
Ben Dooksf3374222008-07-03 11:24:40 +010022#include <linux/i2c.h>
Ben Dooks110d3222006-03-20 17:10:02 +000023
24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/mach/irq.h>
27
Russell Kinga09e64f2008-08-05 16:14:15 +010028#include <mach/osiris-map.h>
29#include <mach/osiris-cpld.h>
Ben Dooks110d3222006-03-20 17:10:02 +000030
Russell Kinga09e64f2008-08-05 16:14:15 +010031#include <mach/hardware.h>
Ben Dooks110d3222006-03-20 17:10:02 +000032#include <asm/io.h>
33#include <asm/irq.h>
34#include <asm/mach-types.h>
35
Ben Dooksa2b7ba92008-10-07 22:26:09 +010036#include <plat/regs-serial.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010037#include <mach/regs-gpio.h>
38#include <mach/regs-mem.h>
39#include <mach/regs-lcd.h>
Ben Dooks531b6172007-07-22 16:05:25 +010040#include <asm/plat-s3c/nand.h>
Ben Dooks110d3222006-03-20 17:10:02 +000041
42#include <linux/mtd/mtd.h>
43#include <linux/mtd/nand.h>
44#include <linux/mtd/nand_ecc.h>
45#include <linux/mtd/partitions.h>
46
Ben Dooksa21765a2007-02-11 18:31:01 +010047#include <asm/plat-s3c24xx/clock.h>
Ben Dooksa2b7ba92008-10-07 22:26:09 +010048#include <plat/devs.h>
49#include <plat/cpu.h>
Ben Dooks110d3222006-03-20 17:10:02 +000050
Simon Arlott6cbdc8c2007-05-11 20:40:30 +010051/* onboard perihperal map */
Ben Dooks110d3222006-03-20 17:10:02 +000052
53static struct map_desc osiris_iodesc[] __initdata = {
54 /* ISA IO areas (may be over-written later) */
55
56 {
57 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
58 .pfn = __phys_to_pfn(S3C2410_CS5),
59 .length = SZ_16M,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = (u32)S3C24XX_VA_ISA_WORD,
63 .pfn = __phys_to_pfn(S3C2410_CS5),
64 .length = SZ_16M,
65 .type = MT_DEVICE,
66 },
67
68 /* CPLD control registers */
69
70 {
Ben Dooksc362aec2007-06-06 09:51:51 +010071 .virtual = (u32)OSIRIS_VA_CTRL0,
72 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL0),
73 .length = SZ_16K,
74 .type = MT_DEVICE,
75 }, {
Ben Dooks110d3222006-03-20 17:10:02 +000076 .virtual = (u32)OSIRIS_VA_CTRL1,
77 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL1),
78 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010079 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000080 }, {
81 .virtual = (u32)OSIRIS_VA_CTRL2,
82 .pfn = __phys_to_pfn(OSIRIS_PA_CTRL2),
83 .length = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +010084 .type = MT_DEVICE,
Ben Dooksc362aec2007-06-06 09:51:51 +010085 }, {
86 .virtual = (u32)OSIRIS_VA_IDREG,
87 .pfn = __phys_to_pfn(OSIRIS_PA_IDREG),
88 .length = SZ_16K,
89 .type = MT_DEVICE,
Ben Dooks110d3222006-03-20 17:10:02 +000090 },
91};
92
93#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
94#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
95#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
96
97static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
98 [0] = {
99 .name = "uclk",
100 .divisor = 1,
101 .min_baud = 0,
102 .max_baud = 0,
103 },
104 [1] = {
105 .name = "pclk",
106 .divisor = 1,
107 .min_baud = 0,
Ben Dooks705630d2006-07-26 20:16:39 +0100108 .max_baud = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000109 }
110};
111
Ben Dooks66a9b492006-06-18 23:04:05 +0100112static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000113 [0] = {
114 .hwport = 0,
115 .flags = 0,
116 .ucon = UCON,
117 .ulcon = ULCON,
118 .ufcon = UFCON,
119 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100120 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000121 },
122 [1] = {
Ben Dookse2e58102006-06-18 16:21:50 +0100123 .hwport = 1,
Ben Dooks110d3222006-03-20 17:10:02 +0000124 .flags = 0,
125 .ucon = UCON,
126 .ulcon = ULCON,
127 .ufcon = UFCON,
128 .clocks = osiris_serial_clocks,
Ben Dooks705630d2006-07-26 20:16:39 +0100129 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
Ben Dooks110d3222006-03-20 17:10:02 +0000130 },
Ben Dooksca7aa4d2006-12-07 20:49:01 +0100131 [2] = {
132 .hwport = 2,
133 .flags = 0,
134 .ucon = UCON,
135 .ulcon = ULCON,
136 .ufcon = UFCON,
137 .clocks = osiris_serial_clocks,
138 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
139 }
Ben Dooks110d3222006-03-20 17:10:02 +0000140};
141
142/* NAND Flash on Osiris board */
143
144static int external_map[] = { 2 };
145static int chip0_map[] = { 0 };
146static int chip1_map[] = { 1 };
147
Ben Dooksda956fd2006-03-20 21:02:39 +0000148static struct mtd_partition osiris_default_nand_part[] = {
Ben Dooks110d3222006-03-20 17:10:02 +0000149 [0] = {
150 .name = "Boot Agent",
151 .size = SZ_16K,
Ben Dooks705630d2006-07-26 20:16:39 +0100152 .offset = 0,
Ben Dooks110d3222006-03-20 17:10:02 +0000153 },
154 [1] = {
155 .name = "/boot",
156 .size = SZ_4M - SZ_16K,
157 .offset = SZ_16K,
158 },
159 [2] = {
160 .name = "user1",
161 .offset = SZ_4M,
162 .size = SZ_32M - SZ_4M,
163 },
164 [3] = {
165 .name = "user2",
166 .offset = SZ_32M,
167 .size = MTDPART_SIZ_FULL,
168 }
169};
170
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100171static struct mtd_partition osiris_default_nand_part_large[] = {
172 [0] = {
173 .name = "Boot Agent",
174 .size = SZ_128K,
175 .offset = 0,
176 },
177 [1] = {
178 .name = "/boot",
179 .size = SZ_4M - SZ_128K,
180 .offset = SZ_128K,
181 },
182 [2] = {
183 .name = "user1",
184 .offset = SZ_4M,
185 .size = SZ_32M - SZ_4M,
186 },
187 [3] = {
188 .name = "user2",
189 .offset = SZ_32M,
190 .size = MTDPART_SIZ_FULL,
191 }
192};
193
Ben Dooks110d3222006-03-20 17:10:02 +0000194/* the Osiris has 3 selectable slots for nand-flash, the two
195 * on-board chip areas, as well as the external slot.
196 *
197 * Note, there is no current hot-plug support for the External
198 * socket.
199*/
200
201static struct s3c2410_nand_set osiris_nand_sets[] = {
202 [1] = {
203 .name = "External",
204 .nr_chips = 1,
205 .nr_map = external_map,
206 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100207 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000208 },
209 [0] = {
210 .name = "chip0",
211 .nr_chips = 1,
212 .nr_map = chip0_map,
213 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100214 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000215 },
216 [2] = {
217 .name = "chip1",
218 .nr_chips = 1,
219 .nr_map = chip1_map,
220 .nr_partitions = ARRAY_SIZE(osiris_default_nand_part),
Ben Dooks705630d2006-07-26 20:16:39 +0100221 .partitions = osiris_default_nand_part,
Ben Dooks110d3222006-03-20 17:10:02 +0000222 },
223};
224
225static void osiris_nand_select(struct s3c2410_nand_set *set, int slot)
226{
227 unsigned int tmp;
228
229 slot = set->nr_map[slot] & 3;
230
231 pr_debug("osiris_nand: selecting slot %d (set %p,%p)\n",
232 slot, set, set->nr_map);
233
Ben Dooksc362aec2007-06-06 09:51:51 +0100234 tmp = __raw_readb(OSIRIS_VA_CTRL0);
235 tmp &= ~OSIRIS_CTRL0_NANDSEL;
Ben Dooks110d3222006-03-20 17:10:02 +0000236 tmp |= slot;
237
Ben Dooksc362aec2007-06-06 09:51:51 +0100238 pr_debug("osiris_nand: ctrl0 now %02x\n", tmp);
Ben Dooks110d3222006-03-20 17:10:02 +0000239
Ben Dooksc362aec2007-06-06 09:51:51 +0100240 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
Ben Dooks110d3222006-03-20 17:10:02 +0000241}
242
243static struct s3c2410_platform_nand osiris_nand_info = {
244 .tacls = 25,
245 .twrph0 = 60,
246 .twrph1 = 60,
247 .nr_sets = ARRAY_SIZE(osiris_nand_sets),
248 .sets = osiris_nand_sets,
249 .select_chip = osiris_nand_select,
250};
251
252/* PCMCIA control and configuration */
253
254static struct resource osiris_pcmcia_resource[] = {
255 [0] = {
256 .start = 0x0f000000,
257 .end = 0x0f100000,
258 .flags = IORESOURCE_MEM,
259 },
260 [1] = {
261 .start = 0x0c000000,
262 .end = 0x0c100000,
263 .flags = IORESOURCE_MEM,
264 }
265};
266
267static struct platform_device osiris_pcmcia = {
268 .name = "osiris-pcmcia",
269 .id = -1,
270 .num_resources = ARRAY_SIZE(osiris_pcmcia_resource),
271 .resource = osiris_pcmcia_resource,
272};
273
Ben Dooks5698bd22007-06-06 10:36:09 +0100274/* Osiris power management device */
275
276#ifdef CONFIG_PM
277static unsigned char pm_osiris_ctrl0;
278
279static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
280{
Ben Dooks28047ec2007-10-04 23:16:42 +0100281 unsigned int tmp;
282
Ben Dooks5698bd22007-06-06 10:36:09 +0100283 pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
Ben Dooks28047ec2007-10-04 23:16:42 +0100284 tmp = pm_osiris_ctrl0 & ~OSIRIS_CTRL0_NANDSEL;
285
286 /* ensure correct NAND slot is selected on resume */
287 if ((pm_osiris_ctrl0 & OSIRIS_CTRL0_BOOT_INT) == 0)
288 tmp |= 2;
289
290 __raw_writeb(tmp, OSIRIS_VA_CTRL0);
291
Ben Dooks4afcdda2007-10-04 23:18:08 +0100292 /* ensure that an nRESET is not generated on resume. */
293 s3c2410_gpio_setpin(S3C2410_GPA21, 1);
294 s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_OUT);
295
Ben Dooks5698bd22007-06-06 10:36:09 +0100296 return 0;
297}
298
299static int osiris_pm_resume(struct sys_device *sd)
300{
301 if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
302 __raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
303
Ben Dooks28047ec2007-10-04 23:16:42 +0100304 __raw_writeb(pm_osiris_ctrl0, OSIRIS_VA_CTRL0);
305
Ben Dooks4afcdda2007-10-04 23:18:08 +0100306 s3c2410_gpio_cfgpin(S3C2410_GPA21, S3C2410_GPA21_nRSTOUT);
307
Ben Dooks5698bd22007-06-06 10:36:09 +0100308 return 0;
309}
310
311#else
312#define osiris_pm_suspend NULL
313#define osiris_pm_resume NULL
314#endif
315
316static struct sysdev_class osiris_pm_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +0100317 .name = "mach-osiris",
Ben Dooks5698bd22007-06-06 10:36:09 +0100318 .suspend = osiris_pm_suspend,
319 .resume = osiris_pm_resume,
320};
321
322static struct sys_device osiris_pm_sysdev = {
323 .cls = &osiris_pm_sysclass,
324};
325
Ben Dooksf3374222008-07-03 11:24:40 +0100326/* I2C devices fitted. */
327
328static struct i2c_board_info osiris_i2c_devs[] __initdata = {
329 {
330 I2C_BOARD_INFO("tps65011", 0x48),
331 .irq = IRQ_EINT20,
332 },
333};
334
Ben Dooks110d3222006-03-20 17:10:02 +0000335/* Standard Osiris devices */
336
337static struct platform_device *osiris_devices[] __initdata = {
338 &s3c_device_i2c,
Ben Dooks55ba86b2007-06-06 09:53:00 +0100339 &s3c_device_wdt,
Ben Dooks110d3222006-03-20 17:10:02 +0000340 &s3c_device_nand,
341 &osiris_pcmcia,
342};
343
Ben Dooks2bc75092008-07-15 17:17:48 +0100344static struct clk *osiris_clocks[] __initdata = {
Ben Dooks110d3222006-03-20 17:10:02 +0000345 &s3c24xx_dclk0,
346 &s3c24xx_dclk1,
347 &s3c24xx_clkout0,
348 &s3c24xx_clkout1,
349 &s3c24xx_uclk,
350};
351
Ben Dooksda956fd2006-03-20 21:02:39 +0000352static void __init osiris_map_io(void)
Ben Dooks110d3222006-03-20 17:10:02 +0000353{
Ben Dooksda956fd2006-03-20 21:02:39 +0000354 unsigned long flags;
355
Ben Dooks110d3222006-03-20 17:10:02 +0000356 /* initialise the clocks */
357
Ben Dooksd96a9802008-04-16 00:12:39 +0100358 s3c24xx_dclk0.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000359 s3c24xx_dclk0.rate = 12*1000*1000;
360
Ben Dooksd96a9802008-04-16 00:12:39 +0100361 s3c24xx_dclk1.parent = &clk_upll;
Ben Dooks110d3222006-03-20 17:10:02 +0000362 s3c24xx_dclk1.rate = 24*1000*1000;
363
364 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
365 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
366
367 s3c24xx_uclk.parent = &s3c24xx_clkout1;
368
Ben Dooksce89c202007-04-20 11:15:27 +0100369 s3c24xx_register_clocks(osiris_clocks, ARRAY_SIZE(osiris_clocks));
370
Ben Dooks110d3222006-03-20 17:10:02 +0000371 s3c_device_nand.dev.platform_data = &osiris_nand_info;
372
373 s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc));
374 s3c24xx_init_clocks(0);
375 s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs));
Ben Dooks110d3222006-03-20 17:10:02 +0000376
Ben Dooks3c3e69c2007-07-12 10:57:37 +0100377 /* check for the newer revision boards with large page nand */
378
379 if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) {
380 printk(KERN_INFO "OSIRIS-B detected (revision %d)\n",
381 __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK);
382 osiris_nand_sets[0].partitions = osiris_default_nand_part_large;
383 osiris_nand_sets[0].nr_partitions = ARRAY_SIZE(osiris_default_nand_part_large);
384 } else {
385 /* write-protect line to the NAND */
386 s3c2410_gpio_setpin(S3C2410_GPA0, 1);
387 }
388
Ben Dooks110d3222006-03-20 17:10:02 +0000389 /* fix bus configuration (nBE settings wrong on ABLE pre v2.20) */
Ben Dooksda956fd2006-03-20 21:02:39 +0000390
391 local_irq_save(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000392 __raw_writel(__raw_readl(S3C2410_BWSCON) | S3C2410_BWSCON_ST1 | S3C2410_BWSCON_ST2 | S3C2410_BWSCON_ST3 | S3C2410_BWSCON_ST4 | S3C2410_BWSCON_ST5, S3C2410_BWSCON);
Ben Dooksda956fd2006-03-20 21:02:39 +0000393 local_irq_restore(flags);
Ben Dooks110d3222006-03-20 17:10:02 +0000394}
395
Ben Dooks57e51712007-04-20 11:19:16 +0100396static void __init osiris_init(void)
397{
Ben Dooks5698bd22007-06-06 10:36:09 +0100398 sysdev_class_register(&osiris_pm_sysclass);
399 sysdev_register(&osiris_pm_sysdev);
400
Ben Dooksf3374222008-07-03 11:24:40 +0100401 i2c_register_board_info(0, osiris_i2c_devs,
402 ARRAY_SIZE(osiris_i2c_devs));
403
Ben Dooks57e51712007-04-20 11:19:16 +0100404 platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
405};
406
Ben Dooks110d3222006-03-20 17:10:02 +0000407MACHINE_START(OSIRIS, "Simtec-OSIRIS")
408 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
Ben Dooks110d3222006-03-20 17:10:02 +0000409 .phys_io = S3C2410_PA_UART,
410 .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
411 .boot_params = S3C2410_SDRAM_PA + 0x100,
412 .map_io = osiris_map_io,
Ben Dooks57e51712007-04-20 11:19:16 +0100413 .init_machine = osiris_init,
Ben Dooks110d3222006-03-20 17:10:02 +0000414 .init_irq = s3c24xx_init_irq,
Ben Dooks5698bd22007-06-06 10:36:09 +0100415 .init_machine = osiris_init,
Ben Dooks110d3222006-03-20 17:10:02 +0000416 .timer = &s3c24xx_timer,
417MACHINE_END