blob: 4830651cc4cffd5dfafc1c29c5d5fd00c905ecac [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Driver for Digigram VX soundcards
3 *
4 * Hardware core part
5 *
6 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#ifndef __SOUND_VX_COMMON_H
24#define __SOUND_VX_COMMON_H
25
26#include <sound/pcm.h>
27#include <sound/hwdep.h>
28#include <linux/interrupt.h>
29
30#if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
31#if !defined(CONFIG_USE_VXLOADER) && !defined(CONFIG_SND_VX_LIB) /* built-in kernel */
32#define SND_VX_FW_LOADER /* use the standard firmware loader */
33#endif
34#endif
35
36struct firmware;
37struct device;
38
Linus Torvalds1da177e2005-04-16 15:20:36 -070039#define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
40
41/*
42 */
43#define SIZE_MAX_CMD 0x10
44#define SIZE_MAX_STATUS 0x10
45
46struct vx_rmh {
47 u16 LgCmd; /* length of the command to send (WORDs) */
48 u16 LgStat; /* length of the status received (WORDs) */
49 u32 Cmd[SIZE_MAX_CMD];
50 u32 Stat[SIZE_MAX_STATUS];
51 u16 DspStat; /* status type, RMP_SSIZE_XXX */
52};
53
54typedef u64 pcx_time_t;
55
56#define VX_MAX_PIPES 16
57#define VX_MAX_PERIODS 32
58#define VX_MAX_CODECS 2
59
60struct vx_ibl_info {
61 int size; /* the current IBL size (0 = query) in bytes */
62 int max_size; /* max. IBL size in bytes */
63 int min_size; /* min. IBL size in bytes */
64 int granularity; /* granularity */
65};
66
67struct vx_pipe {
68 int number;
69 unsigned int is_capture: 1;
70 unsigned int data_mode: 1;
71 unsigned int running: 1;
72 unsigned int prepared: 1;
73 int channels;
74 unsigned int differed_type;
75 pcx_time_t pcx_time;
Takashi Iwaiaf263672005-11-17 14:46:59 +010076 struct snd_pcm_substream *substream;
Linus Torvalds1da177e2005-04-16 15:20:36 -070077
78 int hbuf_size; /* H-buffer size in bytes */
79 int buffer_bytes; /* the ALSA pcm buffer size in bytes */
80 int period_bytes; /* the ALSA pcm period size in bytes */
81 int hw_ptr; /* the current hardware pointer in bytes */
82 int position; /* the current position in frames (playback only) */
83 int transferred; /* the transferred size (per period) in frames */
84 int align; /* size of alignment */
85 u64 cur_count; /* current sample position (for playback) */
86
87 unsigned int references; /* an output pipe may be used for monitoring and/or playback */
Takashi Iwaiaf263672005-11-17 14:46:59 +010088 struct vx_pipe *monitoring_pipe; /* pointer to the monitoring pipe (capture pipe only)*/
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
90 struct tasklet_struct start_tq;
91};
92
Takashi Iwaiaf263672005-11-17 14:46:59 +010093struct vx_core;
94
Linus Torvalds1da177e2005-04-16 15:20:36 -070095struct snd_vx_ops {
96 /* low-level i/o */
Takashi Iwaiaf263672005-11-17 14:46:59 +010097 unsigned char (*in8)(struct vx_core *chip, int reg);
98 unsigned int (*in32)(struct vx_core *chip, int reg);
99 void (*out8)(struct vx_core *chip, int reg, unsigned char val);
100 void (*out32)(struct vx_core *chip, int reg, unsigned int val);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 /* irq */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100102 int (*test_and_ack)(struct vx_core *chip);
103 void (*validate_irq)(struct vx_core *chip, int enable);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 /* codec */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100105 void (*write_codec)(struct vx_core *chip, int codec, unsigned int data);
106 void (*akm_write)(struct vx_core *chip, int reg, unsigned int data);
107 void (*reset_codec)(struct vx_core *chip);
108 void (*change_audio_source)(struct vx_core *chip, int src);
109 void (*set_clock_source)(struct vx_core *chp, int src);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110 /* chip init */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100111 int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw);
112 void (*reset_dsp)(struct vx_core *chip);
113 void (*reset_board)(struct vx_core *chip, int cold_reset);
114 int (*add_controls)(struct vx_core *chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 /* pcm */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100116 void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
117 struct vx_pipe *pipe, int count);
118 void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
119 struct vx_pipe *pipe, int count);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120};
121
122struct snd_vx_hardware {
123 const char *name;
124 int type; /* VX_TYPE_XXX */
125
126 /* hardware specs */
127 unsigned int num_codecs;
128 unsigned int num_ins;
129 unsigned int num_outs;
130 unsigned int output_level_max;
Takashi Iwai0cb29ea2007-01-29 15:33:49 +0100131 const unsigned int *output_level_db_scale;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700132};
133
134/* hwdep id string */
135#define SND_VX_HWDEP_ID "VX Loader"
136
137/* hardware type */
138enum {
139 /* VX222 PCI */
140 VX_TYPE_BOARD, /* old VX222 PCI */
141 VX_TYPE_V2, /* VX222 V2 PCI */
142 VX_TYPE_MIC, /* VX222 Mic PCI */
143 /* VX-pocket */
144 VX_TYPE_VXPOCKET, /* VXpocket V2 */
145 VX_TYPE_VXP440, /* VXpocket 440 */
146 VX_TYPE_NUMS
147};
148
149/* chip status */
150enum {
151 VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
152 VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
153 VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
154 VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
155 VX_STAT_IS_STALE = (1 << 15) /* device is stale */
156};
157
158/* min/max values for analog output for old codecs */
159#define VX_ANALOG_OUT_LEVEL_MAX 0xe3
160
Takashi Iwaiaf263672005-11-17 14:46:59 +0100161struct vx_core {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 /* ALSA stuff */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100163 struct snd_card *card;
164 struct snd_pcm *pcm[VX_MAX_CODECS];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700165 int type; /* VX_TYPE_XXX */
166
167 int irq;
168 /* ports are defined externally */
169
170 /* low-level functions */
171 struct snd_vx_hardware *hw;
172 struct snd_vx_ops *ops;
173
174 spinlock_t lock;
175 spinlock_t irq_lock;
176 struct tasklet_struct tq;
177
178 unsigned int chip_status;
179 unsigned int pcm_running;
180
181 struct device *dev;
Takashi Iwaiaf263672005-11-17 14:46:59 +0100182 struct snd_hwdep *hwdep;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
184 struct vx_rmh irq_rmh; /* RMH used in interrupts */
185
186 unsigned int audio_info; /* see VX_AUDIO_INFO */
187 unsigned int audio_ins;
188 unsigned int audio_outs;
189 struct vx_pipe **playback_pipes;
190 struct vx_pipe **capture_pipes;
191
192 /* clock and audio sources */
193 unsigned int audio_source; /* current audio input source */
194 unsigned int audio_source_target;
195 unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
196 unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
197 unsigned int freq; /* current frequency */
198 unsigned int freq_detected; /* detected frequency from digital in */
199 unsigned int uer_detected; /* VX_UER_MODE_XXX */
200 unsigned int uer_bits; /* IEC958 status bits */
201 struct vx_ibl_info ibl; /* IBL information */
202
203 /* mixer setting */
204 int output_level[VX_MAX_CODECS][2]; /* analog output level */
205 int audio_gain[2][4]; /* digital audio level (playback/capture) */
206 unsigned char audio_active[4]; /* mute/unmute on digital playback */
207 int audio_monitor[4]; /* playback hw-monitor level */
208 unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
209
Ingo Molnaref9f0a42006-01-16 16:31:42 +0100210 struct mutex mixer_mutex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211
212 const struct firmware *firmware[4]; /* loaded firmware data */
213};
214
215
216/*
217 * constructor
218 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100219struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
220 struct snd_vx_ops *ops, int extra_size);
221int snd_vx_setup_firmware(struct vx_core *chip);
222int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
223int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
224int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700225
Takashi Iwaiaf263672005-11-17 14:46:59 +0100226void snd_vx_free_firmware(struct vx_core *chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227
228/*
229 * interrupt handler; exported for pcmcia
230 */
David Howells7d12e782006-10-05 14:55:46 +0100231irqreturn_t snd_vx_irq_handler(int irq, void *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700232
233/*
234 * lowlevel functions
235 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100236static inline int vx_test_and_ack(struct vx_core *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237{
238 snd_assert(chip->ops->test_and_ack, return -ENXIO);
239 return chip->ops->test_and_ack(chip);
240}
241
Takashi Iwaiaf263672005-11-17 14:46:59 +0100242static inline void vx_validate_irq(struct vx_core *chip, int enable)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243{
244 snd_assert(chip->ops->validate_irq, return);
245 chip->ops->validate_irq(chip, enable);
246}
247
Takashi Iwaiaf263672005-11-17 14:46:59 +0100248static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249{
250 snd_assert(chip->ops->in8, return 0);
251 return chip->ops->in8(chip, reg);
252}
253
Takashi Iwaiaf263672005-11-17 14:46:59 +0100254static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700255{
256 snd_assert(chip->ops->in32, return 0);
257 return chip->ops->in32(chip, reg);
258}
259
Takashi Iwaiaf263672005-11-17 14:46:59 +0100260static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261{
262 snd_assert(chip->ops->out8, return);
263 chip->ops->out8(chip, reg, val);
264}
265
Takashi Iwaiaf263672005-11-17 14:46:59 +0100266static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267{
268 snd_assert(chip->ops->out32, return);
269 chip->ops->out32(chip, reg, val);
270}
271
272#define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
273#define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
274#define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
275#define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
276
Takashi Iwaiaf263672005-11-17 14:46:59 +0100277static inline void vx_reset_dsp(struct vx_core *chip)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278{
279 snd_assert(chip->ops->reset_dsp, return);
280 chip->ops->reset_dsp(chip);
281}
282
Takashi Iwaiaf263672005-11-17 14:46:59 +0100283int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
284int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
285int vx_send_rih(struct vx_core *chip, int cmd);
286int vx_send_rih_nolock(struct vx_core *chip, int cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
Takashi Iwaiaf263672005-11-17 14:46:59 +0100288void vx_reset_codec(struct vx_core *chip, int cold_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700289
290/*
291 * check the bit on the specified register
292 * returns zero if a bit matches, or a negative error code.
293 * exported for vxpocket driver
294 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100295int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
297#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
298#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
299
300
301/*
302 * pseudo-DMA transfer
303 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100304static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
305 struct vx_pipe *pipe, int count)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306{
307 snd_assert(chip->ops->dma_write, return);
308 chip->ops->dma_write(chip, runtime, pipe, count);
309}
310
Takashi Iwaiaf263672005-11-17 14:46:59 +0100311static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
312 struct vx_pipe *pipe, int count)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313{
314 snd_assert(chip->ops->dma_read, return);
315 chip->ops->dma_read(chip, runtime, pipe, count);
316}
317
318
319
320/* error with hardware code,
321 * the return value is -(VX_ERR_MASK | actual-hw-error-code)
322 */
323#define VX_ERR_MASK 0x1000000
324#define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
325
326
327/*
328 * pcm stuff
329 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100330int snd_vx_pcm_new(struct vx_core *chip);
331void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332
333/*
334 * mixer stuff
335 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100336int snd_vx_mixer_new(struct vx_core *chip);
337void vx_toggle_dac_mute(struct vx_core *chip, int mute);
338int vx_sync_audio_source(struct vx_core *chip);
339int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700340
341/*
342 * IEC958 & clock stuff
343 */
Takashi Iwaiaf263672005-11-17 14:46:59 +0100344void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
345int vx_set_clock(struct vx_core *chip, unsigned int freq);
346void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
347int vx_change_frequency(struct vx_core *chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349
350/*
Takashi Iwai0ed1cad2005-11-17 16:06:05 +0100351 * PM
352 */
353int snd_vx_suspend(struct vx_core *card, pm_message_t state);
354int snd_vx_resume(struct vx_core *card);
355
356/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 * hardware constants
358 */
359
360#define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
361#define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
362
363/* audio input source */
364enum {
365 VX_AUDIO_SRC_DIGITAL,
366 VX_AUDIO_SRC_LINE,
367 VX_AUDIO_SRC_MIC
368};
369
370/* clock source */
371enum {
372 INTERNAL_QUARTZ,
373 UER_SYNC
374};
375
376/* clock mode */
377enum {
378 VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
379 VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
380 VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
381};
382
383/* SPDIF/UER type */
384enum {
385 VX_UER_MODE_CONSUMER,
386 VX_UER_MODE_PROFESSIONAL,
387 VX_UER_MODE_NOT_PRESENT,
388};
389
390/* register indices */
391enum {
392 VX_ICR,
393 VX_CVR,
394 VX_ISR,
395 VX_IVR,
396 VX_RXH,
397 VX_TXH = VX_RXH,
398 VX_RXM,
399 VX_TXM = VX_RXM,
400 VX_RXL,
401 VX_TXL = VX_RXL,
402 VX_DMA,
403 VX_CDSP,
404 VX_RFREQ,
405 VX_RUER_V2,
406 VX_GAIN,
407 VX_DATA = VX_GAIN,
408 VX_MEMIRQ,
409 VX_ACQ,
410 VX_BIT0,
411 VX_BIT1,
412 VX_MIC0,
413 VX_MIC1,
414 VX_MIC2,
415 VX_MIC3,
416 VX_PLX0,
417 VX_PLX1,
418 VX_PLX2,
419
420 VX_LOFREQ, // V2: ACQ, VP: RFREQ
421 VX_HIFREQ, // V2: BIT0, VP: RUER_V2
422 VX_CSUER, // V2: BIT1, VP: BIT0
423 VX_RUER, // V2: RUER_V2, VP: BIT1
424
425 VX_REG_MAX,
426
427 /* aliases for VX board */
428 VX_RESET_DMA = VX_ISR,
429 VX_CFG = VX_RFREQ,
430 VX_STATUS = VX_MEMIRQ,
431 VX_SELMIC = VX_MIC0,
432 VX_COMPOT = VX_MIC1,
433 VX_SCOMPR = VX_MIC2,
434 VX_GLIMIT = VX_MIC3,
435 VX_INTCSR = VX_PLX0,
436 VX_CNTRL = VX_PLX1,
437 VX_GPIOC = VX_PLX2,
438
439 /* aliases for VXPOCKET board */
440 VX_MICRO = VX_MEMIRQ,
441 VX_CODEC2 = VX_MEMIRQ,
442 VX_DIALOG = VX_ACQ,
443
444};
445
446/* RMH status type */
447enum {
448 RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
449 RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
450 RMH_SSIZE_MASK = 2, /* status size given in bitmask */
451};
452
453
454/* bits for ICR register */
455#define ICR_HF1 0x10
456#define ICR_HF0 0x08
457#define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
458#define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
459
460/* bits for CVR register */
461#define CVR_HC 0x80
462
463/* bits for ISR register */
464#define ISR_HF3 0x10
465#define ISR_HF2 0x08
466#define ISR_CHK 0x10
467#define ISR_ERR 0x08
468#define ISR_TX_READY 0x04
469#define ISR_TX_EMPTY 0x02
470#define ISR_RX_FULL 0x01
471
472/* Constants used to access the DATA register */
473#define VX_DATA_CODEC_MASK 0x80
474#define VX_DATA_XICOR_MASK 0x80
475
476/* Constants used to access the CSUER register (both for VX2 and VXP) */
477#define VX_SUER_FREQ_MASK 0x0c
478#define VX_SUER_FREQ_32KHz_MASK 0x0c
479#define VX_SUER_FREQ_44KHz_MASK 0x00
480#define VX_SUER_FREQ_48KHz_MASK 0x04
481#define VX_SUER_DATA_PRESENT_MASK 0x02
482#define VX_SUER_CLOCK_PRESENT_MASK 0x01
483
484#define VX_CUER_HH_BITC_SEL_MASK 0x08
485#define VX_CUER_MH_BITC_SEL_MASK 0x04
486#define VX_CUER_ML_BITC_SEL_MASK 0x02
487#define VX_CUER_LL_BITC_SEL_MASK 0x01
488
489#define XX_UER_CBITS_OFFSET_MASK 0x1f
490
491
492/* bits for audio_info */
493#define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
494#define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
495#define VX_AUDIO_INFO_MPEG1 (1<<5)
496#define VX_AUDIO_INFO_MPEG2 (1<<6)
497#define VX_AUDIO_INFO_LINEAR_8 (1<<7)
498#define VX_AUDIO_INFO_LINEAR_16 (1<<8)
499#define VX_AUDIO_INFO_LINEAR_24 (1<<9)
500
501/* DSP Interrupt Request values */
502#define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
503/* call with vx_send_irq_dsp() */
504#define IRQ_MESS_WRITE_END 0x30
505#define IRQ_MESS_WRITE_NEXT 0x32
506#define IRQ_MESS_READ_NEXT 0x34
507#define IRQ_MESS_READ_END 0x36
508#define IRQ_MESSAGE 0x38
509#define IRQ_RESET_CHK 0x3A
510#define IRQ_CONNECT_STREAM_NEXT 0x26
511#define IRQ_CONNECT_STREAM_END 0x28
512#define IRQ_PAUSE_START_CONNECT 0x2A
513#define IRQ_END_CONNECTION 0x2C
514
515/* Is there async. events pending ( IT Source Test ) */
516#define ASYNC_EVENTS_PENDING 0x008000
517#define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
518#define NOTIF_EVENTS_PENDING 0x002000
519#define TIME_CODE_EVENT_PENDING 0x001000
520#define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
521#define END_OF_BUFFER_EVENTS_PENDING 0x000400
522#define FATAL_DSP_ERROR 0xff0000
523
524/* Stream Format Header Defines */
525#define HEADER_FMT_BASE 0xFED00000
526#define HEADER_FMT_MONO 0x000000C0
527#define HEADER_FMT_INTEL 0x00008000
528#define HEADER_FMT_16BITS 0x00002000
529#define HEADER_FMT_24BITS 0x00004000
530#define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
531#define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
532
533/* Constants used to access the Codec */
534#define XX_CODEC_SELECTOR 0x20
535/* codec commands */
536#define XX_CODEC_ADC_CONTROL_REGISTER 0x01
537#define XX_CODEC_DAC_CONTROL_REGISTER 0x02
538#define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
539#define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
540#define XX_CODEC_PORT_MODE_REGISTER 0x05
541#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
542#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
543
544/*
545 * Audio-level control values
546 */
547#define CVAL_M110DB 0x000 /* -110dB */
548#define CVAL_M99DB 0x02C
549#define CVAL_M21DB 0x163
550#define CVAL_M18DB 0x16F
551#define CVAL_M10DB 0x18F
552#define CVAL_0DB 0x1B7
553#define CVAL_18DB 0x1FF /* +18dB */
554#define CVAL_MAX 0x1FF
555
556#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
557#define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
558#define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
559#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
560#define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
561#define VALID_AUDIO_IO_MUTE_LEVEL 0x04
562#define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
563#define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
564
565
566#endif /* __SOUND_VX_COMMON_H */