Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Symmetric Multi Processing (SMP) support for Armada XP |
| 3 | * |
| 4 | * Copyright (C) 2012 Marvell |
| 5 | * |
| 6 | * Lior Amsalem <alior@marvell.com> |
| 7 | * Yehuda Yitschak <yehuday@marvell.com> |
| 8 | * Gregory CLEMENT <gregory.clement@free-electrons.com> |
| 9 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 10 | * |
| 11 | * This file is licensed under the terms of the GNU General Public |
| 12 | * License version 2. This program is licensed "as is" without any |
| 13 | * warranty of any kind, whether express or implied. |
| 14 | * |
| 15 | * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency |
| 16 | * This file implements the routines for preparing the SMP infrastructure |
| 17 | * and waking up the secondary CPUs |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/smp.h> |
| 22 | #include <linux/clk.h> |
| 23 | #include <linux/of.h> |
Ezequiel Garcia | 994c8c9 | 2013-07-26 10:17:54 -0300 | [diff] [blame] | 24 | #include <linux/of_address.h> |
Thomas Petazzoni | 87e1bed | 2013-03-21 17:59:15 +0100 | [diff] [blame] | 25 | #include <linux/mbus.h> |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 26 | #include <asm/cacheflush.h> |
| 27 | #include <asm/smp_plat.h> |
| 28 | #include "common.h" |
| 29 | #include "armada-370-xp.h" |
| 30 | #include "pmsu.h" |
| 31 | #include "coherency.h" |
| 32 | |
Ezequiel Garcia | 994c8c9 | 2013-07-26 10:17:54 -0300 | [diff] [blame] | 33 | #define AXP_BOOTROM_BASE 0xfff00000 |
| 34 | #define AXP_BOOTROM_SIZE 0x100000 |
| 35 | |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 36 | static struct clk *__init get_cpu_clk(int cpu) |
| 37 | { |
| 38 | struct clk *cpu_clk; |
| 39 | struct device_node *np = of_get_cpu_node(cpu, NULL); |
| 40 | |
| 41 | if (WARN(!np, "missing cpu node\n")) |
| 42 | return NULL; |
| 43 | cpu_clk = of_clk_get(np, 0); |
| 44 | if (WARN_ON(IS_ERR(cpu_clk))) |
| 45 | return NULL; |
| 46 | return cpu_clk; |
| 47 | } |
| 48 | |
Jisheng Zhang | b12634e | 2013-11-07 17:02:38 +0800 | [diff] [blame] | 49 | static void __init set_secondary_cpus_clock(void) |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 50 | { |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 51 | int thiscpu, cpu; |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 52 | unsigned long rate; |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 53 | struct clk *cpu_clk; |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 54 | |
| 55 | thiscpu = smp_processor_id(); |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 56 | cpu_clk = get_cpu_clk(thiscpu); |
| 57 | if (!cpu_clk) |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 58 | return; |
| 59 | clk_prepare_enable(cpu_clk); |
| 60 | rate = clk_get_rate(cpu_clk); |
| 61 | |
| 62 | /* set all the other CPU clk to the same rate than the boot CPU */ |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 63 | for_each_possible_cpu(cpu) { |
| 64 | if (cpu == thiscpu) |
| 65 | continue; |
| 66 | cpu_clk = get_cpu_clk(cpu); |
| 67 | if (!cpu_clk) |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 68 | return; |
Sudeep KarkadaNagesha | f6cec7c | 2013-07-03 16:01:42 +0100 | [diff] [blame] | 69 | clk_set_rate(cpu_clk, rate); |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 70 | } |
| 71 | } |
| 72 | |
Paul Gortmaker | 8bd26e3 | 2013-06-17 15:43:14 -0400 | [diff] [blame] | 73 | static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 74 | { |
Thomas Petazzoni | 05ad690 | 2014-04-14 15:53:58 +0200 | [diff] [blame] | 75 | int ret, hw_cpu; |
| 76 | |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 77 | pr_info("Booting CPU %d\n", cpu); |
| 78 | |
Thomas Petazzoni | 05ad690 | 2014-04-14 15:53:58 +0200 | [diff] [blame] | 79 | hw_cpu = cpu_logical_map(cpu); |
| 80 | mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); |
| 81 | ret = mvebu_cpu_reset_deassert(hw_cpu); |
| 82 | if (ret) { |
| 83 | pr_warn("unable to boot CPU: %d\n", ret); |
| 84 | return ret; |
| 85 | } |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 86 | |
| 87 | return 0; |
| 88 | } |
| 89 | |
| 90 | static void __init armada_xp_smp_init_cpus(void) |
| 91 | { |
Sudeep KarkadaNagesha | a7160b7 | 2013-07-23 12:32:42 +0100 | [diff] [blame] | 92 | unsigned int ncores = num_possible_cpus(); |
Thomas Petazzoni | b21dcaf | 2013-06-05 09:04:54 +0200 | [diff] [blame] | 93 | |
Thomas Petazzoni | b21dcaf | 2013-06-05 09:04:54 +0200 | [diff] [blame] | 94 | if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS) |
| 95 | panic("Invalid number of CPUs in DT\n"); |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 96 | } |
| 97 | |
Jisheng Zhang | b12634e | 2013-11-07 17:02:38 +0800 | [diff] [blame] | 98 | static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 99 | { |
Ezequiel Garcia | 994c8c9 | 2013-07-26 10:17:54 -0300 | [diff] [blame] | 100 | struct device_node *node; |
| 101 | struct resource res; |
| 102 | int err; |
| 103 | |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 104 | set_secondary_cpus_clock(); |
| 105 | flush_cache_all(); |
Gregory CLEMENT | 952f4ca | 2014-04-14 17:10:07 +0200 | [diff] [blame] | 106 | set_cpu_coherent(); |
Ezequiel Garcia | 994c8c9 | 2013-07-26 10:17:54 -0300 | [diff] [blame] | 107 | |
| 108 | /* |
| 109 | * In order to boot the secondary CPUs we need to ensure |
| 110 | * the bootROM is mapped at the correct address. |
| 111 | */ |
| 112 | node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); |
| 113 | if (!node) |
| 114 | panic("Cannot find 'marvell,bootrom' compatible node"); |
| 115 | |
| 116 | err = of_address_to_resource(node, 0, &res); |
| 117 | if (err < 0) |
| 118 | panic("Cannot get 'bootrom' node address"); |
| 119 | |
| 120 | if (res.start != AXP_BOOTROM_BASE || |
| 121 | resource_size(&res) != AXP_BOOTROM_SIZE) |
| 122 | panic("The address for the BootROM is incorrect"); |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | struct smp_operations armada_xp_smp_ops __initdata = { |
| 126 | .smp_init_cpus = armada_xp_smp_init_cpus, |
| 127 | .smp_prepare_cpus = armada_xp_smp_prepare_cpus, |
Gregory CLEMENT | 45f5984 | 2012-11-14 22:51:08 +0100 | [diff] [blame] | 128 | .smp_boot_secondary = armada_xp_boot_secondary, |
| 129 | #ifdef CONFIG_HOTPLUG_CPU |
| 130 | .cpu_die = armada_xp_cpu_die, |
| 131 | #endif |
| 132 | }; |
Thomas Petazzoni | 2c9b224 | 2014-04-14 15:53:59 +0200 | [diff] [blame] | 133 | |
| 134 | CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp", |
| 135 | &armada_xp_smp_ops); |