blob: f214cdff01cb8511afd6a291094d798710acf2c1 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Lennert Buytenhekfa87ced2005-11-01 19:44:27 +00002 * arch/arm/mach-ixp2000/core.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Common routines used by all IXP2400/2800 based platforms.
5 *
6 * Author: Deepak Saxena <dsaxena@plexity.net>
7 *
8 * Copyright 2004 (C) MontaVista Software, Inc.
9 *
10 * Based on work Copyright (C) 2002-2003 Intel Corporation
11 *
12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied.
15 */
Russell King2f8163b2011-07-26 10:53:52 +010016#include <linux/gpio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/spinlock.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
Thomas Gleixner64ffae82006-07-01 22:32:18 +010022#include <linux/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/serial.h>
24#include <linux/tty.h>
25#include <linux/bitops.h>
Lennert Buytenhek28187f22005-07-10 19:44:53 +010026#include <linux/serial_8250.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027#include <linux/mm.h>
Paul Gortmakerdc280942011-07-31 16:17:29 -040028#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
30#include <asm/types.h>
31#include <asm/setup.h>
32#include <asm/memory.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010033#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <asm/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035#include <asm/tlbflush.h>
36#include <asm/pgtable.h>
37
38#include <asm/mach/map.h>
39#include <asm/mach/time.h>
40#include <asm/mach/irq.h>
41
Linus Walleij87f911a2011-08-22 08:44:18 +010042#include <mach/gpio-ixp2000.h>
43
Linus Torvalds1da177e2005-04-16 15:20:36 -070044static DEFINE_SPINLOCK(ixp2000_slowport_lock);
45static unsigned long ixp2000_slowport_irq_flags;
46
47/*************************************************************************
48 * Slowport access routines
49 *************************************************************************/
50void ixp2000_acquire_slowport(struct slowport_cfg *new_cfg, struct slowport_cfg *old_cfg)
51{
Linus Torvalds1da177e2005-04-16 15:20:36 -070052 spin_lock_irqsave(&ixp2000_slowport_lock, ixp2000_slowport_irq_flags);
53
54 old_cfg->CCR = *IXP2000_SLOWPORT_CCR;
55 old_cfg->WTC = *IXP2000_SLOWPORT_WTC2;
56 old_cfg->RTC = *IXP2000_SLOWPORT_RTC2;
57 old_cfg->PCR = *IXP2000_SLOWPORT_PCR;
58 old_cfg->ADC = *IXP2000_SLOWPORT_ADC;
59
60 ixp2000_reg_write(IXP2000_SLOWPORT_CCR, new_cfg->CCR);
61 ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, new_cfg->WTC);
62 ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, new_cfg->RTC);
63 ixp2000_reg_write(IXP2000_SLOWPORT_PCR, new_cfg->PCR);
Lennert Buytenheke9b72e42005-11-01 19:44:26 +000064 ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, new_cfg->ADC);
Linus Torvalds1da177e2005-04-16 15:20:36 -070065}
66
67void ixp2000_release_slowport(struct slowport_cfg *old_cfg)
68{
69 ixp2000_reg_write(IXP2000_SLOWPORT_CCR, old_cfg->CCR);
70 ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, old_cfg->WTC);
71 ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, old_cfg->RTC);
72 ixp2000_reg_write(IXP2000_SLOWPORT_PCR, old_cfg->PCR);
Lennert Buytenheke9b72e42005-11-01 19:44:26 +000073 ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, old_cfg->ADC);
Linus Torvalds1da177e2005-04-16 15:20:36 -070074
75 spin_unlock_irqrestore(&ixp2000_slowport_lock,
76 ixp2000_slowport_irq_flags);
77}
78
79/*************************************************************************
80 * Chip specific mappings shared by all IXP2000 systems
81 *************************************************************************/
82static struct map_desc ixp2000_io_desc[] __initdata = {
83 {
84 .virtual = IXP2000_CAP_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +010085 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 .length = IXP2000_CAP_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +010087 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 }, {
89 .virtual = IXP2000_INTCTL_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +010090 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -070091 .length = IXP2000_INTCTL_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +010092 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -070093 }, {
94 .virtual = IXP2000_PCI_CREG_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +010095 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -070096 .length = IXP2000_PCI_CREG_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +010097 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -070098 }, {
99 .virtual = IXP2000_PCI_CSR_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +0100100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 .length = IXP2000_PCI_CSR_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100102 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 }, {
Lennert Buytenhekbaaf7ed12005-06-26 22:24:17 +0100104 .virtual = IXP2000_MSF_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +0100105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE),
Lennert Buytenhekbaaf7ed12005-06-26 22:24:17 +0100106 .length = IXP2000_MSF_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100107 .type = MT_DEVICE,
Lennert Buytenhekbaaf7ed12005-06-26 22:24:17 +0100108 }, {
Lennert Buytenhekdd29c722006-01-13 20:51:43 +0000109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE,
110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE),
111 .length = IXP2000_SCRATCH_RING_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100112 .type = MT_DEVICE,
Lennert Buytenhekdd29c722006-01-13 20:51:43 +0000113 }, {
114 .virtual = IXP2000_SRAM0_VIRT_BASE,
115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE),
116 .length = IXP2000_SRAM0_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100117 .type = MT_DEVICE,
Lennert Buytenhekdd29c722006-01-13 20:51:43 +0000118 }, {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 .virtual = IXP2000_PCI_IO_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +0100120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121 .length = IXP2000_PCI_IO_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100122 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 }, {
124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +0100125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126 .length = IXP2000_PCI_CFG0_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100127 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128 }, {
129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE,
Deepak Saxenadb0d0872005-10-28 15:18:58 +0100130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 .length = IXP2000_PCI_CFG1_SIZE,
Russell Kingdb5b7162008-09-07 12:42:51 +0100132 .type = MT_DEVICE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 }
134};
135
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136void __init ixp2000_map_io(void)
137{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138 iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
140 /* Set slowport to 8-bit mode. */
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000141 ixp2000_reg_wrb(IXP2000_SLOWPORT_FRM, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142}
143
Lennert Buytenhek28187f22005-07-10 19:44:53 +0100144
145/*************************************************************************
146 * Serial port support for IXP2000
147 *************************************************************************/
148static struct plat_serial8250_port ixp2000_serial_port[] = {
149 {
150 .mapbase = IXP2000_UART_PHYS_BASE,
151 .membase = (char *)(IXP2000_UART_VIRT_BASE + 3),
152 .irq = IRQ_IXP2000_UART,
153 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
154 .iotype = UPIO_MEM,
155 .regshift = 2,
156 .uartclk = 50000000,
157 },
158 { },
159};
160
161static struct resource ixp2000_uart_resource = {
162 .start = IXP2000_UART_PHYS_BASE,
Deepak Saxena702c96d52005-09-30 16:20:22 -0700163 .end = IXP2000_UART_PHYS_BASE + 0x1f,
Lennert Buytenhek28187f22005-07-10 19:44:53 +0100164 .flags = IORESOURCE_MEM,
165};
166
167static struct platform_device ixp2000_serial_device = {
168 .name = "serial8250",
Russell King6df29de2005-09-08 16:04:41 +0100169 .id = PLAT8250_DEV_PLATFORM,
Lennert Buytenhek28187f22005-07-10 19:44:53 +0100170 .dev = {
171 .platform_data = ixp2000_serial_port,
172 },
173 .num_resources = 1,
174 .resource = &ixp2000_uart_resource,
175};
176
177void __init ixp2000_uart_init(void)
178{
179 platform_device_register(&ixp2000_serial_device);
180}
181
182
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183/*************************************************************************
184 * Timer-tick functions for IXP2000
185 *************************************************************************/
186static unsigned ticks_per_jiffy;
187static unsigned ticks_per_usec;
188static unsigned next_jiffy_time;
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100189static volatile unsigned long *missing_jiffy_timer_csr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700190
191unsigned long ixp2000_gettimeoffset (void)
192{
193 unsigned long offset;
194
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100195 offset = next_jiffy_time - *missing_jiffy_timer_csr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700196
197 return offset / ticks_per_usec;
198}
199
Uwe Kleine-Königd463f362010-10-19 09:43:59 +0100200static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700201{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202 /* clear timer 1 */
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000203 ixp2000_reg_wrb(IXP2000_T1_CLR, 1);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100204
Lennert Buytenhekf869afa2006-06-22 10:30:53 +0100205 while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr)
206 >= ticks_per_jiffy) {
Linus Torvalds0cd61b62006-10-06 10:53:39 -0700207 timer_tick();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208 next_jiffy_time -= ticks_per_jiffy;
209 }
210
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 return IRQ_HANDLED;
212}
213
214static struct irqaction ixp2000_timer_irq = {
215 .name = "IXP2000 Timer Tick",
Bernhard Walleb30faba2007-05-08 00:35:39 -0700216 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
Russell King09b8b5f2005-06-26 17:06:36 +0100217 .handler = ixp2000_timer_interrupt,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218};
219
220void __init ixp2000_init_time(unsigned long tick_rate)
221{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222 ticks_per_jiffy = (tick_rate + HZ/2) / HZ;
223 ticks_per_usec = tick_rate / 1000000;
224
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100225 /*
226 * We use timer 1 as our timer interrupt.
227 */
228 ixp2000_reg_write(IXP2000_T1_CLR, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1);
230 ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7));
231
232 /*
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100233 * We use a second timer as a monotonic counter for tracking
234 * missed jiffies. The IXP2000 has four timers, but if we're
235 * on an A-step IXP2800, timer 2 and 3 don't work, so on those
236 * chips we use timer 4. Timer 4 is the only timer that can
237 * be used for the watchdog, so we use timer 2 if we're on a
238 * non-buggy chip.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700239 */
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100240 if ((*IXP2000_PRODUCT_ID & 0x001ffef0) == 0x00000000) {
241 printk(KERN_INFO "Enabling IXP2800 erratum #25 workaround\n");
242
243 ixp2000_reg_write(IXP2000_T4_CLR, 0);
244 ixp2000_reg_write(IXP2000_T4_CLD, -1);
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000245 ixp2000_reg_wrb(IXP2000_T4_CTL, (1 << 7));
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100246 missing_jiffy_timer_csr = IXP2000_T4_CSR;
247 } else {
248 ixp2000_reg_write(IXP2000_T2_CLR, 0);
249 ixp2000_reg_write(IXP2000_T2_CLD, -1);
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000250 ixp2000_reg_wrb(IXP2000_T2_CTL, (1 << 7));
Lennert Buytenheke4fe1982005-06-20 18:51:07 +0100251 missing_jiffy_timer_csr = IXP2000_T2_CSR;
252 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 next_jiffy_time = 0xffffffff;
254
255 /* register for interrupt */
256 setup_irq(IRQ_IXP2000_TIMER1, &ixp2000_timer_irq);
257}
258
259/*************************************************************************
260 * GPIO helpers
261 *************************************************************************/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262static unsigned long GPIO_IRQ_falling_edge;
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100263static unsigned long GPIO_IRQ_rising_edge;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700264static unsigned long GPIO_IRQ_level_low;
265static unsigned long GPIO_IRQ_level_high;
266
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100267static void update_gpio_int_csrs(void)
268{
269 ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge);
270 ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge);
271 ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low);
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000272 ixp2000_reg_wrb(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100273}
274
275void gpio_line_config(int line, int direction)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276{
277 unsigned long flags;
278
279 local_irq_save(flags);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100280 if (direction == GPIO_OUT) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 /* if it's an output, it ain't an interrupt anymore */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700282 GPIO_IRQ_falling_edge &= ~(1 << line);
283 GPIO_IRQ_rising_edge &= ~(1 << line);
284 GPIO_IRQ_level_low &= ~(1 << line);
285 GPIO_IRQ_level_high &= ~(1 << line);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100286 update_gpio_int_csrs();
287
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000288 ixp2000_reg_wrb(IXP2000_GPIO_PDSR, 1 << line);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100289 } else if (direction == GPIO_IN) {
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000290 ixp2000_reg_wrb(IXP2000_GPIO_PDCR, 1 << line);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700291 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700292 local_irq_restore(flags);
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100293}
Lennert Buytenhekfc8ea7a2006-06-24 09:57:14 +0100294EXPORT_SYMBOL(gpio_line_config);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295
296
297/*************************************************************************
298 * IRQ handling IXP2000
299 *************************************************************************/
Russell King10dd5ce2006-11-23 11:41:32 +0000300static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700301{
302 int i;
303 unsigned long status = *IXP2000_GPIO_INST;
304
305 for (i = 0; i <= 7; i++) {
306 if (status & (1<<i)) {
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +0100307 generic_handle_irq(i + IRQ_IXP2000_GPIO0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308 }
309 }
310}
311
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100312static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type)
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100313{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100314 int line = d->irq - IRQ_IXP2000_GPIO0;
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100315
316 /*
317 * First, configure this GPIO line as an input.
318 */
319 ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line);
320
321 /*
322 * Then, set the proper trigger type.
323 */
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100324 if (type & IRQ_TYPE_EDGE_FALLING)
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100325 GPIO_IRQ_falling_edge |= 1 << line;
326 else
327 GPIO_IRQ_falling_edge &= ~(1 << line);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100328 if (type & IRQ_TYPE_EDGE_RISING)
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100329 GPIO_IRQ_rising_edge |= 1 << line;
330 else
331 GPIO_IRQ_rising_edge &= ~(1 << line);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100332 if (type & IRQ_TYPE_LEVEL_LOW)
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100333 GPIO_IRQ_level_low |= 1 << line;
334 else
335 GPIO_IRQ_level_low &= ~(1 << line);
Dmitry Baryshkov6cab4862008-07-27 04:23:31 +0100336 if (type & IRQ_TYPE_LEVEL_HIGH)
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100337 GPIO_IRQ_level_high |= 1 << line;
338 else
339 GPIO_IRQ_level_high &= ~(1 << line);
340 update_gpio_int_csrs();
341
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100342 return 0;
343}
344
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100345static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100347 unsigned int irq = d->irq;
348
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100350
351 ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
352 ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000353 ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354}
355
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100356static void ixp2000_GPIO_irq_mask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100358 unsigned int irq = d->irq;
359
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000360 ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700361}
362
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100363static void ixp2000_GPIO_irq_unmask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100365 unsigned int irq = d->irq;
366
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367 ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0)));
368}
369
Russell King10dd5ce2006-11-23 11:41:32 +0000370static struct irq_chip ixp2000_GPIO_irq_chip = {
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100371 .irq_ack = ixp2000_GPIO_irq_mask_ack,
372 .irq_mask = ixp2000_GPIO_irq_mask,
373 .irq_unmask = ixp2000_GPIO_irq_unmask,
374 .irq_set_type = ixp2000_GPIO_irq_type,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375};
376
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100377static void ixp2000_pci_irq_mask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378{
379 unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100380 if (d->irq == IRQ_IXP2000_PCIA)
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000381 ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26)));
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100382 else if (d->irq == IRQ_IXP2000_PCIB)
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000383 ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384}
385
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100386static void ixp2000_pci_irq_unmask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387{
388 unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE;
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100389 if (d->irq == IRQ_IXP2000_PCIA)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700390 ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26)));
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100391 else if (d->irq == IRQ_IXP2000_PCIB)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392 ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27)));
393}
394
Dave Jiang7866f642005-11-04 17:15:44 +0000395/*
396 * Error interrupts. These are used extensively by the microengine drivers
397 */
Russell King10dd5ce2006-11-23 11:41:32 +0000398static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc)
Dave Jiang7866f642005-11-04 17:15:44 +0000399{
400 int i;
401 unsigned long status = *IXP2000_IRQ_ERR_STATUS;
402
403 for(i = 31; i >= 0; i--) {
404 if(status & (1 << i)) {
Dmitry Baryshkovd8aa0252008-10-09 13:36:24 +0100405 generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i);
Dave Jiang7866f642005-11-04 17:15:44 +0000406 }
407 }
408}
409
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100410static void ixp2000_err_irq_mask(struct irq_data *d)
Dave Jiang7866f642005-11-04 17:15:44 +0000411{
412 ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR,
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100413 (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
Dave Jiang7866f642005-11-04 17:15:44 +0000414}
415
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100416static void ixp2000_err_irq_unmask(struct irq_data *d)
Dave Jiang7866f642005-11-04 17:15:44 +0000417{
418 ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET,
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100419 (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR)));
Dave Jiang7866f642005-11-04 17:15:44 +0000420}
421
Russell King10dd5ce2006-11-23 11:41:32 +0000422static struct irq_chip ixp2000_err_irq_chip = {
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100423 .irq_ack = ixp2000_err_irq_mask,
424 .irq_mask = ixp2000_err_irq_mask,
425 .irq_unmask = ixp2000_err_irq_unmask
Dave Jiang7866f642005-11-04 17:15:44 +0000426};
427
Russell King10dd5ce2006-11-23 11:41:32 +0000428static struct irq_chip ixp2000_pci_irq_chip = {
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100429 .irq_ack = ixp2000_pci_irq_mask,
430 .irq_mask = ixp2000_pci_irq_mask,
431 .irq_unmask = ixp2000_pci_irq_unmask
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432};
433
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100434static void ixp2000_irq_mask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100436 ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437}
438
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100439static void ixp2000_irq_unmask(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440{
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100441 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442}
443
Russell King10dd5ce2006-11-23 11:41:32 +0000444static struct irq_chip ixp2000_irq_chip = {
Lennert Buytenhek6e8f54f2010-11-29 10:32:55 +0100445 .irq_ack = ixp2000_irq_mask,
446 .irq_mask = ixp2000_irq_mask,
447 .irq_unmask = ixp2000_irq_unmask
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448};
449
450void __init ixp2000_init_irq(void)
451{
452 int irq;
453
454 /*
455 * Mask all sources
456 */
457 ixp2000_reg_write(IXP2000_IRQ_ENABLE_CLR, 0xffffffff);
458 ixp2000_reg_write(IXP2000_FIQ_ENABLE_CLR, 0xffffffff);
459
460 /* clear all GPIO edge/level detects */
461 ixp2000_reg_write(IXP2000_GPIO_REDR, 0);
462 ixp2000_reg_write(IXP2000_GPIO_FEDR, 0);
463 ixp2000_reg_write(IXP2000_GPIO_LSHR, 0);
464 ixp2000_reg_write(IXP2000_GPIO_LSLR, 0);
465 ixp2000_reg_write(IXP2000_GPIO_INCR, -1);
466
467 /* clear PCI interrupt sources */
Lennert Buytenheke9b72e42005-11-01 19:44:26 +0000468 ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469
470 /*
471 * Certain bits in the IRQ status register of the
472 * IXP2000 are reserved. Instead of trying to map
473 * things non 1:1 from bit position to IRQ number,
474 * we mark the reserved IRQs as invalid. This makes
475 * our mask/unmask code much simpler.
476 */
477 for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) {
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100478 if ((1 << irq) & IXP2000_VALID_IRQ_MASK) {
Thomas Gleixnerf38c02f2011-03-24 13:35:09 +0100479 irq_set_chip_and_handler(irq, &ixp2000_irq_chip,
480 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481 set_irq_flags(irq, IRQF_VALID);
482 } else set_irq_flags(irq, 0);
483 }
Lennert Buytenhekc4982882005-06-24 20:54:35 +0100484
Dave Jiang7866f642005-11-04 17:15:44 +0000485 for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) {
486 if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) &
487 IXP2000_VALID_ERR_IRQ_MASK) {
Thomas Gleixnerf38c02f2011-03-24 13:35:09 +0100488 irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip,
489 handle_level_irq);
Dave Jiang7866f642005-11-04 17:15:44 +0000490 set_irq_flags(irq, IRQF_VALID);
491 }
492 else
493 set_irq_flags(irq, 0);
494 }
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100495 irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler);
Dave Jiang7866f642005-11-04 17:15:44 +0000496
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497 for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) {
Thomas Gleixnerf38c02f2011-03-24 13:35:09 +0100498 irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip,
499 handle_level_irq);
Lennert Buytenhekbd115ea2006-03-22 20:14:09 +0000500 set_irq_flags(irq, IRQF_VALID);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700501 }
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100502 irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503
504 /*
505 * Enable PCI irqs. The actual PCI[AB] decoding is done in
506 * entry-macro.S, so we don't need a chained handler for the
507 * PCI interrupt source.
508 */
509 ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI));
510 for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) {
Thomas Gleixnerf38c02f2011-03-24 13:35:09 +0100511 irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip,
512 handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700513 set_irq_flags(irq, IRQF_VALID);
514 }
515}
516
Russell King1139b922011-11-05 11:46:04 +0000517void ixp2000_restart(char mode, const char *cmd)
518{
519 ixp2000_reg_wrb(IXP2000_RESET0, RSTALL);
520}