| Russell King | b720f73 | 2005-06-29 15:15:54 +0100 | [diff] [blame] | 1 | #ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H |
| 2 | #define __ASM_ARM_HARDWARE_ARM_TIMER_H |
| 3 | |
| 4 | #define TIMER_LOAD 0x00 |
| 5 | #define TIMER_VALUE 0x04 |
| 6 | #define TIMER_CTRL 0x08 |
| 7 | #define TIMER_CTRL_ONESHOT (1 << 0) |
| 8 | #define TIMER_CTRL_32BIT (1 << 1) |
| 9 | #define TIMER_CTRL_DIV1 (0 << 2) |
| 10 | #define TIMER_CTRL_DIV16 (1 << 2) |
| 11 | #define TIMER_CTRL_DIV256 (2 << 2) |
| 12 | #define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */ |
| 13 | #define TIMER_CTRL_PERIODIC (1 << 6) |
| 14 | #define TIMER_CTRL_ENABLE (1 << 7) |
| 15 | |
| 16 | #define TIMER_INTCLR 0x0c |
| 17 | #define TIMER_RIS 0x10 |
| 18 | #define TIMER_MIS 0x14 |
| 19 | #define TIMER_BGLOAD 0x18 |
| 20 | |
| 21 | #endif |