blob: 9502bc4c3f6d9a17ec7616bf743c5bfc26c3f638 [file] [log] [blame]
Tomasz Figaf1189982013-04-20 23:22:13 +02001/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * samsung - Common hr-timer support (s3c and s5p)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/err.h>
15#include <linux/clk.h>
16#include <linux/clockchips.h>
17#include <linux/list.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_irq.h>
22#include <linux/platform_device.h>
23#include <linux/slab.h>
Stephen Boyd38ff87f2013-06-01 23:39:40 -070024#include <linux/sched_clock.h>
Tomasz Figaf1189982013-04-20 23:22:13 +020025
26#include <clocksource/samsung_pwm.h>
27
Tomasz Figaf1189982013-04-20 23:22:13 +020028
29/*
30 * Clocksource driver
31 */
32
33#define REG_TCFG0 0x00
34#define REG_TCFG1 0x04
35#define REG_TCON 0x08
36#define REG_TINT_CSTAT 0x44
37
38#define REG_TCNTB(chan) (0x0c + 12 * (chan))
39#define REG_TCMPB(chan) (0x10 + 12 * (chan))
40
41#define TCFG0_PRESCALER_MASK 0xff
42#define TCFG0_PRESCALER1_SHIFT 8
43
44#define TCFG1_SHIFT(x) ((x) * 4)
45#define TCFG1_MUX_MASK 0xf
46
Tomasz Figaceea1242013-06-17 02:10:24 +020047/*
48 * Each channel occupies 4 bits in TCON register, but there is a gap of 4
49 * bits (one channel) after channel 0, so channels have different numbering
50 * when accessing TCON register.
51 *
52 * In addition, the location of autoreload bit for channel 4 (TCON channel 5)
53 * in its set of bits is 2 as opposed to 3 for other channels.
54 */
Tomasz Figaf1189982013-04-20 23:22:13 +020055#define TCON_START(chan) (1 << (4 * (chan) + 0))
56#define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
57#define TCON_INVERT(chan) (1 << (4 * (chan) + 2))
Tomasz Figaceea1242013-06-17 02:10:24 +020058#define _TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3))
59#define _TCON_AUTORELOAD4(chan) (1 << (4 * (chan) + 2))
60#define TCON_AUTORELOAD(chan) \
61 ((chan < 5) ? _TCON_AUTORELOAD(chan) : _TCON_AUTORELOAD4(chan))
Tomasz Figaf1189982013-04-20 23:22:13 +020062
Tomasz Figa7aac4822013-04-23 17:46:24 +020063DEFINE_SPINLOCK(samsung_pwm_lock);
64EXPORT_SYMBOL(samsung_pwm_lock);
65
Tomasz Figa030c2a12013-04-23 17:46:25 +020066struct samsung_pwm_clocksource {
67 void __iomem *base;
Tomasz Figa61d7e202013-06-17 00:07:03 +020068 void __iomem *source_reg;
Tomasz Figa030c2a12013-04-23 17:46:25 +020069 unsigned int irq[SAMSUNG_PWM_NUM];
70 struct samsung_pwm_variant variant;
71
72 struct clk *timerclk;
73
Tomasz Figaf1189982013-04-20 23:22:13 +020074 unsigned int event_id;
75 unsigned int source_id;
76 unsigned int tcnt_max;
77 unsigned int tscaler_div;
78 unsigned int tdiv;
Tomasz Figa030c2a12013-04-23 17:46:25 +020079
80 unsigned long clock_count_per_tick;
Tomasz Figaf1189982013-04-20 23:22:13 +020081};
82
Tomasz Figa030c2a12013-04-23 17:46:25 +020083static struct samsung_pwm_clocksource pwm;
Tomasz Figaf1189982013-04-20 23:22:13 +020084
Tomasz Figa030c2a12013-04-23 17:46:25 +020085static void samsung_timer_set_prescale(unsigned int channel, u16 prescale)
Tomasz Figaf1189982013-04-20 23:22:13 +020086{
87 unsigned long flags;
88 u8 shift = 0;
89 u32 reg;
90
91 if (channel >= 2)
92 shift = TCFG0_PRESCALER1_SHIFT;
93
Tomasz Figa7aac4822013-04-23 17:46:24 +020094 spin_lock_irqsave(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +020095
Tomasz Figa030c2a12013-04-23 17:46:25 +020096 reg = readl(pwm.base + REG_TCFG0);
Tomasz Figaf1189982013-04-20 23:22:13 +020097 reg &= ~(TCFG0_PRESCALER_MASK << shift);
98 reg |= (prescale - 1) << shift;
Tomasz Figa030c2a12013-04-23 17:46:25 +020099 writel(reg, pwm.base + REG_TCFG0);
Tomasz Figaf1189982013-04-20 23:22:13 +0200100
Tomasz Figa7aac4822013-04-23 17:46:24 +0200101 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200102}
103
Tomasz Figa030c2a12013-04-23 17:46:25 +0200104static void samsung_timer_set_divisor(unsigned int channel, u8 divisor)
Tomasz Figaf1189982013-04-20 23:22:13 +0200105{
106 u8 shift = TCFG1_SHIFT(channel);
107 unsigned long flags;
108 u32 reg;
109 u8 bits;
110
Tomasz Figa030c2a12013-04-23 17:46:25 +0200111 bits = (fls(divisor) - 1) - pwm.variant.div_base;
Tomasz Figaf1189982013-04-20 23:22:13 +0200112
Tomasz Figa7aac4822013-04-23 17:46:24 +0200113 spin_lock_irqsave(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200114
Tomasz Figa030c2a12013-04-23 17:46:25 +0200115 reg = readl(pwm.base + REG_TCFG1);
Tomasz Figaf1189982013-04-20 23:22:13 +0200116 reg &= ~(TCFG1_MUX_MASK << shift);
117 reg |= bits << shift;
Tomasz Figa030c2a12013-04-23 17:46:25 +0200118 writel(reg, pwm.base + REG_TCFG1);
Tomasz Figaf1189982013-04-20 23:22:13 +0200119
Tomasz Figa7aac4822013-04-23 17:46:24 +0200120 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200121}
122
123static void samsung_time_stop(unsigned int channel)
124{
125 unsigned long tcon;
126 unsigned long flags;
127
128 if (channel > 0)
129 ++channel;
130
Tomasz Figa7aac4822013-04-23 17:46:24 +0200131 spin_lock_irqsave(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200132
Tomasz Figa030c2a12013-04-23 17:46:25 +0200133 tcon = __raw_readl(pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200134 tcon &= ~TCON_START(channel);
Tomasz Figa030c2a12013-04-23 17:46:25 +0200135 __raw_writel(tcon, pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200136
Tomasz Figa7aac4822013-04-23 17:46:24 +0200137 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200138}
139
140static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
141{
142 unsigned long tcon;
143 unsigned long flags;
144 unsigned int tcon_chan = channel;
145
146 if (tcon_chan > 0)
147 ++tcon_chan;
148
Tomasz Figa7aac4822013-04-23 17:46:24 +0200149 spin_lock_irqsave(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200150
Tomasz Figa030c2a12013-04-23 17:46:25 +0200151 tcon = __raw_readl(pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200152
Tomasz Figaf1189982013-04-20 23:22:13 +0200153 tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan));
154 tcon |= TCON_MANUALUPDATE(tcon_chan);
155
Tomasz Figa030c2a12013-04-23 17:46:25 +0200156 __raw_writel(tcnt, pwm.base + REG_TCNTB(channel));
157 __raw_writel(tcnt, pwm.base + REG_TCMPB(channel));
158 __raw_writel(tcon, pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200159
Tomasz Figa7aac4822013-04-23 17:46:24 +0200160 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200161}
162
163static void samsung_time_start(unsigned int channel, bool periodic)
164{
165 unsigned long tcon;
166 unsigned long flags;
167
168 if (channel > 0)
169 ++channel;
170
Tomasz Figa7aac4822013-04-23 17:46:24 +0200171 spin_lock_irqsave(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200172
Tomasz Figa030c2a12013-04-23 17:46:25 +0200173 tcon = __raw_readl(pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200174
175 tcon &= ~TCON_MANUALUPDATE(channel);
176 tcon |= TCON_START(channel);
177
178 if (periodic)
179 tcon |= TCON_AUTORELOAD(channel);
180 else
181 tcon &= ~TCON_AUTORELOAD(channel);
182
Tomasz Figa030c2a12013-04-23 17:46:25 +0200183 __raw_writel(tcon, pwm.base + REG_TCON);
Tomasz Figaf1189982013-04-20 23:22:13 +0200184
Tomasz Figa7aac4822013-04-23 17:46:24 +0200185 spin_unlock_irqrestore(&samsung_pwm_lock, flags);
Tomasz Figaf1189982013-04-20 23:22:13 +0200186}
187
188static int samsung_set_next_event(unsigned long cycles,
189 struct clock_event_device *evt)
190{
Tomasz Figa81d4f7b2013-04-23 17:46:30 +0200191 /*
192 * This check is needed to account for internal rounding
193 * errors inside clockevents core, which might result in
194 * passing cycles = 0, which in turn would not generate any
195 * timer interrupt and hang the system.
196 *
197 * Another solution would be to set up the clockevent device
198 * with min_delta = 2, but this would unnecessarily increase
199 * the minimum sleep period.
200 */
201 if (!cycles)
202 cycles = 1;
203
Tomasz Figa030c2a12013-04-23 17:46:25 +0200204 samsung_time_setup(pwm.event_id, cycles);
205 samsung_time_start(pwm.event_id, false);
Tomasz Figaf1189982013-04-20 23:22:13 +0200206
207 return 0;
208}
209
Viresh Kumarb49b5702015-06-18 16:24:33 +0530210static int samsung_shutdown(struct clock_event_device *evt)
Tomasz Figaf1189982013-04-20 23:22:13 +0200211{
Tomasz Figa030c2a12013-04-23 17:46:25 +0200212 samsung_time_stop(pwm.event_id);
Viresh Kumarb49b5702015-06-18 16:24:33 +0530213 return 0;
214}
Tomasz Figaf1189982013-04-20 23:22:13 +0200215
Viresh Kumarb49b5702015-06-18 16:24:33 +0530216static int samsung_set_periodic(struct clock_event_device *evt)
217{
218 samsung_time_stop(pwm.event_id);
219 samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
220 samsung_time_start(pwm.event_id, true);
221 return 0;
Tomasz Figaf1189982013-04-20 23:22:13 +0200222}
223
Tomasz Figa0b962582013-06-17 01:11:31 +0200224static void samsung_clockevent_resume(struct clock_event_device *cev)
225{
226 samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
227 samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
228
229 if (pwm.variant.has_tint_cstat) {
230 u32 mask = (1 << pwm.event_id);
231 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
232 }
233}
234
Tomasz Figaf1189982013-04-20 23:22:13 +0200235static struct clock_event_device time_event_device = {
Viresh Kumarb49b5702015-06-18 16:24:33 +0530236 .name = "samsung_event_timer",
237 .features = CLOCK_EVT_FEAT_PERIODIC |
238 CLOCK_EVT_FEAT_ONESHOT,
239 .rating = 200,
240 .set_next_event = samsung_set_next_event,
241 .set_state_shutdown = samsung_shutdown,
242 .set_state_periodic = samsung_set_periodic,
243 .set_state_oneshot = samsung_shutdown,
244 .tick_resume = samsung_shutdown,
245 .resume = samsung_clockevent_resume,
Tomasz Figaf1189982013-04-20 23:22:13 +0200246};
247
248static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
249{
250 struct clock_event_device *evt = dev_id;
251
Tomasz Figa030c2a12013-04-23 17:46:25 +0200252 if (pwm.variant.has_tint_cstat) {
253 u32 mask = (1 << pwm.event_id);
254 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
Tomasz Figaf1189982013-04-20 23:22:13 +0200255 }
256
257 evt->event_handler(evt);
258
259 return IRQ_HANDLED;
260}
261
262static struct irqaction samsung_clock_event_irq = {
263 .name = "samsung_time_irq",
Michael Opdenacker38c30a82013-12-09 10:12:10 +0100264 .flags = IRQF_TIMER | IRQF_IRQPOLL,
Tomasz Figaf1189982013-04-20 23:22:13 +0200265 .handler = samsung_clock_event_isr,
266 .dev_id = &time_event_device,
267};
268
269static void __init samsung_clockevent_init(void)
270{
271 unsigned long pclk;
272 unsigned long clock_rate;
273 unsigned int irq_number;
274
Tomasz Figa030c2a12013-04-23 17:46:25 +0200275 pclk = clk_get_rate(pwm.timerclk);
Tomasz Figaf1189982013-04-20 23:22:13 +0200276
Tomasz Figa030c2a12013-04-23 17:46:25 +0200277 samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
278 samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
Tomasz Figaf1189982013-04-20 23:22:13 +0200279
Tomasz Figa030c2a12013-04-23 17:46:25 +0200280 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
281 pwm.clock_count_per_tick = clock_rate / HZ;
Tomasz Figaf1189982013-04-20 23:22:13 +0200282
283 time_event_device.cpumask = cpumask_of(0);
Tomasz Figae9b852b2013-04-23 17:46:28 +0200284 clockevents_config_and_register(&time_event_device,
285 clock_rate, 1, pwm.tcnt_max);
Tomasz Figaf1189982013-04-20 23:22:13 +0200286
Tomasz Figa030c2a12013-04-23 17:46:25 +0200287 irq_number = pwm.irq[pwm.event_id];
Tomasz Figaf1189982013-04-20 23:22:13 +0200288 setup_irq(irq_number, &samsung_clock_event_irq);
289
Tomasz Figa030c2a12013-04-23 17:46:25 +0200290 if (pwm.variant.has_tint_cstat) {
291 u32 mask = (1 << pwm.event_id);
292 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
Tomasz Figaf1189982013-04-20 23:22:13 +0200293 }
294}
295
Tomasz Figa0b962582013-06-17 01:11:31 +0200296static void samsung_clocksource_suspend(struct clocksource *cs)
Tomasz Figaf1189982013-04-20 23:22:13 +0200297{
Tomasz Figa0b962582013-06-17 01:11:31 +0200298 samsung_time_stop(pwm.source_id);
Tomasz Figaf1189982013-04-20 23:22:13 +0200299}
300
Tomasz Figa0b962582013-06-17 01:11:31 +0200301static void samsung_clocksource_resume(struct clocksource *cs)
302{
303 samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
304 samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
305
306 samsung_time_setup(pwm.source_id, pwm.tcnt_max);
307 samsung_time_start(pwm.source_id, true);
308}
309
Jisheng Zhangb8725da2015-10-20 16:02:35 +0800310static cycle_t notrace samsung_clocksource_read(struct clocksource *c)
Tomasz Figa6792e632013-06-17 00:13:06 +0200311{
312 return ~readl_relaxed(pwm.source_reg);
313}
314
315static struct clocksource samsung_clocksource = {
316 .name = "samsung_clocksource_timer",
317 .rating = 250,
318 .read = samsung_clocksource_read,
Tomasz Figa0b962582013-06-17 01:11:31 +0200319 .suspend = samsung_clocksource_suspend,
320 .resume = samsung_clocksource_resume,
Tomasz Figa6792e632013-06-17 00:13:06 +0200321 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
322};
323
Tomasz Figaf1189982013-04-20 23:22:13 +0200324/*
325 * Override the global weak sched_clock symbol with this
326 * local implementation which uses the clocksource to get some
327 * better resolution when scheduling the kernel. We accept that
328 * this wraps around for now, since it is just a relative time
329 * stamp. (Inspired by U300 implementation.)
330 */
Stephen Boyd2902b302013-07-18 16:21:25 -0700331static u64 notrace samsung_read_sched_clock(void)
Tomasz Figaf1189982013-04-20 23:22:13 +0200332{
Tomasz Figa6792e632013-06-17 00:13:06 +0200333 return samsung_clocksource_read(NULL);
Tomasz Figaf1189982013-04-20 23:22:13 +0200334}
335
336static void __init samsung_clocksource_init(void)
337{
Tomasz Figaf1189982013-04-20 23:22:13 +0200338 unsigned long pclk;
339 unsigned long clock_rate;
340 int ret;
341
Tomasz Figa030c2a12013-04-23 17:46:25 +0200342 pclk = clk_get_rate(pwm.timerclk);
Tomasz Figaf1189982013-04-20 23:22:13 +0200343
Tomasz Figa030c2a12013-04-23 17:46:25 +0200344 samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
345 samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
Tomasz Figaf1189982013-04-20 23:22:13 +0200346
Tomasz Figa030c2a12013-04-23 17:46:25 +0200347 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
Tomasz Figaf1189982013-04-20 23:22:13 +0200348
Tomasz Figa030c2a12013-04-23 17:46:25 +0200349 samsung_time_setup(pwm.source_id, pwm.tcnt_max);
350 samsung_time_start(pwm.source_id, true);
Tomasz Figaf1189982013-04-20 23:22:13 +0200351
Tomasz Figa61d7e202013-06-17 00:07:03 +0200352 if (pwm.source_id == 4)
353 pwm.source_reg = pwm.base + 0x40;
354 else
355 pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
356
Stephen Boyd2902b302013-07-18 16:21:25 -0700357 sched_clock_register(samsung_read_sched_clock,
Tomasz Figa030c2a12013-04-23 17:46:25 +0200358 pwm.variant.bits, clock_rate);
Tomasz Figaf1189982013-04-20 23:22:13 +0200359
Tomasz Figa6792e632013-06-17 00:13:06 +0200360 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
361 ret = clocksource_register_hz(&samsung_clocksource, clock_rate);
Tomasz Figaf1189982013-04-20 23:22:13 +0200362 if (ret)
363 panic("samsung_clocksource_timer: can't register clocksource\n");
364}
365
366static void __init samsung_timer_resources(void)
367{
Tomasz Figa030c2a12013-04-23 17:46:25 +0200368 clk_prepare_enable(pwm.timerclk);
Tomasz Figaf1189982013-04-20 23:22:13 +0200369
Tomasz Figa030c2a12013-04-23 17:46:25 +0200370 pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
371 if (pwm.variant.bits == 16) {
372 pwm.tscaler_div = 25;
373 pwm.tdiv = 2;
Tomasz Figaf1189982013-04-20 23:22:13 +0200374 } else {
Tomasz Figa030c2a12013-04-23 17:46:25 +0200375 pwm.tscaler_div = 2;
376 pwm.tdiv = 1;
Tomasz Figaf1189982013-04-20 23:22:13 +0200377 }
378}
379
380/*
381 * PWM master driver
382 */
Tomasz Figaf9bb48a22013-04-23 17:46:27 +0200383static void __init _samsung_pwm_clocksource_init(void)
Tomasz Figaf1189982013-04-20 23:22:13 +0200384{
385 u8 mask;
386 int channel;
387
Tomasz Figa030c2a12013-04-23 17:46:25 +0200388 mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
Tomasz Figaf1189982013-04-20 23:22:13 +0200389 channel = fls(mask) - 1;
390 if (channel < 0)
391 panic("failed to find PWM channel for clocksource");
Tomasz Figa030c2a12013-04-23 17:46:25 +0200392 pwm.source_id = channel;
Tomasz Figaf1189982013-04-20 23:22:13 +0200393
394 mask &= ~(1 << channel);
395 channel = fls(mask) - 1;
396 if (channel < 0)
397 panic("failed to find PWM channel for clock event");
Tomasz Figa030c2a12013-04-23 17:46:25 +0200398 pwm.event_id = channel;
Tomasz Figaf1189982013-04-20 23:22:13 +0200399
400 samsung_timer_resources();
401 samsung_clockevent_init();
402 samsung_clocksource_init();
403}
404
Tomasz Figaf9bb48a22013-04-23 17:46:27 +0200405void __init samsung_pwm_clocksource_init(void __iomem *base,
406 unsigned int *irqs, struct samsung_pwm_variant *variant)
407{
408 pwm.base = base;
409 memcpy(&pwm.variant, variant, sizeof(pwm.variant));
410 memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs));
411
Tomasz Figaa1fa6f52013-08-26 19:08:58 +0200412 pwm.timerclk = clk_get(NULL, "timers");
413 if (IS_ERR(pwm.timerclk))
414 panic("failed to get timers clock for timer");
415
Tomasz Figaf9bb48a22013-04-23 17:46:27 +0200416 _samsung_pwm_clocksource_init();
417}
418
419#ifdef CONFIG_CLKSRC_OF
Tomasz Figaf1189982013-04-20 23:22:13 +0200420static void __init samsung_pwm_alloc(struct device_node *np,
421 const struct samsung_pwm_variant *variant)
422{
Tomasz Figaf1189982013-04-20 23:22:13 +0200423 struct property *prop;
424 const __be32 *cur;
425 u32 val;
426 int i;
427
Tomasz Figa030c2a12013-04-23 17:46:25 +0200428 memcpy(&pwm.variant, variant, sizeof(pwm.variant));
Tomasz Figaf1189982013-04-20 23:22:13 +0200429 for (i = 0; i < SAMSUNG_PWM_NUM; ++i)
Tomasz Figa030c2a12013-04-23 17:46:25 +0200430 pwm.irq[i] = irq_of_parse_and_map(np, i);
Tomasz Figaf1189982013-04-20 23:22:13 +0200431
432 of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
433 if (val >= SAMSUNG_PWM_NUM) {
434 pr_warning("%s: invalid channel index in samsung,pwm-outputs property\n",
435 __func__);
436 continue;
437 }
Tomasz Figa030c2a12013-04-23 17:46:25 +0200438 pwm.variant.output_mask |= 1 << val;
Tomasz Figaf1189982013-04-20 23:22:13 +0200439 }
440
Tomasz Figae2415482013-06-13 21:22:44 +0200441 pwm.base = of_iomap(np, 0);
Tomasz Figa030c2a12013-04-23 17:46:25 +0200442 if (!pwm.base) {
Tomasz Figaf1189982013-04-20 23:22:13 +0200443 pr_err("%s: failed to map PWM registers\n", __func__);
Tomasz Figaf1189982013-04-20 23:22:13 +0200444 return;
445 }
446
Tomasz Figaa1fa6f52013-08-26 19:08:58 +0200447 pwm.timerclk = of_clk_get_by_name(np, "timers");
448 if (IS_ERR(pwm.timerclk))
449 panic("failed to get timers clock for timer");
Tomasz Figaf1189982013-04-20 23:22:13 +0200450
Tomasz Figaf9bb48a22013-04-23 17:46:27 +0200451 _samsung_pwm_clocksource_init();
Tomasz Figaf1189982013-04-20 23:22:13 +0200452}
453
454static const struct samsung_pwm_variant s3c24xx_variant = {
455 .bits = 16,
456 .div_base = 1,
457 .has_tint_cstat = false,
458 .tclk_mask = (1 << 4),
459};
460
461static void __init s3c2410_pwm_clocksource_init(struct device_node *np)
462{
463 samsung_pwm_alloc(np, &s3c24xx_variant);
464}
465CLOCKSOURCE_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
466
467static const struct samsung_pwm_variant s3c64xx_variant = {
468 .bits = 32,
469 .div_base = 0,
470 .has_tint_cstat = true,
471 .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
472};
473
474static void __init s3c64xx_pwm_clocksource_init(struct device_node *np)
475{
476 samsung_pwm_alloc(np, &s3c64xx_variant);
477}
478CLOCKSOURCE_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
479
480static const struct samsung_pwm_variant s5p64x0_variant = {
481 .bits = 32,
482 .div_base = 0,
483 .has_tint_cstat = true,
484 .tclk_mask = 0,
485};
486
487static void __init s5p64x0_pwm_clocksource_init(struct device_node *np)
488{
489 samsung_pwm_alloc(np, &s5p64x0_variant);
490}
491CLOCKSOURCE_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
492
493static const struct samsung_pwm_variant s5p_variant = {
494 .bits = 32,
495 .div_base = 0,
496 .has_tint_cstat = true,
497 .tclk_mask = (1 << 5),
498};
499
500static void __init s5p_pwm_clocksource_init(struct device_node *np)
501{
502 samsung_pwm_alloc(np, &s5p_variant);
503}
504CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
Tomasz Figaf9bb48a22013-04-23 17:46:27 +0200505#endif