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gerrit-public.fairphone.software / kernel / msm-4.9 / a4883ef6af5e513a1e8c2ab9aab721604aa3a4f5 / . / arch / arm / mach-exynos / include / mach / map.h
blob: 7b046b59d9ecc8829a98699ed84a6ffcbad4a8f5 [file] [log] [blame]
Kukjin Kim83014572011-11-06 13:54:56 +0900[diff] [blame]1/* linux/arch/arm/mach-exynos/include/mach/map.h
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * EXYNOS4 - Memory map definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_MAP_H
14#define __ASM_ARCH_MAP_H __FILE__
15
16#include <plat/map-base.h>
17
18/*
19 * EXYNOS4 UART offset is 0x10000 but the older S5P SoCs are 0x400.
20 * So need to define it, and here is to avoid redefinition warning.
21 */
22#define S3C_UART_OFFSET (0x10000)
23
24#include <plat/map-s5p.h>
25
Kukjin Kim56b20922011-08-20 13:41:21 +0900[diff] [blame]26#define EXYNOS4_PA_SYSRAM0 0x02025000
27#define EXYNOS4_PA_SYSRAM1 0x02020000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]28#define EXYNOS5_PA_SYSRAM 0x02020000
Tomasz Figa41de8982012-12-11 13:58:43 +0900[diff] [blame]29#define EXYNOS4210_PA_SYSRAM_NS 0x0203F000
30#define EXYNOS4x12_PA_SYSRAM_NS 0x0204F000
31#define EXYNOS5250_PA_SYSRAM_NS 0x0204F000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]32
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]33#define EXYNOS_PA_CHIPID 0x10000000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]34
35#define EXYNOS4_PA_SYSCON 0x10010000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]36#define EXYNOS5_PA_SYSCON 0x10050100
37
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]38#define EXYNOS4_PA_PMU 0x10020000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]39#define EXYNOS5_PA_PMU 0x10040000
40
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]41#define EXYNOS4_PA_CMU 0x10030000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]42#define EXYNOS5_PA_CMU 0x10010000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]43
Changhwan Youn2b740152011-03-11 10:39:35 +0900[diff] [blame]44#define EXYNOS4_PA_SYSTIMER 0x10050000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]45
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]46#define EXYNOS4_PA_WATCHDOG 0x10060000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]47#define EXYNOS5_PA_WATCHDOG 0x101D0000
48
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]49#define EXYNOS4_PA_DMC0 0x10400000
MyungJoo Ham2bde0b02011-12-01 15:12:30 +0900[diff] [blame]50#define EXYNOS4_PA_DMC1 0x10410000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]51
Changhwan Youneb13f2b2011-07-16 10:48:47 +0900[diff] [blame]52#define EXYNOS4_PA_COMBINER 0x10440000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]53#define EXYNOS5_PA_COMBINER 0x10440000
Changhwan Youneb13f2b2011-07-16 10:48:47 +0900[diff] [blame]54
55#define EXYNOS4_PA_GIC_CPU 0x10480000
56#define EXYNOS4_PA_GIC_DIST 0x10490000
Changhwan Younc9ce7db2012-04-24 14:31:11 -0700[diff] [blame]57#define EXYNOS5_PA_GIC_CPU 0x10482000
58#define EXYNOS5_PA_GIC_DIST 0x10481000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]59
60#define EXYNOS4_PA_COREPERI 0x10500000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]61#define EXYNOS4_PA_L2CC 0x10502000
62
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]63#define EXYNOS4_PA_SROMC 0x12570000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]64#define EXYNOS5_PA_SROMC 0x12250000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]65
Joonyoung Shim8f1d1692011-04-08 13:22:10 +0900[diff] [blame]66#define EXYNOS4_PA_HSPHY 0x125B0000
Joonyoung Shim3e112662011-04-08 13:22:09 +0900[diff] [blame]67
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]68#define EXYNOS4_PA_UART 0x13800000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]69#define EXYNOS5_PA_UART 0x12C00000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]70
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]71#define EXYNOS4_PA_TIMER 0x139D0000
Kukjin Kim94c7ca72012-02-11 22:15:45 +0900[diff] [blame]72#define EXYNOS5_PA_TIMER 0x12DD0000
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]73
Kukjin Kim83014572011-11-06 13:54:56 +0900[diff] [blame]74/* Compatibility UART */
75
Kukjin Kim2edb36c2012-11-15 15:48:56 +0900[diff] [blame]76#define EXYNOS5440_PA_UART0 0x000B0000
Kukjin Kim2edb36c2012-11-15 15:48:56 +0900[diff] [blame]77
Kukjin Kim83014572011-11-06 13:54:56 +0900[diff] [blame]78#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]79
Kukjin Kim7d30e8b2011-02-14 16:33:10 +0900[diff] [blame]80#endif /* __ASM_ARCH_MAP_H */