Keerthy | f99c1d4 | 2011-03-01 19:12:26 +0530 | [diff] [blame] | 1 | /* |
| 2 | * twl4030_madc.h - Header for TWL4030 MADC |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ |
| 5 | * J Keerthy <j-keerthy@ti.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU General Public License |
| 9 | * version 2 as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 19 | * 02110-1301 USA |
| 20 | * |
| 21 | */ |
| 22 | |
| 23 | #ifndef _TWL4030_MADC_H |
| 24 | #define _TWL4030_MADC_H |
| 25 | |
| 26 | struct twl4030_madc_conversion_method { |
| 27 | u8 sel; |
| 28 | u8 avg; |
| 29 | u8 rbase; |
| 30 | u8 ctrl; |
| 31 | }; |
| 32 | |
| 33 | #define TWL4030_MADC_MAX_CHANNELS 16 |
| 34 | |
| 35 | |
| 36 | /* |
| 37 | * twl4030_madc_request- madc request packet for channel conversion |
| 38 | * @channels: 16 bit bitmap for individual channels |
| 39 | * @do_avgP: sample the input channel for 4 consecutive cycles |
| 40 | * @method: RT, SW1, SW2 |
| 41 | * @type: Polling or interrupt based method |
Pali Rohár | a5055d5 | 2013-02-15 23:56:49 +0100 | [diff] [blame^] | 42 | * @raw: Return raw value, do not convert it |
Keerthy | f99c1d4 | 2011-03-01 19:12:26 +0530 | [diff] [blame] | 43 | */ |
| 44 | |
| 45 | struct twl4030_madc_request { |
| 46 | unsigned long channels; |
| 47 | u16 do_avg; |
| 48 | u16 method; |
| 49 | u16 type; |
| 50 | bool active; |
| 51 | bool result_pending; |
Pali Rohár | a5055d5 | 2013-02-15 23:56:49 +0100 | [diff] [blame^] | 52 | bool raw; |
Keerthy | f99c1d4 | 2011-03-01 19:12:26 +0530 | [diff] [blame] | 53 | int rbuf[TWL4030_MADC_MAX_CHANNELS]; |
| 54 | void (*func_cb)(int len, int channels, int *buf); |
| 55 | }; |
| 56 | |
| 57 | enum conversion_methods { |
| 58 | TWL4030_MADC_RT, |
| 59 | TWL4030_MADC_SW1, |
| 60 | TWL4030_MADC_SW2, |
| 61 | TWL4030_MADC_NUM_METHODS |
| 62 | }; |
| 63 | |
| 64 | enum sample_type { |
| 65 | TWL4030_MADC_WAIT, |
| 66 | TWL4030_MADC_IRQ_ONESHOT, |
| 67 | TWL4030_MADC_IRQ_REARM |
| 68 | }; |
| 69 | |
| 70 | #define TWL4030_MADC_CTRL1 0x00 |
| 71 | #define TWL4030_MADC_CTRL2 0x01 |
| 72 | |
| 73 | #define TWL4030_MADC_RTSELECT_LSB 0x02 |
| 74 | #define TWL4030_MADC_SW1SELECT_LSB 0x06 |
| 75 | #define TWL4030_MADC_SW2SELECT_LSB 0x0A |
| 76 | |
| 77 | #define TWL4030_MADC_RTAVERAGE_LSB 0x04 |
| 78 | #define TWL4030_MADC_SW1AVERAGE_LSB 0x08 |
| 79 | #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C |
| 80 | |
| 81 | #define TWL4030_MADC_CTRL_SW1 0x12 |
| 82 | #define TWL4030_MADC_CTRL_SW2 0x13 |
| 83 | |
| 84 | #define TWL4030_MADC_RTCH0_LSB 0x17 |
| 85 | #define TWL4030_MADC_GPCH0_LSB 0x37 |
| 86 | |
| 87 | #define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */ |
| 88 | #define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */ |
| 89 | /* MADC conversion completion */ |
| 90 | #define TWL4030_MADC_EOC_SW (1 << 1) |
| 91 | /* MADC SWx start conversion */ |
| 92 | #define TWL4030_MADC_SW_START (1 << 5) |
| 93 | #define TWL4030_MADC_ADCIN0 (1 << 0) |
| 94 | #define TWL4030_MADC_ADCIN1 (1 << 1) |
| 95 | #define TWL4030_MADC_ADCIN2 (1 << 2) |
| 96 | #define TWL4030_MADC_ADCIN3 (1 << 3) |
| 97 | #define TWL4030_MADC_ADCIN4 (1 << 4) |
| 98 | #define TWL4030_MADC_ADCIN5 (1 << 5) |
| 99 | #define TWL4030_MADC_ADCIN6 (1 << 6) |
| 100 | #define TWL4030_MADC_ADCIN7 (1 << 7) |
| 101 | #define TWL4030_MADC_ADCIN8 (1 << 8) |
| 102 | #define TWL4030_MADC_ADCIN9 (1 << 9) |
| 103 | #define TWL4030_MADC_ADCIN10 (1 << 10) |
| 104 | #define TWL4030_MADC_ADCIN11 (1 << 11) |
| 105 | #define TWL4030_MADC_ADCIN12 (1 << 12) |
| 106 | #define TWL4030_MADC_ADCIN13 (1 << 13) |
| 107 | #define TWL4030_MADC_ADCIN14 (1 << 14) |
| 108 | #define TWL4030_MADC_ADCIN15 (1 << 15) |
| 109 | |
| 110 | /* Fixed channels */ |
| 111 | #define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1 |
| 112 | #define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8 |
| 113 | #define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9 |
| 114 | #define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10 |
| 115 | #define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11 |
| 116 | #define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12 |
| 117 | |
| 118 | /* Step size and prescaler ratio */ |
| 119 | #define TEMP_STEP_SIZE 147 |
| 120 | #define TEMP_PSR_R 100 |
| 121 | #define CURR_STEP_SIZE 147 |
| 122 | #define CURR_PSR_R1 44 |
| 123 | #define CURR_PSR_R2 88 |
| 124 | |
| 125 | #define TWL4030_BCI_BCICTL1 0x23 |
| 126 | #define TWL4030_BCI_CGAIN 0x020 |
| 127 | #define TWL4030_BCI_MESBAT (1 << 1) |
| 128 | #define TWL4030_BCI_TYPEN (1 << 4) |
| 129 | #define TWL4030_BCI_ITHEN (1 << 3) |
| 130 | |
| 131 | #define REG_BCICTL2 0x024 |
| 132 | #define TWL4030_BCI_ITHSENS 0x007 |
| 133 | |
Kyle Manna | 3d6271f | 2011-08-11 22:33:13 -0500 | [diff] [blame] | 134 | /* Register and bits for GPBR1 register */ |
| 135 | #define TWL4030_REG_GPBR1 0x0c |
| 136 | #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7) |
| 137 | |
Keerthy | f99c1d4 | 2011-03-01 19:12:26 +0530 | [diff] [blame] | 138 | struct twl4030_madc_user_parms { |
| 139 | int channel; |
| 140 | int average; |
| 141 | int status; |
| 142 | u16 result; |
| 143 | }; |
| 144 | |
| 145 | int twl4030_madc_conversion(struct twl4030_madc_request *conv); |
| 146 | int twl4030_get_madc_conversion(int channel_no); |
| 147 | #endif |