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Mike Turquette9d9f78e2012-03-15 23:11:20 -07001/*
2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adjustable divider clock implementation
11 */
12
13#include <linux/clk-provider.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/io.h>
17#include <linux/err.h>
18#include <linux/string.h>
James Hogan1a3cd182013-01-15 10:28:05 +000019#include <linux/log2.h>
Mike Turquette9d9f78e2012-03-15 23:11:20 -070020
21/*
22 * DOC: basic adjustable divider clock that cannot gate
23 *
24 * Traits of this clock:
25 * prepare - clk_prepare only ensures that parents are prepared
26 * enable - clk_enable only ensures that parents are enabled
Tomi Valkeinenb11d2822014-02-13 12:03:59 +020027 * rate - rate is adjustable. clk->rate = DIV_ROUND_UP(parent->rate / divisor)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070028 * parent - fixed parent. No clk_set_parent support
29 */
30
31#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32
James Hogan1a3cd182013-01-15 10:28:05 +000033#define div_mask(d) ((1 << ((d)->width)) - 1)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053034
Rajendra Nayak357c3f02012-06-29 19:06:32 +053035static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36{
37 unsigned int maxdiv = 0;
38 const struct clk_div_table *clkt;
39
40 for (clkt = table; clkt->div; clkt++)
41 if (clkt->div > maxdiv)
42 maxdiv = clkt->div;
43 return maxdiv;
44}
45
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053046static unsigned int _get_maxdiv(struct clk_divider *divider)
47{
48 if (divider->flags & CLK_DIVIDER_ONE_BASED)
49 return div_mask(divider);
50 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
51 return 1 << div_mask(divider);
Rajendra Nayak357c3f02012-06-29 19:06:32 +053052 if (divider->table)
53 return _get_table_maxdiv(divider->table);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053054 return div_mask(divider) + 1;
55}
56
Rajendra Nayak357c3f02012-06-29 19:06:32 +053057static unsigned int _get_table_div(const struct clk_div_table *table,
58 unsigned int val)
59{
60 const struct clk_div_table *clkt;
61
62 for (clkt = table; clkt->div; clkt++)
63 if (clkt->val == val)
64 return clkt->div;
65 return 0;
66}
67
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053068static unsigned int _get_div(struct clk_divider *divider, unsigned int val)
69{
70 if (divider->flags & CLK_DIVIDER_ONE_BASED)
71 return val;
72 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
73 return 1 << val;
Rajendra Nayak357c3f02012-06-29 19:06:32 +053074 if (divider->table)
75 return _get_table_div(divider->table, val);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053076 return val + 1;
77}
78
Rajendra Nayak357c3f02012-06-29 19:06:32 +053079static unsigned int _get_table_val(const struct clk_div_table *table,
80 unsigned int div)
81{
82 const struct clk_div_table *clkt;
83
84 for (clkt = table; clkt->div; clkt++)
85 if (clkt->div == div)
86 return clkt->val;
87 return 0;
88}
89
James Hogan778037e2013-12-16 10:41:38 +000090static unsigned int _get_val(struct clk_divider *divider, unsigned int div)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053091{
92 if (divider->flags & CLK_DIVIDER_ONE_BASED)
93 return div;
94 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
95 return __ffs(div);
Rajendra Nayak357c3f02012-06-29 19:06:32 +053096 if (divider->table)
97 return _get_table_val(divider->table, div);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053098 return div - 1;
99}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700100
101static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
102 unsigned long parent_rate)
103{
104 struct clk_divider *divider = to_clk_divider(hw);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530105 unsigned int div, val;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700106
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200107 val = clk_readl(divider->reg) >> divider->shift;
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530108 val &= div_mask(divider);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700109
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530110 div = _get_div(divider, val);
111 if (!div) {
Soren Brinkmann056b20532013-04-02 15:36:56 -0700112 WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO),
113 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
114 __clk_get_name(hw->clk));
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530115 return parent_rate;
116 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700117
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200118 return DIV_ROUND_UP(parent_rate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700119}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700120
121/*
122 * The reverse of DIV_ROUND_UP: The maximum number which
123 * divided by m is r
124 */
125#define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1)
126
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530127static bool _is_valid_table_div(const struct clk_div_table *table,
128 unsigned int div)
129{
130 const struct clk_div_table *clkt;
131
132 for (clkt = table; clkt->div; clkt++)
133 if (clkt->div == div)
134 return true;
135 return false;
136}
137
138static bool _is_valid_div(struct clk_divider *divider, unsigned int div)
139{
140 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
James Hogan1a3cd182013-01-15 10:28:05 +0000141 return is_power_of_2(div);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530142 if (divider->table)
143 return _is_valid_table_div(divider->table, div);
144 return true;
145}
146
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100147static int _round_up_table(const struct clk_div_table *table, int div)
148{
149 const struct clk_div_table *clkt;
Maxime COQUELINfe52e752014-05-07 18:48:52 +0200150 int up = INT_MAX;
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100151
152 for (clkt = table; clkt->div; clkt++) {
153 if (clkt->div == div)
154 return clkt->div;
155 else if (clkt->div < div)
156 continue;
157
158 if ((clkt->div - div) < (up - div))
159 up = clkt->div;
160 }
161
162 return up;
163}
164
165static int _div_round_up(struct clk_divider *divider,
166 unsigned long parent_rate, unsigned long rate)
167{
168 int div = DIV_ROUND_UP(parent_rate, rate);
169
170 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO)
171 div = __roundup_pow_of_two(div);
172 if (divider->table)
173 div = _round_up_table(divider->table, div);
174
175 return div;
176}
177
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700178static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
179 unsigned long *best_parent_rate)
180{
181 struct clk_divider *divider = to_clk_divider(hw);
182 int i, bestdiv = 0;
183 unsigned long parent_rate, best = 0, now, maxdiv;
Shawn Guo081c9022013-06-02 22:20:55 +0800184 unsigned long parent_rate_saved = *best_parent_rate;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700185
186 if (!rate)
187 rate = 1;
188
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530189 maxdiv = _get_maxdiv(divider);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700190
Shawn Guo81536e02012-04-12 20:50:17 +0800191 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
192 parent_rate = *best_parent_rate;
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100193 bestdiv = _div_round_up(divider, parent_rate, rate);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700194 bestdiv = bestdiv == 0 ? 1 : bestdiv;
195 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
196 return bestdiv;
197 }
198
199 /*
200 * The maximum divider we can use without overflowing
201 * unsigned long in rate * i below
202 */
203 maxdiv = min(ULONG_MAX / rate, maxdiv);
204
205 for (i = 1; i <= maxdiv; i++) {
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530206 if (!_is_valid_div(divider, i))
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530207 continue;
Shawn Guo081c9022013-06-02 22:20:55 +0800208 if (rate * i == parent_rate_saved) {
209 /*
210 * It's the most ideal case if the requested rate can be
211 * divided from parent clock without needing to change
212 * parent rate, so return the divider immediately.
213 */
214 *best_parent_rate = parent_rate_saved;
215 return i;
216 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700217 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
218 MULT_ROUND_UP(rate, i));
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200219 now = DIV_ROUND_UP(parent_rate, i);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700220 if (now <= rate && now > best) {
221 bestdiv = i;
222 best = now;
223 *best_parent_rate = parent_rate;
224 }
225 }
226
227 if (!bestdiv) {
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530228 bestdiv = _get_maxdiv(divider);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700229 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
230 }
231
232 return bestdiv;
233}
234
235static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
236 unsigned long *prate)
237{
238 int div;
239 div = clk_divider_bestdiv(hw, rate, prate);
240
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200241 return DIV_ROUND_UP(*prate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700242}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700243
Shawn Guo1c0035d2012-04-12 20:50:18 +0800244static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
245 unsigned long parent_rate)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700246{
247 struct clk_divider *divider = to_clk_divider(hw);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530248 unsigned int div, value;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700249 unsigned long flags = 0;
250 u32 val;
251
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200252 div = DIV_ROUND_UP(parent_rate, rate);
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100253
254 if (!_is_valid_div(divider, div))
255 return -EINVAL;
256
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530257 value = _get_val(divider, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700258
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530259 if (value > div_mask(divider))
260 value = div_mask(divider);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700261
262 if (divider->lock)
263 spin_lock_irqsave(divider->lock, flags);
264
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800265 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
266 val = div_mask(divider) << (divider->shift + 16);
267 } else {
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200268 val = clk_readl(divider->reg);
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800269 val &= ~(div_mask(divider) << divider->shift);
270 }
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530271 val |= value << divider->shift;
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200272 clk_writel(val, divider->reg);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700273
274 if (divider->lock)
275 spin_unlock_irqrestore(divider->lock, flags);
276
277 return 0;
278}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700279
Shawn Guo822c2502012-03-27 15:23:22 +0800280const struct clk_ops clk_divider_ops = {
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700281 .recalc_rate = clk_divider_recalc_rate,
282 .round_rate = clk_divider_round_rate,
283 .set_rate = clk_divider_set_rate,
284};
285EXPORT_SYMBOL_GPL(clk_divider_ops);
286
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530287static struct clk *_register_divider(struct device *dev, const char *name,
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700288 const char *parent_name, unsigned long flags,
289 void __iomem *reg, u8 shift, u8 width,
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530290 u8 clk_divider_flags, const struct clk_div_table *table,
291 spinlock_t *lock)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700292{
293 struct clk_divider *div;
294 struct clk *clk;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700295 struct clk_init_data init;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700296
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800297 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
298 if (width + shift > 16) {
299 pr_warn("divider value exceeds LOWORD field\n");
300 return ERR_PTR(-EINVAL);
301 }
302 }
303
Mike Turquette27d54592012-03-26 17:51:03 -0700304 /* allocate the divider */
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700305 div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700306 if (!div) {
307 pr_err("%s: could not allocate divider clk\n", __func__);
Mike Turquette27d54592012-03-26 17:51:03 -0700308 return ERR_PTR(-ENOMEM);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700309 }
310
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700311 init.name = name;
312 init.ops = &clk_divider_ops;
Rajendra Nayakf7d8caa2012-06-01 14:02:47 +0530313 init.flags = flags | CLK_IS_BASIC;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700314 init.parent_names = (parent_name ? &parent_name: NULL);
315 init.num_parents = (parent_name ? 1 : 0);
316
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700317 /* struct clk_divider assignments */
318 div->reg = reg;
319 div->shift = shift;
320 div->width = width;
321 div->flags = clk_divider_flags;
322 div->lock = lock;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700323 div->hw.init = &init;
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530324 div->table = table;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700325
Mike Turquette27d54592012-03-26 17:51:03 -0700326 /* register the clock */
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700327 clk = clk_register(dev, &div->hw);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700328
Mike Turquette27d54592012-03-26 17:51:03 -0700329 if (IS_ERR(clk))
330 kfree(div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700331
Mike Turquette27d54592012-03-26 17:51:03 -0700332 return clk;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700333}
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530334
335/**
336 * clk_register_divider - register a divider clock with the clock framework
337 * @dev: device registering this clock
338 * @name: name of this clock
339 * @parent_name: name of clock's parent
340 * @flags: framework-specific flags
341 * @reg: register address to adjust divider
342 * @shift: number of bits to shift the bitfield
343 * @width: width of the bitfield
344 * @clk_divider_flags: divider-specific flags for this clock
345 * @lock: shared register lock for this clock
346 */
347struct clk *clk_register_divider(struct device *dev, const char *name,
348 const char *parent_name, unsigned long flags,
349 void __iomem *reg, u8 shift, u8 width,
350 u8 clk_divider_flags, spinlock_t *lock)
351{
352 return _register_divider(dev, name, parent_name, flags, reg, shift,
353 width, clk_divider_flags, NULL, lock);
354}
Fabio Estevam4c5eeea2013-08-02 13:14:07 -0300355EXPORT_SYMBOL_GPL(clk_register_divider);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530356
357/**
358 * clk_register_divider_table - register a table based divider clock with
359 * the clock framework
360 * @dev: device registering this clock
361 * @name: name of this clock
362 * @parent_name: name of clock's parent
363 * @flags: framework-specific flags
364 * @reg: register address to adjust divider
365 * @shift: number of bits to shift the bitfield
366 * @width: width of the bitfield
367 * @clk_divider_flags: divider-specific flags for this clock
368 * @table: array of divider/value pairs ending with a div set to 0
369 * @lock: shared register lock for this clock
370 */
371struct clk *clk_register_divider_table(struct device *dev, const char *name,
372 const char *parent_name, unsigned long flags,
373 void __iomem *reg, u8 shift, u8 width,
374 u8 clk_divider_flags, const struct clk_div_table *table,
375 spinlock_t *lock)
376{
377 return _register_divider(dev, name, parent_name, flags, reg, shift,
378 width, clk_divider_flags, table, lock);
379}
Fabio Estevam4c5eeea2013-08-02 13:14:07 -0300380EXPORT_SYMBOL_GPL(clk_register_divider_table);