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gerrit-public.fairphone.software / kernel / msm-4.9 / a529cecd29ecf1e5416316ae06ce515bf67b5d5a / . / drivers / net / wireless / b43 / phy_n.c
blob: dc4045de61f2c42edddc47ca795c2be80c079e61 [file] [log] [blame]
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]1/*
2
3 Broadcom B43 wireless driver
4 IEEE 802.11n PHY support
5
6 Copyright (c) 2008 Michael Buesch <mb@bu3sch.de>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; see the file COPYING. If not, write to
20 the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
21 Boston, MA 02110-1301, USA.
22
23*/
24
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]25#include <linux/delay.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +0900[diff] [blame]26#include <linux/slab.h>
John W. Linville819d7722008-01-17 16:57:10 -0500[diff] [blame]27#include <linux/types.h>
28
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]29#include "b43.h"
Michael Buesch3d0da752008-08-30 02:27:19 +0200[diff] [blame]30#include "phy_n.h"
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]31#include "tables_nphy.h"
Rafał Miłecki6db507f2010-10-14 19:33:36 +0200[diff] [blame]32#include "radio_2055.h"
Rafał Miłecki5161bec2010-10-14 21:16:33 +0200[diff] [blame]33#include "radio_2056.h"
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]34#include "main.h"
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]35
Rafał Miłeckif8187b52010-01-15 12:34:21 +0100[diff] [blame]36struct nphy_txgains {
37 u16 txgm[2];
38 u16 pga[2];
39 u16 pad[2];
40 u16 ipa[2];
41};
42
43struct nphy_iqcal_params {
44 u16 txgm;
45 u16 pga;
46 u16 pad;
47 u16 ipa;
48 u16 cal_gain;
49 u16 ncorr[5];
50};
51
52struct nphy_iq_est {
53 s32 iq0_prod;
54 u32 i0_pwr;
55 u32 q0_pwr;
56 s32 iq1_prod;
57 u32 i1_pwr;
58 u32 q1_pwr;
59};
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]60
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]61enum b43_nphy_rf_sequence {
62 B43_RFSEQ_RX2TX,
63 B43_RFSEQ_TX2RX,
64 B43_RFSEQ_RESET2RX,
65 B43_RFSEQ_UPDATE_GAINH,
66 B43_RFSEQ_UPDATE_GAINL,
67 B43_RFSEQ_UPDATE_GAINU,
68};
69
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]70static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
71 u8 *events, u8 *delays, u8 length);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]72static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
73 enum b43_nphy_rf_sequence seq);
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]74static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
75 u16 value, u8 core, bool off);
76static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
77 u16 value, u8 core);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]78
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]79static inline bool b43_channel_type_is_40mhz(
80 enum nl80211_channel_type channel_type)
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]81{
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]82 return (channel_type == NL80211_CHAN_HT40MINUS ||
83 channel_type == NL80211_CHAN_HT40PLUS);
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]84}
85
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]86void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
87{//TODO
88}
89
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]90static void b43_nphy_op_adjust_txpower(struct b43_wldev *dev)
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]91{//TODO
92}
93
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]94static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev *dev,
95 bool ignore_tssi)
96{//TODO
97 return B43_TXPWR_RES_DONE;
98}
99
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]100static void b43_chantab_radio_upload(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]101 const struct b43_nphy_channeltab_entry_rev2 *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]102{
Rafał Miłeckie5255ccc2010-02-27 13:03:35 +0100[diff] [blame]103 b43_radio_write(dev, B2055_PLL_REF, e->radio_pll_ref);
104 b43_radio_write(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0);
105 b43_radio_write(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1);
106 b43_radio_write(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail);
107 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
108
109 b43_radio_write(dev, B2055_VCO_CAL1, e->radio_vco_cal1);
110 b43_radio_write(dev, B2055_VCO_CAL2, e->radio_vco_cal2);
111 b43_radio_write(dev, B2055_PLL_LFC1, e->radio_pll_lfc1);
112 b43_radio_write(dev, B2055_PLL_LFR1, e->radio_pll_lfr1);
113 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
114
115 b43_radio_write(dev, B2055_PLL_LFC2, e->radio_pll_lfc2);
116 b43_radio_write(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf);
117 b43_radio_write(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1);
118 b43_radio_write(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2);
119 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
120
121 b43_radio_write(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune);
122 b43_radio_write(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune);
123 b43_radio_write(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1);
124 b43_radio_write(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn);
125 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
126
127 b43_radio_write(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim);
128 b43_radio_write(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune);
129 b43_radio_write(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune);
130 b43_radio_write(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1);
131 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
132
133 b43_radio_write(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn);
134 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim);
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]135}
136
137static void b43_chantab_phy_upload(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]138 const struct b43_phy_n_sfo_cfg *e)
Michael Bueschd1591312008-01-14 00:05:57 +0100[diff] [blame]139{
140 b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a);
141 b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2);
142 b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3);
143 b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4);
144 b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5);
145 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6);
146}
147
148static void b43_nphy_tx_power_fix(struct b43_wldev *dev)
149{
150 //TODO
151}
152
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]153
154/* http://bcm-v4.sipsolutions.net/802.11/PHY/Radio/2055Setup */
155static void b43_radio_2055_setup(struct b43_wldev *dev,
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]156 const struct b43_nphy_channeltab_entry_rev2 *e)
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]157{
158 B43_WARN_ON(dev->phy.rev >= 3);
159
160 b43_chantab_radio_upload(dev, e);
161 udelay(50);
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]162 b43_radio_write(dev, B2055_VCO_CAL10, 0x05);
163 b43_radio_write(dev, B2055_VCO_CAL10, 0x45);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]164 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes */
Rafał Miłeckie58b1252010-03-29 00:53:16 +0200[diff] [blame]165 b43_radio_write(dev, B2055_VCO_CAL10, 0x65);
Rafał Miłecki7955de02010-02-27 13:03:39 +0100[diff] [blame]166 udelay(300);
167}
168
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]169static void b43_radio_init2055_pre(struct b43_wldev *dev)
170{
171 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
172 ~B43_NPHY_RFCTL_CMD_PORFORCE);
173 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
174 B43_NPHY_RFCTL_CMD_CHIP0PU |
175 B43_NPHY_RFCTL_CMD_OEPORFORCE);
176 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
177 B43_NPHY_RFCTL_CMD_PORFORCE);
178}
179
180static void b43_radio_init2055_post(struct b43_wldev *dev)
181{
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]182 struct b43_phy_n *nphy = dev->phy.n;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]183 struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
184 struct ssb_boardinfo *binfo = &(dev->dev->bus->boardinfo);
185 int i;
186 u16 val;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]187 bool workaround = false;
188
189 if (sprom->revision < 4)
190 workaround = (binfo->vendor != PCI_VENDOR_ID_BROADCOM ||
191 binfo->type != 0x46D ||
192 binfo->rev < 0x41);
193 else
Rafał Miłecki7a4db8f2010-10-22 17:43:48 +0200[diff] [blame]194 workaround =
195 !(sprom->boardflags2_lo & B43_BFL2_RXBB_INT_REG_DIS);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]196
197 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]198 if (workaround) {
199 b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F);
200 b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]201 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]202 b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C);
203 b43_radio_write(dev, B2055_CAL_MISC, 0x3C);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]204 b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]205 b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]206 b43_radio_set(dev, B2055_CAL_MISC, 0x1);
207 msleep(1);
208 b43_radio_set(dev, B2055_CAL_MISC, 0x40);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]209 for (i = 0; i < 200; i++) {
210 val = b43_radio_read(dev, B2055_CAL_COUT2);
211 if (val & 0x80) {
212 i = 0;
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]213 break;
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]214 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]215 udelay(10);
216 }
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]217 if (i)
218 b43err(dev->wl, "radio post init timeout\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]219 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]220 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłecki036cafe2010-02-27 13:03:36 +0100[diff] [blame]221 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9);
222 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9);
223 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83);
224 b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83);
225 b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6);
226 b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6);
227 if (!nphy->gain_boost) {
228 b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2);
229 b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2);
230 } else {
231 b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD);
232 b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD);
233 }
234 udelay(2);
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]235}
236
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]237/*
238 * Initialize a Broadcom 2055 N-radio
239 * http://bcm-v4.sipsolutions.net/802.11/Radio/2055/Init
240 */
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]241static void b43_radio_init2055(struct b43_wldev *dev)
242{
243 b43_radio_init2055_pre(dev);
Rafał Miłeckia2d9bc62010-10-22 17:43:49 +0200[diff] [blame]244 if (b43_status(dev) < B43_STAT_INITIALIZED) {
245 /* Follow wl, not specs. Do not force uploading all regs */
246 b2055_upload_inittab(dev, 0, 0);
247 } else {
248 bool ghz5 = b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ;
249 b2055_upload_inittab(dev, ghz5, 0);
250 }
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]251 b43_radio_init2055_post(dev);
252}
253
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]254/*
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]255 * Initialize a Broadcom 2056 N-radio
256 * http://bcm-v4.sipsolutions.net/802.11/Radio/2056/Init
257 */
258static void b43_radio_init2056(struct b43_wldev *dev)
259{
260 /* TODO */
261}
262
263
264/*
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]265 * Upload the N-PHY tables.
266 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
267 */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]268static void b43_nphy_tables_init(struct b43_wldev *dev)
269{
Rafał Miłecki4772ae12010-01-15 12:18:21 +0100[diff] [blame]270 if (dev->phy.rev < 3)
271 b43_nphy_rev0_1_2_tables_init(dev);
272 else
273 b43_nphy_rev3plus_tables_init(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]274}
275
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]276/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
277static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
278{
279 struct b43_phy_n *nphy = dev->phy.n;
280 enum ieee80211_band band;
281 u16 tmp;
282
283 if (!enable) {
284 nphy->rfctrl_intc1_save = b43_phy_read(dev,
285 B43_NPHY_RFCTL_INTC1);
286 nphy->rfctrl_intc2_save = b43_phy_read(dev,
287 B43_NPHY_RFCTL_INTC2);
288 band = b43_current_band(dev->wl);
289 if (dev->phy.rev >= 3) {
290 if (band == IEEE80211_BAND_5GHZ)
291 tmp = 0x600;
292 else
293 tmp = 0x480;
294 } else {
295 if (band == IEEE80211_BAND_5GHZ)
296 tmp = 0x180;
297 else
298 tmp = 0x120;
299 }
300 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
301 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
302 } else {
303 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1,
304 nphy->rfctrl_intc1_save);
305 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2,
306 nphy->rfctrl_intc2_save);
307 }
308}
309
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]310/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
311static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
312{
313 struct b43_phy_n *nphy = dev->phy.n;
314 u16 tmp;
315 enum ieee80211_band band = b43_current_band(dev->wl);
316 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
317 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
318
319 if (dev->phy.rev >= 3) {
320 if (ipa) {
321 tmp = 4;
322 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
323 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
324 }
325
326 tmp = 1;
327 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2,
328 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
329 }
330}
331
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]332/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
333static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
334{
335 u32 tmslow;
336
337 if (dev->phy.type != B43_PHYTYPE_N)
338 return;
339
340 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
341 if (force)
342 tmslow |= SSB_TMSLOW_FGC;
343 else
344 tmslow &= ~SSB_TMSLOW_FGC;
345 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
346}
347
348/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]349static void b43_nphy_reset_cca(struct b43_wldev *dev)
350{
351 u16 bbcfg;
352
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]353 b43_nphy_bmac_clock_fgc(dev, 1);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]354 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
Rafał Miłecki4a933c82010-01-15 13:36:43 +0100[diff] [blame]355 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
356 udelay(1);
357 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
358 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]359 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]360}
361
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]362/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
363static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
364{
365 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
366
367 mimocfg |= B43_NPHY_MIMOCFG_AUTO;
368 if (preamble == 1)
369 mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
370 else
371 mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
372
373 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
374}
375
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]376/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
377static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
378{
379 struct b43_phy_n *nphy = dev->phy.n;
380
381 bool override = false;
382 u16 chain = 0x33;
383
384 if (nphy->txrx_chain == 0) {
385 chain = 0x11;
386 override = true;
387 } else if (nphy->txrx_chain == 1) {
388 chain = 0x22;
389 override = true;
390 }
391
392 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
393 ~(B43_NPHY_RFSEQCA_TXEN | B43_NPHY_RFSEQCA_RXEN),
394 chain);
395
396 if (override)
397 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
398 B43_NPHY_RFSEQMODE_CAOVER);
399 else
400 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
401 ~B43_NPHY_RFSEQMODE_CAOVER);
402}
403
Rafał Miłecki2faa6b82010-01-15 15:26:12 +0100[diff] [blame]404/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
405static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
406 u16 samps, u8 time, bool wait)
407{
408 int i;
409 u16 tmp;
410
411 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
412 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
413 if (wait)
414 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
415 else
416 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
417
418 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
419
420 for (i = 1000; i; i--) {
421 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
422 if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
423 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
424 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
425 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
426 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
427 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
428 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
429
430 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
431 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
432 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
433 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
434 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
435 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
436 return;
437 }
438 udelay(10);
439 }
440 memset(est, 0, sizeof(*est));
441}
442
Rafał Miłeckia67162a2010-01-15 15:16:25 +0100[diff] [blame]443/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
444static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
445 struct b43_phy_n_iq_comp *pcomp)
446{
447 if (write) {
448 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0);
449 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0);
450 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1);
451 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1);
452 } else {
453 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0);
454 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0);
455 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1);
456 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1);
457 }
458}
459
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]460/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
461static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
462{
463 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
464
465 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]);
466 if (core == 0) {
467 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]);
468 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
469 } else {
470 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
471 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
472 }
473 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]);
474 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]);
475 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]);
476 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]);
477 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]);
478 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]);
479 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
480 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
481}
482
483/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhySetup */
484static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
485{
486 u8 rxval, txval;
487 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
488
489 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
490 if (core == 0) {
491 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
492 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
493 } else {
494 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
495 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
496 }
497 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
498 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
499 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
500 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
501 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1);
502 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
503 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
504 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
505
506 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
507 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
508
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]509 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
510 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]511 ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
512 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
513 ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT));
514 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
515 (core << B43_NPHY_RFSEQCA_RXEN_SHIFT));
516 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS,
517 (core << B43_NPHY_RFSEQCA_TXDIS_SHIFT));
518
519 if (core == 0) {
520 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
521 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
522 } else {
523 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
524 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
525 }
526
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]527 b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
528 b43_nphy_rf_control_override(dev, 8, 0, 3, false);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]529 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]530
531 if (core == 0) {
532 rxval = 1;
533 txval = 8;
534 } else {
535 rxval = 4;
536 txval = 2;
537 }
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]538 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
539 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
Rafał Miłecki026816f2010-01-17 13:03:28 +0100[diff] [blame]540}
541
Rafał Miłecki34a56f22010-01-15 15:29:05 +0100[diff] [blame]542/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
543static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
544{
545 int i;
546 s32 iq;
547 u32 ii;
548 u32 qq;
549 int iq_nbits, qq_nbits;
550 int arsh, brsh;
551 u16 tmp, a, b;
552
553 struct nphy_iq_est est;
554 struct b43_phy_n_iq_comp old;
555 struct b43_phy_n_iq_comp new = { };
556 bool error = false;
557
558 if (mask == 0)
559 return;
560
561 b43_nphy_rx_iq_coeffs(dev, false, &old);
562 b43_nphy_rx_iq_coeffs(dev, true, &new);
563 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false);
564 new = old;
565
566 for (i = 0; i < 2; i++) {
567 if (i == 0 && (mask & 1)) {
568 iq = est.iq0_prod;
569 ii = est.i0_pwr;
570 qq = est.q0_pwr;
571 } else if (i == 1 && (mask & 2)) {
572 iq = est.iq1_prod;
573 ii = est.i1_pwr;
574 qq = est.q1_pwr;
575 } else {
576 B43_WARN_ON(1);
577 continue;
578 }
579
580 if (ii + qq < 2) {
581 error = true;
582 break;
583 }
584
585 iq_nbits = fls(abs(iq));
586 qq_nbits = fls(qq);
587
588 arsh = iq_nbits - 20;
589 if (arsh >= 0) {
590 a = -((iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
591 tmp = ii >> arsh;
592 } else {
593 a = -((iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
594 tmp = ii << -arsh;
595 }
596 if (tmp == 0) {
597 error = true;
598 break;
599 }
600 a /= tmp;
601
602 brsh = qq_nbits - 11;
603 if (brsh >= 0) {
604 b = (qq << (31 - qq_nbits));
605 tmp = ii >> brsh;
606 } else {
607 b = (qq << (31 - qq_nbits));
608 tmp = ii << -brsh;
609 }
610 if (tmp == 0) {
611 error = true;
612 break;
613 }
614 b = int_sqrt(b / tmp - a * a) - (1 << 10);
615
616 if (i == 0 && (mask & 0x1)) {
617 if (dev->phy.rev >= 3) {
618 new.a0 = a & 0x3FF;
619 new.b0 = b & 0x3FF;
620 } else {
621 new.a0 = b & 0x3FF;
622 new.b0 = a & 0x3FF;
623 }
624 } else if (i == 1 && (mask & 0x2)) {
625 if (dev->phy.rev >= 3) {
626 new.a1 = a & 0x3FF;
627 new.b1 = b & 0x3FF;
628 } else {
629 new.a1 = b & 0x3FF;
630 new.b1 = a & 0x3FF;
631 }
632 }
633 }
634
635 if (error)
636 new = old;
637
638 b43_nphy_rx_iq_coeffs(dev, true, &new);
639}
640
Rafał Miłecki09146402010-01-15 15:17:10 +0100[diff] [blame]641/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
642static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
643{
644 u16 array[4];
645 int i;
646
647 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
648 for (i = 0; i < 4; i++)
649 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
650
651 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
652 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
653 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]);
654 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
655}
656
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]657/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]658static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
659 const u16 *clip_st)
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]660{
661 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
662 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
663}
664
665/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
666static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
667{
668 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
669 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
670}
671
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]672/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SuperSwitchInit */
673static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
674{
675 if (dev->phy.rev >= 3) {
676 if (!init)
677 return;
678 if (0 /* FIXME */) {
679 b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211);
680 b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222);
681 b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144);
682 b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188);
683 }
684 } else {
685 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0);
686 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0);
687
688 ssb_chipco_gpio_control(&dev->dev->bus->chipco, 0xFC00,
689 0xFC00);
690 b43_write32(dev, B43_MMIO_MACCTL,
691 b43_read32(dev, B43_MMIO_MACCTL) &
692 ~B43_MACCTL_GPOUTSMSK);
693 b43_write16(dev, B43_MMIO_GPIO_MASK,
694 b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
695 b43_write16(dev, B43_MMIO_GPIO_CONTROL,
696 b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
697
698 if (init) {
699 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
700 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
701 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
702 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
703 }
704 }
705}
706
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]707/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
708static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
709{
710 u16 tmp;
711
712 if (dev->dev->id.revision == 16)
713 b43_mac_suspend(dev);
714
715 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
716 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
717 B43_NPHY_CLASSCTL_WAITEDEN);
718 tmp &= ~mask;
719 tmp |= (val & mask);
720 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
721
722 if (dev->dev->id.revision == 16)
723 b43_mac_enable(dev);
724
725 return tmp;
726}
727
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]728/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
729static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
730{
731 struct b43_phy *phy = &dev->phy;
732 struct b43_phy_n *nphy = phy->n;
733
734 if (enable) {
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]735 static const u16 clip[] = { 0xFFFF, 0xFFFF };
Rafał Miłecki5c1a1402010-01-15 15:10:54 +0100[diff] [blame]736 if (nphy->deaf_count++ == 0) {
737 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
738 b43_nphy_classifier(dev, 0x7, 0);
739 b43_nphy_read_clip_detection(dev, nphy->clip_state);
740 b43_nphy_write_clip_detection(dev, clip);
741 }
742 b43_nphy_reset_cca(dev);
743 } else {
744 if (--nphy->deaf_count == 0) {
745 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
746 b43_nphy_write_clip_detection(dev, nphy->clip_state);
747 }
748 }
749}
750
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]751/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
752static void b43_nphy_stop_playback(struct b43_wldev *dev)
753{
754 struct b43_phy_n *nphy = dev->phy.n;
755 u16 tmp;
756
757 if (nphy->hang_avoid)
758 b43_nphy_stay_in_carrier_search(dev, 1);
759
760 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT);
761 if (tmp & 0x1)
762 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
763 else if (tmp & 0x2)
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]764 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]765
766 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);
767
768 if (nphy->bb_mult_save & 0x80000000) {
769 tmp = nphy->bb_mult_save & 0xFFFF;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]770 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]771 nphy->bb_mult_save = 0;
772 }
773
774 if (nphy->hang_avoid)
775 b43_nphy_stay_in_carrier_search(dev, 0);
776}
777
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]778/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SpurWar */
779static void b43_nphy_spur_workaround(struct b43_wldev *dev)
780{
781 struct b43_phy_n *nphy = dev->phy.n;
782
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]783 u8 channel = dev->phy.channel;
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]784 int tone[2] = { 57, 58 };
785 u32 noise[2] = { 0x3FF, 0x3FF };
786
787 B43_WARN_ON(dev->phy.rev < 3);
788
789 if (nphy->hang_avoid)
790 b43_nphy_stay_in_carrier_search(dev, 1);
791
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]792 if (nphy->gband_spurwar_en) {
793 /* TODO: N PHY Adjust Analog Pfbw (7) */
794 if (channel == 11 && dev->phy.is_40mhz)
795 ; /* TODO: N PHY Adjust Min Noise Var(2, tone, noise)*/
796 else
797 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
798 /* TODO: N PHY Adjust CRS Min Power (0x1E) */
799 }
800
801 if (nphy->aband_spurwar_en) {
802 if (channel == 54) {
803 tone[0] = 0x20;
804 noise[0] = 0x25F;
805 } else if (channel == 38 || channel == 102 || channel == 118) {
806 if (0 /* FIXME */) {
807 tone[0] = 0x20;
808 noise[0] = 0x21F;
809 } else {
810 tone[0] = 0;
811 noise[0] = 0;
812 }
813 } else if (channel == 134) {
814 tone[0] = 0x20;
815 noise[0] = 0x21F;
816 } else if (channel == 151) {
817 tone[0] = 0x10;
818 noise[0] = 0x23F;
819 } else if (channel == 153 || channel == 161) {
820 tone[0] = 0x30;
821 noise[0] = 0x23F;
822 } else {
823 tone[0] = 0;
824 noise[0] = 0;
825 }
826
827 if (!tone[0] && !noise[0])
828 ; /* TODO: N PHY Adjust Min Noise Var(1, tone, noise)*/
829 else
830 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
831 }
832
833 if (nphy->hang_avoid)
834 b43_nphy_stay_in_carrier_search(dev, 0);
835}
836
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]837/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/AdjustLnaGainTbl */
838static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
839{
840 struct b43_phy_n *nphy = dev->phy.n;
841
842 u8 i;
843 s16 tmp;
844 u16 data[4];
845 s16 gain[2];
846 u16 minmax[2];
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]847 static const u16 lna_gain[4] = { -2, 10, 19, 25 };
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]848
849 if (nphy->hang_avoid)
850 b43_nphy_stay_in_carrier_search(dev, 1);
851
852 if (nphy->gain_boost) {
853 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
854 gain[0] = 6;
855 gain[1] = 6;
856 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]857 tmp = 40370 - 315 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]858 gain[0] = ((tmp >> 13) + ((tmp >> 12) & 1));
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]859 tmp = 23242 - 224 * dev->phy.channel;
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]860 gain[1] = ((tmp >> 13) + ((tmp >> 12) & 1));
861 }
862 } else {
863 gain[0] = 0;
864 gain[1] = 0;
865 }
866
867 for (i = 0; i < 2; i++) {
868 if (nphy->elna_gain_config) {
869 data[0] = 19 + gain[i];
870 data[1] = 25 + gain[i];
871 data[2] = 25 + gain[i];
872 data[3] = 25 + gain[i];
873 } else {
874 data[0] = lna_gain[0] + gain[i];
875 data[1] = lna_gain[1] + gain[i];
876 data[2] = lna_gain[2] + gain[i];
877 data[3] = lna_gain[3] + gain[i];
878 }
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]879 b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data);
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]880
881 minmax[i] = 23 + gain[i];
882 }
883
884 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, ~B43_NPHY_C1_MINGAIN,
885 minmax[0] << B43_NPHY_C1_MINGAIN_SHIFT);
886 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, ~B43_NPHY_C2_MINGAIN,
887 minmax[1] << B43_NPHY_C2_MINGAIN_SHIFT);
888
889 if (nphy->hang_avoid)
890 b43_nphy_stay_in_carrier_search(dev, 0);
891}
892
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]893/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]894static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]895{
896 struct b43_phy_n *nphy = dev->phy.n;
897 u8 i, j;
898 u8 code;
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]899 u16 tmp;
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]900
901 /* TODO: for PHY >= 3
902 s8 *lna1_gain, *lna2_gain;
903 u8 *gain_db, *gain_bits;
904 u16 *rfseq_init;
905 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
906 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
907 */
908
909 u8 rfseq_events[3] = { 6, 8, 7 };
910 u8 rfseq_delays[3] = { 10, 30, 1 };
911
912 if (dev->phy.rev >= 3) {
913 /* TODO */
914 } else {
915 /* Set Clip 2 detect */
916 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
917 B43_NPHY_C1_CGAINI_CL2DETECT);
918 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
919 B43_NPHY_C2_CGAINI_CL2DETECT);
920
921 /* Set narrowband clip threshold */
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]922 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
923 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]924
925 if (!dev->phy.is_40mhz) {
926 /* Set dwell lengths */
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]927 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
928 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
929 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
930 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]931 }
932
933 /* Set wideband clip 2 threshold */
934 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
935 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
936 21);
937 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
938 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
939 21);
940
941 if (!dev->phy.is_40mhz) {
942 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
943 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
944 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
945 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
946 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
947 ~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
948 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
949 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
950 }
951
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]952 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]953
954 if (nphy->gain_boost) {
955 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
956 dev->phy.is_40mhz)
957 code = 4;
958 else
959 code = 5;
960 } else {
961 code = dev->phy.is_40mhz ? 6 : 7;
962 }
963
964 /* Set HPVGA2 index */
965 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
966 ~B43_NPHY_C1_INITGAIN_HPVGA2,
967 code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
968 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
969 ~B43_NPHY_C2_INITGAIN_HPVGA2,
970 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
971
972 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]973 /* specs say about 2 loops, but wl does 4 */
974 for (i = 0; i < 4; i++)
975 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
976 (code << 8 | 0x7C));
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]977
Rafał Miłeckid24019a2010-02-27 13:03:38 +0100[diff] [blame]978 b43_nphy_adjust_lna_gain_table(dev);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]979
980 if (nphy->elna_gain_config) {
981 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
982 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
983 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
984 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
985 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
986
987 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
988 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
989 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
990 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
991 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
992
993 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]994 /* specs say about 2 loops, but wl does 4 */
995 for (i = 0; i < 4; i++)
996 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
997 (code << 8 | 0x74));
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]998 }
999
1000 if (dev->phy.rev == 2) {
1001 for (i = 0; i < 4; i++) {
1002 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1003 (0x0400 * i) + 0x0020);
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1004 for (j = 0; j < 21; j++) {
1005 tmp = j * (i < 2 ? 3 : 1);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1006 b43_phy_write(dev,
Rafał Miłeckic0f05b92010-11-18 13:27:58 +0100[diff] [blame]1007 B43_NPHY_TABLE_DATALO, tmp);
1008 }
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1009 }
1010
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1011 b43_nphy_set_rf_sequence(dev, 5,
1012 rfseq_events, rfseq_delays, 3);
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1013 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1014 ~B43_NPHY_OVER_DGAIN_CCKDGECV & 0xFFFF,
Rafał Miłeckief5127a2010-01-30 00:12:20 +0100[diff] [blame]1015 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
1016
1017 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
1018 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
1019 0xFF80, 4);
1020 }
1021 }
1022}
1023
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1024/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
1025static void b43_nphy_workarounds(struct b43_wldev *dev)
1026{
1027 struct ssb_bus *bus = dev->dev->bus;
1028 struct b43_phy *phy = &dev->phy;
1029 struct b43_phy_n *nphy = phy->n;
1030
1031 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
1032 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
1033
1034 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1035 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1036
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]1037 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1038 b43_nphy_classifier(dev, 1, 0);
1039 else
1040 b43_nphy_classifier(dev, 1, 1);
1041
1042 if (nphy->hang_avoid)
1043 b43_nphy_stay_in_carrier_search(dev, 1);
1044
1045 b43_phy_set(dev, B43_NPHY_IQFLIP,
1046 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
1047
1048 if (dev->phy.rev >= 3) {
1049 /* TODO */
1050 } else {
1051 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
1052 nphy->band5g_pwrgain) {
1053 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
1054 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
1055 } else {
1056 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
1057 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
1058 }
1059
1060 /* TODO: convert to b43_ntab_write? */
1061 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
1062 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1063 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
1064 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
1065 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
1066 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1067 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
1068 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
1069
1070 if (dev->phy.rev < 2) {
1071 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
1072 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1073 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
1074 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
1075 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
1076 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1077 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
1078 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
1079 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
1080 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1081 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
1082 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
1083 }
1084
1085 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
1086 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
1087 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
1088 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
1089
1090 if (bus->sprom.boardflags2_lo & 0x100 &&
1091 bus->boardinfo.type == 0x8B) {
1092 delays1[0] = 0x1;
1093 delays1[5] = 0x14;
1094 }
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1095 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
1096 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1097
Gábor Stefanike723ef32010-08-16 22:39:15 +0200[diff] [blame]1098 b43_nphy_gain_ctrl_workarounds(dev);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1099
1100 if (dev->phy.rev < 2) {
1101 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
Gábor Stefanike7f45d32010-08-16 22:39:14 +0200[diff] [blame]1102 b43_hf_write(dev, b43_hf_read(dev) |
1103 B43_HF_MLADVW);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1104 } else if (dev->phy.rev == 2) {
1105 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
1106 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
1107 }
1108
1109 if (dev->phy.rev < 2)
1110 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
1111 ~B43_NPHY_SCRAM_SIGCTL_SCM);
1112
1113 /* Set phase track alpha and beta */
1114 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1115 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1116 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1117 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1118 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1119 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1120
1121 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]1122 ~B43_NPHY_PIL_DW_64QAM & 0xFFFF);
Rafał Miłecki28fd7da2010-01-30 00:12:19 +0100[diff] [blame]1123 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1124 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1125 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1126
1127 if (dev->phy.rev == 2)
1128 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1129 B43_NPHY_FINERX2_CGC_DECGC);
1130 }
1131
1132 if (nphy->hang_avoid)
1133 b43_nphy_stay_in_carrier_search(dev, 0);
1134}
1135
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1136/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/LoadSampleTable */
1137static int b43_nphy_load_samples(struct b43_wldev *dev,
1138 struct b43_c32 *samples, u16 len) {
1139 struct b43_phy_n *nphy = dev->phy.n;
1140 u16 i;
1141 u32 *data;
1142
1143 data = kzalloc(len * sizeof(u32), GFP_KERNEL);
1144 if (!data) {
1145 b43err(dev->wl, "allocation for samples loading failed\n");
1146 return -ENOMEM;
1147 }
1148 if (nphy->hang_avoid)
1149 b43_nphy_stay_in_carrier_search(dev, 1);
1150
1151 for (i = 0; i < len; i++) {
1152 data[i] = (samples[i].i & 0x3FF << 10);
1153 data[i] |= samples[i].q & 0x3FF;
1154 }
1155 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data);
1156
1157 kfree(data);
1158 if (nphy->hang_avoid)
1159 b43_nphy_stay_in_carrier_search(dev, 0);
1160 return 0;
1161}
1162
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1163/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GenLoadSamples */
1164static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1165 bool test)
1166{
1167 int i;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1168 u16 bw, len, rot, angle;
Larry Fingerda860472010-01-26 16:42:02 -0600[diff] [blame]1169 struct b43_c32 *samples;
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1170
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1171
1172 bw = (dev->phy.is_40mhz) ? 40 : 20;
1173 len = bw << 3;
1174
1175 if (test) {
1176 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX)
1177 bw = 82;
1178 else
1179 bw = 80;
1180
1181 if (dev->phy.is_40mhz)
1182 bw <<= 1;
1183
1184 len = bw << 1;
1185 }
1186
Joe Perchesbaeb2ff2010-08-11 07:02:48 +0000[diff] [blame]1187 samples = kcalloc(len, sizeof(struct b43_c32), GFP_KERNEL);
Rafał Miłecki40bd5202010-02-04 13:11:54 +0100[diff] [blame]1188 if (!samples) {
1189 b43err(dev->wl, "allocation for samples generation failed\n");
1190 return 0;
1191 }
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1192 rot = (((freq * 36) / bw) << 16) / 100;
1193 angle = 0;
1194
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1195 for (i = 0; i < len; i++) {
1196 samples[i] = b43_cordic(angle);
1197 angle += rot;
1198 samples[i].q = CORDIC_CONVERT(samples[i].q * max);
1199 samples[i].i = CORDIC_CONVERT(samples[i].i * max);
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1200 }
1201
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1202 i = b43_nphy_load_samples(dev, samples, len);
Rafał Miłeckif2982182010-01-25 19:00:01 +0100[diff] [blame]1203 kfree(samples);
Rafał Miłecki5f6393e2010-02-04 13:08:08 +0100[diff] [blame]1204 return (i < 0) ? 0 : len;
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1205}
1206
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]1207/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RunSamples */
1208static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
1209 u16 wait, bool iqmode, bool dac_test)
1210{
1211 struct b43_phy_n *nphy = dev->phy.n;
1212 int i;
1213 u16 seq_mode;
1214 u32 tmp;
1215
1216 if (nphy->hang_avoid)
1217 b43_nphy_stay_in_carrier_search(dev, true);
1218
1219 if ((nphy->bb_mult_save & 0x80000000) == 0) {
1220 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87));
1221 nphy->bb_mult_save = (tmp & 0xFFFF) | 0x80000000;
1222 }
1223
1224 if (!dev->phy.is_40mhz)
1225 tmp = 0x6464;
1226 else
1227 tmp = 0x4747;
1228 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
1229
1230 if (nphy->hang_avoid)
1231 b43_nphy_stay_in_carrier_search(dev, false);
1232
1233 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1));
1234
1235 if (loops != 0xFFFF)
1236 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1));
1237 else
1238 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops);
1239
1240 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait);
1241
1242 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
1243
1244 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER);
1245 if (iqmode) {
1246 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
1247 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000);
1248 } else {
1249 if (dac_test)
1250 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 5);
1251 else
1252 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 1);
1253 }
1254 for (i = 0; i < 100; i++) {
1255 if (b43_phy_read(dev, B43_NPHY_RFSEQST) & 1) {
1256 i = 0;
1257 break;
1258 }
1259 udelay(10);
1260 }
1261 if (i)
1262 b43err(dev->wl, "run samples timeout\n");
1263
1264 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
1265}
1266
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]1267/*
1268 * Transmits a known value for LO calibration
1269 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/TXTone
1270 */
1271static int b43_nphy_tx_tone(struct b43_wldev *dev, u32 freq, u16 max_val,
1272 bool iqmode, bool dac_test)
1273{
1274 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test);
1275 if (samp == 0)
1276 return -1;
1277 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test);
1278 return 0;
1279}
1280
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1281/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */
1282static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
1283{
1284 struct b43_phy_n *nphy = dev->phy.n;
1285 int i, j;
1286 u32 tmp;
1287 u32 cur_real, cur_imag, real_part, imag_part;
1288
1289 u16 buffer[7];
1290
1291 if (nphy->hang_avoid)
1292 b43_nphy_stay_in_carrier_search(dev, true);
1293
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]1294 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]1295
1296 for (i = 0; i < 2; i++) {
1297 tmp = ((buffer[i * 2] & 0x3FF) << 10) |
1298 (buffer[i * 2 + 1] & 0x3FF);
1299 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1300 (((i + 26) << 10) | 320));
1301 for (j = 0; j < 128; j++) {
1302 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1303 ((tmp >> 16) & 0xFFFF));
1304 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1305 (tmp & 0xFFFF));
1306 }
1307 }
1308
1309 for (i = 0; i < 2; i++) {
1310 tmp = buffer[5 + i];
1311 real_part = (tmp >> 8) & 0xFF;
1312 imag_part = (tmp & 0xFF);
1313 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1314 (((i + 26) << 10) | 448));
1315
1316 if (dev->phy.rev >= 3) {
1317 cur_real = real_part;
1318 cur_imag = imag_part;
1319 tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF);
1320 }
1321
1322 for (j = 0; j < 128; j++) {
1323 if (dev->phy.rev < 3) {
1324 cur_real = (real_part * loscale[j] + 128) >> 8;
1325 cur_imag = (imag_part * loscale[j] + 128) >> 8;
1326 tmp = ((cur_real & 0xFF) << 8) |
1327 (cur_imag & 0xFF);
1328 }
1329 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1330 ((tmp >> 16) & 0xFFFF));
1331 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1332 (tmp & 0xFFFF));
1333 }
1334 }
1335
1336 if (dev->phy.rev >= 3) {
1337 b43_shm_write16(dev, B43_SHM_SHARED,
1338 B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF);
1339 b43_shm_write16(dev, B43_SHM_SHARED,
1340 B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF);
1341 }
1342
1343 if (nphy->hang_avoid)
1344 b43_nphy_stay_in_carrier_search(dev, false);
1345}
1346
Rafał Miłecki9501fef2010-01-30 20:18:07 +0100[diff] [blame]1347/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
1348static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
1349 u8 *events, u8 *delays, u8 length)
1350{
1351 struct b43_phy_n *nphy = dev->phy.n;
1352 u8 i;
1353 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
1354 u16 offset1 = cmd << 4;
1355 u16 offset2 = offset1 + 0x80;
1356
1357 if (nphy->hang_avoid)
1358 b43_nphy_stay_in_carrier_search(dev, true);
1359
1360 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
1361 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
1362
1363 for (i = length; i < 16; i++) {
1364 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
1365 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
1366 }
1367
1368 if (nphy->hang_avoid)
1369 b43_nphy_stay_in_carrier_search(dev, false);
1370}
1371
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]1372/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1373static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
1374 enum b43_nphy_rf_sequence seq)
1375{
1376 static const u16 trigger[] = {
1377 [B43_RFSEQ_RX2TX] = B43_NPHY_RFSEQTR_RX2TX,
1378 [B43_RFSEQ_TX2RX] = B43_NPHY_RFSEQTR_TX2RX,
1379 [B43_RFSEQ_RESET2RX] = B43_NPHY_RFSEQTR_RST2RX,
1380 [B43_RFSEQ_UPDATE_GAINH] = B43_NPHY_RFSEQTR_UPGH,
1381 [B43_RFSEQ_UPDATE_GAINL] = B43_NPHY_RFSEQTR_UPGL,
1382 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
1383 };
1384 int i;
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1385 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1386
1387 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
1388
1389 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
1390 B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER);
1391 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]);
1392 for (i = 0; i < 200; i++) {
1393 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq]))
1394 goto ok;
1395 msleep(1);
1396 }
1397 b43err(dev->wl, "RF sequence status timeout\n");
1398ok:
Rafał Miłeckic57199b2010-01-17 13:04:08 +0100[diff] [blame]1399 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1400}
1401
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1402/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
1403static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
1404 u16 value, u8 core, bool off)
1405{
1406 int i;
1407 u8 index = fls(field);
1408 u8 addr, en_addr, val_addr;
1409 /* we expect only one bit set */
Rafał Miłecki3ed0fac2010-01-25 18:59:58 +0100[diff] [blame]1410 B43_WARN_ON(field & (~(1 << (index - 1))));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]1411
1412 if (dev->phy.rev >= 3) {
1413 const struct nphy_rf_control_override_rev3 *rf_ctrl;
1414 for (i = 0; i < 2; i++) {
1415 if (index == 0 || index == 16) {
1416 b43err(dev->wl,
1417 "Unsupported RF Ctrl Override call\n");
1418 return;
1419 }
1420
1421 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
1422 en_addr = B43_PHY_N((i == 0) ?
1423 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
1424 val_addr = B43_PHY_N((i == 0) ?
1425 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
1426
1427 if (off) {
1428 b43_phy_mask(dev, en_addr, ~(field));
1429 b43_phy_mask(dev, val_addr,
1430 ~(rf_ctrl->val_mask));
1431 } else {
1432 if (core == 0 || ((1 << core) & i) != 0) {
1433 b43_phy_set(dev, en_addr, field);
1434 b43_phy_maskset(dev, val_addr,
1435 ~(rf_ctrl->val_mask),
1436 (value << rf_ctrl->val_shift));
1437 }
1438 }
1439 }
1440 } else {
1441 const struct nphy_rf_control_override_rev2 *rf_ctrl;
1442 if (off) {
1443 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
1444 value = 0;
1445 } else {
1446 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
1447 }
1448
1449 for (i = 0; i < 2; i++) {
1450 if (index <= 1 || index == 16) {
1451 b43err(dev->wl,
1452 "Unsupported RF Ctrl Override call\n");
1453 return;
1454 }
1455
1456 if (index == 2 || index == 10 ||
1457 (index >= 13 && index <= 15)) {
1458 core = 1;
1459 }
1460
1461 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
1462 addr = B43_PHY_N((i == 0) ?
1463 rf_ctrl->addr0 : rf_ctrl->addr1);
1464
1465 if ((core & (1 << i)) != 0)
1466 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
1467 (value << rf_ctrl->shift));
1468
1469 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
1470 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1471 B43_NPHY_RFCTL_CMD_START);
1472 udelay(1);
1473 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
1474 }
1475 }
1476}
1477
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]1478/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
1479static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1480 u16 value, u8 core)
1481{
1482 u8 i, j;
1483 u16 reg, tmp, val;
1484
1485 B43_WARN_ON(dev->phy.rev < 3);
1486 B43_WARN_ON(field > 4);
1487
1488 for (i = 0; i < 2; i++) {
1489 if ((core == 1 && i == 1) || (core == 2 && !i))
1490 continue;
1491
1492 reg = (i == 0) ?
1493 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
1494 b43_phy_mask(dev, reg, 0xFBFF);
1495
1496 switch (field) {
1497 case 0:
1498 b43_phy_write(dev, reg, 0);
1499 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
1500 break;
1501 case 1:
1502 if (!i) {
1503 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
1504 0xFC3F, (value << 6));
1505 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
1506 0xFFFE, 1);
1507 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1508 B43_NPHY_RFCTL_CMD_START);
1509 for (j = 0; j < 100; j++) {
1510 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
1511 j = 0;
1512 break;
1513 }
1514 udelay(10);
1515 }
1516 if (j)
1517 b43err(dev->wl,
1518 "intc override timeout\n");
1519 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
1520 0xFFFE);
1521 } else {
1522 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
1523 0xFC3F, (value << 6));
1524 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1525 0xFFFE, 1);
1526 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1527 B43_NPHY_RFCTL_CMD_RXTX);
1528 for (j = 0; j < 100; j++) {
1529 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
1530 j = 0;
1531 break;
1532 }
1533 udelay(10);
1534 }
1535 if (j)
1536 b43err(dev->wl,
1537 "intc override timeout\n");
1538 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
1539 0xFFFE);
1540 }
1541 break;
1542 case 2:
1543 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1544 tmp = 0x0020;
1545 val = value << 5;
1546 } else {
1547 tmp = 0x0010;
1548 val = value << 4;
1549 }
1550 b43_phy_maskset(dev, reg, ~tmp, val);
1551 break;
1552 case 3:
1553 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1554 tmp = 0x0001;
1555 val = value;
1556 } else {
1557 tmp = 0x0004;
1558 val = value << 2;
1559 }
1560 b43_phy_maskset(dev, reg, ~tmp, val);
1561 break;
1562 case 4:
1563 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1564 tmp = 0x0002;
1565 val = value << 1;
1566 } else {
1567 tmp = 0x0008;
1568 val = value << 3;
1569 }
1570 b43_phy_maskset(dev, reg, ~tmp, val);
1571 break;
1572 }
1573 }
1574}
1575
Rafał Miłeckibec18642010-11-18 13:28:00 +0100[diff] [blame]1576/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1577static void b43_nphy_bphy_init(struct b43_wldev *dev)
1578{
1579 unsigned int i;
1580 u16 val;
1581
1582 val = 0x1E1F;
Rafał Miłeckifee613b2010-11-18 21:11:41 +0100[diff] [blame]1583 for (i = 0; i < 16; i++) {
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1584 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
1585 val -= 0x202;
1586 }
1587 val = 0x3E3F;
1588 for (i = 0; i < 16; i++) {
Rafał Miłeckifee613b2010-11-18 21:11:41 +0100[diff] [blame]1589 b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1590 val -= 0x202;
1591 }
1592 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
1593}
1594
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1595/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
1596static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1597 s8 offset, u8 core, u8 rail, u8 type)
1598{
1599 u16 tmp;
1600 bool core1or5 = (core == 1) || (core == 5);
1601 bool core2or5 = (core == 2) || (core == 5);
1602
1603 offset = clamp_val(offset, -32, 31);
1604 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1605
1606 if (core1or5 && (rail == 0) && (type == 2))
1607 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1608 if (core1or5 && (rail == 1) && (type == 2))
1609 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1610 if (core2or5 && (rail == 0) && (type == 2))
1611 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1612 if (core2or5 && (rail == 1) && (type == 2))
1613 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1614 if (core1or5 && (rail == 0) && (type == 0))
1615 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1616 if (core1or5 && (rail == 1) && (type == 0))
1617 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1618 if (core2or5 && (rail == 0) && (type == 0))
1619 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1620 if (core2or5 && (rail == 1) && (type == 0))
1621 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1622 if (core1or5 && (rail == 0) && (type == 1))
1623 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1624 if (core1or5 && (rail == 1) && (type == 1))
1625 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1626 if (core2or5 && (rail == 0) && (type == 1))
1627 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1628 if (core2or5 && (rail == 1) && (type == 1))
1629 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1630 if (core1or5 && (rail == 0) && (type == 6))
1631 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1632 if (core1or5 && (rail == 1) && (type == 6))
1633 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1634 if (core2or5 && (rail == 0) && (type == 6))
1635 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1636 if (core2or5 && (rail == 1) && (type == 6))
1637 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1638 if (core1or5 && (rail == 0) && (type == 3))
1639 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1640 if (core1or5 && (rail == 1) && (type == 3))
1641 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1642 if (core2or5 && (rail == 0) && (type == 3))
1643 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1644 if (core2or5 && (rail == 1) && (type == 3))
1645 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1646 if (core1or5 && (type == 4))
1647 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1648 if (core2or5 && (type == 4))
1649 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1650 if (core1or5 && (type == 5))
1651 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1652 if (core2or5 && (type == 5))
1653 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1654}
1655
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1656static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1657{
1658 u16 val;
1659
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1660 if (type < 3)
1661 val = 0;
1662 else if (type == 6)
1663 val = 1;
1664 else if (type == 3)
1665 val = 2;
1666 else
1667 val = 3;
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1668
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1669 val = (val << 12) | (val << 14);
1670 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
1671 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1672
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1673 if (type < 3) {
1674 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
1675 (type + 1) << 4);
1676 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
1677 (type + 1) << 4);
1678 }
1679
1680 /* TODO use some definitions */
1681 if (code == 0) {
1682 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1683 if (type < 3) {
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1684 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0);
1685 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0);
1686 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0);
1687 udelay(20);
1688 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1689 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1690 } else {
1691 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF,
1692 0x3000);
1693 if (type < 3) {
1694 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1695 0xFEC7, 0x0180);
1696 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1697 0xEFDC, (code << 1 | 0x1021));
1698 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1);
1699 udelay(20);
1700 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
Rafał Miłecki3c956272010-01-15 14:38:32 +0100[diff] [blame]1701 }
1702 }
1703}
1704
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1705static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1706{
Rafał Miłecki6e3b15a2010-01-30 20:18:04 +0100[diff] [blame]1707 struct b43_phy_n *nphy = dev->phy.n;
1708 u8 i;
1709 u16 reg, val;
1710
1711 if (code == 0) {
1712 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
1713 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
1714 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
1715 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
1716 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
1717 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
1718 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
1719 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
1720 } else {
1721 for (i = 0; i < 2; i++) {
1722 if ((code == 1 && i == 1) || (code == 2 && !i))
1723 continue;
1724
1725 reg = (i == 0) ?
1726 B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
1727 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
1728
1729 if (type < 3) {
1730 reg = (i == 0) ?
1731 B43_NPHY_AFECTL_C1 :
1732 B43_NPHY_AFECTL_C2;
1733 b43_phy_maskset(dev, reg, 0xFCFF, 0);
1734
1735 reg = (i == 0) ?
1736 B43_NPHY_RFCTL_LUT_TRSW_UP1 :
1737 B43_NPHY_RFCTL_LUT_TRSW_UP2;
1738 b43_phy_maskset(dev, reg, 0xFFC3, 0);
1739
1740 if (type == 0)
1741 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
1742 else if (type == 1)
1743 val = 16;
1744 else
1745 val = 32;
1746 b43_phy_set(dev, reg, val);
1747
1748 reg = (i == 0) ?
1749 B43_NPHY_TXF_40CO_B1S0 :
1750 B43_NPHY_TXF_40CO_B32S1;
1751 b43_phy_set(dev, reg, 0x0020);
1752 } else {
1753 if (type == 6)
1754 val = 0x0100;
1755 else if (type == 3)
1756 val = 0x0200;
1757 else
1758 val = 0x0300;
1759
1760 reg = (i == 0) ?
1761 B43_NPHY_AFECTL_C1 :
1762 B43_NPHY_AFECTL_C2;
1763
1764 b43_phy_maskset(dev, reg, 0xFCFF, val);
1765 b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
1766
1767 if (type != 3 && type != 6) {
1768 enum ieee80211_band band =
1769 b43_current_band(dev->wl);
1770
1771 if ((nphy->ipa2g_on &&
1772 band == IEEE80211_BAND_2GHZ) ||
1773 (nphy->ipa5g_on &&
1774 band == IEEE80211_BAND_5GHZ))
1775 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
1776 else
1777 val = 0x11;
1778 reg = (i == 0) ? 0x2000 : 0x3000;
1779 reg |= B2055_PADDRV;
1780 b43_radio_write16(dev, reg, val);
1781
1782 reg = (i == 0) ?
1783 B43_NPHY_AFECTL_OVER1 :
1784 B43_NPHY_AFECTL_OVER;
1785 b43_phy_set(dev, reg, 0x0200);
1786 }
1787 }
1788 }
1789 }
Rafał Miłecki99b82c42010-01-30 20:18:03 +0100[diff] [blame]1790}
1791
1792/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
1793static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1794{
1795 if (dev->phy.rev >= 3)
1796 b43_nphy_rev3_rssi_select(dev, code, type);
1797 else
1798 b43_nphy_rev2_rssi_select(dev, code, type);
1799}
1800
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1801/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
1802static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
1803{
1804 int i;
1805 for (i = 0; i < 2; i++) {
1806 if (type == 2) {
1807 if (i == 0) {
1808 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM,
1809 0xFC, buf[0]);
1810 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1811 0xFC, buf[1]);
1812 } else {
1813 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM,
1814 0xFC, buf[2 * i]);
1815 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1816 0xFC, buf[2 * i + 1]);
1817 }
1818 } else {
1819 if (i == 0)
1820 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1821 0xF3, buf[0] << 2);
1822 else
1823 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1824 0xF3, buf[2 * i + 1] << 2);
1825 }
1826 }
1827}
1828
1829/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PollRssi */
1830static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1831 u8 nsamp)
1832{
1833 int i;
1834 int out;
1835 u16 save_regs_phy[9];
1836 u16 s[2];
1837
1838 if (dev->phy.rev >= 3) {
1839 save_regs_phy[0] = b43_phy_read(dev,
1840 B43_NPHY_RFCTL_LUT_TRSW_UP1);
1841 save_regs_phy[1] = b43_phy_read(dev,
1842 B43_NPHY_RFCTL_LUT_TRSW_UP2);
1843 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1844 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1845 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
1846 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1847 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1848 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
Rafał Miłeckia529cec2010-11-18 21:11:42 +0100[diff] [blame^]1849 } else if (dev->phy.rev == 2) {
1850 save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1851 save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1852 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1853 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD);
1854 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
1855 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
1856 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1857 }
1858
1859 b43_nphy_rssi_select(dev, 5, type);
1860
1861 if (dev->phy.rev < 2) {
1862 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL);
1863 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5);
1864 }
1865
1866 for (i = 0; i < 4; i++)
1867 buf[i] = 0;
1868
1869 for (i = 0; i < nsamp; i++) {
1870 if (dev->phy.rev < 2) {
1871 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT);
1872 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT);
1873 } else {
1874 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1);
1875 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2);
1876 }
1877
1878 buf[0] += ((s8)((s[0] & 0x3F) << 2)) >> 2;
1879 buf[1] += ((s8)(((s[0] >> 8) & 0x3F) << 2)) >> 2;
1880 buf[2] += ((s8)((s[1] & 0x3F) << 2)) >> 2;
1881 buf[3] += ((s8)(((s[1] >> 8) & 0x3F) << 2)) >> 2;
1882 }
1883 out = (buf[0] & 0xFF) << 24 | (buf[1] & 0xFF) << 16 |
1884 (buf[2] & 0xFF) << 8 | (buf[3] & 0xFF);
1885
1886 if (dev->phy.rev < 2)
1887 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]);
1888
1889 if (dev->phy.rev >= 3) {
1890 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1,
1891 save_regs_phy[0]);
1892 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2,
1893 save_regs_phy[1]);
1894 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[2]);
1895 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[3]);
1896 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]);
1897 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
1898 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
1899 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
Rafał Miłeckia529cec2010-11-18 21:11:42 +0100[diff] [blame^]1900 } else if (dev->phy.rev == 2) {
1901 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]);
1902 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]);
1903 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]);
1904 b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]);
1905 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]);
1906 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]);
1907 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]);
Rafał Miłeckidfb4aa52010-01-15 14:45:13 +0100[diff] [blame]1908 }
1909
1910 return out;
1911}
1912
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]1913/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
1914static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]1915{
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]1916 int i, j;
1917 u8 state[4];
1918 u8 code, val;
1919 u16 class, override;
1920 u8 regs_save_radio[2];
1921 u16 regs_save_phy[2];
1922 s8 offset[4];
1923
1924 u16 clip_state[2];
1925 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
1926 s32 results_min[4] = { };
1927 u8 vcm_final[4] = { };
1928 s32 results[4][4] = { };
1929 s32 miniq[4][2] = { };
1930
1931 if (type == 2) {
1932 code = 0;
1933 val = 6;
1934 } else if (type < 2) {
1935 code = 25;
1936 val = 4;
1937 } else {
1938 B43_WARN_ON(1);
1939 return;
1940 }
1941
1942 class = b43_nphy_classifier(dev, 0, 0);
1943 b43_nphy_classifier(dev, 7, 4);
1944 b43_nphy_read_clip_detection(dev, clip_state);
1945 b43_nphy_write_clip_detection(dev, clip_off);
1946
1947 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1948 override = 0x140;
1949 else
1950 override = 0x110;
1951
1952 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
1953 regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
1954 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
1955 b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
1956
1957 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
1958 regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
1959 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
1960 b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
1961
1962 state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
1963 state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
1964 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
1965 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
1966 state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
1967 state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
1968
1969 b43_nphy_rssi_select(dev, 5, type);
1970 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
1971 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
1972
1973 for (i = 0; i < 4; i++) {
1974 u8 tmp[4];
1975 for (j = 0; j < 4; j++)
1976 tmp[j] = i;
1977 if (type != 1)
1978 b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
1979 b43_nphy_poll_rssi(dev, type, results[i], 8);
1980 if (type < 2)
1981 for (j = 0; j < 2; j++)
1982 miniq[i][j] = min(results[i][2 * j],
1983 results[i][2 * j + 1]);
1984 }
1985
1986 for (i = 0; i < 4; i++) {
1987 s32 mind = 40;
1988 u8 minvcm = 0;
1989 s32 minpoll = 249;
1990 s32 curr;
1991 for (j = 0; j < 4; j++) {
1992 if (type == 2)
1993 curr = abs(results[j][i]);
1994 else
1995 curr = abs(miniq[j][i / 2] - code * 8);
1996
1997 if (curr < mind) {
1998 mind = curr;
1999 minvcm = j;
2000 }
2001
2002 if (results[j][i] < minpoll)
2003 minpoll = results[j][i];
2004 }
2005 results_min[i] = minpoll;
2006 vcm_final[i] = minvcm;
2007 }
2008
2009 if (type != 1)
2010 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
2011
2012 for (i = 0; i < 4; i++) {
2013 offset[i] = (code * 8) - results[vcm_final[i]][i];
2014
2015 if (offset[i] < 0)
2016 offset[i] = -((abs(offset[i]) + 4) / 8);
2017 else
2018 offset[i] = (offset[i] + 4) / 8;
2019
2020 if (results_min[i] == 248)
2021 offset[i] = code - 32;
2022
2023 if (i % 2 == 0)
2024 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
2025 type);
2026 else
2027 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
2028 type);
2029 }
2030
2031 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
2032 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]);
2033
2034 switch (state[2]) {
2035 case 1:
2036 b43_nphy_rssi_select(dev, 1, 2);
2037 break;
2038 case 4:
2039 b43_nphy_rssi_select(dev, 1, 0);
2040 break;
2041 case 2:
2042 b43_nphy_rssi_select(dev, 1, 1);
2043 break;
2044 default:
2045 b43_nphy_rssi_select(dev, 1, 1);
2046 break;
2047 }
2048
2049 switch (state[3]) {
2050 case 1:
2051 b43_nphy_rssi_select(dev, 2, 2);
2052 break;
2053 case 4:
2054 b43_nphy_rssi_select(dev, 2, 0);
2055 break;
2056 default:
2057 b43_nphy_rssi_select(dev, 2, 1);
2058 break;
2059 }
2060
2061 b43_nphy_rssi_select(dev, 0, type);
2062
2063 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
2064 b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
2065 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
2066 b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
2067
2068 b43_nphy_classifier(dev, 7, class);
2069 b43_nphy_write_clip_detection(dev, clip_state);
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]2070}
2071
2072/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
2073static void b43_nphy_rev3_rssi_cal(struct b43_wldev *dev)
2074{
2075 /* TODO */
2076}
2077
2078/*
2079 * RSSI Calibration
2080 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal
2081 */
2082static void b43_nphy_rssi_cal(struct b43_wldev *dev)
2083{
2084 if (dev->phy.rev >= 3) {
2085 b43_nphy_rev3_rssi_cal(dev);
2086 } else {
2087 b43_nphy_rev2_rssi_cal(dev, 2);
2088 b43_nphy_rev2_rssi_cal(dev, 0);
2089 b43_nphy_rev2_rssi_cal(dev, 1);
2090 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]2091}
2092
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]2093/*
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2094 * Restore RSSI Calibration
2095 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
2096 */
2097static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
2098{
2099 struct b43_phy_n *nphy = dev->phy.n;
2100
2101 u16 *rssical_radio_regs = NULL;
2102 u16 *rssical_phy_regs = NULL;
2103
2104 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2105 if (!nphy->rssical_chanspec_2G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2106 return;
2107 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
2108 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
2109 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2110 if (!nphy->rssical_chanspec_5G.center_freq)
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]2111 return;
2112 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
2113 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
2114 }
2115
2116 /* TODO use some definitions */
2117 b43_radio_maskset(dev, 0x602B, 0xE3, rssical_radio_regs[0]);
2118 b43_radio_maskset(dev, 0x702B, 0xE3, rssical_radio_regs[1]);
2119
2120 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]);
2121 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]);
2122 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]);
2123 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]);
2124
2125 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]);
2126 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]);
2127 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]);
2128 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]);
2129
2130 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]);
2131 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]);
2132 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]);
2133 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2134}
2135
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2136/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2137static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2138{
2139 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2140 if (dev->phy.rev >= 6) {
2141 /* TODO If the chip is 47162
2142 return txpwrctrl_tx_gain_ipa_rev5 */
2143 return txpwrctrl_tx_gain_ipa_rev6;
2144 } else if (dev->phy.rev >= 5) {
2145 return txpwrctrl_tx_gain_ipa_rev5;
2146 } else {
2147 return txpwrctrl_tx_gain_ipa;
2148 }
2149 } else {
2150 return txpwrctrl_tx_gain_ipa_5g;
2151 }
2152}
2153
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2154/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2155static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2156{
2157 struct b43_phy_n *nphy = dev->phy.n;
2158 u16 *save = nphy->tx_rx_cal_radio_saveregs;
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2159 u16 tmp;
2160 u8 offset, i;
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2161
2162 if (dev->phy.rev >= 3) {
Rafał Miłecki52cb5e92010-01-30 20:18:06 +0100[diff] [blame]2163 for (i = 0; i < 2; i++) {
2164 tmp = (i == 0) ? 0x2000 : 0x3000;
2165 offset = i * 11;
2166
2167 save[offset + 0] = b43_radio_read16(dev, B2055_CAL_RVARCTL);
2168 save[offset + 1] = b43_radio_read16(dev, B2055_CAL_LPOCTL);
2169 save[offset + 2] = b43_radio_read16(dev, B2055_CAL_TS);
2170 save[offset + 3] = b43_radio_read16(dev, B2055_CAL_RCCALRTS);
2171 save[offset + 4] = b43_radio_read16(dev, B2055_CAL_RCALRTS);
2172 save[offset + 5] = b43_radio_read16(dev, B2055_PADDRV);
2173 save[offset + 6] = b43_radio_read16(dev, B2055_XOCTL1);
2174 save[offset + 7] = b43_radio_read16(dev, B2055_XOCTL2);
2175 save[offset + 8] = b43_radio_read16(dev, B2055_XOREGUL);
2176 save[offset + 9] = b43_radio_read16(dev, B2055_XOMISC);
2177 save[offset + 10] = b43_radio_read16(dev, B2055_PLL_LFC1);
2178
2179 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2180 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x0A);
2181 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2182 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2183 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2184 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2185 if (nphy->ipa5g_on) {
2186 b43_radio_write16(dev, tmp | B2055_PADDRV, 4);
2187 b43_radio_write16(dev, tmp | B2055_XOCTL1, 1);
2188 } else {
2189 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2190 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0x2F);
2191 }
2192 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2193 } else {
2194 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x06);
2195 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2196 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2197 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2198 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2199 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0);
2200 if (nphy->ipa2g_on) {
2201 b43_radio_write16(dev, tmp | B2055_PADDRV, 6);
2202 b43_radio_write16(dev, tmp | B2055_XOCTL2,
2203 (dev->phy.rev < 5) ? 0x11 : 0x01);
2204 } else {
2205 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2206 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2207 }
2208 }
2209 b43_radio_write16(dev, tmp | B2055_XOREGUL, 0);
2210 b43_radio_write16(dev, tmp | B2055_XOMISC, 0);
2211 b43_radio_write16(dev, tmp | B2055_PLL_LFC1, 0);
2212 }
Rafał Miłeckic4a92002010-01-15 15:55:18 +0100[diff] [blame]2213 } else {
2214 save[0] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL1);
2215 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL1, 0x29);
2216
2217 save[1] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL2);
2218 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL2, 0x54);
2219
2220 save[2] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL1);
2221 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL1, 0x29);
2222
2223 save[3] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL2);
2224 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL2, 0x54);
2225
2226 save[3] = b43_radio_read16(dev, B2055_C1_PWRDET_RXTX);
2227 save[4] = b43_radio_read16(dev, B2055_C2_PWRDET_RXTX);
2228
2229 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) &
2230 B43_NPHY_BANDCTL_5GHZ)) {
2231 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x04);
2232 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x04);
2233 } else {
2234 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x20);
2235 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x20);
2236 }
2237
2238 if (dev->phy.rev < 2) {
2239 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20);
2240 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20);
2241 } else {
2242 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20);
2243 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20);
2244 }
2245 }
2246}
2247
Rafał Miłeckie9762492010-01-15 16:08:25 +0100[diff] [blame]2248/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IqCalGainParams */
2249static void b43_nphy_iq_cal_gain_params(struct b43_wldev *dev, u16 core,
2250 struct nphy_txgains target,
2251 struct nphy_iqcal_params *params)
2252{
2253 int i, j, indx;
2254 u16 gain;
2255
2256 if (dev->phy.rev >= 3) {
2257 params->txgm = target.txgm[core];
2258 params->pga = target.pga[core];
2259 params->pad = target.pad[core];
2260 params->ipa = target.ipa[core];
2261 params->cal_gain = (params->txgm << 12) | (params->pga << 8) |
2262 (params->pad << 4) | (params->ipa);
2263 for (j = 0; j < 5; j++)
2264 params->ncorr[j] = 0x79;
2265 } else {
2266 gain = (target.pad[core]) | (target.pga[core] << 4) |
2267 (target.txgm[core] << 8);
2268
2269 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ?
2270 1 : 0;
2271 for (i = 0; i < 9; i++)
2272 if (tbl_iqcal_gainparams[indx][i][0] == gain)
2273 break;
2274 i = min(i, 8);
2275
2276 params->txgm = tbl_iqcal_gainparams[indx][i][1];
2277 params->pga = tbl_iqcal_gainparams[indx][i][2];
2278 params->pad = tbl_iqcal_gainparams[indx][i][3];
2279 params->cal_gain = (params->txgm << 7) | (params->pga << 4) |
2280 (params->pad << 2);
2281 for (j = 0; j < 4; j++)
2282 params->ncorr[j] = tbl_iqcal_gainparams[indx][i][4 + j];
2283 }
2284}
2285
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2286/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/UpdateTxCalLadder */
2287static void b43_nphy_update_tx_cal_ladder(struct b43_wldev *dev, u16 core)
2288{
2289 struct b43_phy_n *nphy = dev->phy.n;
2290 int i;
2291 u16 scale, entry;
2292
2293 u16 tmp = nphy->txcal_bbmult;
2294 if (core == 0)
2295 tmp >>= 8;
2296 tmp &= 0xff;
2297
2298 for (i = 0; i < 18; i++) {
2299 scale = (ladder_lo[i].percent * tmp) / 100;
2300 entry = ((scale & 0xFF) << 8) | ladder_lo[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2301 b43_ntab_write(dev, B43_NTAB16(15, i), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2302
2303 scale = (ladder_iq[i].percent * tmp) / 100;
2304 entry = ((scale & 0xFF) << 8) | ladder_iq[i].g_env;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2305 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry);
Rafał Miłeckide7ed0c2010-01-15 16:06:35 +0100[diff] [blame]2306 }
2307}
2308
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2309/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ExtPaSetTxDigiFilts */
2310static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev *dev)
2311{
2312 int i;
2313 for (i = 0; i < 15; i++)
2314 b43_phy_write(dev, B43_PHY_N(0x2C5 + i),
2315 tbl_tx_filter_coef_rev4[2][i]);
2316}
2317
2318/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IpaSetTxDigiFilts */
2319static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2320{
2321 int i, j;
2322 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
Joe Perches20407ed2010-11-20 18:38:57 -0800[diff] [blame]2323 static const u16 offset[] = { 0x186, 0x195, 0x2C5 };
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]2324
2325 for (i = 0; i < 3; i++)
2326 for (j = 0; j < 15; j++)
2327 b43_phy_write(dev, B43_PHY_N(offset[i] + j),
2328 tbl_tx_filter_coef_rev4[i][j]);
2329
2330 if (dev->phy.is_40mhz) {
2331 for (j = 0; j < 15; j++)
2332 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2333 tbl_tx_filter_coef_rev4[3][j]);
2334 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2335 for (j = 0; j < 15; j++)
2336 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2337 tbl_tx_filter_coef_rev4[5][j]);
2338 }
2339
2340 if (dev->phy.channel == 14)
2341 for (j = 0; j < 15; j++)
2342 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2343 tbl_tx_filter_coef_rev4[6][j]);
2344}
2345
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2346/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetTxGain */
2347static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2348{
2349 struct b43_phy_n *nphy = dev->phy.n;
2350
2351 u16 curr_gain[2];
2352 struct nphy_txgains target;
2353 const u32 *table = NULL;
2354
2355 if (nphy->txpwrctrl == 0) {
2356 int i;
2357
2358 if (nphy->hang_avoid)
2359 b43_nphy_stay_in_carrier_search(dev, true);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2360 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain);
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]2361 if (nphy->hang_avoid)
2362 b43_nphy_stay_in_carrier_search(dev, false);
2363
2364 for (i = 0; i < 2; ++i) {
2365 if (dev->phy.rev >= 3) {
2366 target.ipa[i] = curr_gain[i] & 0x000F;
2367 target.pad[i] = (curr_gain[i] & 0x00F0) >> 4;
2368 target.pga[i] = (curr_gain[i] & 0x0F00) >> 8;
2369 target.txgm[i] = (curr_gain[i] & 0x7000) >> 12;
2370 } else {
2371 target.ipa[i] = curr_gain[i] & 0x0003;
2372 target.pad[i] = (curr_gain[i] & 0x000C) >> 2;
2373 target.pga[i] = (curr_gain[i] & 0x0070) >> 4;
2374 target.txgm[i] = (curr_gain[i] & 0x0380) >> 7;
2375 }
2376 }
2377 } else {
2378 int i;
2379 u16 index[2];
2380 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) &
2381 B43_NPHY_TXPCTL_STAT_BIDX) >>
2382 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2383 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) &
2384 B43_NPHY_TXPCTL_STAT_BIDX) >>
2385 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2386
2387 for (i = 0; i < 2; ++i) {
2388 if (dev->phy.rev >= 3) {
2389 enum ieee80211_band band =
2390 b43_current_band(dev->wl);
2391
2392 if ((nphy->ipa2g_on &&
2393 band == IEEE80211_BAND_2GHZ) ||
2394 (nphy->ipa5g_on &&
2395 band == IEEE80211_BAND_5GHZ)) {
2396 table = b43_nphy_get_ipa_gain_table(dev);
2397 } else {
2398 if (band == IEEE80211_BAND_5GHZ) {
2399 if (dev->phy.rev == 3)
2400 table = b43_ntab_tx_gain_rev3_5ghz;
2401 else if (dev->phy.rev == 4)
2402 table = b43_ntab_tx_gain_rev4_5ghz;
2403 else
2404 table = b43_ntab_tx_gain_rev5plus_5ghz;
2405 } else {
2406 table = b43_ntab_tx_gain_rev3plus_2ghz;
2407 }
2408 }
2409
2410 target.ipa[i] = (table[index[i]] >> 16) & 0xF;
2411 target.pad[i] = (table[index[i]] >> 20) & 0xF;
2412 target.pga[i] = (table[index[i]] >> 24) & 0xF;
2413 target.txgm[i] = (table[index[i]] >> 28) & 0xF;
2414 } else {
2415 table = b43_ntab_tx_gain_rev0_1_2;
2416
2417 target.ipa[i] = (table[index[i]] >> 16) & 0x3;
2418 target.pad[i] = (table[index[i]] >> 18) & 0x3;
2419 target.pga[i] = (table[index[i]] >> 20) & 0x7;
2420 target.txgm[i] = (table[index[i]] >> 23) & 0x7;
2421 }
2422 }
2423 }
2424
2425 return target;
2426}
2427
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2428/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhyCleanup */
2429static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev *dev)
2430{
2431 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2432
2433 if (dev->phy.rev >= 3) {
2434 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]);
2435 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
2436 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
2437 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]);
2438 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2439 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]);
2440 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2441 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]);
2442 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]);
2443 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
2444 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
2445 b43_nphy_reset_cca(dev);
2446 } else {
2447 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]);
2448 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]);
2449 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2450 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]);
2451 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2452 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]);
2453 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]);
2454 }
2455}
2456
2457/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhySetup */
2458static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
2459{
2460 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2461 u16 tmp;
2462
2463 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2464 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2465 if (dev->phy.rev >= 3) {
2466 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00);
2467 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00);
2468
2469 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
2470 regs[2] = tmp;
2471 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp | 0x0600);
2472
2473 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2474 regs[3] = tmp;
2475 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600);
2476
2477 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2478 b43_phy_mask(dev, B43_NPHY_BBCFG,
2479 ~B43_NPHY_BBCFG_RSTRX & 0xFFFF);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2480
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2481 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2482 regs[5] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2483 b43_ntab_write(dev, B43_NTAB16(8, 3), 0);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2484
2485 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2486 regs[6] = tmp;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2487 b43_ntab_write(dev, B43_NTAB16(8, 19), 0);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2488 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2489 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2490
Rafał Miłecki67cbc3e2010-02-04 12:23:08 +0100[diff] [blame]2491 b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
2492 b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
2493 b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2494
2495 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
2496 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
2497 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
2498 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
2499 } else {
2500 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000);
2501 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000);
2502 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2503 regs[2] = tmp;
2504 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x3000);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2505 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2506 regs[3] = tmp;
2507 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2508 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp);
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2509 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18));
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2510 regs[4] = tmp;
2511 tmp |= 0x2000;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2512 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2513 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2514 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2515 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2516 tmp = 0x0180;
2517 else
2518 tmp = 0x0120;
2519 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
2520 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
2521 }
2522}
2523
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2524/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SaveCal */
2525static void b43_nphy_save_cal(struct b43_wldev *dev)
2526{
2527 struct b43_phy_n *nphy = dev->phy.n;
2528
2529 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2530 u16 *txcal_radio_regs = NULL;
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2531 struct b43_chanspec *iqcal_chanspec;
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2532 u16 *table = NULL;
2533
2534 if (nphy->hang_avoid)
2535 b43_nphy_stay_in_carrier_search(dev, 1);
2536
2537 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2538 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2539 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2540 iqcal_chanspec = &nphy->iqcal_chanspec_2G;
2541 table = nphy->cal_cache.txcal_coeffs_2G;
2542 } else {
2543 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2544 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2545 iqcal_chanspec = &nphy->iqcal_chanspec_5G;
2546 table = nphy->cal_cache.txcal_coeffs_5G;
2547 }
2548
2549 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs);
2550 /* TODO use some definitions */
2551 if (dev->phy.rev >= 3) {
2552 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021);
2553 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022);
2554 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021);
2555 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022);
2556 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023);
2557 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024);
2558 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023);
2559 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024);
2560 } else {
2561 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B);
2562 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA);
2563 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2564 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2565 }
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2566 iqcal_chanspec->center_freq = dev->phy.channel_freq;
2567 iqcal_chanspec->channel_type = dev->phy.channel_type;
Rafał Miłecki5818e982010-10-14 19:33:35 +0200[diff] [blame]2568 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table);
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]2569
2570 if (nphy->hang_avoid)
2571 b43_nphy_stay_in_carrier_search(dev, 0);
2572}
2573
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2574/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreCal */
2575static void b43_nphy_restore_cal(struct b43_wldev *dev)
2576{
2577 struct b43_phy_n *nphy = dev->phy.n;
2578
2579 u16 coef[4];
2580 u16 *loft = NULL;
2581 u16 *table = NULL;
2582
2583 int i;
2584 u16 *txcal_radio_regs = NULL;
2585 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2586
2587 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2588 if (!nphy->iqcal_chanspec_2G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2589 return;
2590 table = nphy->cal_cache.txcal_coeffs_2G;
2591 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2592 } else {
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2593 if (!nphy->iqcal_chanspec_5G.center_freq)
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2594 return;
2595 table = nphy->cal_cache.txcal_coeffs_5G;
2596 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
2597 }
2598
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2599 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2600
2601 for (i = 0; i < 4; i++) {
2602 if (dev->phy.rev >= 3)
2603 table[i] = coef[i];
2604 else
2605 coef[i] = 0;
2606 }
2607
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2608 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef);
2609 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft);
2610 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft);
Rafał Miłecki2f258b72010-01-15 15:18:35 +0100[diff] [blame]2611
2612 if (dev->phy.rev < 2)
2613 b43_nphy_tx_iq_workaround(dev);
2614
2615 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2616 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2617 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2618 } else {
2619 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2620 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2621 }
2622
2623 /* TODO use some definitions */
2624 if (dev->phy.rev >= 3) {
2625 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]);
2626 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]);
2627 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]);
2628 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]);
2629 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]);
2630 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]);
2631 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]);
2632 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]);
2633 } else {
2634 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]);
2635 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]);
2636 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]);
2637 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]);
2638 }
2639 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs);
2640}
2641
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2642/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalTxIqlo */
2643static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2644 struct nphy_txgains target,
2645 bool full, bool mphase)
2646{
2647 struct b43_phy_n *nphy = dev->phy.n;
2648 int i;
2649 int error = 0;
2650 int freq;
2651 bool avoid = false;
2652 u8 length;
2653 u16 tmp, core, type, count, max, numb, last, cmd;
2654 const u16 *table;
2655 bool phy6or5x;
2656
2657 u16 buffer[11];
2658 u16 diq_start = 0;
2659 u16 save[2];
2660 u16 gain[2];
2661 struct nphy_iqcal_params params[2];
2662 bool updated[2] = { };
2663
2664 b43_nphy_stay_in_carrier_search(dev, true);
2665
2666 if (dev->phy.rev >= 4) {
2667 avoid = nphy->hang_avoid;
2668 nphy->hang_avoid = 0;
2669 }
2670
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2671 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2672
2673 for (i = 0; i < 2; i++) {
2674 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]);
2675 gain[i] = params[i].cal_gain;
2676 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2677
2678 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2679
2680 b43_nphy_tx_cal_radio_setup(dev);
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2681 b43_nphy_tx_cal_phy_setup(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2682
2683 phy6or5x = dev->phy.rev >= 6 ||
2684 (dev->phy.rev == 5 && nphy->ipa2g_on &&
2685 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ);
2686 if (phy6or5x) {
Rafał Miłecki38bb9022010-01-30 20:18:05 +0100[diff] [blame]2687 if (dev->phy.is_40mhz) {
2688 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2689 tbl_tx_iqlo_cal_loft_ladder_40);
2690 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2691 tbl_tx_iqlo_cal_iqimb_ladder_40);
2692 } else {
2693 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2694 tbl_tx_iqlo_cal_loft_ladder_20);
2695 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2696 tbl_tx_iqlo_cal_iqimb_ladder_20);
2697 }
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2698 }
2699
2700 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9);
2701
Rafał Miłeckiaa4c7b22010-01-22 01:53:12 +0100[diff] [blame]2702 if (!dev->phy.is_40mhz)
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2703 freq = 2500;
2704 else
2705 freq = 5000;
2706
2707 if (nphy->mphase_cal_phase_id > 2)
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]2708 b43_nphy_run_samples(dev, (dev->phy.is_40mhz ? 40 : 20) * 8,
2709 0xFFFF, 0, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2710 else
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]2711 error = b43_nphy_tx_tone(dev, freq, 250, true, false);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2712
2713 if (error == 0) {
2714 if (nphy->mphase_cal_phase_id > 2) {
2715 table = nphy->mphase_txcal_bestcoeffs;
2716 length = 11;
2717 if (dev->phy.rev < 3)
2718 length -= 2;
2719 } else {
2720 if (!full && nphy->txiqlocal_coeffsvalid) {
2721 table = nphy->txiqlocal_bestc;
2722 length = 11;
2723 if (dev->phy.rev < 3)
2724 length -= 2;
2725 } else {
2726 full = true;
2727 if (dev->phy.rev >= 3) {
2728 table = tbl_tx_iqlo_cal_startcoefs_nphyrev3;
2729 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3;
2730 } else {
2731 table = tbl_tx_iqlo_cal_startcoefs;
2732 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS;
2733 }
2734 }
2735 }
2736
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2737 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2738
2739 if (full) {
2740 if (dev->phy.rev >= 3)
2741 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3;
2742 else
2743 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL;
2744 } else {
2745 if (dev->phy.rev >= 3)
2746 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3;
2747 else
2748 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL;
2749 }
2750
2751 if (mphase) {
2752 count = nphy->mphase_txcal_cmdidx;
2753 numb = min(max,
2754 (u16)(count + nphy->mphase_txcal_numcmds));
2755 } else {
2756 count = 0;
2757 numb = max;
2758 }
2759
2760 for (; count < numb; count++) {
2761 if (full) {
2762 if (dev->phy.rev >= 3)
2763 cmd = tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[count];
2764 else
2765 cmd = tbl_tx_iqlo_cal_cmds_fullcal[count];
2766 } else {
2767 if (dev->phy.rev >= 3)
2768 cmd = tbl_tx_iqlo_cal_cmds_recal_nphyrev3[count];
2769 else
2770 cmd = tbl_tx_iqlo_cal_cmds_recal[count];
2771 }
2772
2773 core = (cmd & 0x3000) >> 12;
2774 type = (cmd & 0x0F00) >> 8;
2775
2776 if (phy6or5x && updated[core] == 0) {
2777 b43_nphy_update_tx_cal_ladder(dev, core);
2778 updated[core] = 1;
2779 }
2780
2781 tmp = (params[core].ncorr[type] << 8) | 0x66;
2782 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp);
2783
2784 if (type == 1 || type == 3 || type == 4) {
Rafał Miłeckic643a662010-01-18 00:21:27 +0100[diff] [blame]2785 buffer[0] = b43_ntab_read(dev,
2786 B43_NTAB16(15, 69 + core));
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2787 diq_start = buffer[0];
2788 buffer[0] = 0;
Rafał Miłeckid41a3552010-01-18 00:21:17 +0100[diff] [blame]2789 b43_ntab_write(dev, B43_NTAB16(15, 69 + core),
2790 0);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2791 }
2792
2793 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd);
2794 for (i = 0; i < 2000; i++) {
2795 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD);
2796 if (tmp & 0xC000)
2797 break;
2798 udelay(10);
2799 }
2800
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2801 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2802 buffer);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2803 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length,
2804 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2805
2806 if (type == 1 || type == 3 || type == 4)
2807 buffer[0] = diq_start;
2808 }
2809
2810 if (mphase)
2811 nphy->mphase_txcal_cmdidx = (numb >= max) ? 0 : numb;
2812
2813 last = (dev->phy.rev < 3) ? 6 : 7;
2814
2815 if (!mphase || nphy->mphase_cal_phase_id == last) {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2816 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2817 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2818 if (dev->phy.rev < 3) {
2819 buffer[0] = 0;
2820 buffer[1] = 0;
2821 buffer[2] = 0;
2822 buffer[3] = 0;
2823 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2824 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2825 buffer);
Rafał Miłeckibc53e512010-04-01 23:11:10 +0200[diff] [blame]2826 b43_ntab_read_bulk(dev, B43_NTAB16(15, 101), 2,
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2827 buffer);
2828 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2829 buffer);
2830 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2831 buffer);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2832 length = 11;
2833 if (dev->phy.rev < 3)
2834 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2835 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2836 nphy->txiqlocal_bestc);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2837 nphy->txiqlocal_coeffsvalid = true;
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2838 nphy->txiqlocal_chanspec.center_freq =
2839 dev->phy.channel_freq;
2840 nphy->txiqlocal_chanspec.channel_type =
2841 dev->phy.channel_type;
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2842 } else {
2843 length = 11;
2844 if (dev->phy.rev < 3)
2845 length -= 2;
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2846 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2847 nphy->mphase_txcal_bestcoeffs);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2848 }
2849
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]2850 b43_nphy_stop_playback(dev);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2851 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0);
2852 }
2853
Rafał Miłeckie53de672010-01-17 13:03:32 +0100[diff] [blame]2854 b43_nphy_tx_cal_phy_cleanup(dev);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2855 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
Rafał Miłeckifb43b8e2010-01-15 16:10:48 +0100[diff] [blame]2856
2857 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last))
2858 b43_nphy_tx_iq_workaround(dev);
2859
2860 if (dev->phy.rev >= 4)
2861 nphy->hang_avoid = avoid;
2862
2863 b43_nphy_stay_in_carrier_search(dev, false);
2864
2865 return error;
2866}
2867
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2868/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ReapplyTxCalCoeffs */
2869static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2870{
2871 struct b43_phy_n *nphy = dev->phy.n;
2872 u8 i;
2873 u16 buffer[7];
2874 bool equal = true;
2875
Rafał Miłecki902db912010-02-27 13:03:37 +0100[diff] [blame]2876 if (!nphy->txiqlocal_coeffsvalid ||
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]2877 nphy->txiqlocal_chanspec.center_freq != dev->phy.channel_freq ||
2878 nphy->txiqlocal_chanspec.channel_type != dev->phy.channel_type)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2879 return;
2880
2881 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
2882 for (i = 0; i < 4; i++) {
2883 if (buffer[i] != nphy->txiqlocal_bestc[i]) {
2884 equal = false;
2885 break;
2886 }
2887 }
2888
2889 if (!equal) {
2890 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4,
2891 nphy->txiqlocal_bestc);
2892 for (i = 0; i < 4; i++)
2893 buffer[i] = 0;
2894 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2895 buffer);
2896 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2897 &nphy->txiqlocal_bestc[5]);
2898 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2899 &nphy->txiqlocal_bestc[5]);
2900 }
2901}
2902
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2903/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIqRev2 */
2904static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2905 struct nphy_txgains target, u8 type, bool debug)
2906{
2907 struct b43_phy_n *nphy = dev->phy.n;
2908 int i, j, index;
2909 u8 rfctl[2];
2910 u8 afectl_core;
2911 u16 tmp[6];
2912 u16 cur_hpf1, cur_hpf2, cur_lna;
2913 u32 real, imag;
2914 enum ieee80211_band band;
2915
2916 u8 use;
2917 u16 cur_hpf;
2918 u16 lna[3] = { 3, 3, 1 };
2919 u16 hpf1[3] = { 7, 2, 0 };
2920 u16 hpf2[3] = { 2, 0, 0 };
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]2921 u32 power[3] = { };
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2922 u16 gain_save[2];
2923 u16 cal_gain[2];
2924 struct nphy_iqcal_params cal_params[2];
2925 struct nphy_iq_est est;
2926 int ret = 0;
2927 bool playtone = true;
2928 int desired = 13;
2929
2930 b43_nphy_stay_in_carrier_search(dev, 1);
2931
2932 if (dev->phy.rev < 2)
Rafał Miłecki984ff4f2010-02-04 12:23:10 +0100[diff] [blame]2933 b43_nphy_reapply_tx_cal_coeffs(dev);
Rafał Miłecki91458342010-01-18 00:21:35 +0100[diff] [blame]2934 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2935 for (i = 0; i < 2; i++) {
2936 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]);
2937 cal_gain[i] = cal_params[i].cal_gain;
2938 }
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]2939 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2940
2941 for (i = 0; i < 2; i++) {
2942 if (i == 0) {
2943 rfctl[0] = B43_NPHY_RFCTL_INTC1;
2944 rfctl[1] = B43_NPHY_RFCTL_INTC2;
2945 afectl_core = B43_NPHY_AFECTL_C1;
2946 } else {
2947 rfctl[0] = B43_NPHY_RFCTL_INTC2;
2948 rfctl[1] = B43_NPHY_RFCTL_INTC1;
2949 afectl_core = B43_NPHY_AFECTL_C2;
2950 }
2951
2952 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
2953 tmp[2] = b43_phy_read(dev, afectl_core);
2954 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2955 tmp[4] = b43_phy_read(dev, rfctl[0]);
2956 tmp[5] = b43_phy_read(dev, rfctl[1]);
2957
2958 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]2959 ~B43_NPHY_RFSEQCA_RXDIS & 0xFFFF,
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2960 ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
2961 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
2962 (1 - i));
2963 b43_phy_set(dev, afectl_core, 0x0006);
2964 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006);
2965
2966 band = b43_current_band(dev->wl);
2967
2968 if (nphy->rxcalparams & 0xFF000000) {
2969 if (band == IEEE80211_BAND_5GHZ)
2970 b43_phy_write(dev, rfctl[0], 0x140);
2971 else
2972 b43_phy_write(dev, rfctl[0], 0x110);
2973 } else {
2974 if (band == IEEE80211_BAND_5GHZ)
2975 b43_phy_write(dev, rfctl[0], 0x180);
2976 else
2977 b43_phy_write(dev, rfctl[0], 0x120);
2978 }
2979
2980 if (band == IEEE80211_BAND_5GHZ)
2981 b43_phy_write(dev, rfctl[1], 0x148);
2982 else
2983 b43_phy_write(dev, rfctl[1], 0x114);
2984
2985 if (nphy->rxcalparams & 0x10000) {
2986 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC,
2987 (i + 1));
2988 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC,
2989 (2 - i));
2990 }
2991
Rafał Miłecki30115c22010-10-22 17:43:45 +0200[diff] [blame]2992 for (j = 0; j < 4; j++) {
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]2993 if (j < 3) {
2994 cur_lna = lna[j];
2995 cur_hpf1 = hpf1[j];
2996 cur_hpf2 = hpf2[j];
2997 } else {
2998 if (power[1] > 10000) {
2999 use = 1;
3000 cur_hpf = cur_hpf1;
3001 index = 2;
3002 } else {
3003 if (power[0] > 10000) {
3004 use = 1;
3005 cur_hpf = cur_hpf1;
3006 index = 1;
3007 } else {
3008 index = 0;
3009 use = 2;
3010 cur_hpf = cur_hpf2;
3011 }
3012 }
3013 cur_lna = lna[index];
3014 cur_hpf1 = hpf1[index];
3015 cur_hpf2 = hpf2[index];
3016 cur_hpf += desired - hweight32(power[index]);
3017 cur_hpf = clamp_val(cur_hpf, 0, 10);
3018 if (use == 1)
3019 cur_hpf1 = cur_hpf;
3020 else
3021 cur_hpf2 = cur_hpf;
3022 }
3023
3024 tmp[0] = ((cur_hpf2 << 8) | (cur_hpf1 << 4) |
3025 (cur_lna << 2));
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3026 b43_nphy_rf_control_override(dev, 0x400, tmp[0], 3,
3027 false);
Rafał Miłeckide9a47f2010-01-18 00:21:49 +0100[diff] [blame]3028 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3029 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3030
3031 if (playtone) {
Rafał Miłecki59af0992010-01-22 01:53:16 +0100[diff] [blame]3032 ret = b43_nphy_tx_tone(dev, 4000,
3033 (nphy->rxcalparams & 0xFFFF),
3034 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3035 playtone = false;
3036 } else {
Rafał Miłecki10a79872010-01-22 01:53:14 +0100[diff] [blame]3037 b43_nphy_run_samples(dev, 160, 0xFFFF, 0,
3038 false, false);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3039 }
3040
3041 if (ret == 0) {
3042 if (j < 3) {
3043 b43_nphy_rx_iq_est(dev, &est, 1024, 32,
3044 false);
3045 if (i == 0) {
3046 real = est.i0_pwr;
3047 imag = est.q0_pwr;
3048 } else {
3049 real = est.i1_pwr;
3050 imag = est.q1_pwr;
3051 }
3052 power[i] = ((real + imag) / 1024) + 1;
3053 } else {
3054 b43_nphy_calc_rx_iq_comp(dev, 1 << i);
3055 }
Rafał Miłecki53ae8e82010-01-17 13:03:48 +0100[diff] [blame]3056 b43_nphy_stop_playback(dev);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3057 }
3058
3059 if (ret != 0)
3060 break;
3061 }
3062
3063 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC);
3064 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC);
3065 b43_phy_write(dev, rfctl[1], tmp[5]);
3066 b43_phy_write(dev, rfctl[0], tmp[4]);
3067 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]);
3068 b43_phy_write(dev, afectl_core, tmp[2]);
3069 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]);
3070
3071 if (ret != 0)
3072 break;
3073 }
3074
Rafał Miłecki75377b22010-01-22 01:53:13 +0100[diff] [blame]3075 b43_nphy_rf_control_override(dev, 0x400, 0, 3, true);
Rafał Miłecki67c0d6e2010-01-17 13:04:02 +0100[diff] [blame]3076 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3077 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3078
3079 b43_nphy_stay_in_carrier_search(dev, 0);
3080
3081 return ret;
3082}
3083
3084static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev *dev,
3085 struct nphy_txgains target, u8 type, bool debug)
3086{
3087 return -1;
3088}
3089
3090/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIq */
3091static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
3092 struct nphy_txgains target, u8 type, bool debug)
3093{
3094 if (dev->phy.rev >= 3)
3095 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug);
3096 else
3097 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
3098}
3099
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3100/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
3101static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
3102{
3103 u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
3104 if (on)
3105 tmslow |= SSB_TMSLOW_PHYCLK;
3106 else
3107 tmslow &= ~SSB_TMSLOW_PHYCLK;
3108 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
3109}
3110
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3111/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
3112static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
3113{
3114 struct b43_phy *phy = &dev->phy;
3115 struct b43_phy_n *nphy = phy->n;
3116 u16 buf[16];
3117
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3118 nphy->phyrxchain = mask;
3119
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3120 if (0 /* FIXME clk */)
3121 return;
3122
3123 b43_mac_suspend(dev);
3124
3125 if (nphy->hang_avoid)
3126 b43_nphy_stay_in_carrier_search(dev, true);
3127
3128 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
3129 (mask & 0x3) << B43_NPHY_RFSEQCA_RXEN_SHIFT);
3130
Rafał Miłecki049fbfe2010-08-22 21:47:32 +0200[diff] [blame]3131 if ((mask & 0x3) != 0x3) {
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3132 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1);
3133 if (dev->phy.rev >= 3) {
3134 /* TODO */
3135 }
3136 } else {
3137 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E);
3138 if (dev->phy.rev >= 3) {
3139 /* TODO */
3140 }
3141 }
3142
3143 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3144
3145 if (nphy->hang_avoid)
3146 b43_nphy_stay_in_carrier_search(dev, false);
3147
3148 b43_mac_enable(dev);
3149}
3150
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3151/*
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3152 * Init N-PHY
3153 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
3154 */
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3155int b43_phy_initn(struct b43_wldev *dev)
3156{
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3157 struct ssb_bus *bus = dev->dev->bus;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3158 struct b43_phy *phy = &dev->phy;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3159 struct b43_phy_n *nphy = phy->n;
3160 u8 tx_pwr_state;
3161 struct nphy_txgains target;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3162 u16 tmp;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3163 enum ieee80211_band tmp2;
3164 bool do_rssi_cal;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3165
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3166 u16 clip[2];
3167 bool do_cal = false;
3168
3169 if ((dev->phy.rev >= 3) &&
3170 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
3171 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
3172 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
3173 }
3174 nphy->deaf_count = 0;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3175 b43_nphy_tables_init(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3176 nphy->crsminpwr_adjusted = false;
3177 nphy->noisevars_adjusted = false;
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3178
3179 /* Clear all overrides */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3180 if (dev->phy.rev >= 3) {
3181 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0);
3182 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3183 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0);
3184 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0);
3185 } else {
3186 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
3187 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3188 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0);
3189 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3190 if (dev->phy.rev < 6) {
3191 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0);
3192 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0);
3193 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3194 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
3195 ~(B43_NPHY_RFSEQMODE_CAOVER |
3196 B43_NPHY_RFSEQMODE_TROVER));
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3197 if (dev->phy.rev >= 3)
3198 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3199 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0);
3200
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3201 if (dev->phy.rev <= 2) {
3202 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40;
3203 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
3204 ~B43_NPHY_BPHY_CTL3_SCALE,
3205 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT);
3206 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3207 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
3208 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
3209
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3210 if (bus->sprom.boardflags2_lo & 0x100 ||
3211 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3212 bus->boardinfo.type == 0x8B))
3213 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3214 else
3215 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
3216 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8);
3217 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50);
3218 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3219
Rafał Miłeckiad9716e2010-01-17 13:03:40 +0100[diff] [blame]3220 b43_nphy_update_mimo_config(dev, nphy->preamble_override);
Rafał Miłecki4f4ab6c2010-01-17 13:03:55 +0100[diff] [blame]3221 b43_nphy_update_txrx_chain(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3222
3223 if (phy->rev < 2) {
3224 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8);
3225 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4);
3226 }
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3227
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3228 tmp2 = b43_current_band(dev->wl);
3229 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) ||
3230 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3231 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3232 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3233 nphy->papd_epsilon_offset[0] << 7);
3234 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1);
3235 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F,
3236 nphy->papd_epsilon_offset[1] << 7);
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3237 b43_nphy_int_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3238 } else if (phy->rev >= 5) {
Rafał Miłecki45ca6972010-01-22 01:53:15 +0100[diff] [blame]3239 b43_nphy_ext_pa_set_tx_dig_filters(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3240 }
3241
3242 b43_nphy_workarounds(dev);
3243
3244 /* Reset CCA, in init code it differs a little from standard way */
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3245 b43_nphy_bmac_clock_fgc(dev, 1);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3246 tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
3247 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
3248 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
Rafał Miłecki730dd702010-01-15 16:38:07 +0100[diff] [blame]3249 b43_nphy_bmac_clock_fgc(dev, 0);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3250
Gábor Stefanikd2730b22010-08-16 22:39:16 +0200[diff] [blame]3251 b43_nphy_mac_phy_clock_set(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3252
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3253 b43_nphy_pa_override(dev, false);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3254 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
3255 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
Rafał Miłeckie50cbcf2010-01-15 15:02:38 +0100[diff] [blame]3256 b43_nphy_pa_override(dev, true);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3257
Rafał Miłeckibbec3982010-01-15 14:31:39 +0100[diff] [blame]3258 b43_nphy_classifier(dev, 0, 0);
3259 b43_nphy_read_clip_detection(dev, clip);
Rafał Miłeckibec18642010-11-18 13:28:00 +0100[diff] [blame]3260 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3261 b43_nphy_bphy_init(dev);
3262
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3263 tx_pwr_state = nphy->txpwrctrl;
3264 /* TODO N PHY TX power control with argument 0
3265 (turning off power control) */
3266 /* TODO Fix the TX Power Settings */
3267 /* TODO N PHY TX Power Control Idle TSSI */
3268 /* TODO N PHY TX Power Control Setup */
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3269
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3270 if (phy->rev >= 3) {
3271 /* TODO */
3272 } else {
Rafał Miłecki2581b142010-01-18 00:21:21 +0100[diff] [blame]3273 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3274 b43_ntab_tx_gain_rev0_1_2);
3275 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3276 b43_ntab_tx_gain_rev0_1_2);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3277 }
3278
3279 if (nphy->phyrxchain != 3)
Gábor Stefanik4e687b22010-08-16 22:39:17 +0200[diff] [blame]3280 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3281 if (nphy->mphase_cal_phase_id > 0)
3282 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3283
3284 do_rssi_cal = false;
3285 if (phy->rev >= 3) {
3286 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3287 do_rssi_cal = !nphy->rssical_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3288 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3289 do_rssi_cal = !nphy->rssical_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3290
3291 if (do_rssi_cal)
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3292 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3293 else
Rafał Miłecki42e15472010-01-15 15:06:47 +0100[diff] [blame]3294 b43_nphy_restore_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3295 } else {
Rafał Miłecki4cb99772010-01-15 13:40:58 +0100[diff] [blame]3296 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3297 }
3298
3299 if (!((nphy->measure_hold & 0x6) != 0)) {
3300 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3301 do_cal = !nphy->iqcal_chanspec_2G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3302 else
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3303 do_cal = !nphy->iqcal_chanspec_5G.center_freq;
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3304
3305 if (nphy->mute)
3306 do_cal = false;
3307
3308 if (do_cal) {
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3309 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3310
3311 if (nphy->antsel_type == 2)
Rafał Miłecki8987a9e2010-02-27 13:03:33 +0100[diff] [blame]3312 b43_nphy_superswitch_init(dev, true);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3313 if (nphy->perical != 2) {
Rafał Miłecki90b97382010-01-15 14:48:21 +0100[diff] [blame]3314 b43_nphy_rssi_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3315 if (phy->rev >= 3) {
3316 nphy->cal_orig_pwr_idx[0] =
3317 nphy->txpwrindex[0].index_internal;
3318 nphy->cal_orig_pwr_idx[1] =
3319 nphy->txpwrindex[1].index_internal;
3320 /* TODO N PHY Pre Calibrate TX Gain */
Rafał Miłeckib0022e12010-01-15 15:40:50 +0100[diff] [blame]3321 target = b43_nphy_get_tx_gains(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3322 }
3323 }
3324 }
3325 }
3326
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3327 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3328 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
Rafał Miłeckibbc6dc12010-02-04 12:23:11 +0100[diff] [blame]3329 b43_nphy_save_cal(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3330 else if (nphy->mphase_cal_phase_id == 0)
Rafał Miłecki15931e32010-01-15 16:20:56 +0100[diff] [blame]3331 ;/* N PHY Periodic Calibration with argument 3 */
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3332 } else {
3333 b43_nphy_restore_cal(dev);
3334 }
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3335
Rafał Miłecki6dcd9d92010-01-15 16:24:57 +0100[diff] [blame]3336 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
Rafał Miłecki0988a7a2010-01-15 13:27:29 +0100[diff] [blame]3337 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */
3338 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
3339 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
3340 if (phy->rev >= 3 && phy->rev <= 6)
3341 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
Rafał Miłeckife3e46e2010-01-15 15:51:55 +0100[diff] [blame]3342 b43_nphy_tx_lp_fbw(dev);
Rafał Miłecki9442e5b2010-02-04 12:23:12 +0100[diff] [blame]3343 if (phy->rev >= 3)
3344 b43_nphy_spur_workaround(dev);
Michael Buesch95b66ba2008-01-18 01:09:25 +0100[diff] [blame]3345
3346 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
Michael Buesch53a6e232008-01-13 21:23:44 +0100[diff] [blame]3347 return 0;
Michael Buesch424047e2008-01-09 16:13:56 +0100[diff] [blame]3348}
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3349
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3350/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ChanspecSetup */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3351static void b43_nphy_channel_setup(struct b43_wldev *dev,
Rafał Miłeckib15b3032010-03-29 00:53:13 +0200[diff] [blame]3352 const struct b43_phy_n_sfo_cfg *e,
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3353 struct ieee80211_channel *new_channel)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3354{
3355 struct b43_phy *phy = &dev->phy;
3356 struct b43_phy_n *nphy = dev->phy.n;
3357
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3358 u16 old_band_5ghz;
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3359 u32 tmp32;
3360
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3361 old_band_5ghz =
3362 b43_phy_read(dev, B43_NPHY_BANDCTL) & B43_NPHY_BANDCTL_5GHZ;
3363 if (new_channel->band == IEEE80211_BAND_5GHZ && !old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3364 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3365 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
3366 b43_phy_set(dev, B43_PHY_B_BBCFG, 0xC000);
3367 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3368 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ);
Rafał Miłecki087de742010-10-11 03:11:03 +0200[diff] [blame]3369 } else if (new_channel->band == IEEE80211_BAND_2GHZ && old_band_5ghz) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3370 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ);
3371 tmp32 = b43_read32(dev, B43_MMIO_PSM_PHY_HDR);
3372 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32 | 4);
Larry Fingeracd82aa2010-07-21 11:48:05 -0500[diff] [blame]3373 b43_phy_mask(dev, B43_PHY_B_BBCFG, 0x3FFF);
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3374 b43_write32(dev, B43_MMIO_PSM_PHY_HDR, tmp32);
3375 }
3376
3377 b43_chantab_phy_upload(dev, e);
3378
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3379 if (new_channel->hw_value == 14) {
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3380 b43_nphy_classifier(dev, 2, 0);
3381 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800);
3382 } else {
3383 b43_nphy_classifier(dev, 2, 2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3384 if (new_channel->band == IEEE80211_BAND_2GHZ)
Rafał Miłecki1b69ec72010-02-27 13:03:40 +0100[diff] [blame]3385 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840);
3386 }
3387
3388 if (nphy->txpwrctrl)
3389 b43_nphy_tx_power_fix(dev);
3390
3391 if (dev->phy.rev < 3)
3392 b43_nphy_adjust_lna_gain_table(dev);
3393
3394 b43_nphy_tx_lp_fbw(dev);
3395
3396 if (dev->phy.rev >= 3 && 0) {
3397 /* TODO */
3398 }
3399
3400 b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830);
3401
3402 if (phy->rev >= 3)
3403 b43_nphy_spur_workaround(dev);
3404}
3405
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3406/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetChanspec */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3407static int b43_nphy_set_channel(struct b43_wldev *dev,
3408 struct ieee80211_channel *channel,
3409 enum nl80211_channel_type channel_type)
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3410{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3411 struct b43_phy *phy = &dev->phy;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3412 struct b43_phy_n *nphy = dev->phy.n;
3413
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3414 const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
3415 const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3416
3417 u8 tmp;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3418
3419 if (dev->phy.rev >= 3) {
Rafał Miłeckif2a6d6a2010-10-11 03:19:22 +0200[diff] [blame]3420 tabent_r3 = b43_nphy_get_chantabent_rev3(dev,
3421 channel->center_freq);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3422 tabent_r3 = NULL;
3423 if (!tabent_r3)
3424 return -ESRCH;
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3425 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3426 tabent_r2 = b43_nphy_get_chantabent_rev2(dev,
3427 channel->hw_value);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3428 if (!tabent_r2)
Rafał Miłeckiffd2d9b2010-03-29 00:53:14 +0200[diff] [blame]3429 return -ESRCH;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3430 }
3431
Rafał Miłecki204a6652010-10-14 19:33:34 +0200[diff] [blame]3432 /* Channel is set later in common code, but we need to set it on our
3433 own to let this function's subcalls work properly. */
3434 phy->channel = channel->hw_value;
3435 phy->channel_freq = channel->center_freq;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3436
Rafał Miłeckie5c407f2010-10-11 03:11:02 +0200[diff] [blame]3437 if (b43_channel_type_is_40mhz(phy->channel_type) !=
3438 b43_channel_type_is_40mhz(channel_type))
3439 ; /* TODO: BMAC BW Set (channel_type) */
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3440
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3441 if (channel_type == NL80211_CHAN_HT40PLUS)
3442 b43_phy_set(dev, B43_NPHY_RXCTL,
3443 B43_NPHY_RXCTL_BSELU20);
3444 else if (channel_type == NL80211_CHAN_HT40MINUS)
3445 b43_phy_mask(dev, B43_NPHY_RXCTL,
3446 ~B43_NPHY_RXCTL_BSELU20);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3447
3448 if (dev->phy.rev >= 3) {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3449 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 4 : 0;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3450 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3451 /* TODO: PHY Radio2056 Setup (dev, tabent_r3); */
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3452 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3453 } else {
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3454 tmp = (channel->band == IEEE80211_BAND_5GHZ) ? 0x0020 : 0x0050;
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3455 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp);
Rafał Miłeckif19ebe72010-03-29 00:53:15 +0200[diff] [blame]3456 b43_radio_2055_setup(dev, tabent_r2);
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3457 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel);
Rafał Miłeckieff66c52010-02-27 13:03:41 +0100[diff] [blame]3458 }
3459
3460 return 0;
3461}
3462
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3463static int b43_nphy_op_allocate(struct b43_wldev *dev)
3464{
3465 struct b43_phy_n *nphy;
3466
3467 nphy = kzalloc(sizeof(*nphy), GFP_KERNEL);
3468 if (!nphy)
3469 return -ENOMEM;
3470 dev->phy.n = nphy;
3471
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3472 return 0;
3473}
3474
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3475static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3476{
3477 struct b43_phy *phy = &dev->phy;
3478 struct b43_phy_n *nphy = phy->n;
3479
3480 memset(nphy, 0, sizeof(*nphy));
3481
Rafał Miłeckia5d35982010-11-18 13:27:59 +0100[diff] [blame]3482 /* wl goes path which is executed for gain_boost, assume it is true */
3483 nphy->gain_boost = true;
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3484}
3485
3486static void b43_nphy_op_free(struct b43_wldev *dev)
3487{
3488 struct b43_phy *phy = &dev->phy;
3489 struct b43_phy_n *nphy = phy->n;
3490
3491 kfree(nphy);
3492 phy->n = NULL;
3493}
3494
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3495static int b43_nphy_op_init(struct b43_wldev *dev)
3496{
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3497 return b43_phy_initn(dev);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3498}
3499
3500static inline void check_phyreg(struct b43_wldev *dev, u16 offset)
3501{
3502#if B43_DEBUG
3503 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_OFDM_GPHY) {
3504 /* OFDM registers are onnly available on A/G-PHYs */
3505 b43err(dev->wl, "Invalid OFDM PHY access at "
3506 "0x%04X on N-PHY\n", offset);
3507 dump_stack();
3508 }
3509 if ((offset & B43_PHYROUTE) == B43_PHYROUTE_EXT_GPHY) {
3510 /* Ext-G registers are only available on G-PHYs */
3511 b43err(dev->wl, "Invalid EXT-G PHY access at "
3512 "0x%04X on N-PHY\n", offset);
3513 dump_stack();
3514 }
3515#endif /* B43_DEBUG */
3516}
3517
3518static u16 b43_nphy_op_read(struct b43_wldev *dev, u16 reg)
3519{
3520 check_phyreg(dev, reg);
3521 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3522 return b43_read16(dev, B43_MMIO_PHY_DATA);
3523}
3524
3525static void b43_nphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
3526{
3527 check_phyreg(dev, reg);
3528 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
3529 b43_write16(dev, B43_MMIO_PHY_DATA, value);
3530}
3531
3532static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
3533{
3534 /* Register 1 is a 32-bit register. */
3535 B43_WARN_ON(reg == 1);
3536 /* N-PHY needs 0x100 for read access */
3537 reg |= 0x100;
3538
3539 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3540 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW);
3541}
3542
3543static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
3544{
3545 /* Register 1 is a 32-bit register. */
3546 B43_WARN_ON(reg == 1);
3547
3548 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg);
3549 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
3550}
3551
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3552/* http://bcm-v4.sipsolutions.net/802.11/Radio/Switch%20Radio */
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3553static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
Johannes Berg19d337d2009-06-02 13:01:37 +0200[diff] [blame]3554 bool blocked)
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3555{
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3556 struct b43_phy_n *nphy = dev->phy.n;
3557
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3558 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
3559 b43err(dev->wl, "MAC not suspended\n");
3560
3561 if (blocked) {
3562 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD,
3563 ~B43_NPHY_RFCTL_CMD_CHIP0PU);
3564 if (dev->phy.rev >= 3) {
3565 b43_radio_mask(dev, 0x09, ~0x2);
3566
3567 b43_radio_write(dev, 0x204D, 0);
3568 b43_radio_write(dev, 0x2053, 0);
3569 b43_radio_write(dev, 0x2058, 0);
3570 b43_radio_write(dev, 0x205E, 0);
3571 b43_radio_mask(dev, 0x2062, ~0xF0);
3572 b43_radio_write(dev, 0x2064, 0);
3573
3574 b43_radio_write(dev, 0x304D, 0);
3575 b43_radio_write(dev, 0x3053, 0);
3576 b43_radio_write(dev, 0x3058, 0);
3577 b43_radio_write(dev, 0x305E, 0);
3578 b43_radio_mask(dev, 0x3062, ~0xF0);
3579 b43_radio_write(dev, 0x3064, 0);
3580 }
3581 } else {
3582 if (dev->phy.rev >= 3) {
Rafał Miłeckid817f4e2010-03-29 00:53:12 +0200[diff] [blame]3583 b43_radio_init2056(dev);
Rafał Miłecki78159782010-10-06 07:50:08 +0200[diff] [blame]3584 b43_switch_channel(dev, dev->phy.channel);
Rafał Miłeckic2b7aef2010-02-27 13:03:34 +0100[diff] [blame]3585 } else {
3586 b43_radio_init2055(dev);
3587 }
3588 }
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3589}
3590
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3591static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
3592{
3593 b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
3594 on ? 0 : 0x7FFF);
3595}
3596
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3597static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
3598 unsigned int new_channel)
3599{
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3600 struct ieee80211_channel *channel = dev->wl->hw->conf.channel;
3601 enum nl80211_channel_type channel_type = dev->wl->hw->conf.channel_type;
Rafał Miłecki5e7ee092010-10-06 07:50:06 +0200[diff] [blame]3602
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3603 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
3604 if ((new_channel < 1) || (new_channel > 14))
3605 return -EINVAL;
3606 } else {
3607 if (new_channel > 200)
3608 return -EINVAL;
3609 }
3610
Rafał Miłeckia656b6a2010-10-11 03:11:01 +0200[diff] [blame]3611 return b43_nphy_set_channel(dev, channel, channel_type);
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3612}
3613
3614static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev)
3615{
3616 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3617 return 1;
3618 return 36;
3619}
3620
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3621const struct b43_phy_operations b43_phyops_n = {
3622 .allocate = b43_nphy_op_allocate,
Michael Bueschfb111372008-09-02 13:00:34 +0200[diff] [blame]3623 .free = b43_nphy_op_free,
3624 .prepare_structs = b43_nphy_op_prepare_structs,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3625 .init = b43_nphy_op_init,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3626 .phy_read = b43_nphy_op_read,
3627 .phy_write = b43_nphy_op_write,
3628 .radio_read = b43_nphy_op_radio_read,
3629 .radio_write = b43_nphy_op_radio_write,
3630 .software_rfkill = b43_nphy_op_software_rfkill,
Michael Bueschcb24f572008-09-03 12:12:20 +0200[diff] [blame]3631 .switch_analog = b43_nphy_op_switch_analog,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3632 .switch_channel = b43_nphy_op_switch_channel,
3633 .get_default_chan = b43_nphy_op_get_default_chan,
Michael Buesch18c8ade2008-08-28 19:33:40 +0200[diff] [blame]3634 .recalc_txpower = b43_nphy_op_recalc_txpower,
3635 .adjust_txpower = b43_nphy_op_adjust_txpower,
Michael Bueschef1a6282008-08-27 18:53:02 +0200[diff] [blame]3636};