Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SuperH Timer Support - TMU |
| 3 | * |
| 4 | * Copyright (C) 2009 Magnus Damm |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/init.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/spinlock.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/ioport.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/io.h> |
| 27 | #include <linux/clk.h> |
| 28 | #include <linux/irq.h> |
| 29 | #include <linux/err.h> |
| 30 | #include <linux/clocksource.h> |
| 31 | #include <linux/clockchips.h> |
Paul Mundt | 46a12f7 | 2009-05-03 17:57:17 +0900 | [diff] [blame] | 32 | #include <linux/sh_timer.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 33 | #include <linux/slab.h> |
Paul Gortmaker | 7deeab5 | 2011-07-03 13:36:22 -0400 | [diff] [blame] | 34 | #include <linux/module.h> |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 35 | #include <linux/pm_domain.h> |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 36 | #include <linux/pm_runtime.h> |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 37 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 38 | struct sh_tmu_device; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 39 | |
| 40 | struct sh_tmu_channel { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 41 | struct sh_tmu_device *tmu; |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 42 | unsigned int index; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 43 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 44 | void __iomem *base; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 45 | int irq; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 46 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 47 | unsigned long rate; |
| 48 | unsigned long periodic; |
| 49 | struct clock_event_device ced; |
| 50 | struct clocksource cs; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 51 | bool cs_enabled; |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 52 | unsigned int enable_count; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 53 | }; |
| 54 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 55 | struct sh_tmu_device { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 56 | struct platform_device *pdev; |
| 57 | |
| 58 | void __iomem *mapbase; |
| 59 | struct clk *clk; |
| 60 | |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 61 | struct sh_tmu_channel *channels; |
| 62 | unsigned int num_channels; |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 63 | }; |
| 64 | |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 65 | static DEFINE_RAW_SPINLOCK(sh_tmu_lock); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 66 | |
| 67 | #define TSTR -1 /* shared register */ |
| 68 | #define TCOR 0 /* channel register */ |
| 69 | #define TCNT 1 /* channel register */ |
| 70 | #define TCR 2 /* channel register */ |
| 71 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 72 | static inline unsigned long sh_tmu_read(struct sh_tmu_channel *ch, int reg_nr) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 73 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 74 | unsigned long offs; |
| 75 | |
| 76 | if (reg_nr == TSTR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 77 | return ioread8(ch->tmu->mapbase); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 78 | |
| 79 | offs = reg_nr << 2; |
| 80 | |
| 81 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 82 | return ioread16(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 83 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 84 | return ioread32(ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 85 | } |
| 86 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 87 | static inline void sh_tmu_write(struct sh_tmu_channel *ch, int reg_nr, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 88 | unsigned long value) |
| 89 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 90 | unsigned long offs; |
| 91 | |
| 92 | if (reg_nr == TSTR) { |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 93 | iowrite8(value, ch->tmu->mapbase); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 94 | return; |
| 95 | } |
| 96 | |
| 97 | offs = reg_nr << 2; |
| 98 | |
| 99 | if (reg_nr == TCR) |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 100 | iowrite16(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 101 | else |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 102 | iowrite32(value, ch->base + offs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 105 | static void sh_tmu_start_stop_ch(struct sh_tmu_channel *ch, int start) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 106 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 107 | unsigned long flags, value; |
| 108 | |
| 109 | /* start stop register shared by multiple timer channels */ |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 110 | raw_spin_lock_irqsave(&sh_tmu_lock, flags); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 111 | value = sh_tmu_read(ch, TSTR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 112 | |
| 113 | if (start) |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 114 | value |= 1 << ch->index; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 115 | else |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 116 | value &= ~(1 << ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 117 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 118 | sh_tmu_write(ch, TSTR, value); |
Paul Mundt | c2225a5 | 2012-05-25 13:39:09 +0900 | [diff] [blame] | 119 | raw_spin_unlock_irqrestore(&sh_tmu_lock, flags); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 120 | } |
| 121 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 122 | static int __sh_tmu_enable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 123 | { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 124 | int ret; |
| 125 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 126 | /* enable clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 127 | ret = clk_enable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 128 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 129 | dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", |
| 130 | ch->index); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 131 | return ret; |
| 132 | } |
| 133 | |
| 134 | /* make sure channel is disabled */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 135 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 136 | |
| 137 | /* maximum timeout */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 138 | sh_tmu_write(ch, TCOR, 0xffffffff); |
| 139 | sh_tmu_write(ch, TCNT, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 140 | |
| 141 | /* configure channel to parent clock / 4, irq off */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 142 | ch->rate = clk_get_rate(ch->tmu->clk) / 4; |
| 143 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 144 | |
| 145 | /* enable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 146 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 151 | static int sh_tmu_enable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 152 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 153 | if (ch->enable_count++ > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 154 | return 0; |
| 155 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 156 | pm_runtime_get_sync(&ch->tmu->pdev->dev); |
| 157 | dev_pm_syscore_device(&ch->tmu->pdev->dev, true); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 158 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 159 | return __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 160 | } |
| 161 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 162 | static void __sh_tmu_disable(struct sh_tmu_channel *ch) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 163 | { |
| 164 | /* disable channel */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 165 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 166 | |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 167 | /* disable interrupts in TMU block */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 168 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | be890a1 | 2009-06-17 05:04:04 +0000 | [diff] [blame] | 169 | |
Paul Mundt | d4905ce | 2011-05-31 15:23:20 +0900 | [diff] [blame] | 170 | /* stop clock */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 171 | clk_disable(ch->tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 172 | } |
| 173 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 174 | static void sh_tmu_disable(struct sh_tmu_channel *ch) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 175 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 176 | if (WARN_ON(ch->enable_count == 0)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 177 | return; |
| 178 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 179 | if (--ch->enable_count > 0) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 180 | return; |
| 181 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 182 | __sh_tmu_disable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 183 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 184 | dev_pm_syscore_device(&ch->tmu->pdev->dev, false); |
| 185 | pm_runtime_put(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 186 | } |
| 187 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 188 | static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 189 | int periodic) |
| 190 | { |
| 191 | /* stop timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 192 | sh_tmu_start_stop_ch(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 193 | |
| 194 | /* acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 195 | sh_tmu_read(ch, TCR); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 196 | |
| 197 | /* enable interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 198 | sh_tmu_write(ch, TCR, 0x0020); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 199 | |
| 200 | /* reload delta value in case of periodic timer */ |
| 201 | if (periodic) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 202 | sh_tmu_write(ch, TCOR, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 203 | else |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 204 | sh_tmu_write(ch, TCOR, 0xffffffff); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 205 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 206 | sh_tmu_write(ch, TCNT, delta); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 207 | |
| 208 | /* start timer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 209 | sh_tmu_start_stop_ch(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id) |
| 213 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 214 | struct sh_tmu_channel *ch = dev_id; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 215 | |
| 216 | /* disable or acknowledge interrupt */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 217 | if (ch->ced.mode == CLOCK_EVT_MODE_ONESHOT) |
| 218 | sh_tmu_write(ch, TCR, 0x0000); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 219 | else |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 220 | sh_tmu_write(ch, TCR, 0x0020); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 221 | |
| 222 | /* notify clockevent layer */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 223 | ch->ced.event_handler(&ch->ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 224 | return IRQ_HANDLED; |
| 225 | } |
| 226 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 227 | static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 228 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 229 | return container_of(cs, struct sh_tmu_channel, cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 230 | } |
| 231 | |
| 232 | static cycle_t sh_tmu_clocksource_read(struct clocksource *cs) |
| 233 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 234 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 235 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 236 | return sh_tmu_read(ch, TCNT) ^ 0xffffffff; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 237 | } |
| 238 | |
| 239 | static int sh_tmu_clocksource_enable(struct clocksource *cs) |
| 240 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 241 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 242 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 243 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 244 | if (WARN_ON(ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 245 | return 0; |
| 246 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 247 | ret = sh_tmu_enable(ch); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 248 | if (!ret) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 249 | __clocksource_updatefreq_hz(cs, ch->rate); |
| 250 | ch->cs_enabled = true; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 251 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 252 | |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 253 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 254 | } |
| 255 | |
| 256 | static void sh_tmu_clocksource_disable(struct clocksource *cs) |
| 257 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 258 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 259 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 260 | if (WARN_ON(!ch->cs_enabled)) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 261 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 262 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 263 | sh_tmu_disable(ch); |
| 264 | ch->cs_enabled = false; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 265 | } |
| 266 | |
| 267 | static void sh_tmu_clocksource_suspend(struct clocksource *cs) |
| 268 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 269 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 270 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 271 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 272 | return; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 273 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 274 | if (--ch->enable_count == 0) { |
| 275 | __sh_tmu_disable(ch); |
| 276 | pm_genpd_syscore_poweroff(&ch->tmu->pdev->dev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 277 | } |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 278 | } |
| 279 | |
| 280 | static void sh_tmu_clocksource_resume(struct clocksource *cs) |
| 281 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 282 | struct sh_tmu_channel *ch = cs_to_sh_tmu(cs); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 283 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 284 | if (!ch->cs_enabled) |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 285 | return; |
| 286 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 287 | if (ch->enable_count++ == 0) { |
| 288 | pm_genpd_syscore_poweron(&ch->tmu->pdev->dev); |
| 289 | __sh_tmu_enable(ch); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 290 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 291 | } |
| 292 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 293 | static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch, |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 294 | const char *name, unsigned long rating) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 295 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 296 | struct clocksource *cs = &ch->cs; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 297 | |
| 298 | cs->name = name; |
| 299 | cs->rating = rating; |
| 300 | cs->read = sh_tmu_clocksource_read; |
| 301 | cs->enable = sh_tmu_clocksource_enable; |
| 302 | cs->disable = sh_tmu_clocksource_disable; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 303 | cs->suspend = sh_tmu_clocksource_suspend; |
| 304 | cs->resume = sh_tmu_clocksource_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 305 | cs->mask = CLOCKSOURCE_MASK(32); |
| 306 | cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; |
Aurelien Jarno | 66f4912 | 2010-05-31 21:45:48 +0000 | [diff] [blame] | 307 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 308 | dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", |
| 309 | ch->index); |
Magnus Damm | 0aeac45 | 2011-04-25 22:38:37 +0900 | [diff] [blame] | 310 | |
| 311 | /* Register with dummy 1 Hz value, gets updated in ->enable() */ |
| 312 | clocksource_register_hz(cs, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 313 | return 0; |
| 314 | } |
| 315 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 316 | static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 317 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 318 | return container_of(ced, struct sh_tmu_channel, ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 319 | } |
| 320 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 321 | static void sh_tmu_clock_event_start(struct sh_tmu_channel *ch, int periodic) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 322 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 323 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 324 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 325 | sh_tmu_enable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 326 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 327 | clockevents_config(ced, ch->rate); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 328 | |
| 329 | if (periodic) { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 330 | ch->periodic = (ch->rate + HZ/2) / HZ; |
| 331 | sh_tmu_set_next(ch, ch->periodic, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 332 | } |
| 333 | } |
| 334 | |
| 335 | static void sh_tmu_clock_event_mode(enum clock_event_mode mode, |
| 336 | struct clock_event_device *ced) |
| 337 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 338 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 339 | int disabled = 0; |
| 340 | |
| 341 | /* deal with old setting first */ |
| 342 | switch (ced->mode) { |
| 343 | case CLOCK_EVT_MODE_PERIODIC: |
| 344 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 345 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 346 | disabled = 1; |
| 347 | break; |
| 348 | default: |
| 349 | break; |
| 350 | } |
| 351 | |
| 352 | switch (mode) { |
| 353 | case CLOCK_EVT_MODE_PERIODIC: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 354 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 355 | "ch%u: used for periodic clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 356 | sh_tmu_clock_event_start(ch, 1); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 357 | break; |
| 358 | case CLOCK_EVT_MODE_ONESHOT: |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 359 | dev_info(&ch->tmu->pdev->dev, |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 360 | "ch%u: used for oneshot clock events\n", ch->index); |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 361 | sh_tmu_clock_event_start(ch, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 362 | break; |
| 363 | case CLOCK_EVT_MODE_UNUSED: |
| 364 | if (!disabled) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 365 | sh_tmu_disable(ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 366 | break; |
| 367 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 368 | default: |
| 369 | break; |
| 370 | } |
| 371 | } |
| 372 | |
| 373 | static int sh_tmu_clock_event_next(unsigned long delta, |
| 374 | struct clock_event_device *ced) |
| 375 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 376 | struct sh_tmu_channel *ch = ced_to_sh_tmu(ced); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 377 | |
| 378 | BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT); |
| 379 | |
| 380 | /* program new delta value */ |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 381 | sh_tmu_set_next(ch, delta, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 382 | return 0; |
| 383 | } |
| 384 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 385 | static void sh_tmu_clock_event_suspend(struct clock_event_device *ced) |
| 386 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 387 | pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 388 | } |
| 389 | |
| 390 | static void sh_tmu_clock_event_resume(struct clock_event_device *ced) |
| 391 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 392 | pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->tmu->pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 393 | } |
| 394 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 395 | static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 396 | const char *name, unsigned long rating) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 397 | { |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 398 | struct clock_event_device *ced = &ch->ced; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 399 | int ret; |
| 400 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 401 | ced->name = name; |
| 402 | ced->features = CLOCK_EVT_FEAT_PERIODIC; |
| 403 | ced->features |= CLOCK_EVT_FEAT_ONESHOT; |
| 404 | ced->rating = rating; |
| 405 | ced->cpumask = cpumask_of(0); |
| 406 | ced->set_next_event = sh_tmu_clock_event_next; |
| 407 | ced->set_mode = sh_tmu_clock_event_mode; |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 408 | ced->suspend = sh_tmu_clock_event_suspend; |
| 409 | ced->resume = sh_tmu_clock_event_resume; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 410 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 411 | dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", |
| 412 | ch->index); |
Paul Mundt | 3977407 | 2012-06-11 17:10:16 +0900 | [diff] [blame] | 413 | |
| 414 | clockevents_config_and_register(ced, 1, 0x300, 0xffffffff); |
Paul Mundt | da64c2a | 2010-02-25 16:37:46 +0900 | [diff] [blame] | 415 | |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 416 | ret = request_irq(ch->irq, sh_tmu_interrupt, |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 417 | IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 418 | dev_name(&ch->tmu->pdev->dev), ch); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 419 | if (ret) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 420 | dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", |
| 421 | ch->index, ch->irq); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 422 | return; |
| 423 | } |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 424 | } |
| 425 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 426 | static int sh_tmu_register(struct sh_tmu_channel *ch, const char *name, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 427 | unsigned long clockevent_rating, |
| 428 | unsigned long clocksource_rating) |
| 429 | { |
| 430 | if (clockevent_rating) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 431 | sh_tmu_register_clockevent(ch, name, clockevent_rating); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 432 | else if (clocksource_rating) |
Laurent Pinchart | de2d12c | 2014-01-27 15:29:19 +0100 | [diff] [blame] | 433 | sh_tmu_register_clocksource(ch, name, clocksource_rating); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 434 | |
| 435 | return 0; |
| 436 | } |
| 437 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 438 | static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, |
| 439 | struct sh_tmu_device *tmu) |
| 440 | { |
| 441 | struct sh_timer_config *cfg = tmu->pdev->dev.platform_data; |
| 442 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 443 | ch->tmu = tmu; |
| 444 | |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 445 | /* |
| 446 | * The SH3 variant (SH770x, SH7705, SH7710 and SH7720) maps channel |
| 447 | * registers blocks at base + 2 + 12 * index, while all other variants |
| 448 | * map them at base + 4 + 12 * index. We can compute the index by just |
| 449 | * dividing by 12, the 2 bytes or 4 bytes offset being hidden by the |
| 450 | * integer division. |
| 451 | */ |
| 452 | ch->index = cfg->channel_offset / 12; |
| 453 | |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 454 | ch->irq = platform_get_irq(tmu->pdev, 0); |
| 455 | if (ch->irq < 0) { |
Laurent Pinchart | fe68eb8 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 456 | dev_err(&tmu->pdev->dev, "ch%u: failed to get irq\n", |
| 457 | ch->index); |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 458 | return ch->irq; |
| 459 | } |
| 460 | |
| 461 | ch->cs_enabled = false; |
| 462 | ch->enable_count = 0; |
| 463 | |
Laurent Pinchart | 84876d0 | 2014-02-17 16:04:16 +0100 | [diff] [blame] | 464 | return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), |
Laurent Pinchart | a94ddaa | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 465 | cfg->clockevent_rating, |
| 466 | cfg->clocksource_rating); |
| 467 | } |
| 468 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 469 | static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 470 | { |
Paul Mundt | 46a12f7 | 2009-05-03 17:57:17 +0900 | [diff] [blame] | 471 | struct sh_timer_config *cfg = pdev->dev.platform_data; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 472 | struct resource *res; |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 473 | void __iomem *base; |
Laurent Pinchart | 1c56cf6 | 2014-02-17 11:27:49 +0100 | [diff] [blame] | 474 | int ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 475 | ret = -ENXIO; |
| 476 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 477 | tmu->pdev = pdev; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 478 | |
| 479 | if (!cfg) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 480 | dev_err(&tmu->pdev->dev, "missing platform data\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 481 | goto err0; |
| 482 | } |
| 483 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 484 | platform_set_drvdata(pdev, tmu); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 485 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 486 | res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 487 | if (!res) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 488 | dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 489 | goto err0; |
| 490 | } |
| 491 | |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 492 | /* |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 493 | * Map memory, let base point to our channel and mapbase to the |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 494 | * start/stop shared register. |
| 495 | */ |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 496 | base = ioremap_nocache(res->start, resource_size(res)); |
| 497 | if (base == NULL) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 498 | dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 499 | goto err0; |
| 500 | } |
| 501 | |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 502 | tmu->mapbase = base - cfg->channel_offset; |
Laurent Pinchart | de69346 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 503 | |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 504 | /* get hold of clock */ |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 505 | tmu->clk = clk_get(&tmu->pdev->dev, "tmu_fck"); |
| 506 | if (IS_ERR(tmu->clk)) { |
| 507 | dev_err(&tmu->pdev->dev, "cannot get clock\n"); |
| 508 | ret = PTR_ERR(tmu->clk); |
Magnus Damm | 03ff858 | 2010-10-13 07:36:38 +0000 | [diff] [blame] | 509 | goto err1; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 510 | } |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 511 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 512 | ret = clk_prepare(tmu->clk); |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 513 | if (ret < 0) |
| 514 | goto err2; |
| 515 | |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 516 | tmu->channels = kzalloc(sizeof(*tmu->channels), GFP_KERNEL); |
| 517 | if (tmu->channels == NULL) { |
| 518 | ret = -ENOMEM; |
| 519 | goto err3; |
| 520 | } |
| 521 | |
| 522 | tmu->num_channels = 1; |
| 523 | |
| 524 | tmu->channels[0].base = base; |
| 525 | |
| 526 | ret = sh_tmu_channel_setup(&tmu->channels[0], tmu); |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 527 | if (ret < 0) |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 528 | goto err3; |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 529 | |
| 530 | return 0; |
| 531 | |
Laurent Pinchart | 1c09eb3 | 2013-11-08 11:08:00 +0100 | [diff] [blame] | 532 | err3: |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 533 | kfree(tmu->channels); |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 534 | clk_unprepare(tmu->clk); |
Laurent Pinchart | 394a448 | 2013-11-08 11:07:59 +0100 | [diff] [blame] | 535 | err2: |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 536 | clk_put(tmu->clk); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 537 | err1: |
Laurent Pinchart | a5de49f | 2014-01-27 22:04:17 +0100 | [diff] [blame^] | 538 | iounmap(base); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 539 | err0: |
| 540 | return ret; |
| 541 | } |
| 542 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 543 | static int sh_tmu_probe(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 544 | { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 545 | struct sh_tmu_device *tmu = platform_get_drvdata(pdev); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 546 | struct sh_timer_config *cfg = pdev->dev.platform_data; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 547 | int ret; |
| 548 | |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 549 | if (!is_early_platform_device(pdev)) { |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 550 | pm_runtime_set_active(&pdev->dev); |
| 551 | pm_runtime_enable(&pdev->dev); |
Rafael J. Wysocki | eaa49a8 | 2012-08-06 01:41:20 +0200 | [diff] [blame] | 552 | } |
Rafael J. Wysocki | 2ee619f | 2012-03-13 22:40:00 +0100 | [diff] [blame] | 553 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 554 | if (tmu) { |
Paul Mundt | 214a607 | 2010-03-10 16:26:25 +0900 | [diff] [blame] | 555 | dev_info(&pdev->dev, "kept as earlytimer\n"); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 556 | goto out; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 557 | } |
| 558 | |
Laurent Pinchart | 3b77a83 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 559 | tmu = kzalloc(sizeof(*tmu), GFP_KERNEL); |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 560 | if (tmu == NULL) { |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 561 | dev_err(&pdev->dev, "failed to allocate driver data\n"); |
| 562 | return -ENOMEM; |
| 563 | } |
| 564 | |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 565 | ret = sh_tmu_setup(tmu, pdev); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 566 | if (ret) { |
Laurent Pinchart | 0a72aa3 | 2014-01-27 22:04:17 +0100 | [diff] [blame] | 567 | kfree(tmu); |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 568 | pm_runtime_idle(&pdev->dev); |
| 569 | return ret; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 570 | } |
Rafael J. Wysocki | 61a53bf | 2012-08-06 01:48:17 +0200 | [diff] [blame] | 571 | if (is_early_platform_device(pdev)) |
| 572 | return 0; |
| 573 | |
| 574 | out: |
| 575 | if (cfg->clockevent_rating || cfg->clocksource_rating) |
| 576 | pm_runtime_irq_safe(&pdev->dev); |
| 577 | else |
| 578 | pm_runtime_idle(&pdev->dev); |
| 579 | |
| 580 | return 0; |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 581 | } |
| 582 | |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 583 | static int sh_tmu_remove(struct platform_device *pdev) |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 584 | { |
| 585 | return -EBUSY; /* cannot unregister clockevent and clocksource */ |
| 586 | } |
| 587 | |
| 588 | static struct platform_driver sh_tmu_device_driver = { |
| 589 | .probe = sh_tmu_probe, |
Greg Kroah-Hartman | 1850514 | 2012-12-21 15:11:38 -0800 | [diff] [blame] | 590 | .remove = sh_tmu_remove, |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 591 | .driver = { |
| 592 | .name = "sh_tmu", |
| 593 | } |
| 594 | }; |
| 595 | |
| 596 | static int __init sh_tmu_init(void) |
| 597 | { |
| 598 | return platform_driver_register(&sh_tmu_device_driver); |
| 599 | } |
| 600 | |
| 601 | static void __exit sh_tmu_exit(void) |
| 602 | { |
| 603 | platform_driver_unregister(&sh_tmu_device_driver); |
| 604 | } |
| 605 | |
| 606 | early_platform_init("earlytimer", &sh_tmu_device_driver); |
Simon Horman | b9773c3 | 2013-03-05 15:40:42 +0900 | [diff] [blame] | 607 | subsys_initcall(sh_tmu_init); |
Magnus Damm | 9570ef2 | 2009-05-01 06:51:00 +0000 | [diff] [blame] | 608 | module_exit(sh_tmu_exit); |
| 609 | |
| 610 | MODULE_AUTHOR("Magnus Damm"); |
| 611 | MODULE_DESCRIPTION("SuperH TMU Timer Driver"); |
| 612 | MODULE_LICENSE("GPL v2"); |