| Mike Rapoport | a7f3f03 | 2008-10-05 10:26:55 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/cm-x255.c |
| 3 | * |
| 4 | * Copyright (C) 2007, 2008 CompuLab, Ltd. |
| 5 | * Mike Rapoport <mike@compulab.co.il> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/irq.h> |
| 14 | #include <linux/gpio.h> |
| 15 | |
| 16 | #include <linux/spi/spi.h> |
| 17 | |
| 18 | #include <asm/mach/arch.h> |
| 19 | #include <asm/mach-types.h> |
| 20 | #include <asm/mach/map.h> |
| 21 | |
| 22 | #include <mach/pxa2xx-regs.h> |
| 23 | #include <mach/mfp-pxa25x.h> |
| 24 | #include <mach/pxa2xx_spi.h> |
| 25 | #include <mach/bitfield.h> |
| 26 | |
| 27 | #include "generic.h" |
| 28 | |
| 29 | static unsigned long cmx255_pin_config[] = { |
| 30 | /* AC'97 */ |
| 31 | GPIO28_AC97_BITCLK, |
| 32 | GPIO29_AC97_SDATA_IN_0, |
| 33 | GPIO30_AC97_SDATA_OUT, |
| 34 | GPIO31_AC97_SYNC, |
| 35 | |
| 36 | /* BTUART */ |
| 37 | GPIO42_BTUART_RXD, |
| 38 | GPIO43_BTUART_TXD, |
| 39 | GPIO44_BTUART_CTS, |
| 40 | GPIO45_BTUART_RTS, |
| 41 | |
| 42 | /* STUART */ |
| 43 | GPIO46_STUART_RXD, |
| 44 | GPIO47_STUART_TXD, |
| 45 | |
| 46 | /* LCD */ |
| 47 | GPIO58_LCD_LDD_0, |
| 48 | GPIO59_LCD_LDD_1, |
| 49 | GPIO60_LCD_LDD_2, |
| 50 | GPIO61_LCD_LDD_3, |
| 51 | GPIO62_LCD_LDD_4, |
| 52 | GPIO63_LCD_LDD_5, |
| 53 | GPIO64_LCD_LDD_6, |
| 54 | GPIO65_LCD_LDD_7, |
| 55 | GPIO66_LCD_LDD_8, |
| 56 | GPIO67_LCD_LDD_9, |
| 57 | GPIO68_LCD_LDD_10, |
| 58 | GPIO69_LCD_LDD_11, |
| 59 | GPIO70_LCD_LDD_12, |
| 60 | GPIO71_LCD_LDD_13, |
| 61 | GPIO72_LCD_LDD_14, |
| 62 | GPIO73_LCD_LDD_15, |
| 63 | GPIO74_LCD_FCLK, |
| 64 | GPIO75_LCD_LCLK, |
| 65 | GPIO76_LCD_PCLK, |
| 66 | GPIO77_LCD_BIAS, |
| 67 | |
| 68 | /* SSP1 */ |
| 69 | GPIO23_SSP1_SCLK, |
| 70 | GPIO24_SSP1_SFRM, |
| 71 | GPIO25_SSP1_TXD, |
| 72 | GPIO26_SSP1_RXD, |
| 73 | |
| 74 | /* SSP2 */ |
| 75 | GPIO81_SSP2_CLK_OUT, |
| 76 | GPIO82_SSP2_FRM_OUT, |
| 77 | GPIO83_SSP2_TXD, |
| 78 | GPIO84_SSP2_RXD, |
| 79 | |
| 80 | /* PC Card */ |
| 81 | GPIO48_nPOE, |
| 82 | GPIO49_nPWE, |
| 83 | GPIO50_nPIOR, |
| 84 | GPIO51_nPIOW, |
| 85 | GPIO52_nPCE_1, |
| 86 | GPIO53_nPCE_2, |
| 87 | GPIO54_nPSKTSEL, |
| 88 | GPIO55_nPREG, |
| 89 | GPIO56_nPWAIT, |
| 90 | GPIO57_nIOIS16, |
| 91 | |
| 92 | /* SDRAM and local bus */ |
| 93 | GPIO15_nCS_1, |
| 94 | GPIO78_nCS_2, |
| 95 | GPIO79_nCS_3, |
| 96 | GPIO80_nCS_4, |
| 97 | GPIO33_nCS_5, |
| 98 | GPIO18_RDY, |
| 99 | |
| 100 | /* GPIO */ |
| 101 | GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH, |
| 102 | GPIO9_GPIO, /* PC card reset */ |
| 103 | |
| 104 | /* NAND controls */ |
| 105 | GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */ |
| 106 | GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */ |
| 107 | GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */ |
| 108 | GPIO10_GPIO, /* NAND Ready/Busy */ |
| 109 | |
| 110 | /* interrupts */ |
| 111 | GPIO22_GPIO, /* DM9000 interrupt */ |
| 112 | }; |
| 113 | |
| 114 | #if defined(CONFIG_SPI_PXA2XX) |
| 115 | static struct pxa2xx_spi_master pxa_ssp_master_info = { |
| 116 | .num_chipselect = 1, |
| 117 | }; |
| 118 | |
| 119 | static struct spi_board_info spi_board_info[] __initdata = { |
| 120 | [0] = { |
| 121 | .modalias = "rtc-max6902", |
| 122 | .max_speed_hz = 1000000, |
| 123 | .bus_num = 1, |
| 124 | .chip_select = 0, |
| 125 | }, |
| 126 | }; |
| 127 | |
| 128 | static void __init cmx255_init_rtc(void) |
| 129 | { |
| 130 | pxa2xx_set_spi_info(1, &pxa_ssp_master_info); |
| 131 | spi_register_board_info(ARRAY_AND_SIZE(spi_board_info)); |
| 132 | } |
| 133 | #else |
| 134 | static inline void cmx255_init_rtc(void) {} |
| 135 | #endif |
| 136 | |
| 137 | void __init cmx255_init(void) |
| 138 | { |
| 139 | pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config)); |
| 140 | |
| 141 | cmx255_init_rtc(); |
| 142 | } |