blob: 42f8f62cf3d424b0647cac8506e75704419aca4a [file] [log] [blame]
Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
2 * linux/drivers/video/omap2/dss/dss.h
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#ifndef __OMAP2_DSS_H
24#define __OMAP2_DSS_H
25
26#ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
27#define DEBUG
28#endif
29
30#ifdef DEBUG
Rusty Russell90ab5ee2012-01-13 09:32:20 +103031extern bool dss_debug;
Tomi Valkeinen559d6702009-11-03 11:23:50 +020032#ifdef DSS_SUBSYS_NAME
33#define DSSDBG(format, ...) \
34 if (dss_debug) \
35 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
36 ## __VA_ARGS__)
37#else
38#define DSSDBG(format, ...) \
39 if (dss_debug) \
40 printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
41#endif
42
43#ifdef DSS_SUBSYS_NAME
44#define DSSDBGF(format, ...) \
45 if (dss_debug) \
46 printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
47 ": %s(" format ")\n", \
48 __func__, \
49 ## __VA_ARGS__)
50#else
51#define DSSDBGF(format, ...) \
52 if (dss_debug) \
53 printk(KERN_DEBUG "omapdss: " \
54 ": %s(" format ")\n", \
55 __func__, \
56 ## __VA_ARGS__)
57#endif
58
59#else /* DEBUG */
60#define DSSDBG(format, ...)
61#define DSSDBGF(format, ...)
62#endif
63
64
65#ifdef DSS_SUBSYS_NAME
66#define DSSERR(format, ...) \
67 printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
68 ## __VA_ARGS__)
69#else
70#define DSSERR(format, ...) \
71 printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
72#endif
73
74#ifdef DSS_SUBSYS_NAME
75#define DSSINFO(format, ...) \
76 printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
77 ## __VA_ARGS__)
78#else
79#define DSSINFO(format, ...) \
80 printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
81#endif
82
83#ifdef DSS_SUBSYS_NAME
84#define DSSWARN(format, ...) \
85 printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
86 ## __VA_ARGS__)
87#else
88#define DSSWARN(format, ...) \
89 printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
90#endif
91
92/* OMAP TRM gives bitfields as start:end, where start is the higher bit
93 number. For example 7:0 */
94#define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
95#define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
96#define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
97#define FLD_MOD(orig, val, start, end) \
98 (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
99
Archit Taneja569969d2011-08-22 17:41:57 +0530100enum dss_io_pad_mode {
101 DSS_IO_PAD_MODE_RESET,
102 DSS_IO_PAD_MODE_RFBI,
103 DSS_IO_PAD_MODE_BYPASS,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200104};
105
Mythri P K7ed024a2011-03-09 16:31:38 +0530106enum dss_hdmi_venc_clk_source_select {
107 DSS_VENC_TV_CLK = 0,
108 DSS_HDMI_M_PCLK = 1,
109};
110
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530111enum dss_dsi_content_type {
112 DSS_DSI_CONTENT_DCS,
113 DSS_DSI_CONTENT_GENERIC,
114};
115
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200116struct dss_clock_info {
117 /* rates that we get with dividers below */
118 unsigned long fck;
119
120 /* dividers */
121 u16 fck_div;
122};
123
124struct dispc_clock_info {
125 /* rates that we get with dividers below */
126 unsigned long lck;
127 unsigned long pck;
128
129 /* dividers */
130 u16 lck_div;
131 u16 pck_div;
132};
133
134struct dsi_clock_info {
135 /* rates that we get with dividers below */
136 unsigned long fint;
137 unsigned long clkin4ddr;
138 unsigned long clkin;
Taneja, Architea751592011-03-08 05:50:35 -0600139 unsigned long dsi_pll_hsdiv_dispc_clk; /* OMAP3: DSI1_PLL_CLK
140 * OMAP4: PLLx_CLK1 */
141 unsigned long dsi_pll_hsdiv_dsi_clk; /* OMAP3: DSI2_PLL_CLK
142 * OMAP4: PLLx_CLK2 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200143 unsigned long lp_clk;
144
145 /* dividers */
146 u16 regn;
147 u16 regm;
Taneja, Architea751592011-03-08 05:50:35 -0600148 u16 regm_dispc; /* OMAP3: REGM3
149 * OMAP4: REGM4 */
150 u16 regm_dsi; /* OMAP3: REGM4
151 * OMAP4: REGM5 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200152 u16 lp_clk_div;
153
154 u8 highfreq;
Archit Taneja1bb47832011-02-24 14:17:30 +0530155 bool use_sys_clk;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200156};
157
158struct seq_file;
159struct platform_device;
160
161/* core */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200162struct bus_type *dss_get_bus(void);
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200163struct regulator *dss_get_vdds_dsi(void);
164struct regulator *dss_get_vdds_sdi(void);
Tomi Valkeinena8081d32012-03-08 12:52:38 +0200165int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200166
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200167/* apply */
168void dss_apply_init(void);
169int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr);
170int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
171void dss_mgr_start_update(struct omap_overlay_manager *mgr);
172int omap_dss_mgr_apply(struct omap_overlay_manager *mgr);
Tomi Valkeineneb70d732011-11-15 12:15:18 +0200173
Tomi Valkeinen2a4ee7e2011-11-21 13:34:48 +0200174int dss_mgr_enable(struct omap_overlay_manager *mgr);
Tomi Valkeinen7797c6d2011-11-04 10:22:46 +0200175void dss_mgr_disable(struct omap_overlay_manager *mgr);
Tomi Valkeineneb70d732011-11-15 12:15:18 +0200176int dss_mgr_set_info(struct omap_overlay_manager *mgr,
177 struct omap_overlay_manager_info *info);
178void dss_mgr_get_info(struct omap_overlay_manager *mgr,
179 struct omap_overlay_manager_info *info);
180int dss_mgr_set_device(struct omap_overlay_manager *mgr,
181 struct omap_dss_device *dssdev);
182int dss_mgr_unset_device(struct omap_overlay_manager *mgr);
Tomi Valkeinen58f255482011-11-04 09:48:54 +0200183
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200184bool dss_ovl_is_enabled(struct omap_overlay *ovl);
185int dss_ovl_enable(struct omap_overlay *ovl);
186int dss_ovl_disable(struct omap_overlay *ovl);
Tomi Valkeinenf77b3072011-11-15 12:11:11 +0200187int dss_ovl_set_info(struct omap_overlay *ovl,
188 struct omap_overlay_info *info);
189void dss_ovl_get_info(struct omap_overlay *ovl,
190 struct omap_overlay_info *info);
191int dss_ovl_set_manager(struct omap_overlay *ovl,
192 struct omap_overlay_manager *mgr);
193int dss_ovl_unset_manager(struct omap_overlay *ovl);
194
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200195/* display */
196int dss_suspend_all_devices(void);
197int dss_resume_all_devices(void);
198void dss_disable_all_devices(void);
199
200void dss_init_device(struct platform_device *pdev,
201 struct omap_dss_device *dssdev);
202void dss_uninit_device(struct platform_device *pdev,
203 struct omap_dss_device *dssdev);
204bool dss_use_replication(struct omap_dss_device *dssdev,
205 enum omap_color_mode mode);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200206
207/* manager */
208int dss_init_overlay_managers(struct platform_device *pdev);
209void dss_uninit_overlay_managers(struct platform_device *pdev);
Tomi Valkeinen54540d42011-12-13 13:18:52 +0200210int dss_mgr_simple_check(struct omap_overlay_manager *mgr,
211 const struct omap_overlay_manager_info *info);
Tomi Valkeinen6ac48d12011-12-08 10:32:37 +0200212int dss_mgr_check(struct omap_overlay_manager *mgr,
213 struct omap_dss_device *dssdev,
214 struct omap_overlay_manager_info *info,
215 struct omap_overlay_info **overlay_infos);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200216
217/* overlay */
218void dss_init_overlays(struct platform_device *pdev);
219void dss_uninit_overlays(struct platform_device *pdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200220void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200221void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
Tomi Valkeinen54540d42011-12-13 13:18:52 +0200222int dss_ovl_simple_check(struct omap_overlay *ovl,
223 const struct omap_overlay_info *info);
Tomi Valkeinen6ac48d12011-12-08 10:32:37 +0200224int dss_ovl_check(struct omap_overlay *ovl,
225 struct omap_overlay_info *info, struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200226
227/* DSS */
Senthilvadivu Guruswamy96c401b2011-01-24 06:21:57 +0000228int dss_init_platform_driver(void);
229void dss_uninit_platform_driver(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200230
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300231int dss_runtime_get(void);
232void dss_runtime_put(void);
233
Mythri P K7ed024a2011-03-09 16:31:38 +0530234void dss_select_hdmi_venc_clk_source(enum dss_hdmi_venc_clk_source_select);
Tomi Valkeinen4a61e262011-08-31 14:33:31 +0300235enum dss_hdmi_venc_clk_source_select dss_get_hdmi_venc_clk_source(void);
Archit Taneja89a35e52011-04-12 13:52:23 +0530236const char *dss_get_generic_clk_source_name(enum omap_dss_clk_source clk_src);
Senthilvadivu Guruswamy8b9cb3a2011-01-24 06:21:58 +0000237void dss_dump_clocks(struct seq_file *s);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200238
239void dss_dump_regs(struct seq_file *s);
Senthilvadivu Guruswamy8b9cb3a2011-01-24 06:21:58 +0000240#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
241void dss_debug_dump_clocks(struct seq_file *s);
242#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200243
244void dss_sdi_init(u8 datapairs);
245int dss_sdi_enable(void);
246void dss_sdi_disable(void);
247
Archit Taneja89a35e52011-04-12 13:52:23 +0530248void dss_select_dispc_clk_source(enum omap_dss_clk_source clk_src);
Archit Taneja5a8b5722011-05-12 17:26:29 +0530249void dss_select_dsi_clk_source(int dsi_module,
250 enum omap_dss_clk_source clk_src);
Taneja, Architea751592011-03-08 05:50:35 -0600251void dss_select_lcd_clk_source(enum omap_channel channel,
Archit Taneja89a35e52011-04-12 13:52:23 +0530252 enum omap_dss_clk_source clk_src);
253enum omap_dss_clk_source dss_get_dispc_clk_source(void);
Archit Taneja5a8b5722011-05-12 17:26:29 +0530254enum omap_dss_clk_source dss_get_dsi_clk_source(int dsi_module);
Archit Taneja89a35e52011-04-12 13:52:23 +0530255enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
Tomi Valkeinen2f18c4d2010-01-08 18:00:36 +0200256
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200257void dss_set_venc_output(enum omap_dss_venc_type type);
258void dss_set_dac_pwrdn_bgz(bool enable);
259
260unsigned long dss_get_dpll4_rate(void);
261int dss_calc_clock_rates(struct dss_clock_info *cinfo);
262int dss_set_clock_div(struct dss_clock_info *cinfo);
263int dss_get_clock_div(struct dss_clock_info *cinfo);
264int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
265 struct dss_clock_info *dss_cinfo,
266 struct dispc_clock_info *dispc_cinfo);
267
268/* SDI */
Jani Nikula368a1482010-05-07 11:58:41 +0200269#ifdef CONFIG_OMAP2_DSS_SDI
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200270int sdi_init(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200271void sdi_exit(void);
272int sdi_init_display(struct omap_dss_device *display);
Jani Nikula368a1482010-05-07 11:58:41 +0200273#else
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200274static inline int sdi_init(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200275{
276 return 0;
277}
278static inline void sdi_exit(void)
279{
280}
281#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200282
283/* DSI */
Jani Nikula368a1482010-05-07 11:58:41 +0200284#ifdef CONFIG_OMAP2_DSS_DSI
Archit Taneja5a8b5722011-05-12 17:26:29 +0530285
286struct dentry;
287struct file_operations;
288
Senthilvadivu Guruswamyc8aac012011-01-24 06:22:02 +0000289int dsi_init_platform_driver(void);
290void dsi_uninit_platform_driver(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200291
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300292int dsi_runtime_get(struct platform_device *dsidev);
293void dsi_runtime_put(struct platform_device *dsidev);
294
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200295void dsi_dump_clocks(struct seq_file *s);
Archit Taneja5a8b5722011-05-12 17:26:29 +0530296void dsi_create_debugfs_files_irq(struct dentry *debugfs_dir,
297 const struct file_operations *debug_fops);
298void dsi_create_debugfs_files_reg(struct dentry *debugfs_dir,
299 const struct file_operations *debug_fops);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200300
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200301int dsi_init_display(struct omap_dss_device *display);
302void dsi_irq_handler(void);
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530303u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt);
304
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530305unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev);
306int dsi_pll_set_clock_div(struct platform_device *dsidev,
307 struct dsi_clock_info *cinfo);
308int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev, bool is_tft,
309 unsigned long req_pck, struct dsi_clock_info *cinfo,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200310 struct dispc_clock_info *dispc_cinfo);
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530311int dsi_pll_init(struct platform_device *dsidev, bool enable_hsclk,
312 bool enable_hsdiv);
313void dsi_pll_uninit(struct platform_device *dsidev, bool disconnect_lanes);
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530314void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev);
315void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev);
316struct platform_device *dsi_get_dsidev_from_id(int module);
Jani Nikula368a1482010-05-07 11:58:41 +0200317#else
Senthilvadivu Guruswamyc8aac012011-01-24 06:22:02 +0000318static inline int dsi_init_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200319{
320 return 0;
321}
Senthilvadivu Guruswamyc8aac012011-01-24 06:22:02 +0000322static inline void dsi_uninit_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200323{
324}
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300325static inline int dsi_runtime_get(struct platform_device *dsidev)
326{
327 return 0;
328}
329static inline void dsi_runtime_put(struct platform_device *dsidev)
330{
331}
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530332static inline u8 dsi_get_pixel_size(enum omap_dss_dsi_pixel_format fmt)
333{
334 WARN("%s: DSI not compiled in, returning pixel_size as 0\n", __func__);
335 return 0;
336}
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530337static inline unsigned long dsi_get_pll_hsdiv_dispc_rate(struct platform_device *dsidev)
Taneja, Archit66534e82011-03-08 05:50:34 -0600338{
339 WARN("%s: DSI not compiled in, returning rate as 0\n", __func__);
340 return 0;
341}
Tomi Valkeinen943e4452011-04-30 15:38:15 +0300342static inline int dsi_pll_set_clock_div(struct platform_device *dsidev,
343 struct dsi_clock_info *cinfo)
344{
345 WARN("%s: DSI not compiled in\n", __func__);
346 return -ENODEV;
347}
348static inline int dsi_pll_calc_clock_div_pck(struct platform_device *dsidev,
349 bool is_tft, unsigned long req_pck,
350 struct dsi_clock_info *dsi_cinfo,
351 struct dispc_clock_info *dispc_cinfo)
352{
353 WARN("%s: DSI not compiled in\n", __func__);
354 return -ENODEV;
355}
356static inline int dsi_pll_init(struct platform_device *dsidev,
357 bool enable_hsclk, bool enable_hsdiv)
358{
359 WARN("%s: DSI not compiled in\n", __func__);
360 return -ENODEV;
361}
362static inline void dsi_pll_uninit(struct platform_device *dsidev,
363 bool disconnect_lanes)
364{
365}
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530366static inline void dsi_wait_pll_hsdiv_dispc_active(struct platform_device *dsidev)
Tomi Valkeinene406f902010-06-09 15:28:12 +0300367{
368}
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530369static inline void dsi_wait_pll_hsdiv_dsi_active(struct platform_device *dsidev)
Tomi Valkeinene406f902010-06-09 15:28:12 +0300370{
371}
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530372static inline struct platform_device *dsi_get_dsidev_from_id(int module)
373{
374 WARN("%s: DSI not compiled in, returning platform device as NULL\n",
375 __func__);
376 return NULL;
377}
Jani Nikula368a1482010-05-07 11:58:41 +0200378#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200379
380/* DPI */
Jani Nikula368a1482010-05-07 11:58:41 +0200381#ifdef CONFIG_OMAP2_DSS_DPI
Tomi Valkeinen277b2882011-03-02 12:32:48 +0200382int dpi_init(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200383void dpi_exit(void);
384int dpi_init_display(struct omap_dss_device *dssdev);
Jani Nikula368a1482010-05-07 11:58:41 +0200385#else
Tomi Valkeinen277b2882011-03-02 12:32:48 +0200386static inline int dpi_init(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200387{
388 return 0;
389}
390static inline void dpi_exit(void)
391{
392}
393#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200394
395/* DISPC */
Senthilvadivu Guruswamy060b6d92011-01-24 06:22:00 +0000396int dispc_init_platform_driver(void);
397void dispc_uninit_platform_driver(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200398void dispc_dump_clocks(struct seq_file *s);
Tomi Valkeinendfc0fd82009-12-17 14:35:21 +0200399void dispc_dump_irqs(struct seq_file *s);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200400void dispc_dump_regs(struct seq_file *s);
401void dispc_irq_handler(void);
402void dispc_fake_vsync_irq(void);
403
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300404int dispc_runtime_get(void);
405void dispc_runtime_put(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200406
407void dispc_enable_sidle(void);
408void dispc_disable_sidle(void);
409
410void dispc_lcd_enable_signal_polarity(bool act_high);
411void dispc_lcd_enable_signal(bool enable);
412void dispc_pck_free_enable(bool enable);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200413void dispc_set_digit_size(u16 width, u16 height);
Tomi Valkeinencd295ae2011-08-16 13:49:15 +0300414void dispc_enable_fifomerge(bool enable);
415void dispc_enable_gamma_table(bool enable);
416void dispc_set_loadmode(enum omap_dss_load_mode mode);
417
418bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
419unsigned long dispc_fclk_rate(void);
420void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
421 struct dispc_clock_info *cinfo);
422int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
423 struct dispc_clock_info *cinfo);
424
425
Tomi Valkeinen6f04e1b2011-10-31 08:58:52 +0200426void dispc_ovl_set_fifo_threshold(enum omap_plane plane, u32 low, u32 high);
Tomi Valkeinen83fa2f22012-01-13 13:17:01 +0200427void dispc_ovl_compute_fifo_thresholds(enum omap_plane plane,
428 u32 *fifo_low, u32 *fifo_high, bool use_fifomerge);
Archit Tanejaa4273b72011-09-14 11:10:10 +0530429int dispc_ovl_setup(enum omap_plane plane, struct omap_overlay_info *oi,
Tomi Valkeinen2cc5d1a2011-11-03 17:03:44 +0200430 bool ilace, bool replication);
Tomi Valkeinencd295ae2011-08-16 13:49:15 +0300431int dispc_ovl_enable(enum omap_plane plane, bool enable);
Tomi Valkeinenf4279842011-10-28 15:26:26 +0300432void dispc_ovl_set_channel_out(enum omap_plane plane,
433 enum omap_channel channel);
Tomi Valkeinencd295ae2011-08-16 13:49:15 +0300434
435void dispc_mgr_enable_fifohandcheck(enum omap_channel channel, bool enable);
436void dispc_mgr_set_lcd_size(enum omap_channel channel, u16 width, u16 height);
Tomi Valkeinen3dcec4d2011-11-07 15:50:09 +0200437u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
Tomi Valkeinen7d1365c2011-11-18 15:39:52 +0200438u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300439bool dispc_mgr_go_busy(enum omap_channel channel);
440void dispc_mgr_go(enum omap_channel channel);
Tomi Valkeinen875459572011-11-15 10:56:11 +0200441bool dispc_mgr_is_enabled(enum omap_channel channel);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300442void dispc_mgr_enable(enum omap_channel channel, bool enable);
443bool dispc_mgr_is_channel_enabled(enum omap_channel channel);
Archit Taneja569969d2011-08-22 17:41:57 +0530444void dispc_mgr_set_io_pad_mode(enum dss_io_pad_mode mode);
445void dispc_mgr_enable_stallmode(enum omap_channel channel, bool enable);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300446void dispc_mgr_set_tft_data_lines(enum omap_channel channel, u8 data_lines);
447void dispc_mgr_set_lcd_display_type(enum omap_channel channel,
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000448 enum omap_lcd_display_type type);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300449void dispc_mgr_set_lcd_timings(enum omap_channel channel,
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000450 struct omap_video_timings *timings);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300451void dispc_mgr_set_pol_freq(enum omap_channel channel,
Sumit Semwalff1b2cd2010-12-02 11:27:11 +0000452 enum omap_panel_config config, u8 acbi, u8 acb);
Tomi Valkeinencd295ae2011-08-16 13:49:15 +0300453unsigned long dispc_mgr_lclk_rate(enum omap_channel channel);
454unsigned long dispc_mgr_pclk_rate(enum omap_channel channel);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300455int dispc_mgr_set_clock_div(enum omap_channel channel,
Sumit Semwalff1b2cd2010-12-02 11:27:11 +0000456 struct dispc_clock_info *cinfo);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300457int dispc_mgr_get_clock_div(enum omap_channel channel,
Sumit Semwalff1b2cd2010-12-02 11:27:11 +0000458 struct dispc_clock_info *cinfo);
Tomi Valkeinenc64dca42011-11-04 18:14:20 +0200459void dispc_mgr_setup(enum omap_channel channel,
460 struct omap_overlay_manager_info *info);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200461
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200462/* VENC */
Jani Nikula368a1482010-05-07 11:58:41 +0200463#ifdef CONFIG_OMAP2_DSS_VENC
Senthilvadivu Guruswamy30ea50c2011-01-24 06:22:01 +0000464int venc_init_platform_driver(void);
465void venc_uninit_platform_driver(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200466void venc_dump_regs(struct seq_file *s);
467int venc_init_display(struct omap_dss_device *display);
Archit Tanejac3dc6a72011-09-13 18:28:41 +0530468unsigned long venc_get_pixel_clock(void);
Jani Nikula368a1482010-05-07 11:58:41 +0200469#else
Senthilvadivu Guruswamy30ea50c2011-01-24 06:22:01 +0000470static inline int venc_init_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200471{
472 return 0;
473}
Senthilvadivu Guruswamy30ea50c2011-01-24 06:22:01 +0000474static inline void venc_uninit_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200475{
476}
Archit Tanejac3dc6a72011-09-13 18:28:41 +0530477static inline unsigned long venc_get_pixel_clock(void)
478{
479 WARN("%s: VENC not compiled in, returning pclk as 0\n", __func__);
480 return 0;
481}
Jani Nikula368a1482010-05-07 11:58:41 +0200482#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200483
Mythri P Kc3198a52011-03-12 12:04:27 +0530484/* HDMI */
485#ifdef CONFIG_OMAP4_DSS_HDMI
486int hdmi_init_platform_driver(void);
487void hdmi_uninit_platform_driver(void);
488int hdmi_init_display(struct omap_dss_device *dssdev);
Archit Tanejac3dc6a72011-09-13 18:28:41 +0530489unsigned long hdmi_get_pixel_clock(void);
Mythri P K162874d2011-09-22 13:37:45 +0530490void hdmi_dump_regs(struct seq_file *s);
Mythri P Kc3198a52011-03-12 12:04:27 +0530491#else
492static inline int hdmi_init_display(struct omap_dss_device *dssdev)
493{
494 return 0;
495}
496static inline int hdmi_init_platform_driver(void)
497{
498 return 0;
499}
500static inline void hdmi_uninit_platform_driver(void)
501{
502}
Archit Tanejac3dc6a72011-09-13 18:28:41 +0530503static inline unsigned long hdmi_get_pixel_clock(void)
504{
505 WARN("%s: HDMI not compiled in, returning pclk as 0\n", __func__);
506 return 0;
507}
Mythri P Kc3198a52011-03-12 12:04:27 +0530508#endif
509int omapdss_hdmi_display_enable(struct omap_dss_device *dssdev);
510void omapdss_hdmi_display_disable(struct omap_dss_device *dssdev);
511void omapdss_hdmi_display_set_timing(struct omap_dss_device *dssdev);
512int omapdss_hdmi_display_check_timing(struct omap_dss_device *dssdev,
513 struct omap_video_timings *timings);
Tomi Valkeinen47024562011-08-25 17:12:56 +0300514int omapdss_hdmi_read_edid(u8 *buf, int len);
Tomi Valkeinen759593f2011-08-29 18:10:20 +0300515bool omapdss_hdmi_detect(void);
Mythri P K70be8322011-03-10 15:48:48 +0530516int hdmi_panel_init(void);
517void hdmi_panel_exit(void);
Mythri P Kc3198a52011-03-12 12:04:27 +0530518
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200519/* RFBI */
Jani Nikula368a1482010-05-07 11:58:41 +0200520#ifdef CONFIG_OMAP2_DSS_RFBI
Senthilvadivu Guruswamy3448d502011-01-24 06:21:59 +0000521int rfbi_init_platform_driver(void);
522void rfbi_uninit_platform_driver(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200523void rfbi_dump_regs(struct seq_file *s);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200524int rfbi_init_display(struct omap_dss_device *display);
Jani Nikula368a1482010-05-07 11:58:41 +0200525#else
Senthilvadivu Guruswamy3448d502011-01-24 06:21:59 +0000526static inline int rfbi_init_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200527{
528 return 0;
529}
Senthilvadivu Guruswamy3448d502011-01-24 06:21:59 +0000530static inline void rfbi_uninit_platform_driver(void)
Jani Nikula368a1482010-05-07 11:58:41 +0200531{
532}
533#endif
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200534
Tomi Valkeinendfc0fd82009-12-17 14:35:21 +0200535
536#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
537static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
538{
539 int b;
540 for (b = 0; b < 32; ++b) {
541 if (irqstatus & (1 << b))
542 irq_arr[b]++;
543 }
544}
545#endif
546
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200547#endif