blob: 2a3de092bf130af48835c4a14f21a2b71f068159 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Ilya A. Volynets-Evenbakh
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 */
9#ifndef __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
10#define __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H
11
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13/*
14 * R5000 has an interesting "restriction": ll(d)/sc(d)
15 * instructions to XKPHYS region simply do uncached bus
16 * requests. This breaks all the atomic bitops functions.
17 * so, for 64bit IP32 kernel we just don't use ll/sc.
18 * This does not affect luserland.
19 */
Ralf Baechledd2f18f2006-01-19 14:55:42 +000020#if (defined(CONFIG_CPU_R5000) || defined(CONFIG_CPU_NEVADA)) && defined(CONFIG_64BIT)
Linus Torvalds1da177e2005-04-16 15:20:36 -070021#define cpu_has_llsc 0
22#else
23#define cpu_has_llsc 1
24#endif
25
26/* Settings which are common for all ip32 CPUs */
27#define cpu_has_tlb 1
28#define cpu_has_4kex 1
29#define cpu_has_fpu 1
30#define cpu_has_32fpr 1
31#define cpu_has_counter 1
32#define cpu_has_mips16 0
33#define cpu_has_vce 0
34#define cpu_has_cache_cdex_s 0
35#define cpu_has_mcheck 0
36#define cpu_has_ejtag 0
37#define cpu_has_vtag_icache 0
38#define cpu_has_ic_fills_f_dc 0
Ralf Baechlee50c0a82005-05-31 11:49:19 +000039#define cpu_has_dsp 0
Kumba24939212006-06-18 02:16:53 -040040#define cpu_has_4k_cache 1
41
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
Ralf Baechleb4672d32005-12-08 14:04:24 +000043#define cpu_has_mips32r1 0
44#define cpu_has_mips32r2 0
45#define cpu_has_mips64r1 0
46#define cpu_has_mips64r2 0
47
Linus Torvalds1da177e2005-04-16 15:20:36 -070048#endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */