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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _PARISC_PGTABLE_H
2#define _PARISC_PGTABLE_H
3
4#include <asm-generic/4level-fixup.h>
5
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <asm/fixmap.h>
7
8#ifndef __ASSEMBLY__
9/*
10 * we simulate an x86-style page table for the linux mm code
11 */
12
13#include <linux/spinlock.h>
Tim Schmielau8c65b4a2005-11-07 00:59:43 -080014#include <linux/mm.h> /* for vm_area_struct */
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <asm/processor.h>
16#include <asm/cache.h>
17#include <asm/bitops.h>
18
19/*
20 * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
21 * memory. For the return value to be meaningful, ADDR must be >=
22 * PAGE_OFFSET. This operation can be relatively expensive (e.g.,
23 * require a hash-, or multi-level tree-lookup or something of that
24 * sort) but it guarantees to return TRUE only if accessing the page
25 * at that address does not cause an error. Note that there may be
26 * addresses for which kern_addr_valid() returns FALSE even though an
27 * access would not cause an error (e.g., this is typically true for
28 * memory mapped I/O regions.
29 *
30 * XXX Need to implement this for parisc.
31 */
32#define kern_addr_valid(addr) (1)
33
34/* Certain architectures need to do special things when PTEs
35 * within a page table are directly modified. Thus, the following
36 * hook is made available.
37 */
38#define set_pte(pteptr, pteval) \
39 do{ \
40 *(pteptr) = (pteval); \
41 } while(0)
42#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
43
44#endif /* !__ASSEMBLY__ */
45
46#define pte_ERROR(e) \
47 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
48#define pmd_ERROR(e) \
49 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, (unsigned long)pmd_val(e))
50#define pgd_ERROR(e) \
51 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
52
53 /* Note: If you change ISTACK_SIZE, you need to change the corresponding
54 * values in vmlinux.lds and vmlinux64.lds (init_istack section). Also,
55 * the "order" and size need to agree.
56 */
57
58#define ISTACK_SIZE 32768 /* Interrupt Stack Size */
59#define ISTACK_ORDER 3
60
Helge Deller2fd83032006-04-20 20:40:23 +000061/* This is the size of the initially mapped kernel memory */
Linus Torvalds1da177e2005-04-16 15:20:36 -070062#ifdef CONFIG_64BIT
Helge Deller2fd83032006-04-20 20:40:23 +000063#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
Linus Torvalds1da177e2005-04-16 15:20:36 -070064#else
Helge Deller2fd83032006-04-20 20:40:23 +000065#define KERNEL_INITIAL_ORDER 23 /* 0 to 1<<23 = 8MB */
Linus Torvalds1da177e2005-04-16 15:20:36 -070066#endif
67#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
68
Helge Deller2fd83032006-04-20 20:40:23 +000069#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070#define PT_NLEVELS 3
71#define PGD_ORDER 1 /* Number of pages per pgd */
72#define PMD_ORDER 1 /* Number of pages per pmd */
73#define PGD_ALLOC_ORDER 2 /* first pgd contains pmd */
74#else
75#define PT_NLEVELS 2
76#define PGD_ORDER 1 /* Number of pages per pgd */
77#define PGD_ALLOC_ORDER PGD_ORDER
78#endif
79
80/* Definitions for 3rd level (we use PLD here for Page Lower directory
81 * because PTE_SHIFT is used lower down to mean shift that has to be
82 * done to get usable bits out of the PTE) */
83#define PLD_SHIFT PAGE_SHIFT
84#define PLD_SIZE PAGE_SIZE
85#define BITS_PER_PTE (PAGE_SHIFT - BITS_PER_PTE_ENTRY)
86#define PTRS_PER_PTE (1UL << BITS_PER_PTE)
87
88/* Definitions for 2nd level */
89#define pgtable_cache_init() do { } while (0)
90
91#define PMD_SHIFT (PLD_SHIFT + BITS_PER_PTE)
92#define PMD_SIZE (1UL << PMD_SHIFT)
93#define PMD_MASK (~(PMD_SIZE-1))
94#if PT_NLEVELS == 3
95#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
96#else
97#define BITS_PER_PMD 0
98#endif
99#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
100
101/* Definitions for 1st level */
102#define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD)
103#define BITS_PER_PGD (PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY)
104#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
105#define PGDIR_MASK (~(PGDIR_SIZE-1))
106#define PTRS_PER_PGD (1UL << BITS_PER_PGD)
107#define USER_PTRS_PER_PGD PTRS_PER_PGD
108
109#define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
110#define MAX_ADDRESS (1UL << MAX_ADDRBITS)
111
Helge Deller2fd83032006-04-20 20:40:23 +0000112#define SPACEID_SHIFT (MAX_ADDRBITS - 32)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113
114/* This calculates the number of initial pages we need for the initial
115 * page tables */
Helge Deller2fd83032006-04-20 20:40:23 +0000116#if (KERNEL_INITIAL_ORDER) >= (PMD_SHIFT)
117# define PT_INITIAL (1 << (KERNEL_INITIAL_ORDER - PMD_SHIFT))
118#else
119# define PT_INITIAL (1) /* all initial PTEs fit into one page */
120#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700121
122/*
123 * pgd entries used up by user/kernel:
124 */
125
Hugh Dickinsd455a362005-04-19 13:29:23 -0700126#define FIRST_USER_ADDRESS 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127
128#ifndef __ASSEMBLY__
129extern void *vmalloc_start;
130#define PCXL_DMA_MAP_SIZE (8*1024*1024)
131#define VMALLOC_START ((unsigned long)vmalloc_start)
132/* this is a fixmap remnant, see fixmap.h */
133#define VMALLOC_END (KERNEL_MAP_END)
134#endif
135
136/* NB: The tlb miss handlers make certain assumptions about the order */
137/* of the following bits, so be careful (One example, bits 25-31 */
138/* are moved together in one instruction). */
139
140#define _PAGE_READ_BIT 31 /* (0x001) read access allowed */
141#define _PAGE_WRITE_BIT 30 /* (0x002) write access allowed */
142#define _PAGE_EXEC_BIT 29 /* (0x004) execute access allowed */
143#define _PAGE_GATEWAY_BIT 28 /* (0x008) privilege promotion allowed */
144#define _PAGE_DMB_BIT 27 /* (0x010) Data Memory Break enable (B bit) */
145#define _PAGE_DIRTY_BIT 26 /* (0x020) Page Dirty (D bit) */
146#define _PAGE_FILE_BIT _PAGE_DIRTY_BIT /* overload this bit */
147#define _PAGE_REFTRAP_BIT 25 /* (0x040) Page Ref. Trap enable (T bit) */
148#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
149#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
150#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
151#define _PAGE_FLUSH_BIT 21 /* (0x400) Software: translation valid */
152 /* for cache flushing only */
153#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
154
155/* N.B. The bits are defined in terms of a 32 bit word above, so the */
156/* following macro is ok for both 32 and 64 bit. */
157
158#define xlate_pabit(x) (31 - x)
159
160/* this defines the shift to the usable bits in the PTE it is set so
161 * that the valid bits _PAGE_PRESENT_BIT and _PAGE_USER_BIT are set
162 * to zero */
163#define PTE_SHIFT xlate_pabit(_PAGE_USER_BIT)
164
Helge Deller2fd83032006-04-20 20:40:23 +0000165/* PFN_PTE_SHIFT defines the shift of a PTE value to access the PFN field */
166#define PFN_PTE_SHIFT 12
167
168
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169/* this is how many bits may be used by the file functions */
170#define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_SHIFT)
171
172#define pte_to_pgoff(pte) (pte_val(pte) >> PTE_SHIFT)
173#define pgoff_to_pte(off) ((pte_t) { ((off) << PTE_SHIFT) | _PAGE_FILE })
174
175#define _PAGE_READ (1 << xlate_pabit(_PAGE_READ_BIT))
176#define _PAGE_WRITE (1 << xlate_pabit(_PAGE_WRITE_BIT))
177#define _PAGE_RW (_PAGE_READ | _PAGE_WRITE)
178#define _PAGE_EXEC (1 << xlate_pabit(_PAGE_EXEC_BIT))
179#define _PAGE_GATEWAY (1 << xlate_pabit(_PAGE_GATEWAY_BIT))
180#define _PAGE_DMB (1 << xlate_pabit(_PAGE_DMB_BIT))
181#define _PAGE_DIRTY (1 << xlate_pabit(_PAGE_DIRTY_BIT))
182#define _PAGE_REFTRAP (1 << xlate_pabit(_PAGE_REFTRAP_BIT))
183#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
184#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
185#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
186#define _PAGE_FLUSH (1 << xlate_pabit(_PAGE_FLUSH_BIT))
187#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
188#define _PAGE_FILE (1 << xlate_pabit(_PAGE_FILE_BIT))
189
190#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
191#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
192#define _PAGE_KERNEL (_PAGE_PRESENT | _PAGE_EXEC | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
193
194/* The pgd/pmd contains a ptr (in phys addr space); since all pgds/pmds
195 * are page-aligned, we don't care about the PAGE_OFFSET bits, except
196 * for a few meta-information bits, so we shift the address to be
Helge Deller2fd83032006-04-20 20:40:23 +0000197 * able to effectively address 40/42/44-bits of physical address space
198 * depending on 4k/16k/64k PAGE_SIZE */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700199#define _PxD_PRESENT_BIT 31
200#define _PxD_ATTACHED_BIT 30
201#define _PxD_VALID_BIT 29
202
203#define PxD_FLAG_PRESENT (1 << xlate_pabit(_PxD_PRESENT_BIT))
204#define PxD_FLAG_ATTACHED (1 << xlate_pabit(_PxD_ATTACHED_BIT))
205#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
206#define PxD_FLAG_MASK (0xf)
207#define PxD_FLAG_SHIFT (4)
Helge Deller2fd83032006-04-20 20:40:23 +0000208#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209
210#ifndef __ASSEMBLY__
211
212#define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED)
213#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_ACCESSED)
214/* Others seem to make this executable, I don't know if that's correct
215 or not. The stack is mapped this way though so this is necessary
216 in the short term - dhd@linuxcare.com, 2000-08-08 */
217#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_ACCESSED)
218#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITE | _PAGE_ACCESSED)
219#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_EXEC |_PAGE_ACCESSED)
220#define PAGE_COPY PAGE_EXECREAD
221#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_READ | _PAGE_WRITE | _PAGE_EXEC |_PAGE_ACCESSED)
222#define PAGE_KERNEL __pgprot(_PAGE_KERNEL)
Helge Deller1bcdd852006-01-13 13:21:06 -0700223#define PAGE_KERNEL_RO __pgprot(_PAGE_KERNEL & ~_PAGE_WRITE)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224#define PAGE_KERNEL_UNC __pgprot(_PAGE_KERNEL | _PAGE_NO_CACHE)
225#define PAGE_GATEWAY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_ACCESSED | _PAGE_GATEWAY| _PAGE_READ)
226#define PAGE_FLUSH __pgprot(_PAGE_FLUSH)
227
228
229/*
230 * We could have an execute only page using "gateway - promote to priv
231 * level 3", but that is kind of silly. So, the way things are defined
232 * now, we must always have read permission for pages with execute
233 * permission. For the fun of it we'll go ahead and support write only
234 * pages.
235 */
236
237 /*xwr*/
238#define __P000 PAGE_NONE
239#define __P001 PAGE_READONLY
240#define __P010 __P000 /* copy on write */
241#define __P011 __P001 /* copy on write */
242#define __P100 PAGE_EXECREAD
243#define __P101 PAGE_EXECREAD
244#define __P110 __P100 /* copy on write */
245#define __P111 __P101 /* copy on write */
246
247#define __S000 PAGE_NONE
248#define __S001 PAGE_READONLY
249#define __S010 PAGE_WRITEONLY
250#define __S011 PAGE_SHARED
251#define __S100 PAGE_EXECREAD
252#define __S101 PAGE_EXECREAD
253#define __S110 PAGE_RWX
254#define __S111 PAGE_RWX
255
Helge Deller2fd83032006-04-20 20:40:23 +0000256
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257extern pgd_t swapper_pg_dir[]; /* declared in init_task.c */
258
259/* initial page tables for 0-8MB for kernel */
260
261extern pte_t pg0[];
262
263/* zero page used for uninitialized stuff */
264
265extern unsigned long *empty_zero_page;
266
267/*
268 * ZERO_PAGE is a global shared page that is always zero: used
269 * for zero-mapped memory areas etc..
270 */
271
272#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
273
274#define pte_none(x) ((pte_val(x) == 0) || (pte_val(x) & _PAGE_FLUSH))
275#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
276#define pte_clear(mm,addr,xp) do { pte_val(*(xp)) = 0; } while (0)
277
278#define pmd_flag(x) (pmd_val(x) & PxD_FLAG_MASK)
279#define pmd_address(x) ((unsigned long)(pmd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
280#define pgd_flag(x) (pgd_val(x) & PxD_FLAG_MASK)
281#define pgd_address(x) ((unsigned long)(pgd_val(x) &~ PxD_FLAG_MASK) << PxD_VALUE_SHIFT)
282
Helge Deller2fd83032006-04-20 20:40:23 +0000283#if PT_NLEVELS == 3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284/* The first entry of the permanent pmd is not there if it contains
285 * the gateway marker */
286#define pmd_none(x) (!pmd_val(x) || pmd_flag(x) == PxD_FLAG_ATTACHED)
287#else
288#define pmd_none(x) (!pmd_val(x))
289#endif
290#define pmd_bad(x) (!(pmd_flag(x) & PxD_FLAG_VALID))
291#define pmd_present(x) (pmd_flag(x) & PxD_FLAG_PRESENT)
292static inline void pmd_clear(pmd_t *pmd) {
Helge Deller2fd83032006-04-20 20:40:23 +0000293#if PT_NLEVELS == 3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294 if (pmd_flag(*pmd) & PxD_FLAG_ATTACHED)
295 /* This is the entry pointing to the permanent pmd
296 * attached to the pgd; cannot clear it */
297 __pmd_val_set(*pmd, PxD_FLAG_ATTACHED);
298 else
299#endif
300 __pmd_val_set(*pmd, 0);
301}
302
303
304
305#if PT_NLEVELS == 3
Dave McCracken46a82b22006-09-25 23:31:48 -0700306#define pgd_page_vaddr(pgd) ((unsigned long) __va(pgd_address(pgd)))
307#define pgd_page(pgd) virt_to_page((void *)pgd_page_vaddr(pgd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700308
309/* For 64 bit we have three level tables */
310
311#define pgd_none(x) (!pgd_val(x))
312#define pgd_bad(x) (!(pgd_flag(x) & PxD_FLAG_VALID))
313#define pgd_present(x) (pgd_flag(x) & PxD_FLAG_PRESENT)
314static inline void pgd_clear(pgd_t *pgd) {
Helge Deller2fd83032006-04-20 20:40:23 +0000315#if PT_NLEVELS == 3
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316 if(pgd_flag(*pgd) & PxD_FLAG_ATTACHED)
317 /* This is the permanent pmd attached to the pgd; cannot
318 * free it */
319 return;
320#endif
321 __pgd_val_set(*pgd, 0);
322}
323#else
324/*
325 * The "pgd_xxx()" functions here are trivial for a folded two-level
326 * setup: the pgd is never bad, and a pmd always exists (as it's folded
327 * into the pgd entry)
328 */
329extern inline int pgd_none(pgd_t pgd) { return 0; }
330extern inline int pgd_bad(pgd_t pgd) { return 0; }
331extern inline int pgd_present(pgd_t pgd) { return 1; }
332extern inline void pgd_clear(pgd_t * pgdp) { }
333#endif
334
335/*
336 * The following only work if pte_present() is true.
337 * Undefined behaviour if not..
338 */
339extern inline int pte_read(pte_t pte) { return pte_val(pte) & _PAGE_READ; }
340extern inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
341extern inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
342extern inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
343extern inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
344extern inline int pte_user(pte_t pte) { return pte_val(pte) & _PAGE_USER; }
345
346extern inline pte_t pte_rdprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_READ; return pte; }
347extern inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
348extern inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
349extern inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~_PAGE_WRITE; return pte; }
350extern inline pte_t pte_mkread(pte_t pte) { pte_val(pte) |= _PAGE_READ; return pte; }
351extern inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
352extern inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
353extern inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
354
355/*
356 * Conversion functions: convert a page and protection to a page entry,
357 * and a page entry and page directory to the page they refer to.
358 */
359#define __mk_pte(addr,pgprot) \
360({ \
361 pte_t __pte; \
362 \
Helge Deller2fd83032006-04-20 20:40:23 +0000363 pte_val(__pte) = ((((addr)>>PAGE_SHIFT)<<PFN_PTE_SHIFT) + pgprot_val(pgprot)); \
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364 \
365 __pte; \
366})
367
368#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
369
370static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
371{
372 pte_t pte;
Helge Deller2fd83032006-04-20 20:40:23 +0000373 pte_val(pte) = (pfn << PFN_PTE_SHIFT) | pgprot_val(pgprot);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374 return pte;
375}
376
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377extern inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
378{ pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); return pte; }
379
380/* Permanent address of a page. On parisc we don't have highmem. */
381
Helge Deller2fd83032006-04-20 20:40:23 +0000382#define pte_pfn(x) (pte_val(x) >> PFN_PTE_SHIFT)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700383
384#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
385
Dave McCracken46a82b22006-09-25 23:31:48 -0700386#define pmd_page_vaddr(pmd) ((unsigned long) __va(pmd_address(pmd)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387
388#define __pmd_page(pmd) ((unsigned long) __va(pmd_address(pmd)))
389#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd))
390
391#define pgd_index(address) ((address) >> PGDIR_SHIFT)
392
393/* to find an entry in a page-table-directory */
394#define pgd_offset(mm, address) \
395((mm)->pgd + ((address) >> PGDIR_SHIFT))
396
397/* to find an entry in a kernel page-table-directory */
398#define pgd_offset_k(address) pgd_offset(&init_mm, address)
399
400/* Find an entry in the second-level page table.. */
401
402#if PT_NLEVELS == 3
403#define pmd_offset(dir,address) \
Dave McCracken46a82b22006-09-25 23:31:48 -0700404((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405#else
406#define pmd_offset(dir,addr) ((pmd_t *) dir)
407#endif
408
409/* Find an entry in the third-level page table.. */
410#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
411#define pte_offset_kernel(pmd, address) \
Dave McCracken46a82b22006-09-25 23:31:48 -0700412 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
414#define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
415#define pte_unmap(pte) do { } while (0)
416#define pte_unmap_nested(pte) do { } while (0)
417
418#define pte_unmap(pte) do { } while (0)
419#define pte_unmap_nested(pte) do { } while (0)
420
421extern void paging_init (void);
422
423/* Used for deferring calls to flush_dcache_page() */
424
425#define PG_dcache_dirty PG_arch_1
426
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t);
428
429/* Encode and de-code a swap entry */
430
431#define __swp_type(x) ((x).val & 0x1f)
432#define __swp_offset(x) ( (((x).val >> 6) & 0x7) | \
433 (((x).val >> 8) & ~0x7) )
434#define __swp_entry(type, offset) ((swp_entry_t) { (type) | \
435 ((offset & 0x7) << 6) | \
436 ((offset & ~0x7) << 8) })
437#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
438#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
439
440static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
441{
442#ifdef CONFIG_SMP
443 if (!pte_young(*ptep))
444 return 0;
445 return test_and_clear_bit(xlate_pabit(_PAGE_ACCESSED_BIT), &pte_val(*ptep));
446#else
447 pte_t pte = *ptep;
448 if (!pte_young(pte))
449 return 0;
450 set_pte_at(vma->vm_mm, addr, ptep, pte_mkold(pte));
451 return 1;
452#endif
453}
454
455static inline int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
456{
457#ifdef CONFIG_SMP
458 if (!pte_dirty(*ptep))
459 return 0;
460 return test_and_clear_bit(xlate_pabit(_PAGE_DIRTY_BIT), &pte_val(*ptep));
461#else
462 pte_t pte = *ptep;
463 if (!pte_dirty(pte))
464 return 0;
465 set_pte_at(vma->vm_mm, addr, ptep, pte_mkclean(pte));
466 return 1;
467#endif
468}
469
470extern spinlock_t pa_dbit_lock;
471
Tim Schmielau8c65b4a2005-11-07 00:59:43 -0800472struct mm_struct;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700473static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
474{
475 pte_t old_pte;
476 pte_t pte;
477
478 spin_lock(&pa_dbit_lock);
479 pte = old_pte = *ptep;
480 pte_val(pte) &= ~_PAGE_PRESENT;
481 pte_val(pte) |= _PAGE_FLUSH;
482 set_pte_at(mm,addr,ptep,pte);
483 spin_unlock(&pa_dbit_lock);
484
485 return old_pte;
486}
487
488static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
489{
490#ifdef CONFIG_SMP
491 unsigned long new, old;
492
493 do {
494 old = pte_val(*ptep);
495 new = pte_val(pte_wrprotect(__pte (old)));
496 } while (cmpxchg((unsigned long *) ptep, old, new) != old);
497#else
498 pte_t old_pte = *ptep;
499 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
500#endif
501}
502
503#define pte_same(A,B) (pte_val(A) == pte_val(B))
504
505#endif /* !__ASSEMBLY__ */
506
Helge Deller2fd83032006-04-20 20:40:23 +0000507
508/* TLB page size encoding - see table 3-1 in parisc20.pdf */
509#define _PAGE_SIZE_ENCODING_4K 0
Kyle McMartinc8224e02006-04-21 02:20:37 +0000510#define _PAGE_SIZE_ENCODING_16K 1
511#define _PAGE_SIZE_ENCODING_64K 2
Helge Deller2fd83032006-04-20 20:40:23 +0000512#define _PAGE_SIZE_ENCODING_256K 3
513#define _PAGE_SIZE_ENCODING_1M 4
514#define _PAGE_SIZE_ENCODING_4M 5
Kyle McMartinc8224e02006-04-21 02:20:37 +0000515#define _PAGE_SIZE_ENCODING_16M 6
516#define _PAGE_SIZE_ENCODING_64M 7
Helge Deller2fd83032006-04-20 20:40:23 +0000517
518#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
519# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
520#elif defined(CONFIG_PARISC_PAGE_SIZE_16KB)
521# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16K
522#elif defined(CONFIG_PARISC_PAGE_SIZE_64KB)
523# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_64K
524#endif
525
526
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
528 remap_pfn_range(vma, vaddr, pfn, size, prot)
529
Grant Grundler63af9652005-10-21 22:54:20 -0400530#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) | _PAGE_NO_CACHE)
531
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532#define MK_IOSPACE_PFN(space, pfn) (pfn)
533#define GET_IOSPACE(pfn) 0
534#define GET_PFN(pfn) (pfn)
535
536/* We provide our own get_unmapped_area to provide cache coherency */
537
538#define HAVE_ARCH_UNMAPPED_AREA
539
540#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
541#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
542#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
543#define __HAVE_ARCH_PTEP_SET_WRPROTECT
544#define __HAVE_ARCH_PTE_SAME
545#include <asm-generic/pgtable.h>
546
547#endif /* _PARISC_PGTABLE_H */